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Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
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linux
ARM: dts: imx6: phytec: Add PEB-WLBT-05 support
The PEB-WLBT-05 is equipped with a Sterling-LWB radio module, which is
capable of Wi-Fi 802.11 b/g/n and Bluetooth 4.2.
Signed-off-by: Yunus Bas <y.bas@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
+201
+1
arch/arm/boot/dts/imx6dl-phytec-mira-rdk-nand.dts
+1
arch/arm/boot/dts/imx6dl-phytec-mira-rdk-nand.dts
+1
arch/arm/boot/dts/imx6q-phytec-mira-rdk-emmc.dts
+1
arch/arm/boot/dts/imx6q-phytec-mira-rdk-emmc.dts
+1
arch/arm/boot/dts/imx6q-phytec-mira-rdk-nand.dts
+1
arch/arm/boot/dts/imx6q-phytec-mira-rdk-nand.dts
+85
arch/arm/boot/dts/imx6qdl-phytec-mira-peb-wlbt-05.dtsi
+85
arch/arm/boot/dts/imx6qdl-phytec-mira-peb-wlbt-05.dtsi
···
1
+
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
+
/*
3
+
* Copyright (C) 2021 PHYTEC Messtechnik GmbH
4
+
* Author: Yunus Bas <y.bas@phytec.de>
5
+
*/
6
+
7
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#include <dt-bindings/gpio/gpio.h>
8
+
#include <dt-bindings/interrupt-controller/irq.h>
9
+
10
+
/ {
11
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reg_wl_en: regulator-wl-en {
12
+
compatible = "regulator-fixed";
13
+
regulator-name = "wlan_en";
14
+
regulator-min-microvolt = <3300000>;
15
+
regulator-max-microvolt = <3300000>;
16
+
pinctrl-names = "default";
17
+
pinctrl-0 = <&pinctrl_wl>;
18
+
gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
19
+
enable-active-high;
20
+
startup-delay-us = <100>;
21
+
status = "disabled";
22
+
};
23
+
};
24
+
25
+
&uart3 {
26
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pinctrl-names = "default";
27
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pinctrl-0 = <&pinctrl_uart3_bt>;
28
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uart-has-rtscts;
29
+
30
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bluetooth {
31
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compatible = "brcm,bcm43438-bt";
32
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shutdown-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
33
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device-wakeup-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
34
+
host-wakeup-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>;
35
+
status = "disabled";
36
+
};
37
+
};
38
+
39
+
&usdhc3 {
40
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#address-cells = <1>;
41
+
#size-cells = <0>;
42
+
pinctrl-names = "default";
43
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pinctrl-0 = <&pinctrl_usdhc3_wl>;
44
+
vmmc-supply = <®_wl_en>;
45
+
bus-width = <4>;
46
+
non-removable;
47
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no-1-8-v;
48
+
status = "disabled";
49
+
50
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brmcf: wifi@1 {
51
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compatible = "brcm,bcm4329-fmac";
52
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reg = <1>;
53
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};
54
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};
55
+
56
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&iomuxc {
57
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pinctrl_uart3_bt: uart3grp-bt {
58
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fsl,pins = <
59
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MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
60
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MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
61
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MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
62
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MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
63
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MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0xb0b1 /* BT ENABLE */
64
+
MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0xb0b1 /* DEV WAKEUP */
65
+
MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0xb0b1 /* HOST WAKEUP */
66
+
>;
67
+
};
68
+
69
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pinctrl_usdhc3_wl: usdhc3grp-wl {
70
+
fsl,pins = <
71
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MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
72
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MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
73
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MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
74
+
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
75
+
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
76
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MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
77
+
>;
78
+
};
79
+
80
+
pinctrl_wl: wlgrp {
81
+
fsl,pins = <
82
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MX6QDL_PAD_EIM_A25__GPIO5_IO02 0xb0b1 /* WLAN ENABLE */
83
+
>;
84
+
};
85
+
};
+1
arch/arm/boot/dts/imx6qp-phytec-mira-rdk-nand.dts
+1
arch/arm/boot/dts/imx6qp-phytec-mira-rdk-nand.dts
+1
arch/arm/boot/dts/imx6ul-phytec-segin-ff-rdk-nand.dts
+1
arch/arm/boot/dts/imx6ul-phytec-segin-ff-rdk-nand.dts
+90
arch/arm/boot/dts/imx6ul-phytec-segin-peb-wlbt-05.dtsi
+90
arch/arm/boot/dts/imx6ul-phytec-segin-peb-wlbt-05.dtsi
···
1
+
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
+
/*
3
+
* Copyright (C) 2021 PHYTEC Messtechnik GmbH
4
+
* Author: Yunus Bas <y.bas@phytec.de>
5
+
*/
6
+
7
+
#include <dt-bindings/gpio/gpio.h>
8
+
#include <dt-bindings/interrupt-controller/irq.h>
9
+
10
+
/ {
11
+
reg_wl_en: regulator-wl-en {
12
+
compatible = "regulator-fixed";
13
+
regulator-name = "wlan_en";
14
+
regulator-min-microvolt = <3300000>;
15
+
regulator-max-microvolt = <3300000>;
16
+
pinctrl-names = "default";
17
+
pinctrl-0 = <&pinctrl_wl>;
18
+
gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>;
19
+
enable-active-high;
20
+
startup-delay-us = <100>;
21
+
status = "disabled";
22
+
};
23
+
};
24
+
25
+
&iomuxc {
26
+
pinctrl_bt: btgrp {
27
+
fsl,pins = <
28
+
MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0x3031 /* BT ENABLE */
29
+
MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0x3031 /* HOST WAKEUP */
30
+
MX6UL_PAD_JTAG_MOD__GPIO1_IO10 0x3031 /* DEV WAKEUP */
31
+
>;
32
+
};
33
+
34
+
pinctrl_uart2_bt: uart2grp-bt {
35
+
fsl,pins = <
36
+
MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x17059
37
+
MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x17059
38
+
MX6UL_PAD_UART2_CTS_B__UART2_DCE_CTS 0x17059
39
+
MX6UL_PAD_UART2_RTS_B__UART2_DCE_RTS 0x17059
40
+
>;
41
+
};
42
+
43
+
pinctrl_usdhc2_wl: usdhc2grp-wl {
44
+
fsl,pins = <
45
+
MX6UL_PAD_LCD_DATA18__USDHC2_CMD 0x10051
46
+
MX6UL_PAD_LCD_DATA19__USDHC2_CLK 0x10061
47
+
MX6UL_PAD_LCD_DATA20__USDHC2_DATA0 0x10051
48
+
MX6UL_PAD_LCD_DATA21__USDHC2_DATA1 0x10051
49
+
MX6UL_PAD_LCD_DATA22__USDHC2_DATA2 0x10051
50
+
MX6UL_PAD_LCD_DATA23__USDHC2_DATA3 0x10051
51
+
>;
52
+
};
53
+
54
+
pinctrl_wl: wlgrp {
55
+
fsl,pins = <
56
+
MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x3031 /* WLAN ENABLE */
57
+
>;
58
+
};
59
+
};
60
+
61
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&uart2 {
62
+
pinctrl-names = "default";
63
+
pinctrl-0 = <&pinctrl_uart2_bt &pinctrl_bt>;
64
+
uart-has-rtscts;
65
+
status = "disabled";
66
+
67
+
bluetooth {
68
+
compatible = "brcm,bcm43438-bt";
69
+
shutdown-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
70
+
device-wakeup-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
71
+
host-wakeup-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
72
+
};
73
+
};
74
+
75
+
&usdhc2 {
76
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#address-cells = <1>;
77
+
#size-cells = <0>;
78
+
pinctrl-names = "default";
79
+
pinctrl-0 = <&pinctrl_usdhc2_wl>;
80
+
vmmc-supply = <®_wl_en>;
81
+
bus-width = <4>;
82
+
non-removable;
83
+
no-1-8-v;
84
+
status = "disabled";
85
+
86
+
brmcf: wifi@1 {
87
+
compatible = "brcm,bcm4329-fmac";
88
+
reg = <1>;
89
+
};
90
+
};
+1
arch/arm/boot/dts/imx6ull-phytec-segin-ff-rdk-nand.dts
+1
arch/arm/boot/dts/imx6ull-phytec-segin-ff-rdk-nand.dts
+1
arch/arm/boot/dts/imx6ull-phytec-segin-lc-rdk-nand.dts
+1
arch/arm/boot/dts/imx6ull-phytec-segin-lc-rdk-nand.dts
+19
arch/arm/boot/dts/imx6ull-phytec-segin-peb-wlbt-05.dtsi
+19
arch/arm/boot/dts/imx6ull-phytec-segin-peb-wlbt-05.dtsi
···
1
+
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
+
/*
3
+
* Copyright (C) 2021 PHYTEC Messtechnik GmbH
4
+
* Author: Yunus Bas <y.bas@phytec.de>
5
+
*/
6
+
7
+
#include "imx6ul-phytec-segin-peb-wlbt-05.dtsi"
8
+
9
+
&iomuxc {
10
+
/delete-node/ wlgrp;
11
+
};
12
+
13
+
&iomuxc_snvs {
14
+
pinctrl_wl: wlgrp {
15
+
fsl,pins = <
16
+
MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x3031
17
+
>;
18
+
};
19
+
};