Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

clk: sunxi-ng: h6-r: Add RTC gate clock

The H6 and H616 feature an (undocumented) bus clock gate for accessing
the RTC registers. This seems to be enabled at reset (or by the BootROM),
so we got away without it so far, but exists regardless.
Since the new RTC clock binding for the H616 requires this "bus" clock
to be specified in the DT, add this to R_CCU clock driver and expose it
on the DT side with a new number.
We do this for both the H6 and H616, but mark it as IGNORE_UNUSED, as we
cannot reference it in any H6 DTs.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220428230933.15262-2-andre.przywara@arm.com

authored by

Andre Przywara and committed by
Jernej Skrabec
38d321b6 31231092

+7 -1
+5
drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c
··· 98 98 0x1cc, BIT(0), 0); 99 99 static SUNXI_CCU_GATE(r_apb1_w1_clk, "r-apb1-w1", "r-apb1", 100 100 0x1ec, BIT(0), 0); 101 + static SUNXI_CCU_GATE(r_apb1_rtc_clk, "r-apb1-rtc", "r-apb1", 102 + 0x20c, BIT(0), CLK_IGNORE_UNUSED); 101 103 102 104 /* Information of IR(RX) mod clock is gathered from BSP source code */ 103 105 static const char * const r_mod0_default_parents[] = { "osc32k", "osc24M" }; ··· 149 147 &r_apb2_i2c_clk.common, 150 148 &r_apb2_rsb_clk.common, 151 149 &r_apb1_ir_clk.common, 150 + &r_apb1_rtc_clk.common, 152 151 &ir_clk.common, 153 152 }; 154 153 ··· 167 164 [CLK_R_APB2_RSB] = &r_apb2_rsb_clk.common.hw, 168 165 [CLK_R_APB1_IR] = &r_apb1_ir_clk.common.hw, 169 166 [CLK_R_APB1_W1] = &r_apb1_w1_clk.common.hw, 167 + [CLK_R_APB1_RTC] = &r_apb1_rtc_clk.common.hw, 170 168 [CLK_IR] = &ir_clk.common.hw, 171 169 [CLK_W1] = &w1_clk.common.hw, 172 170 }, ··· 183 179 [CLK_R_APB2_I2C] = &r_apb2_i2c_clk.common.hw, 184 180 [CLK_R_APB2_RSB] = &r_apb2_rsb_clk.common.hw, 185 181 [CLK_R_APB1_IR] = &r_apb1_ir_clk.common.hw, 182 + [CLK_R_APB1_RTC] = &r_apb1_rtc_clk.common.hw, 186 183 [CLK_IR] = &ir_clk.common.hw, 187 184 }, 188 185 .num = CLK_NUMBER,
+1 -1
drivers/clk/sunxi-ng/ccu-sun50i-h6-r.h
··· 14 14 15 15 #define CLK_R_APB2 3 16 16 17 - #define CLK_NUMBER (CLK_R_APB2_RSB + 1) 17 + #define CLK_NUMBER (CLK_R_APB1_RTC + 1) 18 18 19 19 #endif /* _CCU_SUN50I_H6_R_H */
+1
include/dt-bindings/clock/sun50i-h6-r-ccu.h
··· 22 22 #define CLK_W1 12 23 23 24 24 #define CLK_R_APB2_RSB 13 25 + #define CLK_R_APB1_RTC 14 25 26 26 27 #endif /* _DT_BINDINGS_CLK_SUN50I_H6_R_CCU_H_ */