Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

svga: Make svga_set_timings() take an iomem regbase pointer.

Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

authored by

David Miller and committed by
Paul Mundt
38d2620e 55db0923

+21 -20
+1 -1
drivers/video/arkfb.c
··· 781 781 } 782 782 783 783 ark_set_pixclock(info, (hdiv * info->var.pixclock) / hmul); 784 - svga_set_timings(&ark_timing_regs, &(info->var), hmul, hdiv, 784 + svga_set_timings(par->state.vgabase, &ark_timing_regs, &(info->var), hmul, hdiv, 785 785 (info->var.vmode & FB_VMODE_DOUBLE) ? 2 : 1, 786 786 (info->var.vmode & FB_VMODE_INTERLACED) ? 2 : 1, 787 787 hmul, info->node);
+1 -1
drivers/video/s3fb.c
··· 712 712 } 713 713 714 714 s3_set_pixclock(info, info->var.pixclock); 715 - svga_set_timings(&s3_timing_regs, &(info->var), hmul, 1, 715 + svga_set_timings(par->state.vgabase, &s3_timing_regs, &(info->var), hmul, 1, 716 716 (info->var.vmode & FB_VMODE_DOUBLE) ? 2 : 1, 717 717 (info->var.vmode & FB_VMODE_INTERLACED) ? 2 : 1, 718 718 hmul, info->node);
+17 -16
drivers/video/svgalib.c
··· 507 507 } 508 508 509 509 /* Set CRT timing registers */ 510 - void svga_set_timings(const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, 511 - u32 hmul, u32 hdiv, u32 vmul, u32 vdiv, u32 hborder, int node) 510 + void svga_set_timings(void __iomem *regbase, const struct svga_timing_regs *tm, 511 + struct fb_var_screeninfo *var, 512 + u32 hmul, u32 hdiv, u32 vmul, u32 vdiv, u32 hborder, int node) 512 513 { 513 514 u8 regval; 514 515 u32 value; ··· 517 516 value = var->xres + var->left_margin + var->right_margin + var->hsync_len; 518 517 value = (value * hmul) / hdiv; 519 518 pr_debug("fb%d: horizontal total : %d\n", node, value); 520 - svga_wcrt_multi(NULL, tm->h_total_regs, (value / 8) - 5); 519 + svga_wcrt_multi(regbase, tm->h_total_regs, (value / 8) - 5); 521 520 522 521 value = var->xres; 523 522 value = (value * hmul) / hdiv; 524 523 pr_debug("fb%d: horizontal display : %d\n", node, value); 525 - svga_wcrt_multi(NULL, tm->h_display_regs, (value / 8) - 1); 524 + svga_wcrt_multi(regbase, tm->h_display_regs, (value / 8) - 1); 526 525 527 526 value = var->xres; 528 527 value = (value * hmul) / hdiv; 529 528 pr_debug("fb%d: horizontal blank start: %d\n", node, value); 530 - svga_wcrt_multi(NULL, tm->h_blank_start_regs, (value / 8) - 1 + hborder); 529 + svga_wcrt_multi(regbase, tm->h_blank_start_regs, (value / 8) - 1 + hborder); 531 530 532 531 value = var->xres + var->left_margin + var->right_margin + var->hsync_len; 533 532 value = (value * hmul) / hdiv; 534 533 pr_debug("fb%d: horizontal blank end : %d\n", node, value); 535 - svga_wcrt_multi(NULL, tm->h_blank_end_regs, (value / 8) - 1 - hborder); 534 + svga_wcrt_multi(regbase, tm->h_blank_end_regs, (value / 8) - 1 - hborder); 536 535 537 536 value = var->xres + var->right_margin; 538 537 value = (value * hmul) / hdiv; 539 538 pr_debug("fb%d: horizontal sync start : %d\n", node, value); 540 - svga_wcrt_multi(NULL, tm->h_sync_start_regs, (value / 8)); 539 + svga_wcrt_multi(regbase, tm->h_sync_start_regs, (value / 8)); 541 540 542 541 value = var->xres + var->right_margin + var->hsync_len; 543 542 value = (value * hmul) / hdiv; 544 543 pr_debug("fb%d: horizontal sync end : %d\n", node, value); 545 - svga_wcrt_multi(NULL, tm->h_sync_end_regs, (value / 8)); 544 + svga_wcrt_multi(regbase, tm->h_sync_end_regs, (value / 8)); 546 545 547 546 value = var->yres + var->upper_margin + var->lower_margin + var->vsync_len; 548 547 value = (value * vmul) / vdiv; 549 548 pr_debug("fb%d: vertical total : %d\n", node, value); 550 - svga_wcrt_multi(NULL, tm->v_total_regs, value - 2); 549 + svga_wcrt_multi(regbase, tm->v_total_regs, value - 2); 551 550 552 551 value = var->yres; 553 552 value = (value * vmul) / vdiv; 554 553 pr_debug("fb%d: vertical display : %d\n", node, value); 555 - svga_wcrt_multi(NULL, tm->v_display_regs, value - 1); 554 + svga_wcrt_multi(regbase, tm->v_display_regs, value - 1); 556 555 557 556 value = var->yres; 558 557 value = (value * vmul) / vdiv; 559 558 pr_debug("fb%d: vertical blank start : %d\n", node, value); 560 - svga_wcrt_multi(NULL, tm->v_blank_start_regs, value); 559 + svga_wcrt_multi(regbase, tm->v_blank_start_regs, value); 561 560 562 561 value = var->yres + var->upper_margin + var->lower_margin + var->vsync_len; 563 562 value = (value * vmul) / vdiv; 564 563 pr_debug("fb%d: vertical blank end : %d\n", node, value); 565 - svga_wcrt_multi(NULL, tm->v_blank_end_regs, value - 2); 564 + svga_wcrt_multi(regbase, tm->v_blank_end_regs, value - 2); 566 565 567 566 value = var->yres + var->lower_margin; 568 567 value = (value * vmul) / vdiv; 569 568 pr_debug("fb%d: vertical sync start : %d\n", node, value); 570 - svga_wcrt_multi(NULL, tm->v_sync_start_regs, value); 569 + svga_wcrt_multi(regbase, tm->v_sync_start_regs, value); 571 570 572 571 value = var->yres + var->lower_margin + var->vsync_len; 573 572 value = (value * vmul) / vdiv; 574 573 pr_debug("fb%d: vertical sync end : %d\n", node, value); 575 - svga_wcrt_multi(NULL, tm->v_sync_end_regs, value); 574 + svga_wcrt_multi(regbase, tm->v_sync_end_regs, value); 576 575 577 576 /* Set horizontal and vertical sync pulse polarity in misc register */ 578 577 579 - regval = vga_r(NULL, VGA_MIS_R); 578 + regval = vga_r(regbase, VGA_MIS_R); 580 579 if (var->sync & FB_SYNC_HOR_HIGH_ACT) { 581 580 pr_debug("fb%d: positive horizontal sync\n", node); 582 581 regval = regval & ~0x80; ··· 591 590 pr_debug("fb%d: negative vertical sync\n\n", node); 592 591 regval = regval | 0x40; 593 592 } 594 - vga_w(NULL, VGA_MIS_W, regval); 593 + vga_w(regbase, VGA_MIS_W, regval); 595 594 } 596 595 597 596
+1 -1
drivers/video/vt8623fb.c
··· 505 505 } 506 506 507 507 vt8623_set_pixclock(info, info->var.pixclock); 508 - svga_set_timings(&vt8623_timing_regs, &(info->var), 1, 1, 508 + svga_set_timings(par->state.vgabase, &vt8623_timing_regs, &(info->var), 1, 1, 509 509 (info->var.vmode & FB_VMODE_DOUBLE) ? 2 : 1, 1, 510 510 1, info->node); 511 511
+1 -1
include/linux/svga.h
··· 116 116 117 117 int svga_compute_pll(const struct svga_pll *pll, u32 f_wanted, u16 *m, u16 *n, u16 *r, int node); 118 118 int svga_check_timings(const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, int node); 119 - void svga_set_timings(const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, u32 hmul, u32 hdiv, u32 vmul, u32 vdiv, u32 hborder, int node); 119 + void svga_set_timings(void __iomem *regbase, const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, u32 hmul, u32 hdiv, u32 vmul, u32 vdiv, u32 hborder, int node); 120 120 121 121 int svga_match_format(const struct svga_fb_format *frm, struct fb_var_screeninfo *var, struct fb_fix_screeninfo *fix); 122 122