[PATCH] alpha: task_thread_info()

use task_thread_info() for accesses to thread_info of task in arch/alpha
and include/asm-alpha

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

authored by Al Viro and committed by Linus Torvalds 37bfbaf9 9fc65876

+30 -30
+2 -2
arch/alpha/kernel/process.c
··· 493 thread_saved_pc(task_t *t) 494 { 495 unsigned long base = (unsigned long)t->thread_info; 496 - unsigned long fp, sp = t->thread_info->pcb.ksp; 497 498 if (sp > base && sp+6*8 < base + 16*1024) { 499 fp = ((unsigned long*)sp)[6]; ··· 523 524 pc = thread_saved_pc(p); 525 if (in_sched_functions(pc)) { 526 - schedule_frame = ((unsigned long *)p->thread_info->pcb.ksp)[6]; 527 return ((unsigned long *)schedule_frame)[12]; 528 } 529 return pc;
··· 493 thread_saved_pc(task_t *t) 494 { 495 unsigned long base = (unsigned long)t->thread_info; 496 + unsigned long fp, sp = task_thread_info(t)->pcb.ksp; 497 498 if (sp > base && sp+6*8 < base + 16*1024) { 499 fp = ((unsigned long*)sp)[6]; ··· 523 524 pc = thread_saved_pc(p); 525 if (in_sched_functions(pc)) { 526 + schedule_frame = ((unsigned long *)task_thread_info(p)->pcb.ksp)[6]; 527 return ((unsigned long *)schedule_frame)[12]; 528 } 529 return pc;
+19 -19
arch/alpha/kernel/ptrace.c
··· 103 unsigned long *addr; 104 105 if (regno == 30) { 106 - addr = &task->thread_info->pcb.usp; 107 } else if (regno == 65) { 108 - addr = &task->thread_info->pcb.unique; 109 } else if (regno == 31 || regno > 65) { 110 zero = 0; 111 addr = &zero; ··· 125 if (regno == 63) { 126 unsigned long fpcr = *get_reg_addr(task, regno); 127 unsigned long swcr 128 - = task->thread_info->ieee_state & IEEE_SW_MASK; 129 swcr = swcr_update_status(swcr, fpcr); 130 return fpcr | swcr; 131 } ··· 139 put_reg(struct task_struct *task, unsigned long regno, unsigned long data) 140 { 141 if (regno == 63) { 142 - task->thread_info->ieee_state 143 - = ((task->thread_info->ieee_state & ~IEEE_SW_MASK) 144 | (data & IEEE_SW_MASK)); 145 data = (data & FPCR_DYN_MASK) | ieee_swcr_to_fpcr(data); 146 } ··· 188 * branch (emulation can be tricky for fp branches). 189 */ 190 displ = ((s32)(insn << 11)) >> 9; 191 - child->thread_info->bpt_addr[nsaved++] = pc + 4; 192 if (displ) /* guard against unoptimized code */ 193 - child->thread_info->bpt_addr[nsaved++] 194 = pc + 4 + displ; 195 DBG(DBG_BPT, ("execing branch\n")); 196 } else if (op_code == 0x1a) { 197 reg_b = (insn >> 16) & 0x1f; 198 - child->thread_info->bpt_addr[nsaved++] = get_reg(child, reg_b); 199 DBG(DBG_BPT, ("execing jump\n")); 200 } else { 201 - child->thread_info->bpt_addr[nsaved++] = pc + 4; 202 DBG(DBG_BPT, ("execing normal insn\n")); 203 } 204 205 /* install breakpoints: */ 206 for (i = 0; i < nsaved; ++i) { 207 - res = read_int(child, child->thread_info->bpt_addr[i], 208 (int *) &insn); 209 if (res < 0) 210 return res; 211 - child->thread_info->bpt_insn[i] = insn; 212 DBG(DBG_BPT, (" -> next_pc=%lx\n", 213 - child->thread_info->bpt_addr[i])); 214 - res = write_int(child, child->thread_info->bpt_addr[i], 215 BREAKINST); 216 if (res < 0) 217 return res; 218 } 219 - child->thread_info->bpt_nsaved = nsaved; 220 return 0; 221 } 222 ··· 227 int 228 ptrace_cancel_bpt(struct task_struct * child) 229 { 230 - int i, nsaved = child->thread_info->bpt_nsaved; 231 232 - child->thread_info->bpt_nsaved = 0; 233 234 if (nsaved > 2) { 235 printk("ptrace_cancel_bpt: bogus nsaved: %d!\n", nsaved); ··· 237 } 238 239 for (i = 0; i < nsaved; ++i) { 240 - write_int(child, child->thread_info->bpt_addr[i], 241 - child->thread_info->bpt_insn[i]); 242 } 243 return (nsaved != 0); 244 } ··· 355 if (!valid_signal(data)) 356 break; 357 /* Mark single stepping. */ 358 - child->thread_info->bpt_nsaved = -1; 359 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); 360 child->exit_code = data; 361 wake_up_process(child);
··· 103 unsigned long *addr; 104 105 if (regno == 30) { 106 + addr = &task_thread_info(task)->pcb.usp; 107 } else if (regno == 65) { 108 + addr = &task_thread_info(task)->pcb.unique; 109 } else if (regno == 31 || regno > 65) { 110 zero = 0; 111 addr = &zero; ··· 125 if (regno == 63) { 126 unsigned long fpcr = *get_reg_addr(task, regno); 127 unsigned long swcr 128 + = task_thread_info(task)->ieee_state & IEEE_SW_MASK; 129 swcr = swcr_update_status(swcr, fpcr); 130 return fpcr | swcr; 131 } ··· 139 put_reg(struct task_struct *task, unsigned long regno, unsigned long data) 140 { 141 if (regno == 63) { 142 + task_thread_info(task)->ieee_state 143 + = ((task_thread_info(task)->ieee_state & ~IEEE_SW_MASK) 144 | (data & IEEE_SW_MASK)); 145 data = (data & FPCR_DYN_MASK) | ieee_swcr_to_fpcr(data); 146 } ··· 188 * branch (emulation can be tricky for fp branches). 189 */ 190 displ = ((s32)(insn << 11)) >> 9; 191 + task_thread_info(child)->bpt_addr[nsaved++] = pc + 4; 192 if (displ) /* guard against unoptimized code */ 193 + task_thread_info(child)->bpt_addr[nsaved++] 194 = pc + 4 + displ; 195 DBG(DBG_BPT, ("execing branch\n")); 196 } else if (op_code == 0x1a) { 197 reg_b = (insn >> 16) & 0x1f; 198 + task_thread_info(child)->bpt_addr[nsaved++] = get_reg(child, reg_b); 199 DBG(DBG_BPT, ("execing jump\n")); 200 } else { 201 + task_thread_info(child)->bpt_addr[nsaved++] = pc + 4; 202 DBG(DBG_BPT, ("execing normal insn\n")); 203 } 204 205 /* install breakpoints: */ 206 for (i = 0; i < nsaved; ++i) { 207 + res = read_int(child, task_thread_info(child)->bpt_addr[i], 208 (int *) &insn); 209 if (res < 0) 210 return res; 211 + task_thread_info(child)->bpt_insn[i] = insn; 212 DBG(DBG_BPT, (" -> next_pc=%lx\n", 213 + task_thread_info(child)->bpt_addr[i])); 214 + res = write_int(child, task_thread_info(child)->bpt_addr[i], 215 BREAKINST); 216 if (res < 0) 217 return res; 218 } 219 + task_thread_info(child)->bpt_nsaved = nsaved; 220 return 0; 221 } 222 ··· 227 int 228 ptrace_cancel_bpt(struct task_struct * child) 229 { 230 + int i, nsaved = task_thread_info(child)->bpt_nsaved; 231 232 + task_thread_info(child)->bpt_nsaved = 0; 233 234 if (nsaved > 2) { 235 printk("ptrace_cancel_bpt: bogus nsaved: %d!\n", nsaved); ··· 237 } 238 239 for (i = 0; i < nsaved; ++i) { 240 + write_int(child, task_thread_info(child)->bpt_addr[i], 241 + task_thread_info(child)->bpt_insn[i]); 242 } 243 return (nsaved != 0); 244 } ··· 355 if (!valid_signal(data)) 356 break; 357 /* Mark single stepping. */ 358 + task_thread_info(child)->bpt_nsaved = -1; 359 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); 360 child->exit_code = data; 361 wake_up_process(child);
+1 -1
arch/alpha/kernel/smp.c
··· 302 + hwrpb->processor_offset 303 + cpuid * hwrpb->processor_size); 304 hwpcb = (struct pcb_struct *) cpu->hwpcb; 305 - ipcb = &idle->thread_info->pcb; 306 307 /* Initialize the CPU's HWPCB to something just good enough for 308 us to get started. Immediately after starting, we'll swpctx
··· 302 + hwrpb->processor_offset 303 + cpuid * hwrpb->processor_size); 304 hwpcb = (struct pcb_struct *) cpu->hwpcb; 305 + ipcb = &task_thread_info(idle)->pcb; 306 307 /* Initialize the CPU's HWPCB to something just good enough for 308 us to get started. Immediately after starting, we'll swpctx
+3 -3
include/asm-alpha/mmu_context.h
··· 156 /* Always update the PCB ASN. Another thread may have allocated 157 a new mm->context (via flush_tlb_mm) without the ASN serial 158 number wrapping. We have no way to detect when this is needed. */ 159 - next->thread_info->pcb.asn = mmc & HARDWARE_ASN_MASK; 160 } 161 162 __EXTERN_INLINE void ··· 235 if (cpu_online(i)) 236 mm->context[i] = 0; 237 if (tsk != current) 238 - tsk->thread_info->pcb.ptbr 239 = ((unsigned long)mm->pgd - IDENT_ADDR) >> PAGE_SHIFT; 240 return 0; 241 } ··· 249 static inline void 250 enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) 251 { 252 - tsk->thread_info->pcb.ptbr 253 = ((unsigned long)mm->pgd - IDENT_ADDR) >> PAGE_SHIFT; 254 } 255
··· 156 /* Always update the PCB ASN. Another thread may have allocated 157 a new mm->context (via flush_tlb_mm) without the ASN serial 158 number wrapping. We have no way to detect when this is needed. */ 159 + task_thread_info(next)->pcb.asn = mmc & HARDWARE_ASN_MASK; 160 } 161 162 __EXTERN_INLINE void ··· 235 if (cpu_online(i)) 236 mm->context[i] = 0; 237 if (tsk != current) 238 + task_thread_info(tsk)->pcb.ptbr 239 = ((unsigned long)mm->pgd - IDENT_ADDR) >> PAGE_SHIFT; 240 return 0; 241 } ··· 249 static inline void 250 enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) 251 { 252 + task_thread_info(tsk)->pcb.ptbr 253 = ((unsigned long)mm->pgd - IDENT_ADDR) >> PAGE_SHIFT; 254 } 255
+1 -1
include/asm-alpha/processor.h
··· 64 (*(unsigned long *)(PT_REG(pc) + (unsigned long) ((tsk)->thread_info))) 65 66 #define KSTK_ESP(tsk) \ 67 - ((tsk) == current ? rdusp() : (tsk)->thread_info->pcb.usp) 68 69 #define cpu_relax() barrier() 70
··· 64 (*(unsigned long *)(PT_REG(pc) + (unsigned long) ((tsk)->thread_info))) 65 66 #define KSTK_ESP(tsk) \ 67 + ((tsk) == current ? rdusp() : task_thread_info(tsk)->pcb.usp) 68 69 #define cpu_relax() barrier() 70
+4 -4
include/asm-alpha/system.h
··· 131 extern void halt(void) __attribute__((noreturn)); 132 #define __halt() __asm__ __volatile__ ("call_pal %0 #halt" : : "i" (PAL_halt)) 133 134 - #define switch_to(P,N,L) \ 135 - do { \ 136 - (L) = alpha_switch_to(virt_to_phys(&(N)->thread_info->pcb), (P)); \ 137 - check_mmu_context(); \ 138 } while (0) 139 140 struct task_struct;
··· 131 extern void halt(void) __attribute__((noreturn)); 132 #define __halt() __asm__ __volatile__ ("call_pal %0 #halt" : : "i" (PAL_halt)) 133 134 + #define switch_to(P,N,L) \ 135 + do { \ 136 + (L) = alpha_switch_to(virt_to_phys(&task_thread_info(N)->pcb), (P)); \ 137 + check_mmu_context(); \ 138 } while (0) 139 140 struct task_struct;