···2020};21212222extern int efx_set_board_info(struct efx_nic *efx, u16 revision_info);2323-extern int sfe4001_poweron(struct efx_nic *efx);2424-extern void sfe4001_poweroff(struct efx_nic *efx);2323+extern int sfe4001_init(struct efx_nic *efx);2524/* Are we putting the PHY into flash config mode */2625extern unsigned int sfe4001_phy_flash_cfg;2726
+2
drivers/net/sfc/efx.c
···18151815 .init = efx_nic_dummy_op_int,18161816 .init_leds = efx_port_dummy_op_int,18171817 .set_fault_led = efx_port_dummy_op_blink,18181818+ .fini = efx_port_dummy_op_void,18181819};1819182018201821/**************************************************************************···19421941 efx_fini_port(efx);1943194219441943 /* Shutdown the board, then the NIC and board state */19441944+ efx->board_info.fini(efx);19451945 falcon_fini_interrupt(efx);1946194619471947 efx_fini_napi(efx);
+52-20
drivers/net/sfc/falcon.c
···1313#include <linux/pci.h>1414#include <linux/module.h>1515#include <linux/seq_file.h>1616+#include <linux/i2c.h>1717+#include <linux/i2c-algo-bit.h>1618#include "net_driver.h"1719#include "bitfield.h"1820#include "efx.h"···3836 * struct falcon_nic_data - Falcon NIC state3937 * @next_buffer_table: First available buffer table id4038 * @pci_dev2: The secondary PCI device if present3939+ * @i2c_data: Operations and state for I2C bit-bashing algorithm4140 */4241struct falcon_nic_data {4342 unsigned next_buffer_table;4443 struct pci_dev *pci_dev2;4444+ struct i2c_algo_bit_data i2c_data;4545};46464747/**************************************************************************···179175 *180176 **************************************************************************181177 */182182-static void falcon_setsdascl(struct efx_i2c_interface *i2c)178178+static void falcon_setsda(void *data, int state)183179{180180+ struct efx_nic *efx = (struct efx_nic *)data;184181 efx_oword_t reg;185182186186- falcon_read(i2c->efx, ®, GPIO_CTL_REG_KER);187187- EFX_SET_OWORD_FIELD(reg, GPIO0_OEN, (i2c->scl ? 0 : 1));188188- EFX_SET_OWORD_FIELD(reg, GPIO3_OEN, (i2c->sda ? 0 : 1));189189- falcon_write(i2c->efx, ®, GPIO_CTL_REG_KER);183183+ falcon_read(efx, ®, GPIO_CTL_REG_KER);184184+ EFX_SET_OWORD_FIELD(reg, GPIO3_OEN, !state);185185+ falcon_write(efx, ®, GPIO_CTL_REG_KER);190186}191187192192-static int falcon_getsda(struct efx_i2c_interface *i2c)188188+static void falcon_setscl(void *data, int state)193189{190190+ struct efx_nic *efx = (struct efx_nic *)data;194191 efx_oword_t reg;195192196196- falcon_read(i2c->efx, ®, GPIO_CTL_REG_KER);193193+ falcon_read(efx, ®, GPIO_CTL_REG_KER);194194+ EFX_SET_OWORD_FIELD(reg, GPIO0_OEN, !state);195195+ falcon_write(efx, ®, GPIO_CTL_REG_KER);196196+}197197+198198+static int falcon_getsda(void *data)199199+{200200+ struct efx_nic *efx = (struct efx_nic *)data;201201+ efx_oword_t reg;202202+203203+ falcon_read(efx, ®, GPIO_CTL_REG_KER);197204 return EFX_OWORD_FIELD(reg, GPIO3_IN);198205}199206200200-static int falcon_getscl(struct efx_i2c_interface *i2c)207207+static int falcon_getscl(void *data)201208{209209+ struct efx_nic *efx = (struct efx_nic *)data;202210 efx_oword_t reg;203211204204- falcon_read(i2c->efx, ®, GPIO_CTL_REG_KER);205205- return EFX_DWORD_FIELD(reg, GPIO0_IN);212212+ falcon_read(efx, ®, GPIO_CTL_REG_KER);213213+ return EFX_OWORD_FIELD(reg, GPIO0_IN);206214}207215208208-static struct efx_i2c_bit_operations falcon_i2c_bit_operations = {209209- .setsda = falcon_setsdascl,210210- .setscl = falcon_setsdascl,216216+static struct i2c_algo_bit_data falcon_i2c_bit_operations = {217217+ .setsda = falcon_setsda,218218+ .setscl = falcon_setscl,211219 .getsda = falcon_getsda,212220 .getscl = falcon_getscl,213221 .udelay = 100,214214- .mdelay = 10,222222+ /*223223+ * This is the number of system clock ticks after which224224+ * i2c-algo-bit gives up waiting for SCL to become high.225225+ * It must be at least 2 since the first tick can happen226226+ * immediately after it starts waiting.227227+ */228228+ .timeout = 2,215229};216230217231/**************************************************************************···24252403 struct falcon_nic_data *nic_data;24262404 int rc;2427240524282428- /* Initialise I2C interface state */24292429- efx->i2c.efx = efx;24302430- efx->i2c.op = &falcon_i2c_bit_operations;24312431- efx->i2c.sda = 1;24322432- efx->i2c.scl = 1;24332433-24342406 /* Allocate storage for hardware specific data */24352407 nic_data = kzalloc(sizeof(*nic_data), GFP_KERNEL);24362408 efx->nic_data = nic_data;···2472245624732457 /* Read in the non-volatile configuration */24742458 rc = falcon_probe_nvconfig(efx);24592459+ if (rc)24602460+ goto fail5;24612461+24622462+ /* Initialise I2C adapter */24632463+ efx->i2c_adap.owner = THIS_MODULE;24642464+ efx->i2c_adap.class = I2C_CLASS_HWMON;24652465+ nic_data->i2c_data = falcon_i2c_bit_operations;24662466+ nic_data->i2c_data.data = efx;24672467+ efx->i2c_adap.algo_data = &nic_data->i2c_data;24682468+ efx->i2c_adap.dev.parent = &efx->pci_dev->dev;24692469+ strcpy(efx->i2c_adap.name, "SFC4000 GPIO");24702470+ rc = i2c_bit_add_bus(&efx->i2c_adap);24752471 if (rc)24762472 goto fail5;24772473···26612633void falcon_remove_nic(struct efx_nic *efx)26622634{26632635 struct falcon_nic_data *nic_data = efx->nic_data;26362636+ int rc;26372637+26382638+ rc = i2c_del_adapter(&efx->i2c_adap);26392639+ BUG_ON(rc);2664264026652641 falcon_free_buffer(efx, &efx->irq_status);26662642
-381
drivers/net/sfc/i2c-direct.c
···11-/****************************************************************************22- * Driver for Solarflare Solarstorm network controllers and boards33- * Copyright 2005 Fen Systems Ltd.44- * Copyright 2006-2008 Solarflare Communications Inc.55- *66- * This program is free software; you can redistribute it and/or modify it77- * under the terms of the GNU General Public License version 2 as published88- * by the Free Software Foundation, incorporated herein by reference.99- */1010-1111-#include <linux/delay.h>1212-#include "net_driver.h"1313-#include "i2c-direct.h"1414-1515-/*1616- * I2C data (SDA) and clock (SCL) line read/writes with appropriate1717- * delays.1818- */1919-2020-static inline void setsda(struct efx_i2c_interface *i2c, int state)2121-{2222- udelay(i2c->op->udelay);2323- i2c->sda = state;2424- i2c->op->setsda(i2c);2525- udelay(i2c->op->udelay);2626-}2727-2828-static inline void setscl(struct efx_i2c_interface *i2c, int state)2929-{3030- udelay(i2c->op->udelay);3131- i2c->scl = state;3232- i2c->op->setscl(i2c);3333- udelay(i2c->op->udelay);3434-}3535-3636-static inline int getsda(struct efx_i2c_interface *i2c)3737-{3838- int sda;3939-4040- udelay(i2c->op->udelay);4141- sda = i2c->op->getsda(i2c);4242- udelay(i2c->op->udelay);4343- return sda;4444-}4545-4646-static inline int getscl(struct efx_i2c_interface *i2c)4747-{4848- int scl;4949-5050- udelay(i2c->op->udelay);5151- scl = i2c->op->getscl(i2c);5252- udelay(i2c->op->udelay);5353- return scl;5454-}5555-5656-/*5757- * I2C low-level protocol operations5858- *5959- */6060-6161-static inline void i2c_release(struct efx_i2c_interface *i2c)6262-{6363- EFX_WARN_ON_PARANOID(!i2c->scl);6464- EFX_WARN_ON_PARANOID(!i2c->sda);6565- /* Devices may time out if operations do not end */6666- setscl(i2c, 1);6767- setsda(i2c, 1);6868- EFX_BUG_ON_PARANOID(getsda(i2c) != 1);6969- EFX_BUG_ON_PARANOID(getscl(i2c) != 1);7070-}7171-7272-static inline void i2c_start(struct efx_i2c_interface *i2c)7373-{7474- /* We may be restarting immediately after a {send,recv}_bit,7575- * so SCL will not necessarily already be high.7676- */7777- EFX_WARN_ON_PARANOID(!i2c->sda);7878- setscl(i2c, 1);7979- setsda(i2c, 0);8080- setscl(i2c, 0);8181- setsda(i2c, 1);8282-}8383-8484-static inline void i2c_send_bit(struct efx_i2c_interface *i2c, int bit)8585-{8686- EFX_WARN_ON_PARANOID(i2c->scl != 0);8787- setsda(i2c, bit);8888- setscl(i2c, 1);8989- setscl(i2c, 0);9090- setsda(i2c, 1);9191-}9292-9393-static inline int i2c_recv_bit(struct efx_i2c_interface *i2c)9494-{9595- int bit;9696-9797- EFX_WARN_ON_PARANOID(i2c->scl != 0);9898- EFX_WARN_ON_PARANOID(!i2c->sda);9999- setscl(i2c, 1);100100- bit = getsda(i2c);101101- setscl(i2c, 0);102102- return bit;103103-}104104-105105-static inline void i2c_stop(struct efx_i2c_interface *i2c)106106-{107107- EFX_WARN_ON_PARANOID(i2c->scl != 0);108108- setsda(i2c, 0);109109- setscl(i2c, 1);110110- setsda(i2c, 1);111111-}112112-113113-/*114114- * I2C mid-level protocol operations115115- *116116- */117117-118118-/* Sends a byte via the I2C bus and checks for an acknowledgement from119119- * the slave device.120120- */121121-static int i2c_send_byte(struct efx_i2c_interface *i2c, u8 byte)122122-{123123- int i;124124-125125- /* Send byte */126126- for (i = 0; i < 8; i++) {127127- i2c_send_bit(i2c, !!(byte & 0x80));128128- byte <<= 1;129129- }130130-131131- /* Check for acknowledgement from slave */132132- return (i2c_recv_bit(i2c) == 0 ? 0 : -EIO);133133-}134134-135135-/* Receives a byte via the I2C bus and sends ACK/NACK to the slave device. */136136-static u8 i2c_recv_byte(struct efx_i2c_interface *i2c, int ack)137137-{138138- u8 value = 0;139139- int i;140140-141141- /* Receive byte */142142- for (i = 0; i < 8; i++)143143- value = (value << 1) | i2c_recv_bit(i2c);144144-145145- /* Send ACK/NACK */146146- i2c_send_bit(i2c, (ack ? 0 : 1));147147-148148- return value;149149-}150150-151151-/* Calculate command byte for a read operation */152152-static inline u8 i2c_read_cmd(u8 device_id)153153-{154154- return ((device_id << 1) | 1);155155-}156156-157157-/* Calculate command byte for a write operation */158158-static inline u8 i2c_write_cmd(u8 device_id)159159-{160160- return ((device_id << 1) | 0);161161-}162162-163163-int efx_i2c_check_presence(struct efx_i2c_interface *i2c, u8 device_id)164164-{165165- int rc;166166-167167- /* If someone is driving the bus low we just give up. */168168- if (getsda(i2c) == 0 || getscl(i2c) == 0) {169169- EFX_ERR(i2c->efx, "%s someone is holding the I2C bus low."170170- " Giving up.\n", __func__);171171- return -EFAULT;172172- }173173-174174- /* Pretend to initiate a device write */175175- i2c_start(i2c);176176- rc = i2c_send_byte(i2c, i2c_write_cmd(device_id));177177- if (rc)178178- goto out;179179-180180- out:181181- i2c_stop(i2c);182182- i2c_release(i2c);183183-184184- return rc;185185-}186186-187187-/* This performs a fast read of one or more consecutive bytes from an188188- * I2C device. Not all devices support consecutive reads of more than189189- * one byte; for these devices use efx_i2c_read() instead.190190- */191191-int efx_i2c_fast_read(struct efx_i2c_interface *i2c,192192- u8 device_id, u8 offset, u8 *data, unsigned int len)193193-{194194- int i;195195- int rc;196196-197197- EFX_WARN_ON_PARANOID(getsda(i2c) != 1);198198- EFX_WARN_ON_PARANOID(getscl(i2c) != 1);199199- EFX_WARN_ON_PARANOID(data == NULL);200200- EFX_WARN_ON_PARANOID(len < 1);201201-202202- /* Select device and starting offset */203203- i2c_start(i2c);204204- rc = i2c_send_byte(i2c, i2c_write_cmd(device_id));205205- if (rc)206206- goto out;207207- rc = i2c_send_byte(i2c, offset);208208- if (rc)209209- goto out;210210-211211- /* Read data from device */212212- i2c_start(i2c);213213- rc = i2c_send_byte(i2c, i2c_read_cmd(device_id));214214- if (rc)215215- goto out;216216- for (i = 0; i < (len - 1); i++)217217- /* Read and acknowledge all but the last byte */218218- data[i] = i2c_recv_byte(i2c, 1);219219- /* Read last byte with no acknowledgement */220220- data[i] = i2c_recv_byte(i2c, 0);221221-222222- out:223223- i2c_stop(i2c);224224- i2c_release(i2c);225225-226226- return rc;227227-}228228-229229-/* This performs a fast write of one or more consecutive bytes to an230230- * I2C device. Not all devices support consecutive writes of more231231- * than one byte; for these devices use efx_i2c_write() instead.232232- */233233-int efx_i2c_fast_write(struct efx_i2c_interface *i2c,234234- u8 device_id, u8 offset,235235- const u8 *data, unsigned int len)236236-{237237- int i;238238- int rc;239239-240240- EFX_WARN_ON_PARANOID(getsda(i2c) != 1);241241- EFX_WARN_ON_PARANOID(getscl(i2c) != 1);242242- EFX_WARN_ON_PARANOID(len < 1);243243-244244- /* Select device and starting offset */245245- i2c_start(i2c);246246- rc = i2c_send_byte(i2c, i2c_write_cmd(device_id));247247- if (rc)248248- goto out;249249- rc = i2c_send_byte(i2c, offset);250250- if (rc)251251- goto out;252252-253253- /* Write data to device */254254- for (i = 0; i < len; i++) {255255- rc = i2c_send_byte(i2c, data[i]);256256- if (rc)257257- goto out;258258- }259259-260260- out:261261- i2c_stop(i2c);262262- i2c_release(i2c);263263-264264- return rc;265265-}266266-267267-/* I2C byte-by-byte read */268268-int efx_i2c_read(struct efx_i2c_interface *i2c,269269- u8 device_id, u8 offset, u8 *data, unsigned int len)270270-{271271- int rc;272272-273273- /* i2c_fast_read with length 1 is a single byte read */274274- for (; len > 0; offset++, data++, len--) {275275- rc = efx_i2c_fast_read(i2c, device_id, offset, data, 1);276276- if (rc)277277- return rc;278278- }279279-280280- return 0;281281-}282282-283283-/* I2C byte-by-byte write */284284-int efx_i2c_write(struct efx_i2c_interface *i2c,285285- u8 device_id, u8 offset, const u8 *data, unsigned int len)286286-{287287- int rc;288288-289289- /* i2c_fast_write with length 1 is a single byte write */290290- for (; len > 0; offset++, data++, len--) {291291- rc = efx_i2c_fast_write(i2c, device_id, offset, data, 1);292292- if (rc)293293- return rc;294294- mdelay(i2c->op->mdelay);295295- }296296-297297- return 0;298298-}299299-300300-301301-/* This is just a slightly neater wrapper round efx_i2c_fast_write302302- * in the case where the target doesn't take an offset303303- */304304-int efx_i2c_send_bytes(struct efx_i2c_interface *i2c,305305- u8 device_id, const u8 *data, unsigned int len)306306-{307307- return efx_i2c_fast_write(i2c, device_id, data[0], data + 1, len - 1);308308-}309309-310310-/* I2C receiving of bytes - does not send an offset byte */311311-int efx_i2c_recv_bytes(struct efx_i2c_interface *i2c, u8 device_id,312312- u8 *bytes, unsigned int len)313313-{314314- int i;315315- int rc;316316-317317- EFX_WARN_ON_PARANOID(getsda(i2c) != 1);318318- EFX_WARN_ON_PARANOID(getscl(i2c) != 1);319319- EFX_WARN_ON_PARANOID(len < 1);320320-321321- /* Select device */322322- i2c_start(i2c);323323-324324- /* Read data from device */325325- rc = i2c_send_byte(i2c, i2c_read_cmd(device_id));326326- if (rc)327327- goto out;328328-329329- for (i = 0; i < (len - 1); i++)330330- /* Read and acknowledge all but the last byte */331331- bytes[i] = i2c_recv_byte(i2c, 1);332332- /* Read last byte with no acknowledgement */333333- bytes[i] = i2c_recv_byte(i2c, 0);334334-335335- out:336336- i2c_stop(i2c);337337- i2c_release(i2c);338338-339339- return rc;340340-}341341-342342-/* SMBus and some I2C devices will time out if the I2C clock is343343- * held low for too long. This is most likely to happen in virtualised344344- * systems (when the entire domain is descheduled) but could in345345- * principle happen due to preemption on any busy system (and given the346346- * potential length of an I2C operation turning preemption off is not347347- * a sensible option). The following functions deal with the failure by348348- * retrying up to a fixed number of times.349349- */350350-351351-#define I2C_MAX_RETRIES (10)352352-353353-/* The timeout problem will result in -EIO. If the wrapped function354354- * returns any other error, pass this up and do not retry. */355355-#define RETRY_WRAPPER(_f) \356356- int retries = I2C_MAX_RETRIES; \357357- int rc; \358358- while (retries) { \359359- rc = _f; \360360- if (rc != -EIO) \361361- return rc; \362362- retries--; \363363- } \364364- return rc; \365365-366366-int efx_i2c_check_presence_retry(struct efx_i2c_interface *i2c, u8 device_id)367367-{368368- RETRY_WRAPPER(efx_i2c_check_presence(i2c, device_id))369369-}370370-371371-int efx_i2c_read_retry(struct efx_i2c_interface *i2c,372372- u8 device_id, u8 offset, u8 *data, unsigned int len)373373-{374374- RETRY_WRAPPER(efx_i2c_read(i2c, device_id, offset, data, len))375375-}376376-377377-int efx_i2c_write_retry(struct efx_i2c_interface *i2c,378378- u8 device_id, u8 offset, const u8 *data, unsigned int len)379379-{380380- RETRY_WRAPPER(efx_i2c_write(i2c, device_id, offset, data, len))381381-}
-91
drivers/net/sfc/i2c-direct.h
···11-/****************************************************************************22- * Driver for Solarflare Solarstorm network controllers and boards33- * Copyright 2005 Fen Systems Ltd.44- * Copyright 2006 Solarflare Communications Inc.55- *66- * This program is free software; you can redistribute it and/or modify it77- * under the terms of the GNU General Public License version 2 as published88- * by the Free Software Foundation, incorporated herein by reference.99- */1010-1111-#ifndef EFX_I2C_DIRECT_H1212-#define EFX_I2C_DIRECT_H1313-1414-#include "net_driver.h"1515-1616-/*1717- * Direct control of an I2C bus1818- */1919-2020-struct efx_i2c_interface;2121-2222-/**2323- * struct efx_i2c_bit_operations - I2C bus direct control methods2424- *2525- * I2C bus direct control methods.2626- *2727- * @setsda: Set state of SDA line2828- * @setscl: Set state of SCL line2929- * @getsda: Get state of SDA line3030- * @getscl: Get state of SCL line3131- * @udelay: Delay between each bit operation3232- * @mdelay: Delay between each byte write3333- */3434-struct efx_i2c_bit_operations {3535- void (*setsda) (struct efx_i2c_interface *i2c);3636- void (*setscl) (struct efx_i2c_interface *i2c);3737- int (*getsda) (struct efx_i2c_interface *i2c);3838- int (*getscl) (struct efx_i2c_interface *i2c);3939- unsigned int udelay;4040- unsigned int mdelay;4141-};4242-4343-/**4444- * struct efx_i2c_interface - an I2C interface4545- *4646- * An I2C interface.4747- *4848- * @efx: Attached Efx NIC4949- * @op: I2C bus control methods5050- * @sda: Current output state of SDA line5151- * @scl: Current output state of SCL line5252- */5353-struct efx_i2c_interface {5454- struct efx_nic *efx;5555- struct efx_i2c_bit_operations *op;5656- unsigned int sda:1;5757- unsigned int scl:1;5858-};5959-6060-extern int efx_i2c_check_presence(struct efx_i2c_interface *i2c, u8 device_id);6161-extern int efx_i2c_fast_read(struct efx_i2c_interface *i2c,6262- u8 device_id, u8 offset,6363- u8 *data, unsigned int len);6464-extern int efx_i2c_fast_write(struct efx_i2c_interface *i2c,6565- u8 device_id, u8 offset,6666- const u8 *data, unsigned int len);6767-extern int efx_i2c_read(struct efx_i2c_interface *i2c,6868- u8 device_id, u8 offset, u8 *data, unsigned int len);6969-extern int efx_i2c_write(struct efx_i2c_interface *i2c,7070- u8 device_id, u8 offset,7171- const u8 *data, unsigned int len);7272-7373-extern int efx_i2c_send_bytes(struct efx_i2c_interface *i2c, u8 device_id,7474- const u8 *bytes, unsigned int len);7575-7676-extern int efx_i2c_recv_bytes(struct efx_i2c_interface *i2c, u8 device_id,7777- u8 *bytes, unsigned int len);7878-7979-8080-/* Versions of the API that retry on failure. */8181-extern int efx_i2c_check_presence_retry(struct efx_i2c_interface *i2c,8282- u8 device_id);8383-8484-extern int efx_i2c_read_retry(struct efx_i2c_interface *i2c,8585- u8 device_id, u8 offset, u8 *data, unsigned int len);8686-8787-extern int efx_i2c_write_retry(struct efx_i2c_interface *i2c,8888- u8 device_id, u8 offset,8989- const u8 *data, unsigned int len);9090-9191-#endif /* EFX_I2C_DIRECT_H */
+8-3
drivers/net/sfc/net_driver.h
···2626#include <linux/highmem.h>2727#include <linux/workqueue.h>2828#include <linux/inet_lro.h>2929+#include <linux/i2c.h>29303031#include "enum.h"3132#include "bitfield.h"3232-#include "i2c-direct.h"33333434#define EFX_MAX_LRO_DESCRIPTORS 83535#define EFX_MAX_LRO_AGGR MAX_SKB_FRAGS···418418 * @init_leds: Sets up board LEDs419419 * @set_fault_led: Turns the fault LED on or off420420 * @blink: Starts/stops blinking421421+ * @fini: Cleanup function421422 * @blinker: used to blink LEDs in software423423+ * @hwmon_client: I2C client for hardware monitor424424+ * @ioexp_client: I2C client for power/port control422425 */423426struct efx_board {424427 int type;···434431 int (*init_leds)(struct efx_nic *efx);435432 void (*set_fault_led) (struct efx_nic *efx, int state);436433 void (*blink) (struct efx_nic *efx, int start);434434+ void (*fini) (struct efx_nic *nic);437435 struct efx_blinker blinker;436436+ struct i2c_client *hwmon_client, *ioexp_client;438437};439438440439#define STRING_TABLE_LOOKUP(val, member) \···623618 * @membase: Memory BAR value624619 * @biu_lock: BIU (bus interface unit) lock625620 * @interrupt_mode: Interrupt mode626626- * @i2c: I2C interface621621+ * @i2c_adap: I2C adapter627622 * @board_info: Board-level information628623 * @state: Device state flag. Serialised by the rtnl_lock.629624 * @reset_pending: Pending reset method (normally RESET_TYPE_NONE)···691686 spinlock_t biu_lock;692687 enum efx_int_mode interrupt_mode;693688694694- struct efx_i2c_interface i2c;689689+ struct i2c_adapter i2c_adap;695690 struct efx_board board_info;696691697692 enum nic_state state;
+67-61
drivers/net/sfc/sfe4001.c
···106106107107static const u8 xgphy_max_temperature = 90;108108109109-void sfe4001_poweroff(struct efx_nic *efx)109109+static void sfe4001_poweroff(struct efx_nic *efx)110110{111111- struct efx_i2c_interface *i2c = &efx->i2c;111111+ struct i2c_client *ioexp_client = efx->board_info.ioexp_client;112112+ struct i2c_client *hwmon_client = efx->board_info.hwmon_client;112113113113- u8 cfg, out, in;114114-115115- EFX_INFO(efx, "%s\n", __func__);116116-117117- /* Turn off all power rails */118118- out = 0xff;119119- efx_i2c_write(i2c, PCA9539, P0_OUT, &out, 1);120120-121121- /* Disable port 1 outputs on IO expander */122122- cfg = 0xff;123123- efx_i2c_write(i2c, PCA9539, P1_CONFIG, &cfg, 1);124124-125125- /* Disable port 0 outputs on IO expander */126126- cfg = 0xff;127127- efx_i2c_write(i2c, PCA9539, P0_CONFIG, &cfg, 1);114114+ /* Turn off all power rails and disable outputs */115115+ i2c_smbus_write_byte_data(ioexp_client, P0_OUT, 0xff);116116+ i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG, 0xff);117117+ i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0xff);128118129119 /* Clear any over-temperature alert */130130- efx_i2c_read(i2c, MAX6647, RSL, &in, 1);120120+ i2c_smbus_read_byte_data(hwmon_client, RSL);121121+}122122+123123+static void sfe4001_fini(struct efx_nic *efx)124124+{125125+ EFX_INFO(efx, "%s\n", __func__);126126+127127+ sfe4001_poweroff(efx);128128+ i2c_unregister_device(efx->board_info.ioexp_client);129129+ i2c_unregister_device(efx->board_info.hwmon_client);131130}132131133132/* The P0_EN_3V3X line on SFE4001 boards (from A2 onward) is connected···142143 * be turned on before the PHY can be used.143144 * Context: Process context, rtnl lock held144145 */145145-int sfe4001_poweron(struct efx_nic *efx)146146+int sfe4001_init(struct efx_nic *efx)146147{147147- struct efx_i2c_interface *i2c = &efx->i2c;148148+ struct i2c_client *hwmon_client, *ioexp_client;148149 unsigned int count;149150 int rc;150150- u8 out, in, cfg;151151+ u8 out;151152 efx_dword_t reg;153153+154154+ hwmon_client = i2c_new_dummy(&efx->i2c_adap, MAX6647);155155+ if (!hwmon_client)156156+ return -EIO;157157+ efx->board_info.hwmon_client = hwmon_client;158158+159159+ ioexp_client = i2c_new_dummy(&efx->i2c_adap, PCA9539);160160+ if (!ioexp_client) {161161+ rc = -EIO;162162+ goto fail_hwmon;163163+ }164164+ efx->board_info.ioexp_client = ioexp_client;152165153166 /* 10Xpress has fixed-function LED pins, so there is no board-specific154167 * blink code. */···177166 falcon_xmac_writel(efx, ®, XX_PWR_RST_REG_MAC);178167 udelay(10);179168169169+ efx->board_info.fini = sfe4001_fini;170170+180171 /* Set DSP over-temperature alert threshold */181172 EFX_INFO(efx, "DSP cut-out at %dC\n", xgphy_max_temperature);182182- rc = efx_i2c_write(i2c, MAX6647, WLHO,183183- &xgphy_max_temperature, 1);173173+ rc = i2c_smbus_write_byte_data(hwmon_client, WLHO,174174+ xgphy_max_temperature);184175 if (rc)185185- goto fail1;176176+ goto fail_ioexp;186177187178 /* Read it back and verify */188188- rc = efx_i2c_read(i2c, MAX6647, RLHN, &in, 1);189189- if (rc)190190- goto fail1;191191- if (in != xgphy_max_temperature) {179179+ rc = i2c_smbus_read_byte_data(hwmon_client, RLHN);180180+ if (rc < 0)181181+ goto fail_ioexp;182182+ if (rc != xgphy_max_temperature) {192183 rc = -EFAULT;193193- goto fail1;184184+ goto fail_ioexp;194185 }195186196187 /* Clear any previous over-temperature alert */197197- rc = efx_i2c_read(i2c, MAX6647, RSL, &in, 1);198198- if (rc)199199- goto fail1;188188+ rc = i2c_smbus_read_byte_data(hwmon_client, RSL);189189+ if (rc < 0)190190+ goto fail_ioexp;200191201192 /* Enable port 0 and port 1 outputs on IO expander */202202- cfg = 0x00;203203- rc = efx_i2c_write(i2c, PCA9539, P0_CONFIG, &cfg, 1);193193+ rc = i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0x00);204194 if (rc)205205- goto fail1;206206- cfg = 0xff & ~(1 << P1_SPARE_LBN);207207- rc = efx_i2c_write(i2c, PCA9539, P1_CONFIG, &cfg, 1);195195+ goto fail_ioexp;196196+ rc = i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG,197197+ 0xff & ~(1 << P1_SPARE_LBN));208198 if (rc)209209- goto fail2;199199+ goto fail_on;210200211201 /* Turn all power off then wait 1 sec. This ensures PHY is reset */212202 out = 0xff & ~((0 << P0_EN_1V2_LBN) | (0 << P0_EN_2V5_LBN) |213203 (0 << P0_EN_3V3X_LBN) | (0 << P0_EN_5V_LBN) |214204 (0 << P0_EN_1V0X_LBN));215215- rc = efx_i2c_write(i2c, PCA9539, P0_OUT, &out, 1);205205+ rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);216206 if (rc)217217- goto fail3;207207+ goto fail_on;218208219209 schedule_timeout_uninterruptible(HZ);220210 count = 0;···227215 if (sfe4001_phy_flash_cfg)228216 out |= 1 << P0_EN_3V3X_LBN;229217230230- rc = efx_i2c_write(i2c, PCA9539, P0_OUT, &out, 1);218218+ rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);231219 if (rc)232232- goto fail3;220220+ goto fail_on;233221 msleep(10);234222235223 /* Turn on 1V power rail */236224 out &= ~(1 << P0_EN_1V0X_LBN);237237- rc = efx_i2c_write(i2c, PCA9539, P0_OUT, &out, 1);225225+ rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);238226 if (rc)239239- goto fail3;227227+ goto fail_on;240228241229 EFX_INFO(efx, "waiting for power (attempt %d)...\n", count);242230243231 schedule_timeout_uninterruptible(HZ);244232245233 /* Check DSP is powered */246246- rc = efx_i2c_read(i2c, PCA9539, P1_IN, &in, 1);247247- if (rc)248248- goto fail3;249249- if (in & (1 << P1_AFE_PWD_LBN))234234+ rc = i2c_smbus_read_byte_data(ioexp_client, P1_IN);235235+ if (rc < 0)236236+ goto fail_on;237237+ if (rc & (1 << P1_AFE_PWD_LBN))250238 goto done;251239252240 /* DSP doesn't look powered in flash config mode */···256244257245 EFX_INFO(efx, "timed out waiting for power\n");258246 rc = -ETIMEDOUT;259259- goto fail3;247247+ goto fail_on;260248261249done:262250 EFX_INFO(efx, "PHY is powered on\n");263251 return 0;264252265265-fail3:266266- /* Turn off all power rails */267267- out = 0xff;268268- efx_i2c_write(i2c, PCA9539, P0_OUT, &out, 1);269269- /* Disable port 1 outputs on IO expander */270270- out = 0xff;271271- efx_i2c_write(i2c, PCA9539, P1_CONFIG, &out, 1);272272-fail2:273273- /* Disable port 0 outputs on IO expander */274274- out = 0xff;275275- efx_i2c_write(i2c, PCA9539, P0_CONFIG, &out, 1);276276-fail1:253253+fail_on:254254+ sfe4001_poweroff(efx);255255+fail_ioexp:256256+ i2c_unregister_device(ioexp_client);257257+fail_hwmon:258258+ i2c_unregister_device(hwmon_client);277259 return rc;278260}