Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

sfc: Use kernel I2C system and i2c-algo-bit driver

Remove our own implementation of I2C bit-banging.

Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>

authored by

Ben Hutchings and committed by
Jeff Garzik
37b5a603 9e833be3

+134 -560
+2
drivers/net/sfc/Kconfig
··· 4 4 select MII 5 5 select INET_LRO 6 6 select CRC32 7 + select I2C 8 + select I2C_ALGOBIT 7 9 help 8 10 This driver supports 10-gigabit Ethernet cards based on 9 11 the Solarflare Communications Solarstorm SFC4000 controller.
+1 -1
drivers/net/sfc/Makefile
··· 1 1 sfc-y += efx.o falcon.o tx.o rx.o falcon_xmac.o \ 2 - i2c-direct.o selftest.o ethtool.o xfp_phy.o \ 2 + selftest.o ethtool.o xfp_phy.o \ 3 3 mdio_10g.o tenxpress.o boards.o sfe4001.o 4 4 5 5 obj-$(CONFIG_SFC) += sfc.o
+1 -1
drivers/net/sfc/boards.c
··· 109 109 [EFX_BOARD_INVALID] = 110 110 {NULL, NULL, dummy_init}, 111 111 [EFX_BOARD_SFE4001] = 112 - {"SFE4001", "10GBASE-T adapter", sfe4001_poweron}, 112 + {"SFE4001", "10GBASE-T adapter", sfe4001_init}, 113 113 [EFX_BOARD_SFE4002] = 114 114 {"SFE4002", "XFP adapter", sfe4002_init}, 115 115 };
+1 -2
drivers/net/sfc/boards.h
··· 20 20 }; 21 21 22 22 extern int efx_set_board_info(struct efx_nic *efx, u16 revision_info); 23 - extern int sfe4001_poweron(struct efx_nic *efx); 24 - extern void sfe4001_poweroff(struct efx_nic *efx); 23 + extern int sfe4001_init(struct efx_nic *efx); 25 24 /* Are we putting the PHY into flash config mode */ 26 25 extern unsigned int sfe4001_phy_flash_cfg; 27 26
+2
drivers/net/sfc/efx.c
··· 1815 1815 .init = efx_nic_dummy_op_int, 1816 1816 .init_leds = efx_port_dummy_op_int, 1817 1817 .set_fault_led = efx_port_dummy_op_blink, 1818 + .fini = efx_port_dummy_op_void, 1818 1819 }; 1819 1820 1820 1821 /************************************************************************** ··· 1942 1941 efx_fini_port(efx); 1943 1942 1944 1943 /* Shutdown the board, then the NIC and board state */ 1944 + efx->board_info.fini(efx); 1945 1945 falcon_fini_interrupt(efx); 1946 1946 1947 1947 efx_fini_napi(efx);
+52 -20
drivers/net/sfc/falcon.c
··· 13 13 #include <linux/pci.h> 14 14 #include <linux/module.h> 15 15 #include <linux/seq_file.h> 16 + #include <linux/i2c.h> 17 + #include <linux/i2c-algo-bit.h> 16 18 #include "net_driver.h" 17 19 #include "bitfield.h" 18 20 #include "efx.h" ··· 38 36 * struct falcon_nic_data - Falcon NIC state 39 37 * @next_buffer_table: First available buffer table id 40 38 * @pci_dev2: The secondary PCI device if present 39 + * @i2c_data: Operations and state for I2C bit-bashing algorithm 41 40 */ 42 41 struct falcon_nic_data { 43 42 unsigned next_buffer_table; 44 43 struct pci_dev *pci_dev2; 44 + struct i2c_algo_bit_data i2c_data; 45 45 }; 46 46 47 47 /************************************************************************** ··· 179 175 * 180 176 ************************************************************************** 181 177 */ 182 - static void falcon_setsdascl(struct efx_i2c_interface *i2c) 178 + static void falcon_setsda(void *data, int state) 183 179 { 180 + struct efx_nic *efx = (struct efx_nic *)data; 184 181 efx_oword_t reg; 185 182 186 - falcon_read(i2c->efx, &reg, GPIO_CTL_REG_KER); 187 - EFX_SET_OWORD_FIELD(reg, GPIO0_OEN, (i2c->scl ? 0 : 1)); 188 - EFX_SET_OWORD_FIELD(reg, GPIO3_OEN, (i2c->sda ? 0 : 1)); 189 - falcon_write(i2c->efx, &reg, GPIO_CTL_REG_KER); 183 + falcon_read(efx, &reg, GPIO_CTL_REG_KER); 184 + EFX_SET_OWORD_FIELD(reg, GPIO3_OEN, !state); 185 + falcon_write(efx, &reg, GPIO_CTL_REG_KER); 190 186 } 191 187 192 - static int falcon_getsda(struct efx_i2c_interface *i2c) 188 + static void falcon_setscl(void *data, int state) 193 189 { 190 + struct efx_nic *efx = (struct efx_nic *)data; 194 191 efx_oword_t reg; 195 192 196 - falcon_read(i2c->efx, &reg, GPIO_CTL_REG_KER); 193 + falcon_read(efx, &reg, GPIO_CTL_REG_KER); 194 + EFX_SET_OWORD_FIELD(reg, GPIO0_OEN, !state); 195 + falcon_write(efx, &reg, GPIO_CTL_REG_KER); 196 + } 197 + 198 + static int falcon_getsda(void *data) 199 + { 200 + struct efx_nic *efx = (struct efx_nic *)data; 201 + efx_oword_t reg; 202 + 203 + falcon_read(efx, &reg, GPIO_CTL_REG_KER); 197 204 return EFX_OWORD_FIELD(reg, GPIO3_IN); 198 205 } 199 206 200 - static int falcon_getscl(struct efx_i2c_interface *i2c) 207 + static int falcon_getscl(void *data) 201 208 { 209 + struct efx_nic *efx = (struct efx_nic *)data; 202 210 efx_oword_t reg; 203 211 204 - falcon_read(i2c->efx, &reg, GPIO_CTL_REG_KER); 205 - return EFX_DWORD_FIELD(reg, GPIO0_IN); 212 + falcon_read(efx, &reg, GPIO_CTL_REG_KER); 213 + return EFX_OWORD_FIELD(reg, GPIO0_IN); 206 214 } 207 215 208 - static struct efx_i2c_bit_operations falcon_i2c_bit_operations = { 209 - .setsda = falcon_setsdascl, 210 - .setscl = falcon_setsdascl, 216 + static struct i2c_algo_bit_data falcon_i2c_bit_operations = { 217 + .setsda = falcon_setsda, 218 + .setscl = falcon_setscl, 211 219 .getsda = falcon_getsda, 212 220 .getscl = falcon_getscl, 213 221 .udelay = 100, 214 - .mdelay = 10, 222 + /* 223 + * This is the number of system clock ticks after which 224 + * i2c-algo-bit gives up waiting for SCL to become high. 225 + * It must be at least 2 since the first tick can happen 226 + * immediately after it starts waiting. 227 + */ 228 + .timeout = 2, 215 229 }; 216 230 217 231 /************************************************************************** ··· 2425 2403 struct falcon_nic_data *nic_data; 2426 2404 int rc; 2427 2405 2428 - /* Initialise I2C interface state */ 2429 - efx->i2c.efx = efx; 2430 - efx->i2c.op = &falcon_i2c_bit_operations; 2431 - efx->i2c.sda = 1; 2432 - efx->i2c.scl = 1; 2433 - 2434 2406 /* Allocate storage for hardware specific data */ 2435 2407 nic_data = kzalloc(sizeof(*nic_data), GFP_KERNEL); 2436 2408 efx->nic_data = nic_data; ··· 2472 2456 2473 2457 /* Read in the non-volatile configuration */ 2474 2458 rc = falcon_probe_nvconfig(efx); 2459 + if (rc) 2460 + goto fail5; 2461 + 2462 + /* Initialise I2C adapter */ 2463 + efx->i2c_adap.owner = THIS_MODULE; 2464 + efx->i2c_adap.class = I2C_CLASS_HWMON; 2465 + nic_data->i2c_data = falcon_i2c_bit_operations; 2466 + nic_data->i2c_data.data = efx; 2467 + efx->i2c_adap.algo_data = &nic_data->i2c_data; 2468 + efx->i2c_adap.dev.parent = &efx->pci_dev->dev; 2469 + strcpy(efx->i2c_adap.name, "SFC4000 GPIO"); 2470 + rc = i2c_bit_add_bus(&efx->i2c_adap); 2475 2471 if (rc) 2476 2472 goto fail5; 2477 2473 ··· 2661 2633 void falcon_remove_nic(struct efx_nic *efx) 2662 2634 { 2663 2635 struct falcon_nic_data *nic_data = efx->nic_data; 2636 + int rc; 2637 + 2638 + rc = i2c_del_adapter(&efx->i2c_adap); 2639 + BUG_ON(rc); 2664 2640 2665 2641 falcon_free_buffer(efx, &efx->irq_status); 2666 2642
-381
drivers/net/sfc/i2c-direct.c
··· 1 - /**************************************************************************** 2 - * Driver for Solarflare Solarstorm network controllers and boards 3 - * Copyright 2005 Fen Systems Ltd. 4 - * Copyright 2006-2008 Solarflare Communications Inc. 5 - * 6 - * This program is free software; you can redistribute it and/or modify it 7 - * under the terms of the GNU General Public License version 2 as published 8 - * by the Free Software Foundation, incorporated herein by reference. 9 - */ 10 - 11 - #include <linux/delay.h> 12 - #include "net_driver.h" 13 - #include "i2c-direct.h" 14 - 15 - /* 16 - * I2C data (SDA) and clock (SCL) line read/writes with appropriate 17 - * delays. 18 - */ 19 - 20 - static inline void setsda(struct efx_i2c_interface *i2c, int state) 21 - { 22 - udelay(i2c->op->udelay); 23 - i2c->sda = state; 24 - i2c->op->setsda(i2c); 25 - udelay(i2c->op->udelay); 26 - } 27 - 28 - static inline void setscl(struct efx_i2c_interface *i2c, int state) 29 - { 30 - udelay(i2c->op->udelay); 31 - i2c->scl = state; 32 - i2c->op->setscl(i2c); 33 - udelay(i2c->op->udelay); 34 - } 35 - 36 - static inline int getsda(struct efx_i2c_interface *i2c) 37 - { 38 - int sda; 39 - 40 - udelay(i2c->op->udelay); 41 - sda = i2c->op->getsda(i2c); 42 - udelay(i2c->op->udelay); 43 - return sda; 44 - } 45 - 46 - static inline int getscl(struct efx_i2c_interface *i2c) 47 - { 48 - int scl; 49 - 50 - udelay(i2c->op->udelay); 51 - scl = i2c->op->getscl(i2c); 52 - udelay(i2c->op->udelay); 53 - return scl; 54 - } 55 - 56 - /* 57 - * I2C low-level protocol operations 58 - * 59 - */ 60 - 61 - static inline void i2c_release(struct efx_i2c_interface *i2c) 62 - { 63 - EFX_WARN_ON_PARANOID(!i2c->scl); 64 - EFX_WARN_ON_PARANOID(!i2c->sda); 65 - /* Devices may time out if operations do not end */ 66 - setscl(i2c, 1); 67 - setsda(i2c, 1); 68 - EFX_BUG_ON_PARANOID(getsda(i2c) != 1); 69 - EFX_BUG_ON_PARANOID(getscl(i2c) != 1); 70 - } 71 - 72 - static inline void i2c_start(struct efx_i2c_interface *i2c) 73 - { 74 - /* We may be restarting immediately after a {send,recv}_bit, 75 - * so SCL will not necessarily already be high. 76 - */ 77 - EFX_WARN_ON_PARANOID(!i2c->sda); 78 - setscl(i2c, 1); 79 - setsda(i2c, 0); 80 - setscl(i2c, 0); 81 - setsda(i2c, 1); 82 - } 83 - 84 - static inline void i2c_send_bit(struct efx_i2c_interface *i2c, int bit) 85 - { 86 - EFX_WARN_ON_PARANOID(i2c->scl != 0); 87 - setsda(i2c, bit); 88 - setscl(i2c, 1); 89 - setscl(i2c, 0); 90 - setsda(i2c, 1); 91 - } 92 - 93 - static inline int i2c_recv_bit(struct efx_i2c_interface *i2c) 94 - { 95 - int bit; 96 - 97 - EFX_WARN_ON_PARANOID(i2c->scl != 0); 98 - EFX_WARN_ON_PARANOID(!i2c->sda); 99 - setscl(i2c, 1); 100 - bit = getsda(i2c); 101 - setscl(i2c, 0); 102 - return bit; 103 - } 104 - 105 - static inline void i2c_stop(struct efx_i2c_interface *i2c) 106 - { 107 - EFX_WARN_ON_PARANOID(i2c->scl != 0); 108 - setsda(i2c, 0); 109 - setscl(i2c, 1); 110 - setsda(i2c, 1); 111 - } 112 - 113 - /* 114 - * I2C mid-level protocol operations 115 - * 116 - */ 117 - 118 - /* Sends a byte via the I2C bus and checks for an acknowledgement from 119 - * the slave device. 120 - */ 121 - static int i2c_send_byte(struct efx_i2c_interface *i2c, u8 byte) 122 - { 123 - int i; 124 - 125 - /* Send byte */ 126 - for (i = 0; i < 8; i++) { 127 - i2c_send_bit(i2c, !!(byte & 0x80)); 128 - byte <<= 1; 129 - } 130 - 131 - /* Check for acknowledgement from slave */ 132 - return (i2c_recv_bit(i2c) == 0 ? 0 : -EIO); 133 - } 134 - 135 - /* Receives a byte via the I2C bus and sends ACK/NACK to the slave device. */ 136 - static u8 i2c_recv_byte(struct efx_i2c_interface *i2c, int ack) 137 - { 138 - u8 value = 0; 139 - int i; 140 - 141 - /* Receive byte */ 142 - for (i = 0; i < 8; i++) 143 - value = (value << 1) | i2c_recv_bit(i2c); 144 - 145 - /* Send ACK/NACK */ 146 - i2c_send_bit(i2c, (ack ? 0 : 1)); 147 - 148 - return value; 149 - } 150 - 151 - /* Calculate command byte for a read operation */ 152 - static inline u8 i2c_read_cmd(u8 device_id) 153 - { 154 - return ((device_id << 1) | 1); 155 - } 156 - 157 - /* Calculate command byte for a write operation */ 158 - static inline u8 i2c_write_cmd(u8 device_id) 159 - { 160 - return ((device_id << 1) | 0); 161 - } 162 - 163 - int efx_i2c_check_presence(struct efx_i2c_interface *i2c, u8 device_id) 164 - { 165 - int rc; 166 - 167 - /* If someone is driving the bus low we just give up. */ 168 - if (getsda(i2c) == 0 || getscl(i2c) == 0) { 169 - EFX_ERR(i2c->efx, "%s someone is holding the I2C bus low." 170 - " Giving up.\n", __func__); 171 - return -EFAULT; 172 - } 173 - 174 - /* Pretend to initiate a device write */ 175 - i2c_start(i2c); 176 - rc = i2c_send_byte(i2c, i2c_write_cmd(device_id)); 177 - if (rc) 178 - goto out; 179 - 180 - out: 181 - i2c_stop(i2c); 182 - i2c_release(i2c); 183 - 184 - return rc; 185 - } 186 - 187 - /* This performs a fast read of one or more consecutive bytes from an 188 - * I2C device. Not all devices support consecutive reads of more than 189 - * one byte; for these devices use efx_i2c_read() instead. 190 - */ 191 - int efx_i2c_fast_read(struct efx_i2c_interface *i2c, 192 - u8 device_id, u8 offset, u8 *data, unsigned int len) 193 - { 194 - int i; 195 - int rc; 196 - 197 - EFX_WARN_ON_PARANOID(getsda(i2c) != 1); 198 - EFX_WARN_ON_PARANOID(getscl(i2c) != 1); 199 - EFX_WARN_ON_PARANOID(data == NULL); 200 - EFX_WARN_ON_PARANOID(len < 1); 201 - 202 - /* Select device and starting offset */ 203 - i2c_start(i2c); 204 - rc = i2c_send_byte(i2c, i2c_write_cmd(device_id)); 205 - if (rc) 206 - goto out; 207 - rc = i2c_send_byte(i2c, offset); 208 - if (rc) 209 - goto out; 210 - 211 - /* Read data from device */ 212 - i2c_start(i2c); 213 - rc = i2c_send_byte(i2c, i2c_read_cmd(device_id)); 214 - if (rc) 215 - goto out; 216 - for (i = 0; i < (len - 1); i++) 217 - /* Read and acknowledge all but the last byte */ 218 - data[i] = i2c_recv_byte(i2c, 1); 219 - /* Read last byte with no acknowledgement */ 220 - data[i] = i2c_recv_byte(i2c, 0); 221 - 222 - out: 223 - i2c_stop(i2c); 224 - i2c_release(i2c); 225 - 226 - return rc; 227 - } 228 - 229 - /* This performs a fast write of one or more consecutive bytes to an 230 - * I2C device. Not all devices support consecutive writes of more 231 - * than one byte; for these devices use efx_i2c_write() instead. 232 - */ 233 - int efx_i2c_fast_write(struct efx_i2c_interface *i2c, 234 - u8 device_id, u8 offset, 235 - const u8 *data, unsigned int len) 236 - { 237 - int i; 238 - int rc; 239 - 240 - EFX_WARN_ON_PARANOID(getsda(i2c) != 1); 241 - EFX_WARN_ON_PARANOID(getscl(i2c) != 1); 242 - EFX_WARN_ON_PARANOID(len < 1); 243 - 244 - /* Select device and starting offset */ 245 - i2c_start(i2c); 246 - rc = i2c_send_byte(i2c, i2c_write_cmd(device_id)); 247 - if (rc) 248 - goto out; 249 - rc = i2c_send_byte(i2c, offset); 250 - if (rc) 251 - goto out; 252 - 253 - /* Write data to device */ 254 - for (i = 0; i < len; i++) { 255 - rc = i2c_send_byte(i2c, data[i]); 256 - if (rc) 257 - goto out; 258 - } 259 - 260 - out: 261 - i2c_stop(i2c); 262 - i2c_release(i2c); 263 - 264 - return rc; 265 - } 266 - 267 - /* I2C byte-by-byte read */ 268 - int efx_i2c_read(struct efx_i2c_interface *i2c, 269 - u8 device_id, u8 offset, u8 *data, unsigned int len) 270 - { 271 - int rc; 272 - 273 - /* i2c_fast_read with length 1 is a single byte read */ 274 - for (; len > 0; offset++, data++, len--) { 275 - rc = efx_i2c_fast_read(i2c, device_id, offset, data, 1); 276 - if (rc) 277 - return rc; 278 - } 279 - 280 - return 0; 281 - } 282 - 283 - /* I2C byte-by-byte write */ 284 - int efx_i2c_write(struct efx_i2c_interface *i2c, 285 - u8 device_id, u8 offset, const u8 *data, unsigned int len) 286 - { 287 - int rc; 288 - 289 - /* i2c_fast_write with length 1 is a single byte write */ 290 - for (; len > 0; offset++, data++, len--) { 291 - rc = efx_i2c_fast_write(i2c, device_id, offset, data, 1); 292 - if (rc) 293 - return rc; 294 - mdelay(i2c->op->mdelay); 295 - } 296 - 297 - return 0; 298 - } 299 - 300 - 301 - /* This is just a slightly neater wrapper round efx_i2c_fast_write 302 - * in the case where the target doesn't take an offset 303 - */ 304 - int efx_i2c_send_bytes(struct efx_i2c_interface *i2c, 305 - u8 device_id, const u8 *data, unsigned int len) 306 - { 307 - return efx_i2c_fast_write(i2c, device_id, data[0], data + 1, len - 1); 308 - } 309 - 310 - /* I2C receiving of bytes - does not send an offset byte */ 311 - int efx_i2c_recv_bytes(struct efx_i2c_interface *i2c, u8 device_id, 312 - u8 *bytes, unsigned int len) 313 - { 314 - int i; 315 - int rc; 316 - 317 - EFX_WARN_ON_PARANOID(getsda(i2c) != 1); 318 - EFX_WARN_ON_PARANOID(getscl(i2c) != 1); 319 - EFX_WARN_ON_PARANOID(len < 1); 320 - 321 - /* Select device */ 322 - i2c_start(i2c); 323 - 324 - /* Read data from device */ 325 - rc = i2c_send_byte(i2c, i2c_read_cmd(device_id)); 326 - if (rc) 327 - goto out; 328 - 329 - for (i = 0; i < (len - 1); i++) 330 - /* Read and acknowledge all but the last byte */ 331 - bytes[i] = i2c_recv_byte(i2c, 1); 332 - /* Read last byte with no acknowledgement */ 333 - bytes[i] = i2c_recv_byte(i2c, 0); 334 - 335 - out: 336 - i2c_stop(i2c); 337 - i2c_release(i2c); 338 - 339 - return rc; 340 - } 341 - 342 - /* SMBus and some I2C devices will time out if the I2C clock is 343 - * held low for too long. This is most likely to happen in virtualised 344 - * systems (when the entire domain is descheduled) but could in 345 - * principle happen due to preemption on any busy system (and given the 346 - * potential length of an I2C operation turning preemption off is not 347 - * a sensible option). The following functions deal with the failure by 348 - * retrying up to a fixed number of times. 349 - */ 350 - 351 - #define I2C_MAX_RETRIES (10) 352 - 353 - /* The timeout problem will result in -EIO. If the wrapped function 354 - * returns any other error, pass this up and do not retry. */ 355 - #define RETRY_WRAPPER(_f) \ 356 - int retries = I2C_MAX_RETRIES; \ 357 - int rc; \ 358 - while (retries) { \ 359 - rc = _f; \ 360 - if (rc != -EIO) \ 361 - return rc; \ 362 - retries--; \ 363 - } \ 364 - return rc; \ 365 - 366 - int efx_i2c_check_presence_retry(struct efx_i2c_interface *i2c, u8 device_id) 367 - { 368 - RETRY_WRAPPER(efx_i2c_check_presence(i2c, device_id)) 369 - } 370 - 371 - int efx_i2c_read_retry(struct efx_i2c_interface *i2c, 372 - u8 device_id, u8 offset, u8 *data, unsigned int len) 373 - { 374 - RETRY_WRAPPER(efx_i2c_read(i2c, device_id, offset, data, len)) 375 - } 376 - 377 - int efx_i2c_write_retry(struct efx_i2c_interface *i2c, 378 - u8 device_id, u8 offset, const u8 *data, unsigned int len) 379 - { 380 - RETRY_WRAPPER(efx_i2c_write(i2c, device_id, offset, data, len)) 381 - }
-91
drivers/net/sfc/i2c-direct.h
··· 1 - /**************************************************************************** 2 - * Driver for Solarflare Solarstorm network controllers and boards 3 - * Copyright 2005 Fen Systems Ltd. 4 - * Copyright 2006 Solarflare Communications Inc. 5 - * 6 - * This program is free software; you can redistribute it and/or modify it 7 - * under the terms of the GNU General Public License version 2 as published 8 - * by the Free Software Foundation, incorporated herein by reference. 9 - */ 10 - 11 - #ifndef EFX_I2C_DIRECT_H 12 - #define EFX_I2C_DIRECT_H 13 - 14 - #include "net_driver.h" 15 - 16 - /* 17 - * Direct control of an I2C bus 18 - */ 19 - 20 - struct efx_i2c_interface; 21 - 22 - /** 23 - * struct efx_i2c_bit_operations - I2C bus direct control methods 24 - * 25 - * I2C bus direct control methods. 26 - * 27 - * @setsda: Set state of SDA line 28 - * @setscl: Set state of SCL line 29 - * @getsda: Get state of SDA line 30 - * @getscl: Get state of SCL line 31 - * @udelay: Delay between each bit operation 32 - * @mdelay: Delay between each byte write 33 - */ 34 - struct efx_i2c_bit_operations { 35 - void (*setsda) (struct efx_i2c_interface *i2c); 36 - void (*setscl) (struct efx_i2c_interface *i2c); 37 - int (*getsda) (struct efx_i2c_interface *i2c); 38 - int (*getscl) (struct efx_i2c_interface *i2c); 39 - unsigned int udelay; 40 - unsigned int mdelay; 41 - }; 42 - 43 - /** 44 - * struct efx_i2c_interface - an I2C interface 45 - * 46 - * An I2C interface. 47 - * 48 - * @efx: Attached Efx NIC 49 - * @op: I2C bus control methods 50 - * @sda: Current output state of SDA line 51 - * @scl: Current output state of SCL line 52 - */ 53 - struct efx_i2c_interface { 54 - struct efx_nic *efx; 55 - struct efx_i2c_bit_operations *op; 56 - unsigned int sda:1; 57 - unsigned int scl:1; 58 - }; 59 - 60 - extern int efx_i2c_check_presence(struct efx_i2c_interface *i2c, u8 device_id); 61 - extern int efx_i2c_fast_read(struct efx_i2c_interface *i2c, 62 - u8 device_id, u8 offset, 63 - u8 *data, unsigned int len); 64 - extern int efx_i2c_fast_write(struct efx_i2c_interface *i2c, 65 - u8 device_id, u8 offset, 66 - const u8 *data, unsigned int len); 67 - extern int efx_i2c_read(struct efx_i2c_interface *i2c, 68 - u8 device_id, u8 offset, u8 *data, unsigned int len); 69 - extern int efx_i2c_write(struct efx_i2c_interface *i2c, 70 - u8 device_id, u8 offset, 71 - const u8 *data, unsigned int len); 72 - 73 - extern int efx_i2c_send_bytes(struct efx_i2c_interface *i2c, u8 device_id, 74 - const u8 *bytes, unsigned int len); 75 - 76 - extern int efx_i2c_recv_bytes(struct efx_i2c_interface *i2c, u8 device_id, 77 - u8 *bytes, unsigned int len); 78 - 79 - 80 - /* Versions of the API that retry on failure. */ 81 - extern int efx_i2c_check_presence_retry(struct efx_i2c_interface *i2c, 82 - u8 device_id); 83 - 84 - extern int efx_i2c_read_retry(struct efx_i2c_interface *i2c, 85 - u8 device_id, u8 offset, u8 *data, unsigned int len); 86 - 87 - extern int efx_i2c_write_retry(struct efx_i2c_interface *i2c, 88 - u8 device_id, u8 offset, 89 - const u8 *data, unsigned int len); 90 - 91 - #endif /* EFX_I2C_DIRECT_H */
+8 -3
drivers/net/sfc/net_driver.h
··· 26 26 #include <linux/highmem.h> 27 27 #include <linux/workqueue.h> 28 28 #include <linux/inet_lro.h> 29 + #include <linux/i2c.h> 29 30 30 31 #include "enum.h" 31 32 #include "bitfield.h" 32 - #include "i2c-direct.h" 33 33 34 34 #define EFX_MAX_LRO_DESCRIPTORS 8 35 35 #define EFX_MAX_LRO_AGGR MAX_SKB_FRAGS ··· 418 418 * @init_leds: Sets up board LEDs 419 419 * @set_fault_led: Turns the fault LED on or off 420 420 * @blink: Starts/stops blinking 421 + * @fini: Cleanup function 421 422 * @blinker: used to blink LEDs in software 423 + * @hwmon_client: I2C client for hardware monitor 424 + * @ioexp_client: I2C client for power/port control 422 425 */ 423 426 struct efx_board { 424 427 int type; ··· 434 431 int (*init_leds)(struct efx_nic *efx); 435 432 void (*set_fault_led) (struct efx_nic *efx, int state); 436 433 void (*blink) (struct efx_nic *efx, int start); 434 + void (*fini) (struct efx_nic *nic); 437 435 struct efx_blinker blinker; 436 + struct i2c_client *hwmon_client, *ioexp_client; 438 437 }; 439 438 440 439 #define STRING_TABLE_LOOKUP(val, member) \ ··· 623 618 * @membase: Memory BAR value 624 619 * @biu_lock: BIU (bus interface unit) lock 625 620 * @interrupt_mode: Interrupt mode 626 - * @i2c: I2C interface 621 + * @i2c_adap: I2C adapter 627 622 * @board_info: Board-level information 628 623 * @state: Device state flag. Serialised by the rtnl_lock. 629 624 * @reset_pending: Pending reset method (normally RESET_TYPE_NONE) ··· 691 686 spinlock_t biu_lock; 692 687 enum efx_int_mode interrupt_mode; 693 688 694 - struct efx_i2c_interface i2c; 689 + struct i2c_adapter i2c_adap; 695 690 struct efx_board board_info; 696 691 697 692 enum nic_state state;
+67 -61
drivers/net/sfc/sfe4001.c
··· 106 106 107 107 static const u8 xgphy_max_temperature = 90; 108 108 109 - void sfe4001_poweroff(struct efx_nic *efx) 109 + static void sfe4001_poweroff(struct efx_nic *efx) 110 110 { 111 - struct efx_i2c_interface *i2c = &efx->i2c; 111 + struct i2c_client *ioexp_client = efx->board_info.ioexp_client; 112 + struct i2c_client *hwmon_client = efx->board_info.hwmon_client; 112 113 113 - u8 cfg, out, in; 114 - 115 - EFX_INFO(efx, "%s\n", __func__); 116 - 117 - /* Turn off all power rails */ 118 - out = 0xff; 119 - efx_i2c_write(i2c, PCA9539, P0_OUT, &out, 1); 120 - 121 - /* Disable port 1 outputs on IO expander */ 122 - cfg = 0xff; 123 - efx_i2c_write(i2c, PCA9539, P1_CONFIG, &cfg, 1); 124 - 125 - /* Disable port 0 outputs on IO expander */ 126 - cfg = 0xff; 127 - efx_i2c_write(i2c, PCA9539, P0_CONFIG, &cfg, 1); 114 + /* Turn off all power rails and disable outputs */ 115 + i2c_smbus_write_byte_data(ioexp_client, P0_OUT, 0xff); 116 + i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG, 0xff); 117 + i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0xff); 128 118 129 119 /* Clear any over-temperature alert */ 130 - efx_i2c_read(i2c, MAX6647, RSL, &in, 1); 120 + i2c_smbus_read_byte_data(hwmon_client, RSL); 121 + } 122 + 123 + static void sfe4001_fini(struct efx_nic *efx) 124 + { 125 + EFX_INFO(efx, "%s\n", __func__); 126 + 127 + sfe4001_poweroff(efx); 128 + i2c_unregister_device(efx->board_info.ioexp_client); 129 + i2c_unregister_device(efx->board_info.hwmon_client); 131 130 } 132 131 133 132 /* The P0_EN_3V3X line on SFE4001 boards (from A2 onward) is connected ··· 142 143 * be turned on before the PHY can be used. 143 144 * Context: Process context, rtnl lock held 144 145 */ 145 - int sfe4001_poweron(struct efx_nic *efx) 146 + int sfe4001_init(struct efx_nic *efx) 146 147 { 147 - struct efx_i2c_interface *i2c = &efx->i2c; 148 + struct i2c_client *hwmon_client, *ioexp_client; 148 149 unsigned int count; 149 150 int rc; 150 - u8 out, in, cfg; 151 + u8 out; 151 152 efx_dword_t reg; 153 + 154 + hwmon_client = i2c_new_dummy(&efx->i2c_adap, MAX6647); 155 + if (!hwmon_client) 156 + return -EIO; 157 + efx->board_info.hwmon_client = hwmon_client; 158 + 159 + ioexp_client = i2c_new_dummy(&efx->i2c_adap, PCA9539); 160 + if (!ioexp_client) { 161 + rc = -EIO; 162 + goto fail_hwmon; 163 + } 164 + efx->board_info.ioexp_client = ioexp_client; 152 165 153 166 /* 10Xpress has fixed-function LED pins, so there is no board-specific 154 167 * blink code. */ ··· 177 166 falcon_xmac_writel(efx, &reg, XX_PWR_RST_REG_MAC); 178 167 udelay(10); 179 168 169 + efx->board_info.fini = sfe4001_fini; 170 + 180 171 /* Set DSP over-temperature alert threshold */ 181 172 EFX_INFO(efx, "DSP cut-out at %dC\n", xgphy_max_temperature); 182 - rc = efx_i2c_write(i2c, MAX6647, WLHO, 183 - &xgphy_max_temperature, 1); 173 + rc = i2c_smbus_write_byte_data(hwmon_client, WLHO, 174 + xgphy_max_temperature); 184 175 if (rc) 185 - goto fail1; 176 + goto fail_ioexp; 186 177 187 178 /* Read it back and verify */ 188 - rc = efx_i2c_read(i2c, MAX6647, RLHN, &in, 1); 189 - if (rc) 190 - goto fail1; 191 - if (in != xgphy_max_temperature) { 179 + rc = i2c_smbus_read_byte_data(hwmon_client, RLHN); 180 + if (rc < 0) 181 + goto fail_ioexp; 182 + if (rc != xgphy_max_temperature) { 192 183 rc = -EFAULT; 193 - goto fail1; 184 + goto fail_ioexp; 194 185 } 195 186 196 187 /* Clear any previous over-temperature alert */ 197 - rc = efx_i2c_read(i2c, MAX6647, RSL, &in, 1); 198 - if (rc) 199 - goto fail1; 188 + rc = i2c_smbus_read_byte_data(hwmon_client, RSL); 189 + if (rc < 0) 190 + goto fail_ioexp; 200 191 201 192 /* Enable port 0 and port 1 outputs on IO expander */ 202 - cfg = 0x00; 203 - rc = efx_i2c_write(i2c, PCA9539, P0_CONFIG, &cfg, 1); 193 + rc = i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0x00); 204 194 if (rc) 205 - goto fail1; 206 - cfg = 0xff & ~(1 << P1_SPARE_LBN); 207 - rc = efx_i2c_write(i2c, PCA9539, P1_CONFIG, &cfg, 1); 195 + goto fail_ioexp; 196 + rc = i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG, 197 + 0xff & ~(1 << P1_SPARE_LBN)); 208 198 if (rc) 209 - goto fail2; 199 + goto fail_on; 210 200 211 201 /* Turn all power off then wait 1 sec. This ensures PHY is reset */ 212 202 out = 0xff & ~((0 << P0_EN_1V2_LBN) | (0 << P0_EN_2V5_LBN) | 213 203 (0 << P0_EN_3V3X_LBN) | (0 << P0_EN_5V_LBN) | 214 204 (0 << P0_EN_1V0X_LBN)); 215 - rc = efx_i2c_write(i2c, PCA9539, P0_OUT, &out, 1); 205 + rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out); 216 206 if (rc) 217 - goto fail3; 207 + goto fail_on; 218 208 219 209 schedule_timeout_uninterruptible(HZ); 220 210 count = 0; ··· 227 215 if (sfe4001_phy_flash_cfg) 228 216 out |= 1 << P0_EN_3V3X_LBN; 229 217 230 - rc = efx_i2c_write(i2c, PCA9539, P0_OUT, &out, 1); 218 + rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out); 231 219 if (rc) 232 - goto fail3; 220 + goto fail_on; 233 221 msleep(10); 234 222 235 223 /* Turn on 1V power rail */ 236 224 out &= ~(1 << P0_EN_1V0X_LBN); 237 - rc = efx_i2c_write(i2c, PCA9539, P0_OUT, &out, 1); 225 + rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out); 238 226 if (rc) 239 - goto fail3; 227 + goto fail_on; 240 228 241 229 EFX_INFO(efx, "waiting for power (attempt %d)...\n", count); 242 230 243 231 schedule_timeout_uninterruptible(HZ); 244 232 245 233 /* Check DSP is powered */ 246 - rc = efx_i2c_read(i2c, PCA9539, P1_IN, &in, 1); 247 - if (rc) 248 - goto fail3; 249 - if (in & (1 << P1_AFE_PWD_LBN)) 234 + rc = i2c_smbus_read_byte_data(ioexp_client, P1_IN); 235 + if (rc < 0) 236 + goto fail_on; 237 + if (rc & (1 << P1_AFE_PWD_LBN)) 250 238 goto done; 251 239 252 240 /* DSP doesn't look powered in flash config mode */ ··· 256 244 257 245 EFX_INFO(efx, "timed out waiting for power\n"); 258 246 rc = -ETIMEDOUT; 259 - goto fail3; 247 + goto fail_on; 260 248 261 249 done: 262 250 EFX_INFO(efx, "PHY is powered on\n"); 263 251 return 0; 264 252 265 - fail3: 266 - /* Turn off all power rails */ 267 - out = 0xff; 268 - efx_i2c_write(i2c, PCA9539, P0_OUT, &out, 1); 269 - /* Disable port 1 outputs on IO expander */ 270 - out = 0xff; 271 - efx_i2c_write(i2c, PCA9539, P1_CONFIG, &out, 1); 272 - fail2: 273 - /* Disable port 0 outputs on IO expander */ 274 - out = 0xff; 275 - efx_i2c_write(i2c, PCA9539, P0_CONFIG, &out, 1); 276 - fail1: 253 + fail_on: 254 + sfe4001_poweroff(efx); 255 + fail_ioexp: 256 + i2c_unregister_device(ioexp_client); 257 + fail_hwmon: 258 + i2c_unregister_device(hwmon_client); 277 259 return rc; 278 260 }