tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

mtd: nand: xway: add nandaddr to own struct

Instead of using IO_ADDR_W and IO_ADDR_R use an own pointer to the NAND
controller memory area.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>

authored by

Hauke Mehrtens and committed by
Boris Brezillon 37987ba4 250d45eb

+14 -16
+14 -16
drivers/mtd/nand/xway_nand.c
··· 66 66 struct xway_nand_data { 67 67 struct nand_chip chip; 68 68 unsigned long csflags; 69 + void __iomem *nandaddr; 69 70 }; 70 71 71 72 static u8 xway_readb(struct mtd_info *mtd, int op) 72 73 { 73 74 struct nand_chip *chip = mtd_to_nand(mtd); 74 - void __iomem *nandaddr = chip->IO_ADDR_R; 75 + struct xway_nand_data *data = nand_get_controller_data(chip); 75 76 76 - return readb(nandaddr + op); 77 + return readb(data->nandaddr + op); 77 78 } 78 79 79 80 static void xway_writeb(struct mtd_info *mtd, int op, u8 value) 80 81 { 81 82 struct nand_chip *chip = mtd_to_nand(mtd); 82 - void __iomem *nandaddr = chip->IO_ADDR_W; 83 + struct xway_nand_data *data = nand_get_controller_data(chip); 83 84 84 - writeb(value, nandaddr + op); 85 + writeb(value, data->nandaddr + op); 85 86 } 86 87 87 88 static void xway_select_chip(struct mtd_info *mtd, int select) ··· 155 154 struct mtd_info *mtd; 156 155 struct resource *res; 157 156 int err; 158 - void __iomem *nandaddr; 159 157 u32 cs; 160 158 u32 cs_flag = 0; 161 159 ··· 165 165 return -ENOMEM; 166 166 167 167 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 168 - nandaddr = devm_ioremap_resource(&pdev->dev, res); 169 - if (IS_ERR(nandaddr)) 170 - return PTR_ERR(nandaddr); 168 + data->nandaddr = devm_ioremap_resource(&pdev->dev, res); 169 + if (IS_ERR(data->nandaddr)) 170 + return PTR_ERR(data->nandaddr); 171 171 172 172 nand_set_flash_node(&data->chip, pdev->dev.of_node); 173 173 mtd = nand_to_mtd(&data->chip); 174 174 mtd->dev.parent = &pdev->dev; 175 175 176 - data->chip.IO_ADDR_R = nandaddr; 177 - data->chip.IO_ADDR_W = nandaddr; 178 176 data->chip.cmd_ctrl = xway_cmd_ctrl; 179 177 data->chip.dev_ready = xway_dev_ready; 180 178 data->chip.select_chip = xway_select_chip; ··· 193 195 cs_flag = NAND_CON_IN_CS1 | NAND_CON_OUT_CS1; 194 196 195 197 /* setup the EBU to run in NAND mode on our base addr */ 196 - ltq_ebu_w32(CPHYSADDR(nandaddr) 197 - | ADDSEL1_MASK(3) | ADDSEL1_REGEN, EBU_ADDSEL1); 198 + ltq_ebu_w32(CPHYSADDR(data->nandaddr) 199 + | ADDSEL1_MASK(3) | ADDSEL1_REGEN, EBU_ADDSEL1); 198 200 199 201 ltq_ebu_w32(BUSCON1_SETUP | BUSCON1_BCGEN_RES | BUSCON1_WAITWRC2 200 - | BUSCON1_WAITRDC2 | BUSCON1_HOLDC1 | BUSCON1_RECOVC1 201 - | BUSCON1_CMULT4, LTQ_EBU_BUSCON1); 202 + | BUSCON1_WAITRDC2 | BUSCON1_HOLDC1 | BUSCON1_RECOVC1 203 + | BUSCON1_CMULT4, LTQ_EBU_BUSCON1); 202 204 203 205 ltq_ebu_w32(NAND_CON_NANDM | NAND_CON_CSMUX | NAND_CON_CS_P 204 - | NAND_CON_SE_P | NAND_CON_WP_P | NAND_CON_PRE_P 205 - | cs_flag, EBU_NAND_CON); 206 + | NAND_CON_SE_P | NAND_CON_WP_P | NAND_CON_PRE_P 207 + | cs_flag, EBU_NAND_CON); 206 208 207 209 /* Scan to find existence of the device */ 208 210 err = nand_scan(mtd, 1);