tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
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intel: handle unused assignments

Remove variables that were storing a return value from a register
read or other read, where the return value wasn't used. Those
conversions to remove the lvalue of the assignment should be safe
because the readl memory mapped reads are marked volatile and
should not be optimized out without an lvalue (I suspect a very
long time ago this wasn't guaranteed as it is today).

These changes are part of a separate patch to make it easier to review.

Warnings Fixed:
.../intel/e100.c:2596:9: warning: variable ‘err’ set but not used [-Wunused-but-set-variable]
.../intel/ixgb/ixgb_hw.c:101:6: warning: variable ‘icr_reg’ set but not used [-Wunused-but-set-variable]
.../intel/ixgb/ixgb_hw.c:277:6: warning: variable ‘ctrl_reg’ set but not used [-Wunused-but-set-variable]
.../intel/ixgb/ixgb_hw.c:952:15: warning: variable ‘temp_reg’ set but not used [-Wunused-but-set-variable]
.../intel/ixgb/ixgb_hw.c:1164:7: warning: variable ‘mdio_reg’ set but not used [-Wunused-but-set-variable]
.../intel/e1000/e1000_hw.c:132:6: warning: variable ‘ret_val’ set but not used [-Wunused-but-set-variable]
.../intel/e1000/e1000_hw.c:380:6: warning: variable ‘icr’ set but not used [-Wunused-but-set-variable]
.../intel/e1000/e1000_hw.c:2378:6: warning: variable ‘signal’ set but not used [-Wunused-but-set-variable]
.../intel/e1000/e1000_hw.c:2374:6: warning: variable ‘ctrl’ set but not used [-Wunused-but-set-variable]
.../intel/e1000/e1000_hw.c:2373:6: warning: variable ‘rxcw’ set but not used [-Wunused-but-set-variable]
.../intel/e1000/e1000_hw.c:4678:15: warning: variable ‘temp’ set but not used [-Wunused-but-set-variable]

Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

authored by

Jesse Brandeburg and committed by
David S. Miller 36ec1486 b50f7bca

+127 -145
+3 -3
drivers/net/ethernet/intel/e100.c
··· 2593 2593 { 2594 2594 struct ethtool_cmd cmd; 2595 2595 struct nic *nic = netdev_priv(netdev); 2596 - int i, err; 2596 + int i; 2597 2597 2598 2598 memset(data, 0, E100_TEST_LEN * sizeof(u64)); 2599 2599 data[0] = !mii_link_ok(&nic->mii); ··· 2601 2601 if (test->flags & ETH_TEST_FL_OFFLINE) { 2602 2602 2603 2603 /* save speed, duplex & autoneg settings */ 2604 - err = mii_ethtool_gset(&nic->mii, &cmd); 2604 + mii_ethtool_gset(&nic->mii, &cmd); 2605 2605 2606 2606 if (netif_running(netdev)) 2607 2607 e100_down(nic); ··· 2610 2610 data[4] = e100_loopback_test(nic, lb_phy); 2611 2611 2612 2612 /* restore speed, duplex & autoneg settings */ 2613 - err = mii_ethtool_sset(&nic->mii, &cmd); 2613 + mii_ethtool_sset(&nic->mii, &cmd); 2614 2614 2615 2615 if (netif_running(netdev)) 2616 2616 e100_up(nic);
+61 -70
drivers/net/ethernet/intel/e1000/e1000_hw.c
··· 376 376 { 377 377 u32 ctrl; 378 378 u32 ctrl_ext; 379 - u32 icr; 380 379 u32 manc; 381 380 u32 led_ctrl; 382 381 s32 ret_val; ··· 500 501 ew32(IMC, 0xffffffff); 501 502 502 503 /* Clear any pending interrupt events. */ 503 - icr = er32(ICR); 504 + er32(ICR); 504 505 505 506 /* If MWI was previously enabled, reenable it. */ 506 507 if (hw->mac_type == e1000_82542_rev2_0) { ··· 2367 2368 */ 2368 2369 s32 e1000_check_for_link(struct e1000_hw *hw) 2369 2370 { 2370 - u32 rxcw = 0; 2371 - u32 ctrl; 2372 2371 u32 status; 2373 2372 u32 rctl; 2374 2373 u32 icr; 2375 - u32 signal = 0; 2376 2374 s32 ret_val; 2377 2375 u16 phy_data; 2378 2376 2379 - ctrl = er32(CTRL); 2377 + er32(CTRL); 2380 2378 status = er32(STATUS); 2381 2379 2382 2380 /* On adapters with a MAC newer than 82544, SW Definable pin 1 will be ··· 2382 2386 */ 2383 2387 if ((hw->media_type == e1000_media_type_fiber) || 2384 2388 (hw->media_type == e1000_media_type_internal_serdes)) { 2385 - rxcw = er32(RXCW); 2389 + er32(RXCW); 2386 2390 2387 2391 if (hw->media_type == e1000_media_type_fiber) { 2388 - signal = 2389 - (hw->mac_type > 2390 - e1000_82544) ? E1000_CTRL_SWDPIN1 : 0; 2391 2392 if (status & E1000_STATUS_LU) 2392 2393 hw->get_link_status = false; 2393 2394 } ··· 4666 4673 */ 4667 4674 static void e1000_clear_hw_cntrs(struct e1000_hw *hw) 4668 4675 { 4669 - volatile u32 temp; 4676 + er32(CRCERRS); 4677 + er32(SYMERRS); 4678 + er32(MPC); 4679 + er32(SCC); 4680 + er32(ECOL); 4681 + er32(MCC); 4682 + er32(LATECOL); 4683 + er32(COLC); 4684 + er32(DC); 4685 + er32(SEC); 4686 + er32(RLEC); 4687 + er32(XONRXC); 4688 + er32(XONTXC); 4689 + er32(XOFFRXC); 4690 + er32(XOFFTXC); 4691 + er32(FCRUC); 4670 4692 4671 - temp = er32(CRCERRS); 4672 - temp = er32(SYMERRS); 4673 - temp = er32(MPC); 4674 - temp = er32(SCC); 4675 - temp = er32(ECOL); 4676 - temp = er32(MCC); 4677 - temp = er32(LATECOL); 4678 - temp = er32(COLC); 4679 - temp = er32(DC); 4680 - temp = er32(SEC); 4681 - temp = er32(RLEC); 4682 - temp = er32(XONRXC); 4683 - temp = er32(XONTXC); 4684 - temp = er32(XOFFRXC); 4685 - temp = er32(XOFFTXC); 4686 - temp = er32(FCRUC); 4693 + er32(PRC64); 4694 + er32(PRC127); 4695 + er32(PRC255); 4696 + er32(PRC511); 4697 + er32(PRC1023); 4698 + er32(PRC1522); 4687 4699 4688 - temp = er32(PRC64); 4689 - temp = er32(PRC127); 4690 - temp = er32(PRC255); 4691 - temp = er32(PRC511); 4692 - temp = er32(PRC1023); 4693 - temp = er32(PRC1522); 4700 + er32(GPRC); 4701 + er32(BPRC); 4702 + er32(MPRC); 4703 + er32(GPTC); 4704 + er32(GORCL); 4705 + er32(GORCH); 4706 + er32(GOTCL); 4707 + er32(GOTCH); 4708 + er32(RNBC); 4709 + er32(RUC); 4710 + er32(RFC); 4711 + er32(ROC); 4712 + er32(RJC); 4713 + er32(TORL); 4714 + er32(TORH); 4715 + er32(TOTL); 4716 + er32(TOTH); 4717 + er32(TPR); 4718 + er32(TPT); 4694 4719 4695 - temp = er32(GPRC); 4696 - temp = er32(BPRC); 4697 - temp = er32(MPRC); 4698 - temp = er32(GPTC); 4699 - temp = er32(GORCL); 4700 - temp = er32(GORCH); 4701 - temp = er32(GOTCL); 4702 - temp = er32(GOTCH); 4703 - temp = er32(RNBC); 4704 - temp = er32(RUC); 4705 - temp = er32(RFC); 4706 - temp = er32(ROC); 4707 - temp = er32(RJC); 4708 - temp = er32(TORL); 4709 - temp = er32(TORH); 4710 - temp = er32(TOTL); 4711 - temp = er32(TOTH); 4712 - temp = er32(TPR); 4713 - temp = er32(TPT); 4720 + er32(PTC64); 4721 + er32(PTC127); 4722 + er32(PTC255); 4723 + er32(PTC511); 4724 + er32(PTC1023); 4725 + er32(PTC1522); 4714 4726 4715 - temp = er32(PTC64); 4716 - temp = er32(PTC127); 4717 - temp = er32(PTC255); 4718 - temp = er32(PTC511); 4719 - temp = er32(PTC1023); 4720 - temp = er32(PTC1522); 4721 - 4722 - temp = er32(MPTC); 4723 - temp = er32(BPTC); 4727 + er32(MPTC); 4728 + er32(BPTC); 4724 4729 4725 4730 if (hw->mac_type < e1000_82543) 4726 4731 return; 4727 4732 4728 - temp = er32(ALGNERRC); 4729 - temp = er32(RXERRC); 4730 - temp = er32(TNCRS); 4731 - temp = er32(CEXTERR); 4732 - temp = er32(TSCTC); 4733 - temp = er32(TSCTFC); 4733 + er32(ALGNERRC); 4734 + er32(RXERRC); 4735 + er32(TNCRS); 4736 + er32(CEXTERR); 4737 + er32(TSCTC); 4738 + er32(TSCTFC); 4734 4739 4735 4740 if (hw->mac_type <= e1000_82544) 4736 4741 return; 4737 4742 4738 - temp = er32(MGTPRC); 4739 - temp = er32(MGTPDC); 4740 - temp = er32(MGTPTC); 4743 + er32(MGTPRC); 4744 + er32(MGTPDC); 4745 + er32(MGTPTC); 4741 4746 } 4742 4747 4743 4748 /**
+63 -72
drivers/net/ethernet/intel/ixgb/ixgb_hw.c
··· 98 98 ixgb_adapter_stop(struct ixgb_hw *hw) 99 99 { 100 100 u32 ctrl_reg; 101 - u32 icr_reg; 102 101 103 102 ENTER(); 104 103 ··· 141 142 IXGB_WRITE_REG(hw, IMC, 0xffffffff); 142 143 143 144 /* Clear any pending interrupt events. */ 144 - icr_reg = IXGB_READ_REG(hw, ICR); 145 + IXGB_READ_REG(hw, ICR); 145 146 146 147 return ctrl_reg & IXGB_CTRL0_RST; 147 148 } ··· 273 274 ixgb_init_hw(struct ixgb_hw *hw) 274 275 { 275 276 u32 i; 276 - u32 ctrl_reg; 277 277 bool status; 278 278 279 279 ENTER(); ··· 284 286 */ 285 287 pr_debug("Issuing a global reset to MAC\n"); 286 288 287 - ctrl_reg = ixgb_mac_reset(hw); 289 + ixgb_mac_reset(hw); 288 290 289 291 pr_debug("Issuing an EE reset to MAC\n"); 290 292 #ifdef HP_ZX1 ··· 947 949 static void 948 950 ixgb_clear_hw_cntrs(struct ixgb_hw *hw) 949 951 { 950 - volatile u32 temp_reg; 951 - 952 952 ENTER(); 953 953 954 954 /* if we are stopped or resetting exit gracefully */ ··· 955 959 return; 956 960 } 957 961 958 - temp_reg = IXGB_READ_REG(hw, TPRL); 959 - temp_reg = IXGB_READ_REG(hw, TPRH); 960 - temp_reg = IXGB_READ_REG(hw, GPRCL); 961 - temp_reg = IXGB_READ_REG(hw, GPRCH); 962 - temp_reg = IXGB_READ_REG(hw, BPRCL); 963 - temp_reg = IXGB_READ_REG(hw, BPRCH); 964 - temp_reg = IXGB_READ_REG(hw, MPRCL); 965 - temp_reg = IXGB_READ_REG(hw, MPRCH); 966 - temp_reg = IXGB_READ_REG(hw, UPRCL); 967 - temp_reg = IXGB_READ_REG(hw, UPRCH); 968 - temp_reg = IXGB_READ_REG(hw, VPRCL); 969 - temp_reg = IXGB_READ_REG(hw, VPRCH); 970 - temp_reg = IXGB_READ_REG(hw, JPRCL); 971 - temp_reg = IXGB_READ_REG(hw, JPRCH); 972 - temp_reg = IXGB_READ_REG(hw, GORCL); 973 - temp_reg = IXGB_READ_REG(hw, GORCH); 974 - temp_reg = IXGB_READ_REG(hw, TORL); 975 - temp_reg = IXGB_READ_REG(hw, TORH); 976 - temp_reg = IXGB_READ_REG(hw, RNBC); 977 - temp_reg = IXGB_READ_REG(hw, RUC); 978 - temp_reg = IXGB_READ_REG(hw, ROC); 979 - temp_reg = IXGB_READ_REG(hw, RLEC); 980 - temp_reg = IXGB_READ_REG(hw, CRCERRS); 981 - temp_reg = IXGB_READ_REG(hw, ICBC); 982 - temp_reg = IXGB_READ_REG(hw, ECBC); 983 - temp_reg = IXGB_READ_REG(hw, MPC); 984 - temp_reg = IXGB_READ_REG(hw, TPTL); 985 - temp_reg = IXGB_READ_REG(hw, TPTH); 986 - temp_reg = IXGB_READ_REG(hw, GPTCL); 987 - temp_reg = IXGB_READ_REG(hw, GPTCH); 988 - temp_reg = IXGB_READ_REG(hw, BPTCL); 989 - temp_reg = IXGB_READ_REG(hw, BPTCH); 990 - temp_reg = IXGB_READ_REG(hw, MPTCL); 991 - temp_reg = IXGB_READ_REG(hw, MPTCH); 992 - temp_reg = IXGB_READ_REG(hw, UPTCL); 993 - temp_reg = IXGB_READ_REG(hw, UPTCH); 994 - temp_reg = IXGB_READ_REG(hw, VPTCL); 995 - temp_reg = IXGB_READ_REG(hw, VPTCH); 996 - temp_reg = IXGB_READ_REG(hw, JPTCL); 997 - temp_reg = IXGB_READ_REG(hw, JPTCH); 998 - temp_reg = IXGB_READ_REG(hw, GOTCL); 999 - temp_reg = IXGB_READ_REG(hw, GOTCH); 1000 - temp_reg = IXGB_READ_REG(hw, TOTL); 1001 - temp_reg = IXGB_READ_REG(hw, TOTH); 1002 - temp_reg = IXGB_READ_REG(hw, DC); 1003 - temp_reg = IXGB_READ_REG(hw, PLT64C); 1004 - temp_reg = IXGB_READ_REG(hw, TSCTC); 1005 - temp_reg = IXGB_READ_REG(hw, TSCTFC); 1006 - temp_reg = IXGB_READ_REG(hw, IBIC); 1007 - temp_reg = IXGB_READ_REG(hw, RFC); 1008 - temp_reg = IXGB_READ_REG(hw, LFC); 1009 - temp_reg = IXGB_READ_REG(hw, PFRC); 1010 - temp_reg = IXGB_READ_REG(hw, PFTC); 1011 - temp_reg = IXGB_READ_REG(hw, MCFRC); 1012 - temp_reg = IXGB_READ_REG(hw, MCFTC); 1013 - temp_reg = IXGB_READ_REG(hw, XONRXC); 1014 - temp_reg = IXGB_READ_REG(hw, XONTXC); 1015 - temp_reg = IXGB_READ_REG(hw, XOFFRXC); 1016 - temp_reg = IXGB_READ_REG(hw, XOFFTXC); 1017 - temp_reg = IXGB_READ_REG(hw, RJC); 962 + IXGB_READ_REG(hw, TPRL); 963 + IXGB_READ_REG(hw, TPRH); 964 + IXGB_READ_REG(hw, GPRCL); 965 + IXGB_READ_REG(hw, GPRCH); 966 + IXGB_READ_REG(hw, BPRCL); 967 + IXGB_READ_REG(hw, BPRCH); 968 + IXGB_READ_REG(hw, MPRCL); 969 + IXGB_READ_REG(hw, MPRCH); 970 + IXGB_READ_REG(hw, UPRCL); 971 + IXGB_READ_REG(hw, UPRCH); 972 + IXGB_READ_REG(hw, VPRCL); 973 + IXGB_READ_REG(hw, VPRCH); 974 + IXGB_READ_REG(hw, JPRCL); 975 + IXGB_READ_REG(hw, JPRCH); 976 + IXGB_READ_REG(hw, GORCL); 977 + IXGB_READ_REG(hw, GORCH); 978 + IXGB_READ_REG(hw, TORL); 979 + IXGB_READ_REG(hw, TORH); 980 + IXGB_READ_REG(hw, RNBC); 981 + IXGB_READ_REG(hw, RUC); 982 + IXGB_READ_REG(hw, ROC); 983 + IXGB_READ_REG(hw, RLEC); 984 + IXGB_READ_REG(hw, CRCERRS); 985 + IXGB_READ_REG(hw, ICBC); 986 + IXGB_READ_REG(hw, ECBC); 987 + IXGB_READ_REG(hw, MPC); 988 + IXGB_READ_REG(hw, TPTL); 989 + IXGB_READ_REG(hw, TPTH); 990 + IXGB_READ_REG(hw, GPTCL); 991 + IXGB_READ_REG(hw, GPTCH); 992 + IXGB_READ_REG(hw, BPTCL); 993 + IXGB_READ_REG(hw, BPTCH); 994 + IXGB_READ_REG(hw, MPTCL); 995 + IXGB_READ_REG(hw, MPTCH); 996 + IXGB_READ_REG(hw, UPTCL); 997 + IXGB_READ_REG(hw, UPTCH); 998 + IXGB_READ_REG(hw, VPTCL); 999 + IXGB_READ_REG(hw, VPTCH); 1000 + IXGB_READ_REG(hw, JPTCL); 1001 + IXGB_READ_REG(hw, JPTCH); 1002 + IXGB_READ_REG(hw, GOTCL); 1003 + IXGB_READ_REG(hw, GOTCH); 1004 + IXGB_READ_REG(hw, TOTL); 1005 + IXGB_READ_REG(hw, TOTH); 1006 + IXGB_READ_REG(hw, DC); 1007 + IXGB_READ_REG(hw, PLT64C); 1008 + IXGB_READ_REG(hw, TSCTC); 1009 + IXGB_READ_REG(hw, TSCTFC); 1010 + IXGB_READ_REG(hw, IBIC); 1011 + IXGB_READ_REG(hw, RFC); 1012 + IXGB_READ_REG(hw, LFC); 1013 + IXGB_READ_REG(hw, PFRC); 1014 + IXGB_READ_REG(hw, PFTC); 1015 + IXGB_READ_REG(hw, MCFRC); 1016 + IXGB_READ_REG(hw, MCFTC); 1017 + IXGB_READ_REG(hw, XONRXC); 1018 + IXGB_READ_REG(hw, XONTXC); 1019 + IXGB_READ_REG(hw, XOFFRXC); 1020 + IXGB_READ_REG(hw, XOFFTXC); 1021 + IXGB_READ_REG(hw, RJC); 1018 1022 } 1019 1023 1020 1024 /****************************************************************************** ··· 1157 1161 ixgb_optics_reset(struct ixgb_hw *hw) 1158 1162 { 1159 1163 if (hw->phy_type == ixgb_phy_type_txn17401) { 1160 - u16 mdio_reg; 1161 - 1162 1164 ixgb_write_phy_reg(hw, 1163 1165 MDIO_CTRL1, 1164 1166 IXGB_PHY_ADDRESS, 1165 1167 MDIO_MMD_PMAPMD, 1166 1168 MDIO_CTRL1_RESET); 1167 1169 1168 - mdio_reg = ixgb_read_phy_reg(hw, 1169 - MDIO_CTRL1, 1170 - IXGB_PHY_ADDRESS, 1171 - MDIO_MMD_PMAPMD); 1170 + ixgb_read_phy_reg(hw, MDIO_CTRL1, IXGB_PHY_ADDRESS, MDIO_MMD_PMAPMD); 1172 1171 } 1173 1172 } 1174 1173