Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge master.kernel.org:/home/rmk/linux-2.6-serial

* master.kernel.org:/home/rmk/linux-2.6-serial:
[ARM] 3383/3: ixp2000: ixdp2x01 platform serial conversion
[SERIAL] amba-pl010: Remove accessor macros
[SERIAL] remove 8250_acpi (replaced by 8250_pnp and PNPACPI)
[SERIAL] icom: select FW_LOADER

+122 -284
+71 -31
arch/arm/mach-ixp2000/ixdp2x01.c
··· 30 30 #include <linux/tty.h> 31 31 #include <linux/serial_core.h> 32 32 #include <linux/platform_device.h> 33 + #include <linux/serial_8250.h> 33 34 34 35 #include <asm/io.h> 35 36 #include <asm/irq.h> ··· 133 132 134 133 135 134 /************************************************************************* 136 - * IXDP2x01 memory map and serial ports 135 + * IXDP2x01 memory map 137 136 *************************************************************************/ 138 137 static struct map_desc ixdp2x01_io_desc __initdata = { 139 138 .virtual = IXDP2X01_VIRT_CPLD_BASE, ··· 142 141 .type = MT_DEVICE 143 142 }; 144 143 145 - static struct uart_port ixdp2x01_serial_ports[2] = { 146 - { 147 - .membase = (char *)(IXDP2X01_UART1_VIRT_BASE), 148 - .mapbase = (unsigned long)IXDP2X01_UART1_PHYS_BASE, 149 - .irq = IRQ_IXDP2X01_UART1, 150 - .flags = UPF_SKIP_TEST, 151 - .iotype = UPIO_MEM32, 152 - .regshift = 2, 153 - .uartclk = IXDP2X01_UART_CLK, 154 - .line = 1, 155 - .type = PORT_16550A, 156 - .fifosize = 16 157 - }, { 158 - .membase = (char *)(IXDP2X01_UART2_VIRT_BASE), 159 - .mapbase = (unsigned long)IXDP2X01_UART2_PHYS_BASE, 160 - .irq = IRQ_IXDP2X01_UART2, 161 - .flags = UPF_SKIP_TEST, 162 - .iotype = UPIO_MEM32, 163 - .regshift = 2, 164 - .uartclk = IXDP2X01_UART_CLK, 165 - .line = 2, 166 - .type = PORT_16550A, 167 - .fifosize = 16 168 - }, 169 - }; 170 - 171 144 static void __init ixdp2x01_map_io(void) 172 145 { 173 - ixp2000_map_io(); 174 - 146 + ixp2000_map_io(); 175 147 iotable_init(&ixdp2x01_io_desc, 1); 148 + } 176 149 177 - early_serial_setup(&ixdp2x01_serial_ports[0]); 178 - early_serial_setup(&ixdp2x01_serial_ports[1]); 150 + 151 + /************************************************************************* 152 + * IXDP2x01 serial ports 153 + *************************************************************************/ 154 + static struct plat_serial8250_port ixdp2x01_serial_port1[] = { 155 + { 156 + .mapbase = (unsigned long)IXDP2X01_UART1_PHYS_BASE, 157 + .membase = (char *)IXDP2X01_UART1_VIRT_BASE, 158 + .irq = IRQ_IXDP2X01_UART1, 159 + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, 160 + .iotype = UPIO_MEM32, 161 + .regshift = 2, 162 + .uartclk = IXDP2X01_UART_CLK, 163 + }, 164 + { } 165 + }; 166 + 167 + static struct resource ixdp2x01_uart_resource1 = { 168 + .start = IXDP2X01_UART1_PHYS_BASE, 169 + .end = IXDP2X01_UART1_PHYS_BASE + 0xffff, 170 + .flags = IORESOURCE_MEM, 171 + }; 172 + 173 + static struct platform_device ixdp2x01_serial_device1 = { 174 + .name = "serial8250", 175 + .id = PLAT8250_DEV_PLATFORM1, 176 + .dev = { 177 + .platform_data = ixdp2x01_serial_port1, 178 + }, 179 + .num_resources = 1, 180 + .resource = &ixdp2x01_uart_resource1, 181 + }; 182 + 183 + static struct plat_serial8250_port ixdp2x01_serial_port2[] = { 184 + { 185 + .mapbase = (unsigned long)IXDP2X01_UART2_PHYS_BASE, 186 + .membase = (char *)IXDP2X01_UART2_VIRT_BASE, 187 + .irq = IRQ_IXDP2X01_UART2, 188 + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, 189 + .iotype = UPIO_MEM32, 190 + .regshift = 2, 191 + .uartclk = IXDP2X01_UART_CLK, 192 + }, 193 + { } 194 + }; 195 + 196 + static struct resource ixdp2x01_uart_resource2 = { 197 + .start = IXDP2X01_UART2_PHYS_BASE, 198 + .end = IXDP2X01_UART2_PHYS_BASE + 0xffff, 199 + .flags = IORESOURCE_MEM, 200 + }; 201 + 202 + static struct platform_device ixdp2x01_serial_device2 = { 203 + .name = "serial8250", 204 + .id = PLAT8250_DEV_PLATFORM2, 205 + .dev = { 206 + .platform_data = ixdp2x01_serial_port2, 207 + }, 208 + .num_resources = 1, 209 + .resource = &ixdp2x01_uart_resource2, 210 + }; 211 + 212 + static void ixdp2x01_uart_init(void) 213 + { 214 + platform_device_register(&ixdp2x01_serial_device1); 215 + platform_device_register(&ixdp2x01_serial_device2); 179 216 } 180 217 181 218 ··· 413 374 414 375 platform_add_devices(ixdp2x01_devices, ARRAY_SIZE(ixdp2x01_devices)); 415 376 ixp2000_uart_init(); 377 + ixdp2x01_uart_init(); 416 378 } 417 379 418 380
-183
drivers/serial/8250_acpi.c
··· 1 - /* 2 - * Copyright (c) 2002-2003 Matthew Wilcox for Hewlett-Packard 3 - * Copyright (C) 2004 Hewlett-Packard Co 4 - * Bjorn Helgaas <bjorn.helgaas@hp.com> 5 - * 6 - * This program is free software; you can redistribute it and/or modify 7 - * it under the terms of the GNU General Public License as published by 8 - * the Free Software Foundation; either version 2 of the License, or 9 - * (at your option) any later version. 10 - */ 11 - 12 - #include <linux/acpi.h> 13 - #include <linux/init.h> 14 - #include <linux/module.h> 15 - #include <linux/serial_core.h> 16 - 17 - #include <acpi/acpi_bus.h> 18 - 19 - #include <asm/io.h> 20 - 21 - #include "8250.h" 22 - 23 - struct serial_private { 24 - int line; 25 - }; 26 - 27 - static acpi_status acpi_serial_mmio(struct uart_port *port, 28 - struct acpi_resource_address64 *addr) 29 - { 30 - port->mapbase = addr->minimum; 31 - port->iotype = UPIO_MEM; 32 - port->flags |= UPF_IOREMAP; 33 - return AE_OK; 34 - } 35 - 36 - static acpi_status acpi_serial_port(struct uart_port *port, 37 - struct acpi_resource_io *io) 38 - { 39 - if (io->address_length) { 40 - port->iobase = io->minimum; 41 - port->iotype = UPIO_PORT; 42 - } else 43 - printk(KERN_ERR "%s: zero-length IO port range?\n", __FUNCTION__); 44 - return AE_OK; 45 - } 46 - 47 - static acpi_status acpi_serial_ext_irq(struct uart_port *port, 48 - struct acpi_resource_extended_irq *ext_irq) 49 - { 50 - int rc; 51 - 52 - if (ext_irq->interrupt_count > 0) { 53 - rc = acpi_register_gsi(ext_irq->interrupts[0], 54 - ext_irq->triggering, ext_irq->polarity); 55 - if (rc < 0) 56 - return AE_ERROR; 57 - port->irq = rc; 58 - } 59 - return AE_OK; 60 - } 61 - 62 - static acpi_status acpi_serial_irq(struct uart_port *port, 63 - struct acpi_resource_irq *irq) 64 - { 65 - int rc; 66 - 67 - if (irq->interrupt_count > 0) { 68 - rc = acpi_register_gsi(irq->interrupts[0], 69 - irq->triggering, irq->polarity); 70 - if (rc < 0) 71 - return AE_ERROR; 72 - port->irq = rc; 73 - } 74 - return AE_OK; 75 - } 76 - 77 - static acpi_status acpi_serial_resource(struct acpi_resource *res, void *data) 78 - { 79 - struct uart_port *port = (struct uart_port *) data; 80 - struct acpi_resource_address64 addr; 81 - acpi_status status; 82 - 83 - status = acpi_resource_to_address64(res, &addr); 84 - if (ACPI_SUCCESS(status)) 85 - return acpi_serial_mmio(port, &addr); 86 - else if (res->type == ACPI_RESOURCE_TYPE_IO) 87 - return acpi_serial_port(port, &res->data.io); 88 - else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) 89 - return acpi_serial_ext_irq(port, &res->data.extended_irq); 90 - else if (res->type == ACPI_RESOURCE_TYPE_IRQ) 91 - return acpi_serial_irq(port, &res->data.irq); 92 - return AE_OK; 93 - } 94 - 95 - static int acpi_serial_add(struct acpi_device *device) 96 - { 97 - struct serial_private *priv; 98 - acpi_status status; 99 - struct uart_port port; 100 - int result; 101 - 102 - memset(&port, 0, sizeof(struct uart_port)); 103 - 104 - port.uartclk = 1843200; 105 - port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF; 106 - 107 - priv = kmalloc(sizeof(struct serial_private), GFP_KERNEL); 108 - if (!priv) { 109 - result = -ENOMEM; 110 - goto fail; 111 - } 112 - memset(priv, 0, sizeof(*priv)); 113 - 114 - status = acpi_walk_resources(device->handle, METHOD_NAME__CRS, 115 - acpi_serial_resource, &port); 116 - if (ACPI_FAILURE(status)) { 117 - result = -ENODEV; 118 - goto fail; 119 - } 120 - 121 - if (!port.mapbase && !port.iobase) { 122 - printk(KERN_ERR "%s: no iomem or port address in %s _CRS\n", 123 - __FUNCTION__, device->pnp.bus_id); 124 - result = -ENODEV; 125 - goto fail; 126 - } 127 - 128 - priv->line = serial8250_register_port(&port); 129 - if (priv->line < 0) { 130 - printk(KERN_WARNING "Couldn't register serial port %s: %d\n", 131 - device->pnp.bus_id, priv->line); 132 - result = -ENODEV; 133 - goto fail; 134 - } 135 - 136 - acpi_driver_data(device) = priv; 137 - return 0; 138 - 139 - fail: 140 - kfree(priv); 141 - 142 - return result; 143 - } 144 - 145 - static int acpi_serial_remove(struct acpi_device *device, int type) 146 - { 147 - struct serial_private *priv; 148 - 149 - if (!device || !acpi_driver_data(device)) 150 - return -EINVAL; 151 - 152 - priv = acpi_driver_data(device); 153 - serial8250_unregister_port(priv->line); 154 - kfree(priv); 155 - 156 - return 0; 157 - } 158 - 159 - static struct acpi_driver acpi_serial_driver = { 160 - .name = "serial", 161 - .class = "", 162 - .ids = "PNP0501", 163 - .ops = { 164 - .add = acpi_serial_add, 165 - .remove = acpi_serial_remove, 166 - }, 167 - }; 168 - 169 - static int __init acpi_serial_init(void) 170 - { 171 - return acpi_bus_register_driver(&acpi_serial_driver); 172 - } 173 - 174 - static void __exit acpi_serial_exit(void) 175 - { 176 - acpi_bus_unregister_driver(&acpi_serial_driver); 177 - } 178 - 179 - module_init(acpi_serial_init); 180 - module_exit(acpi_serial_exit); 181 - 182 - MODULE_LICENSE("GPL"); 183 - MODULE_DESCRIPTION("Generic 8250/16x50 ACPI serial driver");
+1 -8
drivers/serial/Kconfig
··· 77 77 78 78 If unsure, say N. 79 79 80 - config SERIAL_8250_ACPI 81 - bool "8250/16550 device discovery via ACPI namespace" 82 - default y if IA64 83 - depends on ACPI && SERIAL_8250 84 - ---help--- 85 - If you wish to enable serial port discovery via the ACPI 86 - namespace, say Y here. If unsure, say N. 87 - 88 80 config SERIAL_8250_NR_UARTS 89 81 int "Maximum number of 8250/16550 serial ports" 90 82 depends on SERIAL_8250 ··· 819 827 tristate "IBM Multiport Serial Adapter" 820 828 depends on PCI && (PPC_ISERIES || PPC_PSERIES) 821 829 select SERIAL_CORE 830 + select FW_LOADER 822 831 help 823 832 This driver is for a family of multiport serial adapters 824 833 including 2 port RVX, 2 port internal modem, 4 port internal
-1
drivers/serial/Makefile
··· 5 5 # 6 6 7 7 serial-8250-y := 8 - serial-8250-$(CONFIG_SERIAL_8250_ACPI) += 8250_acpi.o 9 8 serial-8250-$(CONFIG_PNP) += 8250_pnp.o 10 9 serial-8250-$(CONFIG_GSC) += 8250_gsc.o 11 10 serial-8250-$(CONFIG_PCI) += 8250_pci.o
+49 -61
drivers/serial/amba-pl010.c
··· 62 62 63 63 #define AMBA_ISR_PASS_LIMIT 256 64 64 65 - /* 66 - * Access macros for the AMBA UARTs 67 - */ 68 - #define UART_GET_INT_STATUS(p) readb((p)->membase + UART010_IIR) 69 - #define UART_PUT_ICR(p, c) writel((c), (p)->membase + UART010_ICR) 70 - #define UART_GET_FR(p) readb((p)->membase + UART01x_FR) 71 - #define UART_GET_CHAR(p) readb((p)->membase + UART01x_DR) 72 - #define UART_PUT_CHAR(p, c) writel((c), (p)->membase + UART01x_DR) 73 - #define UART_GET_RSR(p) readb((p)->membase + UART01x_RSR) 74 - #define UART_GET_CR(p) readb((p)->membase + UART010_CR) 75 - #define UART_PUT_CR(p,c) writel((c), (p)->membase + UART010_CR) 76 - #define UART_GET_LCRL(p) readb((p)->membase + UART010_LCRL) 77 - #define UART_PUT_LCRL(p,c) writel((c), (p)->membase + UART010_LCRL) 78 - #define UART_GET_LCRM(p) readb((p)->membase + UART010_LCRM) 79 - #define UART_PUT_LCRM(p,c) writel((c), (p)->membase + UART010_LCRM) 80 - #define UART_GET_LCRH(p) readb((p)->membase + UART010_LCRH) 81 - #define UART_PUT_LCRH(p,c) writel((c), (p)->membase + UART010_LCRH) 82 65 #define UART_RX_DATA(s) (((s) & UART01x_FR_RXFE) == 0) 83 66 #define UART_TX_READY(s) (((s) & UART01x_FR_TXFF) == 0) 84 - #define UART_TX_EMPTY(p) ((UART_GET_FR(p) & UART01x_FR_TMSK) == 0) 85 67 86 68 #define UART_DUMMY_RSR_RX /*256*/0 87 69 #define UART_PORT_SIZE 64 ··· 92 110 { 93 111 unsigned int cr; 94 112 95 - cr = UART_GET_CR(port); 113 + cr = readb(port->membase + UART010_CR); 96 114 cr &= ~UART010_CR_TIE; 97 - UART_PUT_CR(port, cr); 115 + writel(cr, port->membase + UART010_CR); 98 116 } 99 117 100 118 static void pl010_start_tx(struct uart_port *port) 101 119 { 102 120 unsigned int cr; 103 121 104 - cr = UART_GET_CR(port); 122 + cr = readb(port->membase + UART010_CR); 105 123 cr |= UART010_CR_TIE; 106 - UART_PUT_CR(port, cr); 124 + writel(cr, port->membase + UART010_CR); 107 125 } 108 126 109 127 static void pl010_stop_rx(struct uart_port *port) 110 128 { 111 129 unsigned int cr; 112 130 113 - cr = UART_GET_CR(port); 131 + cr = readb(port->membase + UART010_CR); 114 132 cr &= ~(UART010_CR_RIE | UART010_CR_RTIE); 115 - UART_PUT_CR(port, cr); 133 + writel(cr, port->membase + UART010_CR); 116 134 } 117 135 118 136 static void pl010_enable_ms(struct uart_port *port) 119 137 { 120 138 unsigned int cr; 121 139 122 - cr = UART_GET_CR(port); 140 + cr = readb(port->membase + UART010_CR); 123 141 cr |= UART010_CR_MSIE; 124 - UART_PUT_CR(port, cr); 142 + writel(cr, port->membase + UART010_CR); 125 143 } 126 144 127 145 static void ··· 134 152 struct tty_struct *tty = port->info->tty; 135 153 unsigned int status, ch, flag, rsr, max_count = 256; 136 154 137 - status = UART_GET_FR(port); 155 + status = readb(port->membase + UART01x_FR); 138 156 while (UART_RX_DATA(status) && max_count--) { 139 - ch = UART_GET_CHAR(port); 157 + ch = readb(port->membase + UART01x_DR); 140 158 flag = TTY_NORMAL; 141 159 142 160 port->icount.rx++; ··· 145 163 * Note that the error handling code is 146 164 * out of the main execution path 147 165 */ 148 - rsr = UART_GET_RSR(port) | UART_DUMMY_RSR_RX; 166 + rsr = readb(port->membase + UART01x_RSR) | UART_DUMMY_RSR_RX; 149 167 if (unlikely(rsr & UART01x_RSR_ANY)) { 150 168 if (rsr & UART01x_RSR_BE) { 151 169 rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE); ··· 175 193 uart_insert_char(port, rsr, UART01x_RSR_OE, ch, flag); 176 194 177 195 ignore_char: 178 - status = UART_GET_FR(port); 196 + status = readb(port->membase + UART01x_FR); 179 197 } 180 198 tty_flip_buffer_push(tty); 181 199 return; ··· 187 205 int count; 188 206 189 207 if (port->x_char) { 190 - UART_PUT_CHAR(port, port->x_char); 208 + writel(port->x_char, port->membase + UART01x_DR); 191 209 port->icount.tx++; 192 210 port->x_char = 0; 193 211 return; ··· 199 217 200 218 count = port->fifosize >> 1; 201 219 do { 202 - UART_PUT_CHAR(port, xmit->buf[xmit->tail]); 220 + writel(xmit->buf[xmit->tail], port->membase + UART01x_DR); 203 221 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 204 222 port->icount.tx++; 205 223 if (uart_circ_empty(xmit)) ··· 218 236 struct uart_amba_port *uap = (struct uart_amba_port *)port; 219 237 unsigned int status, delta; 220 238 221 - UART_PUT_ICR(&uap->port, 0); 239 + writel(0, uap->port.membase + UART010_ICR); 222 240 223 - status = UART_GET_FR(&uap->port) & UART01x_FR_MODEM_ANY; 241 + status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY; 224 242 225 243 delta = status ^ uap->old_status; 226 244 uap->old_status = status; ··· 248 266 249 267 spin_lock(&port->lock); 250 268 251 - status = UART_GET_INT_STATUS(port); 269 + status = readb(port->membase + UART010_IIR); 252 270 if (status) { 253 271 do { 254 272 if (status & (UART010_IIR_RTIS | UART010_IIR_RIS)) ··· 265 283 if (pass_counter-- == 0) 266 284 break; 267 285 268 - status = UART_GET_INT_STATUS(port); 286 + status = readb(port->membase + UART010_IIR); 269 287 } while (status & (UART010_IIR_RTIS | UART010_IIR_RIS | 270 288 UART010_IIR_TIS)); 271 289 handled = 1; ··· 278 296 279 297 static unsigned int pl010_tx_empty(struct uart_port *port) 280 298 { 281 - return UART_GET_FR(port) & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT; 299 + return readb(port->membase + UART01x_FR) & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT; 282 300 } 283 301 284 302 static unsigned int pl010_get_mctrl(struct uart_port *port) ··· 286 304 unsigned int result = 0; 287 305 unsigned int status; 288 306 289 - status = UART_GET_FR(port); 307 + status = readb(port->membase + UART01x_FR); 290 308 if (status & UART01x_FR_DCD) 291 309 result |= TIOCM_CAR; 292 310 if (status & UART01x_FR_DSR) ··· 322 340 unsigned int lcr_h; 323 341 324 342 spin_lock_irqsave(&port->lock, flags); 325 - lcr_h = UART_GET_LCRH(port); 343 + lcr_h = readb(port->membase + UART010_LCRH); 326 344 if (break_state == -1) 327 345 lcr_h |= UART01x_LCRH_BRK; 328 346 else 329 347 lcr_h &= ~UART01x_LCRH_BRK; 330 - UART_PUT_LCRH(port, lcr_h); 348 + writel(lcr_h, port->membase + UART010_LCRH); 331 349 spin_unlock_irqrestore(&port->lock, flags); 332 350 } 333 351 ··· 346 364 /* 347 365 * initialise the old status of the modem signals 348 366 */ 349 - uap->old_status = UART_GET_FR(port) & UART01x_FR_MODEM_ANY; 367 + uap->old_status = readb(port->membase + UART01x_FR) & UART01x_FR_MODEM_ANY; 350 368 351 369 /* 352 370 * Finally, enable interrupts 353 371 */ 354 - UART_PUT_CR(port, UART01x_CR_UARTEN | UART010_CR_RIE | 355 - UART010_CR_RTIE); 372 + writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE, 373 + port->membase + UART010_CR); 356 374 357 375 return 0; 358 376 } ··· 367 385 /* 368 386 * disable all interrupts, disable the port 369 387 */ 370 - UART_PUT_CR(port, 0); 388 + writel(0, port->membase + UART010_CR); 371 389 372 390 /* disable break condition and fifos */ 373 - UART_PUT_LCRH(port, UART_GET_LCRH(port) & 374 - ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN)); 391 + writel(readb(port->membase + UART010_LCRH) & 392 + ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN), 393 + port->membase + UART010_LCRH); 375 394 } 376 395 377 396 static void ··· 449 466 port->ignore_status_mask |= UART_DUMMY_RSR_RX; 450 467 451 468 /* first, disable everything */ 452 - old_cr = UART_GET_CR(port) & ~UART010_CR_MSIE; 469 + old_cr = readb(port->membase + UART010_CR) & ~UART010_CR_MSIE; 453 470 454 471 if (UART_ENABLE_MS(port, termios->c_cflag)) 455 472 old_cr |= UART010_CR_MSIE; 456 473 457 - UART_PUT_CR(port, 0); 474 + writel(0, port->membase + UART010_CR); 458 475 459 476 /* Set baud rate */ 460 477 quot -= 1; 461 - UART_PUT_LCRM(port, ((quot & 0xf00) >> 8)); 462 - UART_PUT_LCRL(port, (quot & 0xff)); 478 + writel((quot & 0xf00) >> 8, port->membase + UART010_LCRM); 479 + writel(quot & 0xff, port->membase + UART010_LCRL); 463 480 464 481 /* 465 482 * ----------v----------v----------v----------v----- 466 483 * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L 467 484 * ----------^----------^----------^----------^----- 468 485 */ 469 - UART_PUT_LCRH(port, lcr_h); 470 - UART_PUT_CR(port, old_cr); 486 + writel(lcr_h, port->membase + UART010_LCRH); 487 + writel(old_cr, port->membase + UART010_CR); 471 488 472 489 spin_unlock_irqrestore(&port->lock, flags); 473 490 } ··· 576 593 577 594 static void pl010_console_putchar(struct uart_port *port, int ch) 578 595 { 579 - while (!UART_TX_READY(UART_GET_FR(port))) 596 + unsigned int status; 597 + 598 + do { 599 + status = readb(port->membase + UART01x_FR); 580 600 barrier(); 581 - UART_PUT_CHAR(port, ch); 601 + } while (!UART_TX_READY(status)); 602 + writel(ch, port->membase + UART01x_DR); 582 603 } 583 604 584 605 static void ··· 594 607 /* 595 608 * First save the CR then disable the interrupts 596 609 */ 597 - old_cr = UART_GET_CR(port); 598 - UART_PUT_CR(port, UART01x_CR_UARTEN); 610 + old_cr = readb(port->membase + UART010_CR); 611 + writel(UART01x_CR_UARTEN, port->membase + UART010_CR); 599 612 600 613 uart_console_write(port, s, count, pl010_console_putchar); 601 614 ··· 604 617 * and restore the TCR 605 618 */ 606 619 do { 607 - status = UART_GET_FR(port); 620 + status = readb(port->membase + UART01x_FR); 621 + barrier(); 608 622 } while (status & UART01x_FR_BUSY); 609 - UART_PUT_CR(port, old_cr); 623 + writel(old_cr, port->membase + UART010_CR); 610 624 } 611 625 612 626 static void __init 613 627 pl010_console_get_options(struct uart_port *port, int *baud, 614 628 int *parity, int *bits) 615 629 { 616 - if (UART_GET_CR(port) & UART01x_CR_UARTEN) { 630 + if (readb(port->membase + UART010_CR) & UART01x_CR_UARTEN) { 617 631 unsigned int lcr_h, quot; 618 - lcr_h = UART_GET_LCRH(port); 632 + lcr_h = readb(port->membase + UART010_LCRH); 619 633 620 634 *parity = 'n'; 621 635 if (lcr_h & UART01x_LCRH_PEN) { ··· 631 643 else 632 644 *bits = 8; 633 645 634 - quot = UART_GET_LCRL(port) | UART_GET_LCRM(port) << 8; 646 + quot = readb(port->membase + UART010_LCRL) | readb(port->membase + UART010_LCRM) << 8; 635 647 *baud = port->uartclk / (16 * (quot + 1)); 636 648 } 637 649 }
+1
include/linux/serial_8250.h
··· 37 37 PLAT8250_DEV_LEGACY = -1, 38 38 PLAT8250_DEV_PLATFORM, 39 39 PLAT8250_DEV_PLATFORM1, 40 + PLAT8250_DEV_PLATFORM2, 40 41 PLAT8250_DEV_FOURPORT, 41 42 PLAT8250_DEV_ACCENT, 42 43 PLAT8250_DEV_BOCA,