Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ice: Always clear the QRXFLXP_CNTXT register for VF Rx queues

Currently when the PF reduces its number of channels via ethtool and
then VFs are created there may be stale data for some of the Rx queues
belonging to VFs. This happens when a VF reuses an Rx queue that was
previously used by the PF. Specifically, the QRXFLXP_CNTXT register
will have incorrect values. Fix this by always clearing the relevant
values in the QRXFLXP_CNTXT register for VF queues.

Signed-off-by: Brett Creeley <brett.creeley@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>

authored by

Brett Creeley and committed by
Jeff Kirsher
36be2baa a6892c96

+7 -2
+6 -2
drivers/net/ethernet/intel/ice/ice_base.c
··· 386 386 /* Enable Flexible Descriptors in the queue context which 387 387 * allows this driver to select a specific receive descriptor format 388 388 */ 389 + regval = rd32(hw, QRXFLXP_CNTXT(pf_q)); 389 390 if (vsi->type != ICE_VSI_VF) { 390 - regval = rd32(hw, QRXFLXP_CNTXT(pf_q)); 391 391 regval |= (rxdid << QRXFLXP_CNTXT_RXDID_IDX_S) & 392 392 QRXFLXP_CNTXT_RXDID_IDX_M; 393 393 ··· 398 398 regval |= (0x03 << QRXFLXP_CNTXT_RXDID_PRIO_S) & 399 399 QRXFLXP_CNTXT_RXDID_PRIO_M; 400 400 401 - wr32(hw, QRXFLXP_CNTXT(pf_q), regval); 401 + } else { 402 + regval &= ~(QRXFLXP_CNTXT_RXDID_IDX_M | 403 + QRXFLXP_CNTXT_RXDID_PRIO_M | 404 + QRXFLXP_CNTXT_TS_M); 402 405 } 406 + wr32(hw, QRXFLXP_CNTXT(pf_q), regval); 403 407 404 408 /* Absolute queue number out of 2K needs to be passed */ 405 409 err = ice_write_rxq_ctx(hw, &rlan_ctx, pf_q);
+1
drivers/net/ethernet/intel/ice/ice_hw_autogen.h
··· 85 85 #define QRXFLXP_CNTXT_RXDID_IDX_M ICE_M(0x3F, 0) 86 86 #define QRXFLXP_CNTXT_RXDID_PRIO_S 8 87 87 #define QRXFLXP_CNTXT_RXDID_PRIO_M ICE_M(0x7, 8) 88 + #define QRXFLXP_CNTXT_TS_M BIT(11) 88 89 #define GLGEN_RSTAT 0x000B8188 89 90 #define GLGEN_RSTAT_DEVSTATE_M ICE_M(0x3, 0) 90 91 #define GLGEN_RSTCTL 0x000B8180