powerpc/405: move PPC405_ERR77 in asm-405.h

+19

arch/powerpc/include/asm/asm-405.h

··· 1 + #ifndef _ASM_POWERPC_ASM_405_H 2 + #define _ASM_POWERPC_ASM_405_H 3 + 4 + #include <asm/asm-const.h> 5 + 6 + #ifdef __KERNEL__ 7 + #ifdef CONFIG_IBM405_ERR77 8 + /* Erratum #77 on the 405 means we need a sync or dcbt before every 9 + * stwcx. The old ATOMIC_SYNC_FIX covered some but not all of this. 10 + */ 11 + #define PPC405_ERR77(ra,rb) stringify_in_c(dcbt ra, rb;) 12 + #define PPC405_ERR77_SYNC stringify_in_c(sync;) 13 + #else 14 + #define PPC405_ERR77(ra,rb) 15 + #define PPC405_ERR77_SYNC 16 + #endif 17 + #endif 18 + 19 + #endif /* _ASM_POWERPC_ASM_405_H */

-13

arch/powerpc/include/asm/asm-compat.h

··· 70 70 71 71 #endif 72 72 73 - #ifdef __KERNEL__ 74 - #ifdef CONFIG_IBM405_ERR77 75 - /* Erratum #77 on the 405 means we need a sync or dcbt before every 76 - * stwcx. The old ATOMIC_SYNC_FIX covered some but not all of this. 77 - */ 78 - #define PPC405_ERR77(ra,rb) stringify_in_c(dcbt ra, rb;) 79 - #define PPC405_ERR77_SYNC stringify_in_c(sync;) 80 - #else 81 - #define PPC405_ERR77(ra,rb) 82 - #define PPC405_ERR77_SYNC 83 - #endif 84 - #endif 85 - 86 73 #endif /* _ASM_POWERPC_ASM_COMPAT_H */

+1

arch/powerpc/include/asm/atomic.h

··· 10 10 #include <linux/types.h> 11 11 #include <asm/cmpxchg.h> 12 12 #include <asm/barrier.h> 13 + #include <asm/asm-405.h> 13 14 14 15 #define ATOMIC_INIT(i) { (i) } 15 16

+1

arch/powerpc/include/asm/bitops.h

··· 45 45 #include <linux/compiler.h> 46 46 #include <asm/asm-compat.h> 47 47 #include <asm/synch.h> 48 + #include <asm/asm-405.h> 48 49 49 50 /* PPC bit number conversion */ 50 51 #define PPC_BITLSHIFT(be) (BITS_PER_LONG - 1 - (be))

-2

arch/powerpc/include/asm/book3s/32/pgtable.h

··· 164 164 1: lwarx %0,0,%3\n\ 165 165 andc %1,%0,%4\n\ 166 166 or %1,%1,%5\n" 167 - PPC405_ERR77(0,%3) 168 167 " stwcx. %1,0,%3\n\ 169 168 bne- 1b" 170 169 : "=&r" (old), "=&r" (tmp), "=m" (*p) ··· 185 186 lwzx %0,0,%3\n\ 186 187 andc %1,%L0,%5\n\ 187 188 or %1,%1,%6\n" 188 - PPC405_ERR77(0,%3) 189 189 " stwcx. %1,0,%4\n\ 190 190 bne- 1b" 191 191 : "=&r" (old), "=&r" (tmp), "=m" (*p)

+1

arch/powerpc/include/asm/cmpxchg.h

··· 7 7 #include <asm/synch.h> 8 8 #include <asm/asm-compat.h> 9 9 #include <linux/bug.h> 10 + #include <asm/asm-405.h> 10 11 11 12 #ifdef __BIG_ENDIAN 12 13 #define BITOFF_CAL(size, off) ((sizeof(u32) - size - off) * BITS_PER_BYTE)

+1

arch/powerpc/include/asm/futex.h

··· 9 9 #include <asm/errno.h> 10 10 #include <asm/synch.h> 11 11 #include <asm/asm-compat.h> 12 + #include <asm/asm-405.h> 12 13 13 14 #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \ 14 15 __asm__ __volatile ( \

+1

arch/powerpc/include/asm/nohash/32/pgtable.h

··· 9 9 #include <linux/sched.h> 10 10 #include <linux/threads.h> 11 11 #include <asm/io.h> /* For sub-arch specific PPC_PIN_SIZE */ 12 + #include <asm/asm-405.h> 12 13 13 14 extern unsigned long ioremap_bot; 14 15

+1

arch/powerpc/include/asm/spinlock.h

··· 27 27 #include <asm/asm-compat.h> 28 28 #include <asm/synch.h> 29 29 #include <asm/ppc-opcode.h> 30 + #include <asm/asm-405.h> 30 31 31 32 #ifdef CONFIG_PPC64 32 33 /* use 0x800000yy when locked, where yy == CPU number */

+1

arch/powerpc/kernel/entry_32.S

··· 33 33 #include <asm/unistd.h> 34 34 #include <asm/ptrace.h> 35 35 #include <asm/export.h> 36 + #include <asm/asm-405.h> 36 37 37 38 /* 38 39 * MSR_KERNEL is > 0x10000 on 4xx/Book-E since it include MSR_CE.

+1

arch/powerpc/kernel/head_40x.S

··· 42 42 #include <asm/asm-offsets.h> 43 43 #include <asm/ptrace.h> 44 44 #include <asm/export.h> 45 + #include <asm/asm-405.h> 45 46 46 47 /* As with the other PowerPC ports, it is expected that when code 47 48 * execution begins here, the following registers contain valid, yet