Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge remote-tracking branch 'arm-soc/irqchip/gic-vic-move' into kvm-arm/vgic

+338 -607
+1
MAINTAINERS
··· 4209 4209 S: Maintained 4210 4210 T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core 4211 4211 F: kernel/irq/ 4212 + F: drivers/irqchip/ 4212 4213 4213 4214 IRQ DOMAINS (IRQ NUMBER MAPPING LIBRARY) 4214 4215 M: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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arch/arm/common/Kconfig
··· 1 - config ARM_GIC 2 - bool 3 - select IRQ_DOMAIN 4 - select MULTI_IRQ_HANDLER 5 - 6 - config GIC_NON_BANKED 7 - bool 8 - 9 - config ARM_VIC 10 - bool 11 - select IRQ_DOMAIN 12 - select MULTI_IRQ_HANDLER 13 - 14 - config ARM_VIC_NR 15 - int 16 - default 4 if ARCH_S5PV210 17 - default 3 if ARCH_S5PC100 18 - default 2 19 - depends on ARM_VIC 20 - help 21 - The maximum number of VICs available in the system, for 22 - power management. 23 - 24 1 config ICST 25 2 bool 26 3
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arch/arm/common/Makefile
··· 2 2 # Makefile for the linux kernel. 3 3 # 4 4 5 - obj-$(CONFIG_ARM_GIC) += gic.o 6 - obj-$(CONFIG_ARM_VIC) += vic.o 7 5 obj-$(CONFIG_ICST) += icst.o 8 6 obj-$(CONFIG_SA1111) += sa1111.o 9 7 obj-$(CONFIG_PCI_HOST_VIA82C505) += via82c505.o
+36 -23
arch/arm/common/gic.c drivers/irqchip/irq-gic.c
··· 38 38 #include <linux/interrupt.h> 39 39 #include <linux/percpu.h> 40 40 #include <linux/slab.h> 41 + #include <linux/irqchip/arm-gic.h> 41 42 42 43 #include <asm/irq.h> 43 44 #include <asm/exception.h> 44 45 #include <asm/smp_plat.h> 45 46 #include <asm/mach/irq.h> 46 - #include <asm/hardware/gic.h> 47 + 48 + #include "irqchip.h" 47 49 48 50 union gic_base { 49 51 void __iomem *common_base; ··· 278 276 #define gic_set_wake NULL 279 277 #endif 280 278 281 - asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs) 279 + static asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs) 282 280 { 283 281 u32 irqstat, irqnr; 284 282 struct gic_chip_data *gic = &gic_data[0]; ··· 619 617 } 620 618 #endif 621 619 620 + #ifdef CONFIG_SMP 621 + void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) 622 + { 623 + int cpu; 624 + unsigned long map = 0; 625 + 626 + /* Convert our logical CPU mask into a physical one. */ 627 + for_each_cpu(cpu, mask) 628 + map |= 1 << cpu_logical_map(cpu); 629 + 630 + /* 631 + * Ensure that stores to Normal memory are visible to the 632 + * other CPUs before issuing the IPI. 633 + */ 634 + dsb(); 635 + 636 + /* this always happens on GIC0 */ 637 + writel_relaxed(map << 16 | irq, gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT); 638 + } 639 + #endif 640 + 622 641 static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq, 623 642 irq_hw_number_t hw) 624 643 { ··· 766 743 if (WARN_ON(!gic->domain)) 767 744 return; 768 745 746 + #ifdef CONFIG_SMP 747 + set_smp_cross_call(gic_raise_softirq); 748 + #endif 749 + 750 + set_handle_irq(gic_handle_irq); 751 + 769 752 gic_chip.flags |= gic_arch_extn.flags; 770 753 gic_dist_init(gic); 771 754 gic_cpu_init(gic); ··· 784 755 785 756 gic_cpu_init(&gic_data[gic_nr]); 786 757 } 787 - 788 - #ifdef CONFIG_SMP 789 - void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) 790 - { 791 - int cpu; 792 - unsigned long map = 0; 793 - 794 - /* Convert our logical CPU mask into a physical one. */ 795 - for_each_cpu(cpu, mask) 796 - map |= gic_cpu_map[cpu]; 797 - 798 - /* 799 - * Ensure that stores to Normal memory are visible to the 800 - * other CPUs before issuing the IPI. 801 - */ 802 - dsb(); 803 - 804 - /* this always happens on GIC0 */ 805 - writel_relaxed(map << 16 | irq, gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT); 806 - } 807 - #endif 808 758 809 759 #ifdef CONFIG_OF 810 760 static int gic_cnt __initdata = 0; ··· 816 808 gic_cnt++; 817 809 return 0; 818 810 } 811 + IRQCHIP_DECLARE(cortex_a15_gic, "arm,cortex-a15-gic", gic_of_init); 812 + IRQCHIP_DECLARE(cortex_a9_gic, "arm,cortex-a9-gic", gic_of_init); 813 + IRQCHIP_DECLARE(msm_8660_qgic, "qcom,msm-8660-qgic", gic_of_init); 814 + IRQCHIP_DECLARE(msm_qgic2, "qcom,msm-qgic2", gic_of_init); 815 + 819 816 #endif
+60 -35
arch/arm/common/vic.c drivers/irqchip/irq-vic.c
··· 30 30 #include <linux/syscore_ops.h> 31 31 #include <linux/device.h> 32 32 #include <linux/amba/bus.h> 33 + #include <linux/irqchip/arm-vic.h> 33 34 34 35 #include <asm/exception.h> 35 36 #include <asm/mach/irq.h> 36 - #include <asm/hardware/vic.h> 37 + 38 + #include "irqchip.h" 39 + 40 + #define VIC_IRQ_STATUS 0x00 41 + #define VIC_FIQ_STATUS 0x04 42 + #define VIC_INT_SELECT 0x0c /* 1 = FIQ, 0 = IRQ */ 43 + #define VIC_INT_SOFT 0x18 44 + #define VIC_INT_SOFT_CLEAR 0x1c 45 + #define VIC_PROTECT 0x20 46 + #define VIC_PL190_VECT_ADDR 0x30 /* PL190 only */ 47 + #define VIC_PL190_DEF_VECT_ADDR 0x34 /* PL190 only */ 48 + 49 + #define VIC_VECT_ADDR0 0x100 /* 0 to 15 (0..31 PL192) */ 50 + #define VIC_VECT_CNTL0 0x200 /* 0 to 15 (0..31 PL192) */ 51 + #define VIC_ITCR 0x300 /* VIC test control register */ 52 + 53 + #define VIC_VECT_CNTL_ENABLE (1 << 5) 54 + 55 + #define VIC_PL192_VECT_ADDR 0xF00 37 56 38 57 /** 39 58 * struct vic_device - VIC PM device ··· 84 65 static struct vic_device vic_devices[CONFIG_ARM_VIC_NR]; 85 66 86 67 static int vic_id; 68 + 69 + static void vic_handle_irq(struct pt_regs *regs); 87 70 88 71 /** 89 72 * vic_init2 - common initialisation code ··· 203 182 return 0; 204 183 } 205 184 185 + /* 186 + * Handle each interrupt in a single VIC. Returns non-zero if we've 187 + * handled at least one interrupt. This reads the status register 188 + * before handling each interrupt, which is necessary given that 189 + * handle_IRQ may briefly re-enable interrupts for soft IRQ handling. 190 + */ 191 + static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs) 192 + { 193 + u32 stat, irq; 194 + int handled = 0; 195 + 196 + while ((stat = readl_relaxed(vic->base + VIC_IRQ_STATUS))) { 197 + irq = ffs(stat) - 1; 198 + handle_IRQ(irq_find_mapping(vic->domain, irq), regs); 199 + handled = 1; 200 + } 201 + 202 + return handled; 203 + } 204 + 205 + /* 206 + * Keep iterating over all registered VIC's until there are no pending 207 + * interrupts. 208 + */ 209 + static asmlinkage void __exception_irq_entry vic_handle_irq(struct pt_regs *regs) 210 + { 211 + int i, handled; 212 + 213 + do { 214 + for (i = 0, handled = 0; i < vic_id; ++i) 215 + handled |= handle_one_vic(&vic_devices[i], regs); 216 + } while (handled); 217 + } 218 + 206 219 static struct irq_domain_ops vic_irqdomain_ops = { 207 220 .map = vic_irqdomain_map, 208 221 .xlate = irq_domain_xlate_onetwocell, ··· 273 218 v->valid_sources = valid_sources; 274 219 v->resume_sources = resume_sources; 275 220 v->irq = irq; 221 + set_handle_irq(vic_handle_irq); 276 222 vic_id++; 277 223 v->domain = irq_domain_add_simple(node, fls(valid_sources), irq, 278 224 &vic_irqdomain_ops, v); ··· 483 427 484 428 return 0; 485 429 } 430 + IRQCHIP_DECLARE(arm_pl190_vic, "arm,pl190-vic", vic_of_init); 431 + IRQCHIP_DECLARE(arm_pl192_vic, "arm,pl192-vic", vic_of_init); 432 + IRQCHIP_DECLARE(arm_versatile_vic, "arm,versatile-vic", vic_of_init); 486 433 #endif /* CONFIG OF */ 487 - 488 - /* 489 - * Handle each interrupt in a single VIC. Returns non-zero if we've 490 - * handled at least one interrupt. This reads the status register 491 - * before handling each interrupt, which is necessary given that 492 - * handle_IRQ may briefly re-enable interrupts for soft IRQ handling. 493 - */ 494 - static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs) 495 - { 496 - u32 stat, irq; 497 - int handled = 0; 498 - 499 - while ((stat = readl_relaxed(vic->base + VIC_IRQ_STATUS))) { 500 - irq = ffs(stat) - 1; 501 - handle_IRQ(irq_find_mapping(vic->domain, irq), regs); 502 - handled = 1; 503 - } 504 - 505 - return handled; 506 - } 507 - 508 - /* 509 - * Keep iterating over all registered VIC's until there are no pending 510 - * interrupts. 511 - */ 512 - asmlinkage void __exception_irq_entry vic_handle_irq(struct pt_regs *regs) 513 - { 514 - int i, handled; 515 - 516 - do { 517 - for (i = 0, handled = 0; i < vic_id; ++i) 518 - handled |= handle_one_vic(&vic_devices[i], regs); 519 - } while (handled); 520 - }
+3 -12
arch/arm/include/asm/hardware/gic.h include/linux/irqchip/arm-gic.h
··· 1 1 /* 2 - * arch/arm/include/asm/hardware/gic.h 2 + * include/linux/irqchip/arm-gic.h 3 3 * 4 4 * Copyright (C) 2002 ARM Limited, All Rights Reserved. 5 5 * ··· 7 7 * it under the terms of the GNU General Public License version 2 as 8 8 * published by the Free Software Foundation. 9 9 */ 10 - #ifndef __ASM_ARM_HARDWARE_GIC_H 11 - #define __ASM_ARM_HARDWARE_GIC_H 12 - 13 - #include <linux/compiler.h> 10 + #ifndef __LINUX_IRQCHIP_ARM_GIC_H 11 + #define __LINUX_IRQCHIP_ARM_GIC_H 14 12 15 13 #define GIC_CPU_CTRL 0x00 16 14 #define GIC_CPU_PRIMASK 0x04 ··· 30 32 #define GIC_DIST_CONFIG 0xc00 31 33 #define GIC_DIST_SOFTINT 0xf00 32 34 33 - #ifndef __ASSEMBLY__ 34 - #include <linux/irqdomain.h> 35 35 struct device_node; 36 36 37 37 extern struct irq_chip gic_arch_extn; 38 38 39 39 void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *, 40 40 u32 offset, struct device_node *); 41 - int gic_of_init(struct device_node *node, struct device_node *parent); 42 41 void gic_secondary_init(unsigned int); 43 - void gic_handle_irq(struct pt_regs *regs); 44 42 void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); 45 - void gic_raise_softirq(const struct cpumask *mask, unsigned int irq); 46 43 47 44 static inline void gic_init(unsigned int nr, int start, 48 45 void __iomem *dist , void __iomem *cpu) 49 46 { 50 47 gic_init_bases(nr, start, dist, cpu, 0, NULL); 51 48 } 52 - 53 - #endif 54 49 55 50 #endif
+2 -23
arch/arm/include/asm/hardware/vic.h include/linux/irqchip/arm-vic.h
··· 20 20 #ifndef __ASM_ARM_HARDWARE_VIC_H 21 21 #define __ASM_ARM_HARDWARE_VIC_H 22 22 23 - #define VIC_IRQ_STATUS 0x00 24 - #define VIC_FIQ_STATUS 0x04 23 + #include <linux/types.h> 24 + 25 25 #define VIC_RAW_STATUS 0x08 26 - #define VIC_INT_SELECT 0x0c /* 1 = FIQ, 0 = IRQ */ 27 26 #define VIC_INT_ENABLE 0x10 /* 1 = enable, 0 = disable */ 28 27 #define VIC_INT_ENABLE_CLEAR 0x14 29 - #define VIC_INT_SOFT 0x18 30 - #define VIC_INT_SOFT_CLEAR 0x1c 31 - #define VIC_PROTECT 0x20 32 - #define VIC_PL190_VECT_ADDR 0x30 /* PL190 only */ 33 - #define VIC_PL190_DEF_VECT_ADDR 0x34 /* PL190 only */ 34 - 35 - #define VIC_VECT_ADDR0 0x100 /* 0 to 15 (0..31 PL192) */ 36 - #define VIC_VECT_CNTL0 0x200 /* 0 to 15 (0..31 PL192) */ 37 - #define VIC_ITCR 0x300 /* VIC test control register */ 38 - 39 - #define VIC_VECT_CNTL_ENABLE (1 << 5) 40 - 41 - #define VIC_PL192_VECT_ADDR 0xF00 42 - 43 - #ifndef __ASSEMBLY__ 44 - #include <linux/compiler.h> 45 - #include <linux/types.h> 46 28 47 29 struct device_node; 48 30 struct pt_regs; ··· 32 50 void __vic_init(void __iomem *base, int irq_start, u32 vic_sources, 33 51 u32 resume_sources, struct device_node *node); 34 52 void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources); 35 - int vic_of_init(struct device_node *node, struct device_node *parent); 36 - void vic_handle_irq(struct pt_regs *regs); 37 53 38 - #endif /* __ASSEMBLY__ */ 39 54 #endif
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arch/arm/include/asm/mach/irq.h
··· 22 22 23 23 #ifdef CONFIG_MULTI_IRQ_HANDLER 24 24 extern void (*handle_arch_irq)(struct pt_regs *); 25 + extern void set_handle_irq(void (*handle_irq)(struct pt_regs *)); 25 26 #endif 26 27 27 28 /*
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arch/arm/kernel/irq.c
··· 117 117 machine_desc->init_irq(); 118 118 } 119 119 120 + #ifdef CONFIG_MULTI_IRQ_HANDLER 121 + void __init set_handle_irq(void (*handle_irq)(struct pt_regs *)) 122 + { 123 + if (handle_arch_irq) 124 + return; 125 + 126 + handle_arch_irq = handle_irq; 127 + } 128 + #endif 129 + 120 130 #ifdef CONFIG_SPARSE_IRQ 121 131 int __init arch_probe_nr_irqs(void) 122 132 {
+2 -1
arch/arm/kernel/smp.c
··· 416 416 417 417 void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int)) 418 418 { 419 - smp_cross_call = fn; 419 + if (!smp_cross_call) 420 + smp_cross_call = fn; 420 421 } 421 422 422 423 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
-1
arch/arm/kernel/smp_twd.c
··· 24 24 25 25 #include <asm/smp_twd.h> 26 26 #include <asm/localtimer.h> 27 - #include <asm/hardware/gic.h> 28 27 29 28 /* set up by the platform code */ 30 29 static void __iomem *twd_base;
+2 -15
arch/arm/mach-bcm/board_bcm.c
··· 11 11 * GNU General Public License for more details. 12 12 */ 13 13 14 - #include <linux/of_irq.h> 15 14 #include <linux/of_platform.h> 16 15 #include <linux/init.h> 17 16 #include <linux/device.h> 18 17 #include <linux/platform_device.h> 18 + #include <linux/irqchip.h> 19 19 20 20 #include <asm/mach/arch.h> 21 - #include <asm/hardware/gic.h> 22 - 23 21 #include <asm/mach/time.h> 24 - 25 - static const struct of_device_id irq_match[] = { 26 - {.compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, 27 - {} 28 - }; 29 22 30 23 static void timer_init(void) 31 24 { ··· 27 34 static struct sys_timer timer = { 28 35 .init = timer_init, 29 36 }; 30 - 31 - static void __init init_irq(void) 32 - { 33 - of_irq_init(irq_match); 34 - } 35 37 36 38 static void __init board_init(void) 37 39 { ··· 37 49 static const char * const bcm11351_dt_compat[] = { "bcm,bcm11351", NULL, }; 38 50 39 51 DT_MACHINE_START(BCM11351_DT, "Broadcom Application Processor") 40 - .init_irq = init_irq, 52 + .init_irq = irqchip_init, 41 53 .timer = &timer, 42 54 .init_machine = board_init, 43 55 .dt_compat = bcm11351_dt_compat, 44 - .handle_irq = gic_handle_irq, 45 56 MACHINE_END
-2
arch/arm/mach-cns3xxx/cns3420vb.c
··· 28 28 #include <linux/usb/ohci_pdriver.h> 29 29 #include <asm/setup.h> 30 30 #include <asm/mach-types.h> 31 - #include <asm/hardware/gic.h> 32 31 #include <asm/mach/arch.h> 33 32 #include <asm/mach/map.h> 34 33 #include <asm/mach/time.h> ··· 250 251 .map_io = cns3420_map_io, 251 252 .init_irq = cns3xxx_init_irq, 252 253 .timer = &cns3xxx_timer, 253 - .handle_irq = gic_handle_irq, 254 254 .init_machine = cns3420_init, 255 255 .restart = cns3xxx_restart, 256 256 MACHINE_END
+1 -1
arch/arm/mach-cns3xxx/core.c
··· 12 12 #include <linux/interrupt.h> 13 13 #include <linux/clockchips.h> 14 14 #include <linux/io.h> 15 + #include <linux/irqchip/arm-gic.h> 15 16 #include <asm/mach/map.h> 16 17 #include <asm/mach/time.h> 17 18 #include <asm/mach/irq.h> 18 - #include <asm/hardware/gic.h> 19 19 #include <asm/hardware/cache-l2x0.h> 20 20 #include <mach/cns3xxx.h> 21 21 #include "core.h"
-2
arch/arm/mach-ep93xx/adssphere.c
··· 17 17 18 18 #include <mach/hardware.h> 19 19 20 - #include <asm/hardware/vic.h> 21 20 #include <asm/mach-types.h> 22 21 #include <asm/mach/arch.h> 23 22 ··· 38 39 .atag_offset = 0x100, 39 40 .map_io = ep93xx_map_io, 40 41 .init_irq = ep93xx_init_irq, 41 - .handle_irq = vic_handle_irq, 42 42 .timer = &ep93xx_timer, 43 43 .init_machine = adssphere_init_machine, 44 44 .init_late = ep93xx_init_late,
+1 -2
arch/arm/mach-ep93xx/core.c
··· 34 34 #include <linux/i2c-gpio.h> 35 35 #include <linux/spi/spi.h> 36 36 #include <linux/export.h> 37 + #include <linux/irqchip/arm-vic.h> 37 38 38 39 #include <mach/hardware.h> 39 40 #include <linux/platform_data/video-ep93xx.h> ··· 44 43 45 44 #include <asm/mach/map.h> 46 45 #include <asm/mach/time.h> 47 - 48 - #include <asm/hardware/vic.h> 49 46 50 47 #include "soc.h" 51 48
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arch/arm/mach-ep93xx/edb93xx.c
··· 39 39 #include <linux/platform_data/spi-ep93xx.h> 40 40 #include <mach/gpio-ep93xx.h> 41 41 42 - #include <asm/hardware/vic.h> 43 42 #include <asm/mach-types.h> 44 43 #include <asm/mach/arch.h> 45 44 ··· 275 276 .atag_offset = 0x100, 276 277 .map_io = ep93xx_map_io, 277 278 .init_irq = ep93xx_init_irq, 278 - .handle_irq = vic_handle_irq, 279 279 .timer = &ep93xx_timer, 280 280 .init_machine = edb93xx_init_machine, 281 281 .init_late = ep93xx_init_late, ··· 288 290 .atag_offset = 0x100, 289 291 .map_io = ep93xx_map_io, 290 292 .init_irq = ep93xx_init_irq, 291 - .handle_irq = vic_handle_irq, 292 293 .timer = &ep93xx_timer, 293 294 .init_machine = edb93xx_init_machine, 294 295 .init_late = ep93xx_init_late, ··· 301 304 .atag_offset = 0x100, 302 305 .map_io = ep93xx_map_io, 303 306 .init_irq = ep93xx_init_irq, 304 - .handle_irq = vic_handle_irq, 305 307 .timer = &ep93xx_timer, 306 308 .init_machine = edb93xx_init_machine, 307 309 .init_late = ep93xx_init_late, ··· 314 318 .atag_offset = 0x100, 315 319 .map_io = ep93xx_map_io, 316 320 .init_irq = ep93xx_init_irq, 317 - .handle_irq = vic_handle_irq, 318 321 .timer = &ep93xx_timer, 319 322 .init_machine = edb93xx_init_machine, 320 323 .init_late = ep93xx_init_late, ··· 327 332 .atag_offset = 0x100, 328 333 .map_io = ep93xx_map_io, 329 334 .init_irq = ep93xx_init_irq, 330 - .handle_irq = vic_handle_irq, 331 335 .timer = &ep93xx_timer, 332 336 .init_machine = edb93xx_init_machine, 333 337 .init_late = ep93xx_init_late, ··· 340 346 .atag_offset = 0x100, 341 347 .map_io = ep93xx_map_io, 342 348 .init_irq = ep93xx_init_irq, 343 - .handle_irq = vic_handle_irq, 344 349 .timer = &ep93xx_timer, 345 350 .init_machine = edb93xx_init_machine, 346 351 .init_late = ep93xx_init_late, ··· 353 360 .atag_offset = 0x100, 354 361 .map_io = ep93xx_map_io, 355 362 .init_irq = ep93xx_init_irq, 356 - .handle_irq = vic_handle_irq, 357 363 .timer = &ep93xx_timer, 358 364 .init_machine = edb93xx_init_machine, 359 365 .init_late = ep93xx_init_late, ··· 366 374 .atag_offset = 0x100, 367 375 .map_io = ep93xx_map_io, 368 376 .init_irq = ep93xx_init_irq, 369 - .handle_irq = vic_handle_irq, 370 377 .timer = &ep93xx_timer, 371 378 .init_machine = edb93xx_init_machine, 372 379 .init_late = ep93xx_init_late,
-2
arch/arm/mach-ep93xx/gesbc9312.c
··· 17 17 18 18 #include <mach/hardware.h> 19 19 20 - #include <asm/hardware/vic.h> 21 20 #include <asm/mach-types.h> 22 21 #include <asm/mach/arch.h> 23 22 ··· 38 39 .atag_offset = 0x100, 39 40 .map_io = ep93xx_map_io, 40 41 .init_irq = ep93xx_init_irq, 41 - .handle_irq = vic_handle_irq, 42 42 .timer = &ep93xx_timer, 43 43 .init_machine = gesbc9312_init_machine, 44 44 .init_late = ep93xx_init_late,
-5
arch/arm/mach-ep93xx/micro9.c
··· 18 18 19 19 #include <mach/hardware.h> 20 20 21 - #include <asm/hardware/vic.h> 22 21 #include <asm/mach-types.h> 23 22 #include <asm/mach/arch.h> 24 23 ··· 81 82 .atag_offset = 0x100, 82 83 .map_io = ep93xx_map_io, 83 84 .init_irq = ep93xx_init_irq, 84 - .handle_irq = vic_handle_irq, 85 85 .timer = &ep93xx_timer, 86 86 .init_machine = micro9_init_machine, 87 87 .init_late = ep93xx_init_late, ··· 94 96 .atag_offset = 0x100, 95 97 .map_io = ep93xx_map_io, 96 98 .init_irq = ep93xx_init_irq, 97 - .handle_irq = vic_handle_irq, 98 99 .timer = &ep93xx_timer, 99 100 .init_machine = micro9_init_machine, 100 101 .init_late = ep93xx_init_late, ··· 107 110 .atag_offset = 0x100, 108 111 .map_io = ep93xx_map_io, 109 112 .init_irq = ep93xx_init_irq, 110 - .handle_irq = vic_handle_irq, 111 113 .timer = &ep93xx_timer, 112 114 .init_machine = micro9_init_machine, 113 115 .init_late = ep93xx_init_late, ··· 120 124 .atag_offset = 0x100, 121 125 .map_io = ep93xx_map_io, 122 126 .init_irq = ep93xx_init_irq, 123 - .handle_irq = vic_handle_irq, 124 127 .timer = &ep93xx_timer, 125 128 .init_machine = micro9_init_machine, 126 129 .init_late = ep93xx_init_late,
-2
arch/arm/mach-ep93xx/simone.c
··· 25 25 #include <linux/platform_data/video-ep93xx.h> 26 26 #include <mach/gpio-ep93xx.h> 27 27 28 - #include <asm/hardware/vic.h> 29 28 #include <asm/mach-types.h> 30 29 #include <asm/mach/arch.h> 31 30 ··· 82 83 .atag_offset = 0x100, 83 84 .map_io = ep93xx_map_io, 84 85 .init_irq = ep93xx_init_irq, 85 - .handle_irq = vic_handle_irq, 86 86 .timer = &ep93xx_timer, 87 87 .init_machine = simone_init_machine, 88 88 .init_late = ep93xx_init_late,
-2
arch/arm/mach-ep93xx/snappercl15.c
··· 31 31 #include <linux/platform_data/video-ep93xx.h> 32 32 #include <mach/gpio-ep93xx.h> 33 33 34 - #include <asm/hardware/vic.h> 35 34 #include <asm/mach-types.h> 36 35 #include <asm/mach/arch.h> 37 36 ··· 175 176 .atag_offset = 0x100, 176 177 .map_io = ep93xx_map_io, 177 178 .init_irq = ep93xx_init_irq, 178 - .handle_irq = vic_handle_irq, 179 179 .timer = &ep93xx_timer, 180 180 .init_machine = snappercl15_init_machine, 181 181 .init_late = ep93xx_init_late,
-2
arch/arm/mach-ep93xx/ts72xx.c
··· 22 22 23 23 #include <mach/hardware.h> 24 24 25 - #include <asm/hardware/vic.h> 26 25 #include <asm/mach-types.h> 27 26 #include <asm/mach/map.h> 28 27 #include <asm/mach/arch.h> ··· 245 246 .atag_offset = 0x100, 246 247 .map_io = ts72xx_map_io, 247 248 .init_irq = ep93xx_init_irq, 248 - .handle_irq = vic_handle_irq, 249 249 .timer = &ep93xx_timer, 250 250 .init_machine = ts72xx_init_machine, 251 251 .init_late = ep93xx_init_late,
-2
arch/arm/mach-ep93xx/vision_ep9307.c
··· 34 34 #include <linux/platform_data/spi-ep93xx.h> 35 35 #include <mach/gpio-ep93xx.h> 36 36 37 - #include <asm/hardware/vic.h> 38 37 #include <asm/mach-types.h> 39 38 #include <asm/mach/map.h> 40 39 #include <asm/mach/arch.h> ··· 363 364 .atag_offset = 0x100, 364 365 .map_io = vision_map_io, 365 366 .init_irq = ep93xx_init_irq, 366 - .handle_irq = vic_handle_irq, 367 367 .timer = &ep93xx_timer, 368 368 .init_machine = vision_init_machine, 369 369 .init_late = ep93xx_init_late,
+6 -4
arch/arm/mach-exynos/common.c
··· 22 22 #include <linux/of_irq.h> 23 23 #include <linux/export.h> 24 24 #include <linux/irqdomain.h> 25 + #include <linux/irqchip.h> 25 26 #include <linux/of_address.h> 27 + #include <linux/irqchip/arm-gic.h> 26 28 27 29 #include <asm/proc-fns.h> 28 30 #include <asm/exception.h> 29 31 #include <asm/hardware/cache-l2x0.h> 30 - #include <asm/hardware/gic.h> 31 32 #include <asm/mach/map.h> 32 33 #include <asm/mach/irq.h> 33 34 #include <asm/cacheflush.h> ··· 645 644 } 646 645 647 646 static const struct of_device_id exynos_dt_irq_match[] = { 648 - { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, 649 - { .compatible = "arm,cortex-a15-gic", .data = gic_of_init, }, 650 647 { .compatible = "samsung,exynos4210-combiner", 651 648 .data = combiner_of_init, }, 652 649 {}, ··· 660 661 if (!of_have_populated_dt()) 661 662 gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset, NULL); 662 663 #ifdef CONFIG_OF 663 - else 664 + else { 665 + irqchip_init(); 664 666 of_irq_init(exynos_dt_irq_match); 667 + } 665 668 #endif 666 669 667 670 if (!of_have_populated_dt()) ··· 680 679 void __init exynos5_init_irq(void) 681 680 { 682 681 #ifdef CONFIG_OF 682 + irqchip_init(); 683 683 of_irq_init(exynos_dt_irq_match); 684 684 #endif 685 685 /*
+1 -1
arch/arm/mach-exynos/include/mach/regs-irq.h
··· 13 13 #ifndef __ASM_ARCH_REGS_IRQ_H 14 14 #define __ASM_ARCH_REGS_IRQ_H __FILE__ 15 15 16 - #include <asm/hardware/gic.h> 16 + #include <linux/irqchip/arm-gic.h> 17 17 #include <mach/map.h> 18 18 19 19 #endif /* __ASM_ARCH_REGS_IRQ_H */
-2
arch/arm/mach-exynos/mach-armlex4210.c
··· 16 16 #include <linux/smsc911x.h> 17 17 18 18 #include <asm/mach/arch.h> 19 - #include <asm/hardware/gic.h> 20 19 #include <asm/mach-types.h> 21 20 22 21 #include <plat/cpu.h> ··· 200 201 .smp = smp_ops(exynos_smp_ops), 201 202 .init_irq = exynos4_init_irq, 202 203 .map_io = armlex4210_map_io, 203 - .handle_irq = gic_handle_irq, 204 204 .init_machine = armlex4210_machine_init, 205 205 .init_late = exynos_init_late, 206 206 .timer = &exynos4_timer,
-2
arch/arm/mach-exynos/mach-exynos4-dt.c
··· 15 15 #include <linux/serial_core.h> 16 16 17 17 #include <asm/mach/arch.h> 18 - #include <asm/hardware/gic.h> 19 18 #include <mach/map.h> 20 19 21 20 #include <plat/cpu.h> ··· 106 107 .smp = smp_ops(exynos_smp_ops), 107 108 .init_irq = exynos4_init_irq, 108 109 .map_io = exynos4_dt_map_io, 109 - .handle_irq = gic_handle_irq, 110 110 .init_machine = exynos4_dt_machine_init, 111 111 .init_late = exynos_init_late, 112 112 .timer = &exynos4_timer,
-2
arch/arm/mach-exynos/mach-exynos5-dt.c
··· 16 16 #include <linux/io.h> 17 17 18 18 #include <asm/mach/arch.h> 19 - #include <asm/hardware/gic.h> 20 19 #include <mach/map.h> 21 20 #include <mach/regs-pmu.h> 22 21 ··· 178 179 .init_irq = exynos5_init_irq, 179 180 .smp = smp_ops(exynos_smp_ops), 180 181 .map_io = exynos5_dt_map_io, 181 - .handle_irq = gic_handle_irq, 182 182 .init_machine = exynos5_dt_machine_init, 183 183 .init_late = exynos_init_late, 184 184 .timer = &exynos4_timer,
-2
arch/arm/mach-exynos/mach-nuri.c
··· 39 39 #include <media/v4l2-mediabus.h> 40 40 41 41 #include <asm/mach/arch.h> 42 - #include <asm/hardware/gic.h> 43 42 #include <asm/mach-types.h> 44 43 45 44 #include <plat/adc.h> ··· 1378 1379 .smp = smp_ops(exynos_smp_ops), 1379 1380 .init_irq = exynos4_init_irq, 1380 1381 .map_io = nuri_map_io, 1381 - .handle_irq = gic_handle_irq, 1382 1382 .init_machine = nuri_machine_init, 1383 1383 .init_late = exynos_init_late, 1384 1384 .timer = &exynos4_timer,
-2
arch/arm/mach-exynos/mach-origen.c
··· 29 29 #include <linux/platform_data/usb-exynos.h> 30 30 31 31 #include <asm/mach/arch.h> 32 - #include <asm/hardware/gic.h> 33 32 #include <asm/mach-types.h> 34 33 35 34 #include <video/platform_lcd.h> ··· 813 814 .smp = smp_ops(exynos_smp_ops), 814 815 .init_irq = exynos4_init_irq, 815 816 .map_io = origen_map_io, 816 - .handle_irq = gic_handle_irq, 817 817 .init_machine = origen_machine_init, 818 818 .init_late = exynos_init_late, 819 819 .timer = &exynos4_timer,
-3
arch/arm/mach-exynos/mach-smdk4x12.c
··· 25 25 #include <linux/platform_data/s3c-hsotg.h> 26 26 27 27 #include <asm/mach/arch.h> 28 - #include <asm/hardware/gic.h> 29 28 #include <asm/mach-types.h> 30 29 31 30 #include <video/samsung_fimd.h> ··· 375 376 .smp = smp_ops(exynos_smp_ops), 376 377 .init_irq = exynos4_init_irq, 377 378 .map_io = smdk4x12_map_io, 378 - .handle_irq = gic_handle_irq, 379 379 .init_machine = smdk4x12_machine_init, 380 380 .timer = &exynos4_timer, 381 381 .restart = exynos4_restart, ··· 388 390 .smp = smp_ops(exynos_smp_ops), 389 391 .init_irq = exynos4_init_irq, 390 392 .map_io = smdk4x12_map_io, 391 - .handle_irq = gic_handle_irq, 392 393 .init_machine = smdk4x12_machine_init, 393 394 .init_late = exynos_init_late, 394 395 .timer = &exynos4_timer,
-3
arch/arm/mach-exynos/mach-smdkv310.c
··· 26 26 #include <linux/platform_data/usb-exynos.h> 27 27 28 28 #include <asm/mach/arch.h> 29 - #include <asm/hardware/gic.h> 30 29 #include <asm/mach-types.h> 31 30 32 31 #include <video/platform_lcd.h> ··· 422 423 .smp = smp_ops(exynos_smp_ops), 423 424 .init_irq = exynos4_init_irq, 424 425 .map_io = smdkv310_map_io, 425 - .handle_irq = gic_handle_irq, 426 426 .init_machine = smdkv310_machine_init, 427 427 .timer = &exynos4_timer, 428 428 .reserve = &smdkv310_reserve, ··· 434 436 .smp = smp_ops(exynos_smp_ops), 435 437 .init_irq = exynos4_init_irq, 436 438 .map_io = smdkv310_map_io, 437 - .handle_irq = gic_handle_irq, 438 439 .init_machine = smdkv310_machine_init, 439 440 .init_late = exynos_init_late, 440 441 .timer = &exynos4_timer,
-2
arch/arm/mach-exynos/mach-universal_c210.c
··· 29 29 #include <drm/exynos_drm.h> 30 30 31 31 #include <asm/mach/arch.h> 32 - #include <asm/hardware/gic.h> 33 32 #include <asm/mach-types.h> 34 33 35 34 #include <video/samsung_fimd.h> ··· 1150 1151 .smp = smp_ops(exynos_smp_ops), 1151 1152 .init_irq = exynos4_init_irq, 1152 1153 .map_io = universal_map_io, 1153 - .handle_irq = gic_handle_irq, 1154 1154 .init_machine = universal_machine_init, 1155 1155 .init_late = exynos_init_late, 1156 1156 .timer = &s5p_timer,
-1
arch/arm/mach-exynos/mct.c
··· 22 22 #include <linux/of.h> 23 23 24 24 #include <asm/arch_timer.h> 25 - #include <asm/hardware/gic.h> 26 25 #include <asm/localtimer.h> 27 26 28 27 #include <plat/cpu.h>
+2 -4
arch/arm/mach-exynos/platsmp.c
··· 20 20 #include <linux/jiffies.h> 21 21 #include <linux/smp.h> 22 22 #include <linux/io.h> 23 + #include <linux/irqchip/arm-gic.h> 23 24 24 25 #include <asm/cacheflush.h> 25 - #include <asm/hardware/gic.h> 26 26 #include <asm/smp_plat.h> 27 27 #include <asm/smp_scu.h> 28 28 ··· 149 149 150 150 __raw_writel(virt_to_phys(exynos4_secondary_startup), 151 151 cpu_boot_reg(phys_cpu)); 152 - gic_raise_softirq(cpumask_of(cpu), 0); 152 + arch_send_wakeup_ipi_mask(cpumask_of(cpu)); 153 153 154 154 if (pen_release == -1) 155 155 break; ··· 190 190 191 191 for (i = 0; i < ncores; i++) 192 192 set_cpu_possible(i, true); 193 - 194 - set_smp_cross_call(gic_raise_softirq); 195 193 } 196 194 197 195 static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
+2 -9
arch/arm/mach-highbank/highbank.c
··· 18 18 #include <linux/dma-mapping.h> 19 19 #include <linux/io.h> 20 20 #include <linux/irq.h> 21 + #include <linux/irqchip.h> 21 22 #include <linux/irqdomain.h> 22 23 #include <linux/of.h> 23 24 #include <linux/of_irq.h> ··· 33 32 #include <asm/smp_twd.h> 34 33 #include <asm/hardware/arm_timer.h> 35 34 #include <asm/hardware/timer-sp.h> 36 - #include <asm/hardware/gic.h> 37 35 #include <asm/hardware/cache-l2x0.h> 38 36 #include <asm/mach/arch.h> 39 37 #include <asm/mach/map.h> ··· 66 66 HB_JUMP_TABLE_PHYS(cpu) + 15); 67 67 } 68 68 69 - const static struct of_device_id irq_match[] = { 70 - { .compatible = "arm,cortex-a15-gic", .data = gic_of_init, }, 71 - { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, 72 - {} 73 - }; 74 - 75 69 #ifdef CONFIG_CACHE_L2X0 76 70 static void highbank_l2x0_disable(void) 77 71 { ··· 76 82 77 83 static void __init highbank_init_irq(void) 78 84 { 79 - of_irq_init(irq_match); 85 + irqchip_init(); 80 86 81 87 if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9")) 82 88 highbank_scu_map_io(); ··· 204 210 .map_io = debug_ll_io_init, 205 211 .init_irq = highbank_init_irq, 206 212 .timer = &highbank_timer, 207 - .handle_irq = gic_handle_irq, 208 213 .init_machine = highbank_init, 209 214 .dt_compat = highbank_match, 210 215 .restart = highbank_restart,
+2 -4
arch/arm/mach-highbank/platsmp.c
··· 17 17 #include <linux/init.h> 18 18 #include <linux/smp.h> 19 19 #include <linux/io.h> 20 + #include <linux/irqchip/arm-gic.h> 20 21 21 22 #include <asm/smp_scu.h> 22 - #include <asm/hardware/gic.h> 23 23 24 24 #include "core.h" 25 25 ··· 33 33 static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struct *idle) 34 34 { 35 35 highbank_set_cpu_jump(cpu, secondary_startup); 36 - gic_raise_softirq(cpumask_of(cpu), 0); 36 + arch_send_wakeup_ipi_mask(cpumask_of(cpu)); 37 37 return 0; 38 38 } 39 39 ··· 56 56 57 57 for (i = 0; i < ncores; i++) 58 58 set_cpu_possible(i, true); 59 - 60 - set_smp_cross_call(gic_raise_softirq); 61 59 } 62 60 63 61 static void __init highbank_smp_prepare_cpus(unsigned int max_cpus)
-1
arch/arm/mach-imx/common.h
··· 112 112 #define imx50_handle_irq tzic_handle_irq 113 113 #define imx51_handle_irq tzic_handle_irq 114 114 #define imx53_handle_irq tzic_handle_irq 115 - #define imx6q_handle_irq gic_handle_irq 116 115 117 116 extern void imx_enable_cpu(int cpu, bool enable); 118 117 extern void imx_set_cpu_jump(int cpu, void *jump_addr);
+1 -1
arch/arm/mach-imx/gpc.c
··· 15 15 #include <linux/of.h> 16 16 #include <linux/of_address.h> 17 17 #include <linux/of_irq.h> 18 - #include <asm/hardware/gic.h> 18 + #include <linux/irqchip/arm-gic.h> 19 19 20 20 #define GPC_IMR1 0x008 21 21 #define GPC_PGC_CPU_PDN 0x2a0
+2 -8
arch/arm/mach-imx/mach-imx6q.c
··· 18 18 #include <linux/init.h> 19 19 #include <linux/io.h> 20 20 #include <linux/irq.h> 21 + #include <linux/irqchip.h> 21 22 #include <linux/of.h> 22 23 #include <linux/of_address.h> 23 24 #include <linux/of_irq.h> ··· 30 29 #include <asm/cpuidle.h> 31 30 #include <asm/smp_twd.h> 32 31 #include <asm/hardware/cache-l2x0.h> 33 - #include <asm/hardware/gic.h> 34 32 #include <asm/mach/arch.h> 35 33 #include <asm/mach/time.h> 36 34 #include <asm/system_misc.h> ··· 221 221 imx6q_clock_map_io(); 222 222 } 223 223 224 - static const struct of_device_id imx6q_irq_match[] __initconst = { 225 - { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, 226 - { /* sentinel */ } 227 - }; 228 - 229 224 static void __init imx6q_init_irq(void) 230 225 { 231 226 l2x0_of_init(0, ~0UL); 232 227 imx_src_init(); 233 228 imx_gpc_init(); 234 - of_irq_init(imx6q_irq_match); 229 + irqchip_init(); 235 230 } 236 231 237 232 static void __init imx6q_timer_init(void) ··· 249 254 .smp = smp_ops(imx_smp_ops), 250 255 .map_io = imx6q_map_io, 251 256 .init_irq = imx6q_init_irq, 252 - .handle_irq = imx6q_handle_irq, 253 257 .timer = &imx6q_timer, 254 258 .init_machine = imx6q_init_machine, 255 259 .init_late = imx6q_init_late,
+1 -3
arch/arm/mach-imx/platsmp.c
··· 12 12 13 13 #include <linux/init.h> 14 14 #include <linux/smp.h> 15 + #include <linux/irqchip/arm-gic.h> 15 16 #include <asm/page.h> 16 17 #include <asm/smp_scu.h> 17 - #include <asm/hardware/gic.h> 18 18 #include <asm/mach/map.h> 19 19 20 20 #include "common.h" ··· 71 71 72 72 for (i = 0; i < ncores; i++) 73 73 set_cpu_possible(i, true); 74 - 75 - set_smp_cross_call(gic_raise_softirq); 76 74 } 77 75 78 76 void imx_smp_prepare(void)
+2 -14
arch/arm/mach-msm/board-dt-8660.c
··· 11 11 */ 12 12 13 13 #include <linux/init.h> 14 + #include <linux/irqchip.h> 14 15 #include <linux/of.h> 15 - #include <linux/of_irq.h> 16 16 #include <linux/of_platform.h> 17 17 18 18 #include <asm/mach/arch.h> 19 - #include <asm/hardware/gic.h> 20 19 21 20 #include <mach/board.h> 22 21 #include "common.h" 23 - 24 - static const struct of_device_id msm_dt_gic_match[] __initconst = { 25 - { .compatible = "qcom,msm-8660-qgic", .data = gic_of_init }, 26 - {} 27 - }; 28 - 29 - static void __init msm8x60_init_irq(void) 30 - { 31 - of_irq_init(msm_dt_gic_match); 32 - } 33 22 34 23 static void __init msm8x60_init_late(void) 35 24 { ··· 44 55 DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)") 45 56 .smp = smp_ops(msm_smp_ops), 46 57 .map_io = msm_map_msm8x60_io, 47 - .init_irq = msm8x60_init_irq, 48 - .handle_irq = gic_handle_irq, 58 + .init_irq = irqchip_init, 49 59 .init_machine = msm8x60_dt_init, 50 60 .init_late = msm8x60_init_late, 51 61 .timer = &msm_dt_timer,
+2 -14
arch/arm/mach-msm/board-dt-8960.c
··· 11 11 */ 12 12 13 13 #include <linux/init.h> 14 - #include <linux/of_irq.h> 14 + #include <linux/irqchip.h> 15 15 #include <linux/of_platform.h> 16 16 17 - #include <asm/hardware/gic.h> 18 17 #include <asm/mach/arch.h> 19 18 20 19 #include "common.h" 21 - 22 - static const struct of_device_id msm_dt_gic_match[] __initconst = { 23 - { .compatible = "qcom,msm-qgic2", .data = gic_of_init }, 24 - { } 25 - }; 26 - 27 - static void __init msm_dt_init_irq(void) 28 - { 29 - of_irq_init(msm_dt_gic_match); 30 - } 31 20 32 21 static void __init msm_dt_init(void) 33 22 { ··· 31 42 DT_MACHINE_START(MSM8960_DT, "Qualcomm MSM (Flattened Device Tree)") 32 43 .smp = smp_ops(msm_smp_ops), 33 44 .map_io = msm_map_msm8960_io, 34 - .init_irq = msm_dt_init_irq, 45 + .init_irq = irqchip_init, 35 46 .timer = &msm_dt_timer, 36 47 .init_machine = msm_dt_init, 37 48 .dt_compat = msm8960_dt_match, 38 - .handle_irq = gic_handle_irq, 39 49 MACHINE_END
+2 -4
arch/arm/mach-msm/platsmp.c
··· 15 15 #include <linux/jiffies.h> 16 16 #include <linux/smp.h> 17 17 #include <linux/io.h> 18 + #include <linux/irqchip/arm-gic.h> 18 19 19 - #include <asm/hardware/gic.h> 20 20 #include <asm/cacheflush.h> 21 21 #include <asm/cputype.h> 22 22 #include <asm/mach-types.h> ··· 115 115 * the boot monitor to read the system wide flags register, 116 116 * and branch to the address found there. 117 117 */ 118 - gic_raise_softirq(cpumask_of(cpu), 0); 118 + arch_send_wakeup_ipi_mask(cpumask_of(cpu)); 119 119 120 120 timeout = jiffies + (1 * HZ); 121 121 while (time_before(jiffies, timeout)) { ··· 153 153 154 154 for (i = 0; i < ncores; i++) 155 155 set_cpu_possible(i, true); 156 - 157 - set_smp_cross_call(gic_raise_softirq); 158 156 } 159 157 160 158 static void __init msm_smp_prepare_cpus(unsigned int max_cpus)
-1
arch/arm/mach-msm/timer.c
··· 25 25 #include <linux/of_irq.h> 26 26 27 27 #include <asm/mach/time.h> 28 - #include <asm/hardware/gic.h> 29 28 #include <asm/localtimer.h> 30 29 #include <asm/sched_clock.h> 31 30
+1 -1
arch/arm/mach-netx/generic.c
··· 23 23 #include <linux/module.h> 24 24 #include <linux/platform_device.h> 25 25 #include <linux/io.h> 26 + #include <linux/irqchip/arm-vic.h> 26 27 #include <mach/hardware.h> 27 28 #include <asm/mach/map.h> 28 - #include <asm/hardware/vic.h> 29 29 #include <mach/netx-regs.h> 30 30 #include <asm/mach/irq.h> 31 31
-2
arch/arm/mach-netx/nxdb500.c
··· 28 28 #include <mach/hardware.h> 29 29 #include <asm/mach-types.h> 30 30 #include <asm/mach/arch.h> 31 - #include <asm/hardware/vic.h> 32 31 #include <mach/netx-regs.h> 33 32 #include <linux/platform_data/eth-netx.h> 34 33 ··· 203 204 .atag_offset = 0x100, 204 205 .map_io = netx_map_io, 205 206 .init_irq = netx_init_irq, 206 - .handle_irq = vic_handle_irq, 207 207 .timer = &netx_timer, 208 208 .init_machine = nxdb500_init, 209 209 .restart = netx_restart,
-2
arch/arm/mach-netx/nxdkn.c
··· 28 28 #include <mach/hardware.h> 29 29 #include <asm/mach-types.h> 30 30 #include <asm/mach/arch.h> 31 - #include <asm/hardware/vic.h> 32 31 #include <mach/netx-regs.h> 33 32 #include <linux/platform_data/eth-netx.h> 34 33 ··· 96 97 .atag_offset = 0x100, 97 98 .map_io = netx_map_io, 98 99 .init_irq = netx_init_irq, 99 - .handle_irq = vic_handle_irq, 100 100 .timer = &netx_timer, 101 101 .init_machine = nxdkn_init, 102 102 .restart = netx_restart,
-2
arch/arm/mach-netx/nxeb500hmi.c
··· 28 28 #include <mach/hardware.h> 29 29 #include <asm/mach-types.h> 30 30 #include <asm/mach/arch.h> 31 - #include <asm/hardware/vic.h> 32 31 #include <mach/netx-regs.h> 33 32 #include <linux/platform_data/eth-netx.h> 34 33 ··· 180 181 .atag_offset = 0x100, 181 182 .map_io = netx_map_io, 182 183 .init_irq = netx_init_irq, 183 - .handle_irq = vic_handle_irq, 184 184 .timer = &netx_timer, 185 185 .init_machine = nxeb500hmi_init, 186 186 .restart = netx_restart,
-2
arch/arm/mach-nomadik/board-nhk8815.c
··· 27 27 #include <linux/pinctrl/machine.h> 28 28 #include <linux/platform_data/pinctrl-nomadik.h> 29 29 #include <linux/platform_data/clocksource-nomadik-mtu.h> 30 - #include <asm/hardware/vic.h> 31 30 #include <asm/sizes.h> 32 31 #include <asm/mach-types.h> 33 32 #include <asm/mach/arch.h> ··· 351 352 .atag_offset = 0x100, 352 353 .map_io = cpu8815_map_io, 353 354 .init_irq = cpu8815_init_irq, 354 - .handle_irq = vic_handle_irq, 355 355 .timer = &nomadik_timer, 356 356 .init_machine = nhk8815_platform_init, 357 357 .restart = cpu8815_restart,
+1 -1
arch/arm/mach-nomadik/cpu-8815.c
··· 25 25 #include <linux/slab.h> 26 26 #include <linux/irq.h> 27 27 #include <linux/dma-mapping.h> 28 + #include <linux/irqchip/arm-vic.h> 28 29 #include <linux/platform_data/clk-nomadik.h> 29 30 #include <linux/platform_data/pinctrl-nomadik.h> 30 31 31 32 #include <mach/hardware.h> 32 33 #include <mach/irqs.h> 33 34 #include <asm/mach/map.h> 34 - #include <asm/hardware/vic.h> 35 35 36 36 #include <asm/cacheflush.h> 37 37 #include <asm/hardware/cache-l2x0.h>
+1 -2
arch/arm/mach-omap2/board-4430sdp.c
··· 26 26 #include <linux/regulator/fixed.h> 27 27 #include <linux/leds.h> 28 28 #include <linux/leds_pwm.h> 29 + #include <linux/irqchip/arm-gic.h> 29 30 #include <linux/platform_data/omap4-keypad.h> 30 31 #include <linux/usb/musb.h> 31 32 32 - #include <asm/hardware/gic.h> 33 33 #include <asm/mach-types.h> 34 34 #include <asm/mach/arch.h> 35 35 #include <asm/mach/map.h> ··· 722 722 .map_io = omap4_map_io, 723 723 .init_early = omap4430_init_early, 724 724 .init_irq = gic_init_irq, 725 - .handle_irq = gic_handle_irq, 726 725 .init_machine = omap_4430sdp_init, 727 726 .init_late = omap4430_init_late, 728 727 .timer = &omap4_timer,
-3
arch/arm/mach-omap2/board-generic.c
··· 16 16 #include <linux/of_platform.h> 17 17 #include <linux/irqdomain.h> 18 18 19 - #include <asm/hardware/gic.h> 20 19 #include <asm/mach/arch.h> 21 20 22 21 #include "common.h" ··· 155 156 .map_io = omap4_map_io, 156 157 .init_early = omap4430_init_early, 157 158 .init_irq = omap_gic_of_init, 158 - .handle_irq = gic_handle_irq, 159 159 .init_machine = omap_generic_init, 160 160 .init_late = omap4430_init_late, 161 161 .timer = &omap4_timer, ··· 175 177 .map_io = omap5_map_io, 176 178 .init_early = omap5_init_early, 177 179 .init_irq = omap_gic_of_init, 178 - .handle_irq = gic_handle_irq, 179 180 .init_machine = omap_generic_init, 180 181 .timer = &omap5_timer, 181 182 .dt_compat = omap5_boards_compat,
+1 -2
arch/arm/mach-omap2/board-omap4panda.c
··· 31 31 #include <linux/ti_wilink_st.h> 32 32 #include <linux/usb/musb.h> 33 33 #include <linux/wl12xx.h> 34 + #include <linux/irqchip/arm-gic.h> 34 35 #include <linux/platform_data/omap-abe-twl6040.h> 35 36 36 - #include <asm/hardware/gic.h> 37 37 #include <asm/mach-types.h> 38 38 #include <asm/mach/arch.h> 39 39 #include <asm/mach/map.h> ··· 453 453 .map_io = omap4_map_io, 454 454 .init_early = omap4430_init_early, 455 455 .init_irq = gic_init_irq, 456 - .handle_irq = gic_handle_irq, 457 456 .init_machine = omap4_panda_init, 458 457 .init_late = omap4430_init_late, 459 458 .timer = &omap4_timer,
+2 -4
arch/arm/mach-omap2/omap-smp.c
··· 19 19 #include <linux/device.h> 20 20 #include <linux/smp.h> 21 21 #include <linux/io.h> 22 + #include <linux/irqchip/arm-gic.h> 22 23 23 24 #include <asm/cacheflush.h> 24 - #include <asm/hardware/gic.h> 25 25 #include <asm/smp_scu.h> 26 26 27 27 #include "omap-secure.h" ··· 157 157 booted = true; 158 158 } 159 159 160 - gic_raise_softirq(cpumask_of(cpu), 0); 160 + arch_send_wakeup_ipi_mask(cpumask_of(cpu)); 161 161 162 162 /* 163 163 * Now the secondary core is starting up let it run its ··· 231 231 232 232 for (i = 0; i < ncores; i++) 233 233 set_cpu_possible(i, true); 234 - 235 - set_smp_cross_call(gic_raise_softirq); 236 234 } 237 235 238 236 static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
+1 -2
arch/arm/mach-omap2/omap-wakeupgen.c
··· 24 24 #include <linux/cpu.h> 25 25 #include <linux/notifier.h> 26 26 #include <linux/cpu_pm.h> 27 - 28 - #include <asm/hardware/gic.h> 27 + #include <linux/irqchip/arm-gic.h> 29 28 30 29 #include "omap-wakeupgen.h" 31 30 #include "omap-secure.h"
+3 -8
arch/arm/mach-omap2/omap4-common.c
··· 15 15 #include <linux/init.h> 16 16 #include <linux/io.h> 17 17 #include <linux/irq.h> 18 + #include <linux/irqchip.h> 18 19 #include <linux/platform_device.h> 19 20 #include <linux/memblock.h> 20 21 #include <linux/of_irq.h> 21 22 #include <linux/of_platform.h> 22 23 #include <linux/export.h> 24 + #include <linux/irqchip/arm-gic.h> 23 25 24 - #include <asm/hardware/gic.h> 25 26 #include <asm/hardware/cache-l2x0.h> 26 27 #include <asm/mach/map.h> 27 28 #include <asm/memblock.h> ··· 256 255 } 257 256 early_initcall(omap4_sar_ram_init); 258 257 259 - static struct of_device_id irq_match[] __initdata = { 260 - { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, 261 - { .compatible = "arm,cortex-a15-gic", .data = gic_of_init, }, 262 - { } 263 - }; 264 - 265 258 void __init omap_gic_of_init(void) 266 259 { 267 260 omap_wakeupgen_init(); 268 - of_irq_init(irq_match); 261 + irqchip_init(); 269 262 } 270 263 271 264 #if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
+2 -13
arch/arm/mach-picoxcell/common.c
··· 9 9 */ 10 10 #include <linux/delay.h> 11 11 #include <linux/irq.h> 12 + #include <linux/irqchip.h> 12 13 #include <linux/irqdomain.h> 13 14 #include <linux/of.h> 14 15 #include <linux/of_address.h> ··· 18 17 #include <linux/dw_apb_timer.h> 19 18 20 19 #include <asm/mach/arch.h> 21 - #include <asm/hardware/vic.h> 22 20 #include <asm/mach/map.h> 23 21 24 22 #include "common.h" ··· 70 70 NULL 71 71 }; 72 72 73 - static const struct of_device_id vic_of_match[] __initconst = { 74 - { .compatible = "arm,pl192-vic", .data = vic_of_init, }, 75 - { /* Sentinel */ } 76 - }; 77 - 78 - static void __init picoxcell_init_irq(void) 79 - { 80 - of_irq_init(vic_of_match); 81 - } 82 - 83 73 static void picoxcell_wdt_restart(char mode, const char *cmd) 84 74 { 85 75 /* ··· 87 97 DT_MACHINE_START(PICOXCELL, "Picochip picoXcell") 88 98 .map_io = picoxcell_map_io, 89 99 .nr_irqs = NR_IRQS_LEGACY, 90 - .init_irq = picoxcell_init_irq, 91 - .handle_irq = vic_handle_irq, 100 + .init_irq = irqchip_init, 92 101 .timer = &dw_apb_timer, 93 102 .init_machine = picoxcell_init_machine, 94 103 .dt_compat = picoxcell_dt_match,
-1
arch/arm/mach-realview/core.c
··· 42 42 #include <asm/mach/irq.h> 43 43 #include <asm/mach/map.h> 44 44 45 - #include <asm/hardware/gic.h> 46 45 47 46 #include <mach/platform.h> 48 47 #include <mach/irqs.h>
-3
arch/arm/mach-realview/platsmp.c
··· 14 14 #include <linux/io.h> 15 15 16 16 #include <mach/hardware.h> 17 - #include <asm/hardware/gic.h> 18 17 #include <asm/mach-types.h> 19 18 #include <asm/smp_scu.h> 20 19 ··· 58 59 59 60 for (i = 0; i < ncores; i++) 60 61 set_cpu_possible(i, true); 61 - 62 - set_smp_cross_call(gic_raise_softirq); 63 62 } 64 63 65 64 static void __init realview_smp_prepare_cpus(unsigned int max_cpus)
+1 -2
arch/arm/mach-realview/realview_eb.c
··· 27 27 #include <linux/amba/mmci.h> 28 28 #include <linux/amba/pl022.h> 29 29 #include <linux/io.h> 30 + #include <linux/irqchip/arm-gic.h> 30 31 #include <linux/platform_data/clk-realview.h> 31 32 32 33 #include <mach/hardware.h> 33 34 #include <asm/irq.h> 34 35 #include <asm/mach-types.h> 35 36 #include <asm/pgtable.h> 36 - #include <asm/hardware/gic.h> 37 37 #include <asm/hardware/cache-l2x0.h> 38 38 #include <asm/smp_twd.h> 39 39 ··· 473 473 .init_early = realview_init_early, 474 474 .init_irq = gic_init_irq, 475 475 .timer = &realview_eb_timer, 476 - .handle_irq = gic_handle_irq, 477 476 .init_machine = realview_eb_init, 478 477 #ifdef CONFIG_ZONE_DMA 479 478 .dma_zone_size = SZ_256M,
+1 -2
arch/arm/mach-realview/realview_pb1176.c
··· 29 29 #include <linux/mtd/physmap.h> 30 30 #include <linux/mtd/partitions.h> 31 31 #include <linux/io.h> 32 + #include <linux/irqchip/arm-gic.h> 32 33 #include <linux/platform_data/clk-realview.h> 33 34 34 35 #include <mach/hardware.h> 35 36 #include <asm/irq.h> 36 37 #include <asm/mach-types.h> 37 38 #include <asm/pgtable.h> 38 - #include <asm/hardware/gic.h> 39 39 #include <asm/hardware/cache-l2x0.h> 40 40 41 41 #include <asm/mach/arch.h> ··· 385 385 .init_early = realview_init_early, 386 386 .init_irq = gic_init_irq, 387 387 .timer = &realview_pb1176_timer, 388 - .handle_irq = gic_handle_irq, 389 388 .init_machine = realview_pb1176_init, 390 389 #ifdef CONFIG_ZONE_DMA 391 390 .dma_zone_size = SZ_256M,
+1 -2
arch/arm/mach-realview/realview_pb11mp.c
··· 27 27 #include <linux/amba/mmci.h> 28 28 #include <linux/amba/pl022.h> 29 29 #include <linux/io.h> 30 + #include <linux/irqchip/arm-gic.h> 30 31 #include <linux/platform_data/clk-realview.h> 31 32 32 33 #include <mach/hardware.h> 33 34 #include <asm/irq.h> 34 35 #include <asm/mach-types.h> 35 36 #include <asm/pgtable.h> 36 - #include <asm/hardware/gic.h> 37 37 #include <asm/hardware/cache-l2x0.h> 38 38 #include <asm/smp_twd.h> 39 39 ··· 368 368 .init_early = realview_init_early, 369 369 .init_irq = gic_init_irq, 370 370 .timer = &realview_pb11mp_timer, 371 - .handle_irq = gic_handle_irq, 372 371 .init_machine = realview_pb11mp_init, 373 372 #ifdef CONFIG_ZONE_DMA 374 373 .dma_zone_size = SZ_256M,
+1 -2
arch/arm/mach-realview/realview_pba8.c
··· 27 27 #include <linux/amba/mmci.h> 28 28 #include <linux/amba/pl022.h> 29 29 #include <linux/io.h> 30 + #include <linux/irqchip/arm-gic.h> 30 31 #include <linux/platform_data/clk-realview.h> 31 32 32 33 #include <asm/irq.h> 33 34 #include <asm/mach-types.h> 34 35 #include <asm/pgtable.h> 35 - #include <asm/hardware/gic.h> 36 36 37 37 #include <asm/mach/arch.h> 38 38 #include <asm/mach/map.h> ··· 309 309 .init_early = realview_init_early, 310 310 .init_irq = gic_init_irq, 311 311 .timer = &realview_pba8_timer, 312 - .handle_irq = gic_handle_irq, 313 312 .init_machine = realview_pba8_init, 314 313 #ifdef CONFIG_ZONE_DMA 315 314 .dma_zone_size = SZ_256M,
+1 -2
arch/arm/mach-realview/realview_pbx.c
··· 26 26 #include <linux/amba/mmci.h> 27 27 #include <linux/amba/pl022.h> 28 28 #include <linux/io.h> 29 + #include <linux/irqchip/arm-gic.h> 29 30 #include <linux/platform_data/clk-realview.h> 30 31 31 32 #include <asm/irq.h> 32 33 #include <asm/mach-types.h> 33 34 #include <asm/smp_twd.h> 34 35 #include <asm/pgtable.h> 35 - #include <asm/hardware/gic.h> 36 36 #include <asm/hardware/cache-l2x0.h> 37 37 38 38 #include <asm/mach/arch.h> ··· 405 405 .init_early = realview_init_early, 406 406 .init_irq = gic_init_irq, 407 407 .timer = &realview_pbx_timer, 408 - .handle_irq = gic_handle_irq, 409 408 .init_machine = realview_pbx_init, 410 409 #ifdef CONFIG_ZONE_DMA 411 410 .dma_zone_size = SZ_256M,
+1 -1
arch/arm/mach-s3c64xx/common.c
··· 25 25 #include <linux/dma-mapping.h> 26 26 #include <linux/irq.h> 27 27 #include <linux/gpio.h> 28 + #include <linux/irqchip/arm-vic.h> 28 29 29 30 #include <asm/mach/arch.h> 30 31 #include <asm/mach/map.h> 31 - #include <asm/hardware/vic.h> 32 32 #include <asm/system_misc.h> 33 33 34 34 #include <mach/map.h>
-1
arch/arm/mach-s3c64xx/include/mach/regs-irq.h
··· 15 15 #ifndef __ASM_ARCH_REGS_IRQ_H 16 16 #define __ASM_ARCH_REGS_IRQ_H __FILE__ 17 17 18 - #include <asm/hardware/vic.h> 19 18 20 19 #endif /* __ASM_ARCH_6400_REGS_IRQ_H */
+2
arch/arm/mach-s3c64xx/include/mach/tick.h
··· 15 15 #ifndef __ASM_ARCH_TICK_H 16 16 #define __ASM_ARCH_TICK_H __FILE__ 17 17 18 + #include <linux/irqchip/arm-vic.h> 19 + 18 20 /* note, the timer interrutps turn up in 2 places, the vic and then 19 21 * the timer block. We take the VIC as the base at the moment. 20 22 */
-2
arch/arm/mach-s3c64xx/mach-anw6410.c
··· 31 31 #include <video/platform_lcd.h> 32 32 #include <video/samsung_fimd.h> 33 33 34 - #include <asm/hardware/vic.h> 35 34 #include <asm/mach/arch.h> 36 35 #include <asm/mach/map.h> 37 36 #include <asm/mach/irq.h> ··· 229 230 .atag_offset = 0x100, 230 231 231 232 .init_irq = s3c6410_init_irq, 232 - .handle_irq = vic_handle_irq, 233 233 .map_io = anw6410_map_io, 234 234 .init_machine = anw6410_machine_init, 235 235 .init_late = s3c64xx_init_late,
-2
arch/arm/mach-s3c64xx/mach-crag6410.c
··· 42 42 43 43 #include <sound/wm1250-ev1.h> 44 44 45 - #include <asm/hardware/vic.h> 46 45 #include <asm/mach/arch.h> 47 46 #include <asm/mach-types.h> 48 47 ··· 866 867 /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */ 867 868 .atag_offset = 0x100, 868 869 .init_irq = s3c6410_init_irq, 869 - .handle_irq = vic_handle_irq, 870 870 .map_io = crag6410_map_io, 871 871 .init_machine = crag6410_machine_init, 872 872 .init_late = s3c64xx_init_late,
-2
arch/arm/mach-s3c64xx/mach-hmt.c
··· 30 30 #include <mach/hardware.h> 31 31 #include <mach/map.h> 32 32 33 - #include <asm/hardware/vic.h> 34 33 #include <asm/irq.h> 35 34 #include <asm/mach-types.h> 36 35 ··· 272 273 /* Maintainer: Peter Korsgaard <jacmet@sunsite.dk> */ 273 274 .atag_offset = 0x100, 274 275 .init_irq = s3c6410_init_irq, 275 - .handle_irq = vic_handle_irq, 276 276 .map_io = hmt_map_io, 277 277 .init_machine = hmt_machine_init, 278 278 .init_late = s3c64xx_init_late,
-2
arch/arm/mach-s3c64xx/mach-mini6410.c
··· 24 24 #include <linux/serial_core.h> 25 25 #include <linux/types.h> 26 26 27 - #include <asm/hardware/vic.h> 28 27 #include <asm/mach-types.h> 29 28 #include <asm/mach/arch.h> 30 29 #include <asm/mach/map.h> ··· 351 352 /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */ 352 353 .atag_offset = 0x100, 353 354 .init_irq = s3c6410_init_irq, 354 - .handle_irq = vic_handle_irq, 355 355 .map_io = mini6410_map_io, 356 356 .init_machine = mini6410_machine_init, 357 357 .init_late = s3c64xx_init_late,
-2
arch/arm/mach-s3c64xx/mach-ncp.c
··· 26 26 #include <video/platform_lcd.h> 27 27 #include <video/samsung_fimd.h> 28 28 29 - #include <asm/hardware/vic.h> 30 29 #include <asm/mach/arch.h> 31 30 #include <asm/mach/map.h> 32 31 #include <asm/mach/irq.h> ··· 100 101 /* Maintainer: Samsung Electronics */ 101 102 .atag_offset = 0x100, 102 103 .init_irq = s3c6410_init_irq, 103 - .handle_irq = vic_handle_irq, 104 104 .map_io = ncp_map_io, 105 105 .init_machine = ncp_machine_init, 106 106 .init_late = s3c64xx_init_late,
-2
arch/arm/mach-s3c64xx/mach-real6410.c
··· 25 25 #include <linux/serial_core.h> 26 26 #include <linux/types.h> 27 27 28 - #include <asm/hardware/vic.h> 29 28 #include <asm/mach-types.h> 30 29 #include <asm/mach/arch.h> 31 30 #include <asm/mach/map.h> ··· 330 331 .atag_offset = 0x100, 331 332 332 333 .init_irq = s3c6410_init_irq, 333 - .handle_irq = vic_handle_irq, 334 334 .map_io = real6410_map_io, 335 335 .init_machine = real6410_machine_init, 336 336 .init_late = s3c64xx_init_late,
-2
arch/arm/mach-s3c64xx/mach-smartq5.c
··· 17 17 #include <linux/leds.h> 18 18 #include <linux/platform_device.h> 19 19 20 - #include <asm/hardware/vic.h> 21 20 #include <asm/mach-types.h> 22 21 #include <asm/mach/arch.h> 23 22 ··· 152 153 /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */ 153 154 .atag_offset = 0x100, 154 155 .init_irq = s3c6410_init_irq, 155 - .handle_irq = vic_handle_irq, 156 156 .map_io = smartq_map_io, 157 157 .init_machine = smartq5_machine_init, 158 158 .init_late = s3c64xx_init_late,
-2
arch/arm/mach-s3c64xx/mach-smartq7.c
··· 17 17 #include <linux/leds.h> 18 18 #include <linux/platform_device.h> 19 19 20 - #include <asm/hardware/vic.h> 21 20 #include <asm/mach-types.h> 22 21 #include <asm/mach/arch.h> 23 22 ··· 168 169 /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */ 169 170 .atag_offset = 0x100, 170 171 .init_irq = s3c6410_init_irq, 171 - .handle_irq = vic_handle_irq, 172 172 .map_io = smartq_map_io, 173 173 .init_machine = smartq7_machine_init, 174 174 .init_late = s3c64xx_init_late,
-2
arch/arm/mach-s3c64xx/mach-smdk6400.c
··· 22 22 23 23 #include <asm/mach-types.h> 24 24 25 - #include <asm/hardware/vic.h> 26 25 #include <asm/mach/arch.h> 27 26 #include <asm/mach/map.h> 28 27 #include <asm/mach/irq.h> ··· 89 90 .atag_offset = 0x100, 90 91 91 92 .init_irq = s3c6400_init_irq, 92 - .handle_irq = vic_handle_irq, 93 93 .map_io = smdk6400_map_io, 94 94 .init_machine = smdk6400_machine_init, 95 95 .init_late = s3c64xx_init_late,
-2
arch/arm/mach-s3c64xx/mach-smdk6410.c
··· 45 45 #include <video/platform_lcd.h> 46 46 #include <video/samsung_fimd.h> 47 47 48 - #include <asm/hardware/vic.h> 49 48 #include <asm/mach/arch.h> 50 49 #include <asm/mach/map.h> 51 50 #include <asm/mach/irq.h> ··· 699 700 .atag_offset = 0x100, 700 701 701 702 .init_irq = s3c6410_init_irq, 702 - .handle_irq = vic_handle_irq, 703 703 .map_io = smdk6410_map_io, 704 704 .init_machine = smdk6410_machine_init, 705 705 .init_late = s3c64xx_init_late,
-1
arch/arm/mach-s5p64x0/include/mach/regs-irq.h
··· 13 13 #ifndef __ASM_ARCH_REGS_IRQ_H 14 14 #define __ASM_ARCH_REGS_IRQ_H __FILE__ 15 15 16 - #include <asm/hardware/vic.h> 17 16 #include <mach/map.h> 18 17 19 18 #endif /* __ASM_ARCH_REGS_IRQ_H */
-29
arch/arm/mach-s5p64x0/include/mach/tick.h
··· 1 - /* linux/arch/arm/mach-s5p64x0/include/mach/tick.h 2 - * 3 - * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. 4 - * http://www.samsung.com 5 - * 6 - * Copyright 2008 Openmoko, Inc. 7 - * Copyright 2008 Simtec Electronics 8 - * http://armlinux.simtec.co.uk/ 9 - * Ben Dooks <ben@simtec.co.uk> 10 - * 11 - * S5P64X0 - Timer tick support definitions 12 - * 13 - * This program is free software; you can redistribute it and/or modify 14 - * it under the terms of the GNU General Public License version 2 as 15 - * published by the Free Software Foundation. 16 - */ 17 - 18 - #ifndef __ASM_ARCH_TICK_H 19 - #define __ASM_ARCH_TICK_H __FILE__ 20 - 21 - static inline u32 s3c24xx_ostimer_pending(void) 22 - { 23 - u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS); 24 - return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0))); 25 - } 26 - 27 - #define TICK_MAX (0xffffffff) 28 - 29 - #endif /* __ASM_ARCH_TICK_H */
-2
arch/arm/mach-s5p64x0/mach-smdk6440.c
··· 29 29 #include <video/platform_lcd.h> 30 30 #include <video/samsung_fimd.h> 31 31 32 - #include <asm/hardware/vic.h> 33 32 #include <asm/mach/arch.h> 34 33 #include <asm/mach/map.h> 35 34 #include <asm/irq.h> ··· 271 272 .atag_offset = 0x100, 272 273 273 274 .init_irq = s5p6440_init_irq, 274 - .handle_irq = vic_handle_irq, 275 275 .map_io = smdk6440_map_io, 276 276 .init_machine = smdk6440_machine_init, 277 277 .timer = &s5p_timer,
-2
arch/arm/mach-s5p64x0/mach-smdk6450.c
··· 29 29 #include <video/platform_lcd.h> 30 30 #include <video/samsung_fimd.h> 31 31 32 - #include <asm/hardware/vic.h> 33 32 #include <asm/mach/arch.h> 34 33 #include <asm/mach/map.h> 35 34 #include <asm/irq.h> ··· 290 291 .atag_offset = 0x100, 291 292 292 293 .init_irq = s5p6450_init_irq, 293 - .handle_irq = vic_handle_irq, 294 294 .map_io = smdk6450_map_io, 295 295 .init_machine = smdk6450_machine_init, 296 296 .timer = &s5p_timer,
-1
arch/arm/mach-s5pc100/include/mach/regs-irq.h
··· 14 14 #define __ASM_ARCH_REGS_IRQ_H __FILE__ 15 15 16 16 #include <mach/map.h> 17 - #include <asm/hardware/vic.h> 18 17 19 18 #endif /* __ASM_ARCH_REGS_IRQ_H */
+2
arch/arm/mach-s5pc100/include/mach/tick.h
··· 15 15 #ifndef __ASM_ARCH_TICK_H 16 16 #define __ASM_ARCH_TICK_H __FILE__ 17 17 18 + #include <linux/irqchip/arm-vic.h> 19 + 18 20 /* note, the timer interrutps turn up in 2 places, the vic and then 19 21 * the timer block. We take the VIC as the base at the moment. 20 22 */
-2
arch/arm/mach-s5pc100/mach-smdkc100.c
··· 25 25 #include <linux/input.h> 26 26 #include <linux/pwm_backlight.h> 27 27 28 - #include <asm/hardware/vic.h> 29 28 #include <asm/mach/arch.h> 30 29 #include <asm/mach/map.h> 31 30 ··· 253 254 /* Maintainer: Byungho Min <bhmin@samsung.com> */ 254 255 .atag_offset = 0x100, 255 256 .init_irq = s5pc100_init_irq, 256 - .handle_irq = vic_handle_irq, 257 257 .map_io = smdkc100_map_io, 258 258 .init_machine = smdkc100_machine_init, 259 259 .timer = &s3c24xx_timer,
-1
arch/arm/mach-s5pv210/include/mach/regs-irq.h
··· 13 13 #ifndef __ASM_ARCH_REGS_IRQ_H 14 14 #define __ASM_ARCH_REGS_IRQ_H __FILE__ 15 15 16 - #include <asm/hardware/vic.h> 17 16 #include <mach/map.h> 18 17 19 18 #endif /* __ASM_ARCH_REGS_IRQ_H */
-26
arch/arm/mach-s5pv210/include/mach/tick.h
··· 1 - /* linux/arch/arm/mach-s5pv210/include/mach/tick.h 2 - * 3 - * Copyright (c) 2009 Samsung Electronics Co., Ltd. 4 - * http://www.samsung.com/ 5 - * 6 - * Based on arch/arm/mach-s3c6400/include/mach/tick.h 7 - * 8 - * S5PV210 - Timer tick support definitions 9 - * 10 - * This program is free software; you can redistribute it and/or modify 11 - * it under the terms of the GNU General Public License version 2 as 12 - * published by the Free Software Foundation. 13 - */ 14 - 15 - #ifndef __ASM_ARCH_TICK_H 16 - #define __ASM_ARCH_TICK_H __FILE__ 17 - 18 - static inline u32 s3c24xx_ostimer_pending(void) 19 - { 20 - u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS); 21 - return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0))); 22 - } 23 - 24 - #define TICK_MAX (0xffffffff) 25 - 26 - #endif /* __ASM_ARCH_TICK_H */
-2
arch/arm/mach-s5pv210/mach-aquila.c
··· 22 22 #include <linux/input.h> 23 23 #include <linux/gpio.h> 24 24 25 - #include <asm/hardware/vic.h> 26 25 #include <asm/mach/arch.h> 27 26 #include <asm/mach/map.h> 28 27 #include <asm/setup.h> ··· 684 685 Kyungmin Park <kyungmin.park@samsung.com> */ 685 686 .atag_offset = 0x100, 686 687 .init_irq = s5pv210_init_irq, 687 - .handle_irq = vic_handle_irq, 688 688 .map_io = aquila_map_io, 689 689 .init_machine = aquila_machine_init, 690 690 .timer = &s5p_timer,
-2
arch/arm/mach-s5pv210/mach-goni.c
··· 29 29 #include <linux/interrupt.h> 30 30 #include <linux/platform_data/s3c-hsotg.h> 31 31 32 - #include <asm/hardware/vic.h> 33 32 #include <asm/mach/arch.h> 34 33 #include <asm/mach/map.h> 35 34 #include <asm/setup.h> ··· 971 972 /* Maintainers: Kyungmin Park <kyungmin.park@samsung.com> */ 972 973 .atag_offset = 0x100, 973 974 .init_irq = s5pv210_init_irq, 974 - .handle_irq = vic_handle_irq, 975 975 .map_io = goni_map_io, 976 976 .init_machine = goni_machine_init, 977 977 .timer = &s5p_timer,
-2
arch/arm/mach-s5pv210/mach-smdkc110.c
··· 15 15 #include <linux/i2c.h> 16 16 #include <linux/device.h> 17 17 18 - #include <asm/hardware/vic.h> 19 18 #include <asm/mach/arch.h> 20 19 #include <asm/mach/map.h> 21 20 #include <asm/setup.h> ··· 151 152 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ 152 153 .atag_offset = 0x100, 153 154 .init_irq = s5pv210_init_irq, 154 - .handle_irq = vic_handle_irq, 155 155 .map_io = smdkc110_map_io, 156 156 .init_machine = smdkc110_machine_init, 157 157 .timer = &s5p_timer,
-2
arch/arm/mach-s5pv210/mach-smdkv210.c
··· 21 21 #include <linux/pwm_backlight.h> 22 22 #include <linux/platform_data/s3c-hsotg.h> 23 23 24 - #include <asm/hardware/vic.h> 25 24 #include <asm/mach/arch.h> 26 25 #include <asm/mach/map.h> 27 26 #include <asm/setup.h> ··· 327 328 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ 328 329 .atag_offset = 0x100, 329 330 .init_irq = s5pv210_init_irq, 330 - .handle_irq = vic_handle_irq, 331 331 .map_io = smdkv210_map_io, 332 332 .init_machine = smdkv210_machine_init, 333 333 .timer = &s5p_timer,
-2
arch/arm/mach-s5pv210/mach-torbreck.c
··· 14 14 #include <linux/init.h> 15 15 #include <linux/serial_core.h> 16 16 17 - #include <asm/hardware/vic.h> 18 17 #include <asm/mach/arch.h> 19 18 #include <asm/mach/map.h> 20 19 #include <asm/setup.h> ··· 128 129 /* Maintainer: Hyunchul Ko <ghcstop@gmail.com> */ 129 130 .atag_offset = 0x100, 130 131 .init_irq = s5pv210_init_irq, 131 - .handle_irq = vic_handle_irq, 132 132 .map_io = torbreck_map_io, 133 133 .init_machine = torbreck_machine_init, 134 134 .timer = &s5p_timer,
+1 -2
arch/arm/mach-shmobile/board-ag5evm.c
··· 40 40 #include <linux/mmc/sh_mobile_sdhi.h> 41 41 #include <linux/mfd/tmio.h> 42 42 #include <linux/sh_clk.h> 43 + #include <linux/irqchip/arm-gic.h> 43 44 #include <video/sh_mobile_lcdc.h> 44 45 #include <video/sh_mipi_dsi.h> 45 46 #include <sound/sh_fsi.h> ··· 50 49 #include <mach/common.h> 51 50 #include <asm/mach-types.h> 52 51 #include <asm/mach/arch.h> 53 - #include <asm/hardware/gic.h> 54 52 #include <asm/hardware/cache-l2x0.h> 55 53 #include <asm/traps.h> 56 54 ··· 668 668 .init_early = sh73a0_add_early_devices, 669 669 .nr_irqs = NR_IRQS_LEGACY, 670 670 .init_irq = sh73a0_init_irq, 671 - .handle_irq = gic_handle_irq, 672 671 .init_machine = ag5evm_init, 673 672 .init_late = shmobile_init_late, 674 673 .timer = &shmobile_timer,
+1 -2
arch/arm/mach-shmobile/board-kota2.c
··· 35 35 #include <linux/input/sh_keysc.h> 36 36 #include <linux/gpio_keys.h> 37 37 #include <linux/leds.h> 38 + #include <linux/irqchip/arm-gic.h> 38 39 #include <linux/platform_data/leds-renesas-tpu.h> 39 40 #include <linux/mmc/host.h> 40 41 #include <linux/mmc/sh_mmcif.h> ··· 48 47 #include <asm/mach-types.h> 49 48 #include <asm/mach/arch.h> 50 49 #include <asm/mach/time.h> 51 - #include <asm/hardware/gic.h> 52 50 #include <asm/hardware/cache-l2x0.h> 53 51 #include <asm/traps.h> 54 52 ··· 550 550 .init_early = sh73a0_add_early_devices, 551 551 .nr_irqs = NR_IRQS_LEGACY, 552 552 .init_irq = sh73a0_init_irq, 553 - .handle_irq = gic_handle_irq, 554 553 .init_machine = kota2_init, 555 554 .init_late = shmobile_init_late, 556 555 .timer = &shmobile_timer,
-2
arch/arm/mach-shmobile/board-kzm9d.c
··· 28 28 #include <mach/emev2.h> 29 29 #include <asm/mach-types.h> 30 30 #include <asm/mach/arch.h> 31 - #include <asm/hardware/gic.h> 32 31 33 32 /* Dummy supplies, where voltage doesn't matter */ 34 33 static struct regulator_consumer_supply dummy_supplies[] = { ··· 88 89 .init_early = emev2_add_early_devices, 89 90 .nr_irqs = NR_IRQS_LEGACY, 90 91 .init_irq = emev2_init_irq, 91 - .handle_irq = gic_handle_irq, 92 92 .init_machine = kzm9d_add_standard_devices, 93 93 .init_late = shmobile_init_late, 94 94 .timer = &shmobile_timer,
+1 -2
arch/arm/mach-shmobile/board-kzm9g.c
··· 25 25 #include <linux/i2c.h> 26 26 #include <linux/i2c/pcf857x.h> 27 27 #include <linux/input.h> 28 + #include <linux/irqchip/arm-gic.h> 28 29 #include <linux/mmc/host.h> 29 30 #include <linux/mmc/sh_mmcif.h> 30 31 #include <linux/mmc/sh_mobile_sdhi.h> ··· 43 42 #include <mach/sh73a0.h> 44 43 #include <mach/common.h> 45 44 #include <asm/hardware/cache-l2x0.h> 46 - #include <asm/hardware/gic.h> 47 45 #include <asm/mach-types.h> 48 46 #include <asm/mach/arch.h> 49 47 #include <video/sh_mobile_lcdc.h> ··· 792 792 .init_early = sh73a0_add_early_devices, 793 793 .nr_irqs = NR_IRQS_LEGACY, 794 794 .init_irq = sh73a0_init_irq, 795 - .handle_irq = gic_handle_irq, 796 795 .init_machine = kzm_init, 797 796 .init_late = shmobile_init_late, 798 797 .timer = &shmobile_timer,
-2
arch/arm/mach-shmobile/board-marzen.c
··· 44 44 #include <mach/irqs.h> 45 45 #include <asm/mach-types.h> 46 46 #include <asm/mach/arch.h> 47 - #include <asm/hardware/gic.h> 48 47 #include <asm/traps.h> 49 48 50 49 /* Fixed 3.3V regulator to be used by SDHI0 */ ··· 381 382 .init_early = r8a7779_add_early_devices, 382 383 .nr_irqs = NR_IRQS_LEGACY, 383 384 .init_irq = r8a7779_init_irq, 384 - .handle_irq = gic_handle_irq, 385 385 .init_machine = marzen_init, 386 386 .init_late = marzen_init_late, 387 387 .timer = &shmobile_timer,
+1 -1
arch/arm/mach-shmobile/intc-r8a7779.c
··· 22 22 #include <linux/interrupt.h> 23 23 #include <linux/irq.h> 24 24 #include <linux/io.h> 25 + #include <linux/irqchip/arm-gic.h> 25 26 #include <mach/common.h> 26 27 #include <mach/intc.h> 27 28 #include <mach/r8a7779.h> 28 - #include <asm/hardware/gic.h> 29 29 #include <asm/mach-types.h> 30 30 #include <asm/mach/arch.h> 31 31
+1 -1
arch/arm/mach-shmobile/intc-sh73a0.c
··· 23 23 #include <linux/irq.h> 24 24 #include <linux/io.h> 25 25 #include <linux/sh_intc.h> 26 + #include <linux/irqchip/arm-gic.h> 26 27 #include <mach/intc.h> 27 28 #include <mach/irqs.h> 28 29 #include <mach/sh73a0.h> 29 - #include <asm/hardware/gic.h> 30 30 #include <asm/mach-types.h> 31 31 #include <asm/mach/arch.h> 32 32
-3
arch/arm/mach-shmobile/platsmp.c
··· 12 12 */ 13 13 #include <linux/init.h> 14 14 #include <linux/smp.h> 15 - #include <asm/hardware/gic.h> 16 15 17 16 void __init shmobile_smp_init_cpus(unsigned int ncores) 18 17 { ··· 25 26 26 27 for (i = 0; i < ncores; i++) 27 28 set_cpu_possible(i, true); 28 - 29 - set_smp_cross_call(gic_raise_softirq); 30 29 }
+3 -14
arch/arm/mach-shmobile/setup-emev2.c
··· 20 20 #include <linux/init.h> 21 21 #include <linux/interrupt.h> 22 22 #include <linux/irq.h> 23 + #include <linux/irqchip.h> 23 24 #include <linux/platform_device.h> 24 25 #include <linux/platform_data/gpio-em.h> 25 26 #include <linux/of_platform.h> 26 27 #include <linux/delay.h> 27 28 #include <linux/input.h> 28 29 #include <linux/io.h> 29 - #include <linux/of_irq.h> 30 + #include <linux/irqchip/arm-gic.h> 30 31 #include <mach/hardware.h> 31 32 #include <mach/common.h> 32 33 #include <mach/emev2.h> ··· 36 35 #include <asm/mach/arch.h> 37 36 #include <asm/mach/map.h> 38 37 #include <asm/mach/time.h> 39 - #include <asm/hardware/gic.h> 40 38 41 39 static struct map_desc emev2_io_desc[] __initdata = { 42 40 #ifdef CONFIG_SMP ··· 445 445 emev2_auxdata_lookup, NULL); 446 446 } 447 447 448 - static const struct of_device_id emev2_dt_irq_match[] = { 449 - { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, 450 - {}, 451 - }; 452 - 453 448 static const char *emev2_boards_compat_dt[] __initdata = { 454 449 "renesas,emev2", 455 450 NULL, 456 451 }; 457 452 458 - void __init emev2_init_irq_dt(void) 459 - { 460 - of_irq_init(emev2_dt_irq_match); 461 - } 462 - 463 453 DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)") 464 454 .smp = smp_ops(emev2_smp_ops), 465 455 .init_early = emev2_init_delay, 466 456 .nr_irqs = NR_IRQS_LEGACY, 467 - .init_irq = emev2_init_irq_dt, 468 - .handle_irq = gic_handle_irq, 457 + .init_irq = irqchip_init, 469 458 .init_machine = emev2_add_standard_devices_dt, 470 459 .timer = &shmobile_timer, 471 460 .dt_compat = emev2_boards_compat_dt,
+2 -2
arch/arm/mach-shmobile/smp-emev2.c
··· 23 23 #include <linux/spinlock.h> 24 24 #include <linux/io.h> 25 25 #include <linux/delay.h> 26 + #include <linux/irqchip/arm-gic.h> 26 27 #include <mach/common.h> 27 28 #include <mach/emev2.h> 28 29 #include <asm/smp_plat.h> 29 30 #include <asm/smp_scu.h> 30 - #include <asm/hardware/gic.h> 31 31 #include <asm/cacheflush.h> 32 32 33 33 #define EMEV2_SCU_BASE 0x1e000000 ··· 100 100 /* Tell ROM loader about our vector (in headsmp.S) */ 101 101 emev2_set_boot_vector(__pa(shmobile_secondary_vector)); 102 102 103 - gic_raise_softirq(cpumask_of(cpu), 0); 103 + arch_send_wakeup_ipi_mask(cpumask_of(cpu)); 104 104 return 0; 105 105 } 106 106
+1 -1
arch/arm/mach-shmobile/smp-r8a7779.c
··· 23 23 #include <linux/spinlock.h> 24 24 #include <linux/io.h> 25 25 #include <linux/delay.h> 26 + #include <linux/irqchip/arm-gic.h> 26 27 #include <mach/common.h> 27 28 #include <mach/r8a7779.h> 28 29 #include <asm/smp_plat.h> 29 30 #include <asm/smp_scu.h> 30 31 #include <asm/smp_twd.h> 31 - #include <asm/hardware/gic.h> 32 32 33 33 #define AVECR IOMEM(0xfe700040) 34 34
+1 -1
arch/arm/mach-shmobile/smp-sh73a0.c
··· 23 23 #include <linux/spinlock.h> 24 24 #include <linux/io.h> 25 25 #include <linux/delay.h> 26 + #include <linux/irqchip/arm-gic.h> 26 27 #include <mach/common.h> 27 28 #include <asm/smp_plat.h> 28 29 #include <mach/sh73a0.h> 29 30 #include <asm/smp_scu.h> 30 31 #include <asm/smp_twd.h> 31 - #include <asm/hardware/gic.h> 32 32 33 33 #define WUPCR IOMEM(0xe6151010) 34 34 #define SRESCR IOMEM(0xe6151018)
+1 -3
arch/arm/mach-socfpga/platsmp.c
··· 22 22 #include <linux/io.h> 23 23 #include <linux/of.h> 24 24 #include <linux/of_address.h> 25 + #include <linux/irqchip/arm-gic.h> 25 26 26 27 #include <asm/cacheflush.h> 27 - #include <asm/hardware/gic.h> 28 28 #include <asm/smp_scu.h> 29 29 #include <asm/smp_plat.h> 30 30 ··· 83 83 84 84 for (i = 0; i < ncores; i++) 85 85 set_cpu_possible(i, true); 86 - 87 - set_smp_cross_call(gic_raise_softirq); 88 86 } 89 87 90 88 static void __init socfpga_smp_prepare_cpus(unsigned int max_cpus)
+4 -10
arch/arm/mach-socfpga/socfpga.c
··· 15 15 * along with this program. If not, see <http://www.gnu.org/licenses/>. 16 16 */ 17 17 #include <linux/dw_apb_timer.h> 18 + #include <linux/irqchip.h> 18 19 #include <linux/of_address.h> 19 20 #include <linux/of_irq.h> 20 21 #include <linux/of_platform.h> 21 22 22 23 #include <asm/hardware/cache-l2x0.h> 23 - #include <asm/hardware/gic.h> 24 24 #include <asm/mach/arch.h> 25 25 #include <asm/mach/map.h> 26 26 ··· 62 62 early_printk("Early printk initialized\n"); 63 63 } 64 64 65 - const static struct of_device_id irq_match[] = { 66 - { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, 67 - {} 68 - }; 69 - 70 65 void __init socfpga_sysmgr_init(void) 71 66 { 72 67 struct device_node *np; ··· 73 78 rst_manager_base_addr = of_iomap(np, 0); 74 79 } 75 80 76 - static void __init gic_init_irq(void) 81 + static void __init socfpga_init_irq(void) 77 82 { 78 - of_irq_init(irq_match); 83 + irqchip_init(); 79 84 socfpga_sysmgr_init(); 80 85 } 81 86 ··· 100 105 DT_MACHINE_START(SOCFPGA, "Altera SOCFPGA") 101 106 .smp = smp_ops(socfpga_smp_ops), 102 107 .map_io = socfpga_map_io, 103 - .init_irq = gic_init_irq, 104 - .handle_irq = gic_handle_irq, 108 + .init_irq = socfpga_init_irq, 105 109 .timer = &dw_apb_timer, 106 110 .init_machine = socfpga_cyclone5_init, 107 111 .restart = socfpga_cyclone5_restart,
-1
arch/arm/mach-spear13xx/include/mach/generic.h
··· 28 28 /* Add spear13xx family function declarations here */ 29 29 void __init spear_setup_of_timer(void); 30 30 void __init spear13xx_map_io(void); 31 - void __init spear13xx_dt_init_irq(void); 32 31 void __init spear13xx_l2x0_init(void); 33 32 bool dw_dma_filter(struct dma_chan *chan, void *slave); 34 33 void spear_restart(char, const char *);
+1 -3
arch/arm/mach-spear13xx/platsmp.c
··· 15 15 #include <linux/jiffies.h> 16 16 #include <linux/io.h> 17 17 #include <linux/smp.h> 18 + #include <linux/irqchip/arm-gic.h> 18 19 #include <asm/cacheflush.h> 19 - #include <asm/hardware/gic.h> 20 20 #include <asm/smp_scu.h> 21 21 #include <mach/spear.h> 22 22 #include <mach/generic.h> ··· 104 104 105 105 for (i = 0; i < ncores; i++) 106 106 set_cpu_possible(i, true); 107 - 108 - set_smp_cross_call(gic_raise_softirq); 109 107 } 110 108 111 109 static void __init spear13xx_smp_prepare_cpus(unsigned int max_cpus)
+2 -3
arch/arm/mach-spear13xx/spear1310.c
··· 14 14 #define pr_fmt(fmt) "SPEAr1310: " fmt 15 15 16 16 #include <linux/amba/pl022.h> 17 + #include <linux/irqchip.h> 17 18 #include <linux/of_platform.h> 18 19 #include <linux/pata_arasan_cf_data.h> 19 - #include <asm/hardware/gic.h> 20 20 #include <asm/mach/arch.h> 21 21 #include <asm/mach/map.h> 22 22 #include <mach/generic.h> ··· 90 90 DT_MACHINE_START(SPEAR1310_DT, "ST SPEAr1310 SoC with Flattened Device Tree") 91 91 .smp = smp_ops(spear13xx_smp_ops), 92 92 .map_io = spear1310_map_io, 93 - .init_irq = spear13xx_dt_init_irq, 94 - .handle_irq = gic_handle_irq, 93 + .init_irq = irqchip_init, 95 94 .timer = &spear13xx_timer, 96 95 .init_machine = spear1310_dt_init, 97 96 .restart = spear_restart,
+2 -3
arch/arm/mach-spear13xx/spear1340.c
··· 18 18 #include <linux/delay.h> 19 19 #include <linux/dw_dmac.h> 20 20 #include <linux/of_platform.h> 21 - #include <asm/hardware/gic.h> 21 + #include <linux/irqchip.h> 22 22 #include <asm/mach/arch.h> 23 23 #include <mach/dma.h> 24 24 #include <mach/generic.h> ··· 184 184 DT_MACHINE_START(SPEAR1340_DT, "ST SPEAr1340 SoC with Flattened Device Tree") 185 185 .smp = smp_ops(spear13xx_smp_ops), 186 186 .map_io = spear13xx_map_io, 187 - .init_irq = spear13xx_dt_init_irq, 188 - .handle_irq = gic_handle_irq, 187 + .init_irq = irqchip_init, 189 188 .timer = &spear13xx_timer, 190 189 .init_machine = spear1340_dt_init, 191 190 .restart = spear_restart,
+1 -12
arch/arm/mach-spear13xx/spear13xx.c
··· 17 17 #include <linux/clk.h> 18 18 #include <linux/dw_dmac.h> 19 19 #include <linux/err.h> 20 - #include <linux/of_irq.h> 20 + #include <linux/of.h> 21 21 #include <asm/hardware/cache-l2x0.h> 22 - #include <asm/hardware/gic.h> 23 22 #include <asm/mach/map.h> 24 23 #include <asm/smp_twd.h> 25 24 #include <mach/dma.h> ··· 185 186 struct sys_timer spear13xx_timer = { 186 187 .init = spear13xx_timer_init, 187 188 }; 188 - 189 - static const struct of_device_id gic_of_match[] __initconst = { 190 - { .compatible = "arm,cortex-a9-gic", .data = gic_of_init }, 191 - { /* Sentinel */ } 192 - }; 193 - 194 - void __init spear13xx_dt_init_irq(void) 195 - { 196 - of_irq_init(gic_of_match); 197 - }
-1
arch/arm/mach-spear3xx/include/mach/generic.h
··· 30 30 void __init spear_setup_of_timer(void); 31 31 void __init spear3xx_clk_init(void); 32 32 void __init spear3xx_map_io(void); 33 - void __init spear3xx_dt_init_irq(void); 34 33 35 34 void spear_restart(char, const char *); 36 35
+2 -3
arch/arm/mach-spear3xx/spear300.c
··· 14 14 #define pr_fmt(fmt) "SPEAr300: " fmt 15 15 16 16 #include <linux/amba/pl08x.h> 17 + #include <linux/irqchip.h> 17 18 #include <linux/of_platform.h> 18 - #include <asm/hardware/vic.h> 19 19 #include <asm/mach/arch.h> 20 20 #include <mach/generic.h> 21 21 #include <mach/spear.h> ··· 212 212 213 213 DT_MACHINE_START(SPEAR300_DT, "ST SPEAr300 SoC with Flattened Device Tree") 214 214 .map_io = spear300_map_io, 215 - .init_irq = spear3xx_dt_init_irq, 216 - .handle_irq = vic_handle_irq, 215 + .init_irq = irqchip_init, 217 216 .timer = &spear3xx_timer, 218 217 .init_machine = spear300_dt_init, 219 218 .restart = spear_restart,
+2 -3
arch/arm/mach-spear3xx/spear310.c
··· 15 15 16 16 #include <linux/amba/pl08x.h> 17 17 #include <linux/amba/serial.h> 18 + #include <linux/irqchip.h> 18 19 #include <linux/of_platform.h> 19 - #include <asm/hardware/vic.h> 20 20 #include <asm/mach/arch.h> 21 21 #include <mach/generic.h> 22 22 #include <mach/spear.h> ··· 254 254 255 255 DT_MACHINE_START(SPEAR310_DT, "ST SPEAr310 SoC with Flattened Device Tree") 256 256 .map_io = spear310_map_io, 257 - .init_irq = spear3xx_dt_init_irq, 258 - .handle_irq = vic_handle_irq, 257 + .init_irq = irqchip_init, 259 258 .timer = &spear3xx_timer, 260 259 .init_machine = spear310_dt_init, 261 260 .restart = spear_restart,
+2 -3
arch/arm/mach-spear3xx/spear320.c
··· 16 16 #include <linux/amba/pl022.h> 17 17 #include <linux/amba/pl08x.h> 18 18 #include <linux/amba/serial.h> 19 + #include <linux/irqchip.h> 19 20 #include <linux/of_platform.h> 20 - #include <asm/hardware/vic.h> 21 21 #include <asm/mach/arch.h> 22 22 #include <mach/generic.h> 23 23 #include <mach/spear.h> ··· 268 268 269 269 DT_MACHINE_START(SPEAR320_DT, "ST SPEAr320 SoC with Flattened Device Tree") 270 270 .map_io = spear320_map_io, 271 - .init_irq = spear3xx_dt_init_irq, 272 - .handle_irq = vic_handle_irq, 271 + .init_irq = irqchip_init, 273 272 .timer = &spear3xx_timer, 274 273 .init_machine = spear320_dt_init, 275 274 .restart = spear_restart,
-16
arch/arm/mach-spear3xx/spear3xx.c
··· 15 15 16 16 #include <linux/amba/pl022.h> 17 17 #include <linux/amba/pl08x.h> 18 - #include <linux/irqchip/spear-shirq.h> 19 - #include <linux/of_irq.h> 20 18 #include <linux/io.h> 21 19 #include <asm/hardware/pl080.h> 22 - #include <asm/hardware/vic.h> 23 20 #include <plat/pl080.h> 24 21 #include <mach/generic.h> 25 22 #include <mach/spear.h> ··· 116 119 struct sys_timer spear3xx_timer = { 117 120 .init = spear3xx_timer_init, 118 121 }; 119 - 120 - static const struct of_device_id vic_of_match[] __initconst = { 121 - { .compatible = "arm,pl190-vic", .data = vic_of_init, }, 122 - { .compatible = "st,spear300-shirq", .data = spear300_shirq_of_init, }, 123 - { .compatible = "st,spear310-shirq", .data = spear310_shirq_of_init, }, 124 - { .compatible = "st,spear320-shirq", .data = spear320_shirq_of_init, }, 125 - { /* Sentinel */ } 126 - }; 127 - 128 - void __init spear3xx_dt_init_irq(void) 129 - { 130 - of_irq_init(vic_of_match); 131 - }
+2 -14
arch/arm/mach-spear6xx/spear6xx.c
··· 16 16 #include <linux/amba/pl08x.h> 17 17 #include <linux/clk.h> 18 18 #include <linux/err.h> 19 + #include <linux/irqchip.h> 19 20 #include <linux/of.h> 20 21 #include <linux/of_address.h> 21 - #include <linux/of_irq.h> 22 22 #include <linux/of_platform.h> 23 23 #include <asm/hardware/pl080.h> 24 - #include <asm/hardware/vic.h> 25 24 #include <asm/mach/arch.h> 26 25 #include <asm/mach/time.h> 27 26 #include <asm/mach/map.h> ··· 424 425 NULL 425 426 }; 426 427 427 - static const struct of_device_id vic_of_match[] __initconst = { 428 - { .compatible = "arm,pl190-vic", .data = vic_of_init, }, 429 - { /* Sentinel */ } 430 - }; 431 - 432 - static void __init spear6xx_dt_init_irq(void) 433 - { 434 - of_irq_init(vic_of_match); 435 - } 436 - 437 428 DT_MACHINE_START(SPEAR600_DT, "ST SPEAr600 (Flattened Device Tree)") 438 429 .map_io = spear6xx_map_io, 439 - .init_irq = spear6xx_dt_init_irq, 440 - .handle_irq = vic_handle_irq, 430 + .init_irq = irqchip_init, 441 431 .timer = &spear6xx_timer, 442 432 .init_machine = spear600_dt_init, 443 433 .restart = spear_restart,
-2
arch/arm/mach-sunxi/sunxi.c
··· 21 21 22 22 #include <linux/irqchip/sunxi.h> 23 23 24 - #include <asm/hardware/vic.h> 25 - 26 24 #include <asm/mach/arch.h> 27 25 #include <asm/mach/map.h> 28 26
-3
arch/arm/mach-tegra/board-dt-tegra20.c
··· 25 25 #include <linux/of.h> 26 26 #include <linux/of_address.h> 27 27 #include <linux/of_fdt.h> 28 - #include <linux/of_irq.h> 29 28 #include <linux/of_platform.h> 30 29 #include <linux/pda_power.h> 31 30 #include <linux/platform_data/tegra_usb.h> ··· 33 34 #include <linux/i2c-tegra.h> 34 35 #include <linux/usb/tegra_usb_phy.h> 35 36 36 - #include <asm/hardware/gic.h> 37 37 #include <asm/mach-types.h> 38 38 #include <asm/mach/arch.h> 39 39 #include <asm/mach/time.h> ··· 200 202 .smp = smp_ops(tegra_smp_ops), 201 203 .init_early = tegra20_init_early, 202 204 .init_irq = tegra_dt_init_irq, 203 - .handle_irq = gic_handle_irq, 204 205 .timer = &tegra_sys_timer, 205 206 .init_machine = tegra_dt_init, 206 207 .init_late = tegra_dt_init_late,
-2
arch/arm/mach-tegra/board-dt-tegra30.c
··· 31 31 #include <linux/of_platform.h> 32 32 33 33 #include <asm/mach/arch.h> 34 - #include <asm/hardware/gic.h> 35 34 36 35 #include "board.h" 37 36 #include "clock.h" ··· 111 112 .map_io = tegra_map_common_io, 112 113 .init_early = tegra30_init_early, 113 114 .init_irq = tegra_dt_init_irq, 114 - .handle_irq = gic_handle_irq, 115 115 .timer = &tegra_sys_timer, 116 116 .init_machine = tegra30_dt_init, 117 117 .init_late = tegra_init_late,
+2 -8
arch/arm/mach-tegra/common.c
··· 21 21 #include <linux/io.h> 22 22 #include <linux/clk.h> 23 23 #include <linux/delay.h> 24 - #include <linux/of_irq.h> 24 + #include <linux/irqchip.h> 25 25 26 26 #include <asm/hardware/cache-l2x0.h> 27 - #include <asm/hardware/gic.h> 28 27 29 28 #include <mach/powergate.h> 30 29 ··· 56 57 }; 57 58 58 59 #ifdef CONFIG_OF 59 - static const struct of_device_id tegra_dt_irq_match[] __initconst = { 60 - { .compatible = "arm,cortex-a9-gic", .data = gic_of_init }, 61 - { } 62 - }; 63 - 64 60 void __init tegra_dt_init_irq(void) 65 61 { 66 62 tegra_init_irq(); 67 - of_irq_init(tegra_dt_irq_match); 63 + irqchip_init(); 68 64 } 69 65 #endif 70 66
+1 -2
arch/arm/mach-tegra/irq.c
··· 22 22 #include <linux/irq.h> 23 23 #include <linux/io.h> 24 24 #include <linux/of.h> 25 - 26 - #include <asm/hardware/gic.h> 25 + #include <linux/irqchip/arm-gic.h> 27 26 28 27 #include "board.h" 29 28 #include "iomap.h"
+1 -3
arch/arm/mach-tegra/platsmp.c
··· 18 18 #include <linux/jiffies.h> 19 19 #include <linux/smp.h> 20 20 #include <linux/io.h> 21 + #include <linux/irqchip/arm-gic.h> 21 22 22 23 #include <asm/cacheflush.h> 23 - #include <asm/hardware/gic.h> 24 24 #include <asm/mach-types.h> 25 25 #include <asm/smp_scu.h> 26 26 ··· 159 159 160 160 for (i = 0; i < ncores; i++) 161 161 set_cpu_possible(i, true); 162 - 163 - set_smp_cross_call(gic_raise_softirq); 164 162 } 165 163 166 164 static void __init tegra_smp_prepare_cpus(unsigned int max_cpus)
+1 -2
arch/arm/mach-u300/core.c
··· 31 31 #include <linux/dma-mapping.h> 32 32 #include <linux/platform_data/clk-u300.h> 33 33 #include <linux/platform_data/pinctrl-coh901.h> 34 + #include <linux/irqchip/arm-vic.h> 34 35 35 36 #include <asm/types.h> 36 37 #include <asm/setup.h> 37 38 #include <asm/memory.h> 38 - #include <asm/hardware/vic.h> 39 39 #include <asm/mach/map.h> 40 40 #include <asm/mach-types.h> 41 41 #include <asm/mach/arch.h> ··· 1779 1779 .map_io = u300_map_io, 1780 1780 .nr_irqs = 0, 1781 1781 .init_irq = u300_init_irq, 1782 - .handle_irq = vic_handle_irq, 1783 1782 .timer = &u300_timer, 1784 1783 .init_machine = u300_init_machine, 1785 1784 .restart = u300_restart,
-5
arch/arm/mach-ux500/board-mop500.c
··· 40 40 41 41 #include <asm/mach-types.h> 42 42 #include <asm/mach/arch.h> 43 - #include <asm/hardware/gic.h> 44 43 45 44 #include <mach/hardware.h> 46 45 #include <mach/setup.h> ··· 751 752 .init_irq = ux500_init_irq, 752 753 /* we re-use nomadik timer here */ 753 754 .timer = &ux500_timer, 754 - .handle_irq = gic_handle_irq, 755 755 .init_machine = mop500_init_machine, 756 756 .init_late = ux500_init_late, 757 757 MACHINE_END ··· 760 762 .map_io = u8500_map_io, 761 763 .init_irq = ux500_init_irq, 762 764 .timer = &ux500_timer, 763 - .handle_irq = gic_handle_irq, 764 765 .init_machine = mop500_init_machine, 765 766 .init_late = ux500_init_late, 766 767 MACHINE_END ··· 770 773 .map_io = u8500_map_io, 771 774 .init_irq = ux500_init_irq, 772 775 .timer = &ux500_timer, 773 - .handle_irq = gic_handle_irq, 774 776 .init_machine = hrefv60_init_machine, 775 777 .init_late = ux500_init_late, 776 778 MACHINE_END ··· 781 785 .init_irq = ux500_init_irq, 782 786 /* we re-use nomadik timer here */ 783 787 .timer = &ux500_timer, 784 - .handle_irq = gic_handle_irq, 785 788 .init_machine = snowball_init_machine, 786 789 .init_late = NULL, 787 790 MACHINE_END
-2
arch/arm/mach-ux500/cpu-db8500.c
··· 27 27 #include <asm/pmu.h> 28 28 #include <asm/mach/map.h> 29 29 #include <asm/mach/arch.h> 30 - #include <asm/hardware/gic.h> 31 30 32 31 #include <mach/hardware.h> 33 32 #include <mach/setup.h> ··· 341 342 .init_irq = ux500_init_irq, 342 343 /* we re-use nomadik timer here */ 343 344 .timer = &ux500_timer, 344 - .handle_irq = gic_handle_irq, 345 345 .init_machine = u8500_init_machine, 346 346 .init_late = NULL, 347 347 .dt_compat = stericsson_dt_platform_compat,
+3 -7
arch/arm/mach-ux500/cpu.c
··· 17 17 #include <linux/of.h> 18 18 #include <linux/of_irq.h> 19 19 #include <linux/irq.h> 20 + #include <linux/irqchip.h> 21 + #include <linux/irqchip/arm-gic.h> 20 22 #include <linux/platform_data/clk-ux500.h> 21 23 22 - #include <asm/hardware/gic.h> 23 24 #include <asm/mach/map.h> 24 25 25 26 #include <mach/hardware.h> ··· 43 42 * This feels fragile because it depends on the gpio device getting probed 44 43 * _before_ any device uses the gpio interrupts. 45 44 */ 46 - static const struct of_device_id ux500_dt_irq_match[] = { 47 - { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, 48 - {}, 49 - }; 50 - 51 45 void __init ux500_init_irq(void) 52 46 { 53 47 void __iomem *dist_base; ··· 58 62 59 63 #ifdef CONFIG_OF 60 64 if (of_have_populated_dt()) 61 - of_irq_init(ux500_dt_irq_match); 65 + irqchip_init(); 62 66 else 63 67 #endif 64 68 gic_init(0, 29, dist_base, cpu_base);
+2 -4
arch/arm/mach-ux500/platsmp.c
··· 16 16 #include <linux/device.h> 17 17 #include <linux/smp.h> 18 18 #include <linux/io.h> 19 + #include <linux/irqchip/arm-gic.h> 19 20 20 21 #include <asm/cacheflush.h> 21 - #include <asm/hardware/gic.h> 22 22 #include <asm/smp_plat.h> 23 23 #include <asm/smp_scu.h> 24 24 #include <mach/hardware.h> ··· 91 91 */ 92 92 write_pen_release(cpu_logical_map(cpu)); 93 93 94 - smp_send_reschedule(cpu); 94 + arch_send_wakeup_ipi_mask(cpumask_of(cpu)); 95 95 96 96 timeout = jiffies + (1 * HZ); 97 97 while (time_before(jiffies, timeout)) { ··· 155 155 156 156 for (i = 0; i < ncores; i++) 157 157 set_cpu_possible(i, true); 158 - 159 - set_smp_cross_call(gic_raise_softirq); 160 158 } 161 159 162 160 static void __init ux500_smp_prepare_cpus(unsigned int max_cpus)
+1 -1
arch/arm/mach-versatile/core.c
··· 32 32 #include <linux/amba/mmci.h> 33 33 #include <linux/amba/pl022.h> 34 34 #include <linux/io.h> 35 + #include <linux/irqchip/arm-vic.h> 35 36 #include <linux/irqchip/versatile-fpga.h> 36 37 #include <linux/gfp.h> 37 38 #include <linux/clkdev.h> ··· 41 40 #include <asm/irq.h> 42 41 #include <asm/hardware/arm_timer.h> 43 42 #include <asm/hardware/icst.h> 44 - #include <asm/hardware/vic.h> 45 43 #include <asm/mach-types.h> 46 44 47 45 #include <asm/mach/arch.h>
-2
arch/arm/mach-versatile/versatile_ab.c
··· 26 26 27 27 #include <mach/hardware.h> 28 28 #include <asm/irq.h> 29 - #include <asm/hardware/vic.h> 30 29 #include <asm/mach-types.h> 31 30 32 31 #include <asm/mach/arch.h> ··· 38 39 .map_io = versatile_map_io, 39 40 .init_early = versatile_init_early, 40 41 .init_irq = versatile_init_irq, 41 - .handle_irq = vic_handle_irq, 42 42 .timer = &versatile_timer, 43 43 .init_machine = versatile_init, 44 44 .restart = versatile_restart,
-2
arch/arm/mach-versatile/versatile_dt.c
··· 24 24 #include <linux/init.h> 25 25 #include <linux/of_irq.h> 26 26 #include <linux/of_platform.h> 27 - #include <asm/hardware/vic.h> 28 27 #include <asm/mach-types.h> 29 28 #include <asm/mach/arch.h> 30 29 ··· 45 46 .map_io = versatile_map_io, 46 47 .init_early = versatile_init_early, 47 48 .init_irq = versatile_init_irq, 48 - .handle_irq = vic_handle_irq, 49 49 .timer = &versatile_timer, 50 50 .init_machine = versatile_dt_init, 51 51 .dt_compat = versatile_dt_match,
-2
arch/arm/mach-versatile/versatile_pb.c
··· 27 27 #include <linux/io.h> 28 28 29 29 #include <mach/hardware.h> 30 - #include <asm/hardware/vic.h> 31 30 #include <asm/irq.h> 32 31 #include <asm/mach-types.h> 33 32 ··· 106 107 .map_io = versatile_map_io, 107 108 .init_early = versatile_init_early, 108 109 .init_irq = versatile_init_irq, 109 - .handle_irq = vic_handle_irq, 110 110 .timer = &versatile_timer, 111 111 .init_machine = versatile_pb_init, 112 112 .restart = versatile_restart,
+1 -3
arch/arm/mach-vexpress/ct-ca9x4.c
··· 10 10 #include <linux/amba/clcd.h> 11 11 #include <linux/clkdev.h> 12 12 #include <linux/vexpress.h> 13 + #include <linux/irqchip/arm-gic.h> 13 14 14 15 #include <asm/hardware/arm_timer.h> 15 16 #include <asm/hardware/cache-l2x0.h> 16 - #include <asm/hardware/gic.h> 17 17 #include <asm/smp_scu.h> 18 18 #include <asm/smp_twd.h> 19 19 ··· 182 182 183 183 for (i = 0; i < ncores; ++i) 184 184 set_cpu_possible(i, true); 185 - 186 - set_smp_cross_call(gic_raise_softirq); 187 185 } 188 186 189 187 static void __init ct_ca9x4_smp_enable(unsigned int max_cpus)
-3
arch/arm/mach-vexpress/platsmp.c
··· 16 16 #include <linux/vexpress.h> 17 17 18 18 #include <asm/smp_scu.h> 19 - #include <asm/hardware/gic.h> 20 19 #include <asm/mach/map.h> 21 20 22 21 #include <mach/motherboard.h> ··· 127 128 128 129 for (i = 0; i < ncores; ++i) 129 130 set_cpu_possible(i, true); 130 - 131 - set_smp_cross_call(gic_raise_softirq); 132 131 } 133 132 134 133 static void __init vexpress_dt_smp_prepare_cpus(unsigned int max_cpus)
+2 -14
arch/arm/mach-vexpress/v2m.c
··· 7 7 #include <linux/io.h> 8 8 #include <linux/smp.h> 9 9 #include <linux/init.h> 10 + #include <linux/irqchip.h> 10 11 #include <linux/of_address.h> 11 12 #include <linux/of_fdt.h> 12 13 #include <linux/of_irq.h> ··· 31 30 #include <asm/mach/time.h> 32 31 #include <asm/hardware/arm_timer.h> 33 32 #include <asm/hardware/cache-l2x0.h> 34 - #include <asm/hardware/gic.h> 35 33 #include <asm/hardware/timer-sp.h> 36 34 37 35 #include <mach/ct-ca9x4.h> ··· 377 377 .init_early = v2m_init_early, 378 378 .init_irq = v2m_init_irq, 379 379 .timer = &v2m_timer, 380 - .handle_irq = gic_handle_irq, 381 380 .init_machine = v2m_init, 382 381 .restart = vexpress_restart, 383 382 MACHINE_END ··· 433 434 } 434 435 } 435 436 436 - static struct of_device_id vexpress_irq_match[] __initdata = { 437 - { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, 438 - {} 439 - }; 440 - 441 - static void __init v2m_dt_init_irq(void) 442 - { 443 - of_irq_init(vexpress_irq_match); 444 - } 445 - 446 437 static void __init v2m_dt_timer_init(void) 447 438 { 448 439 struct device_node *node = NULL; ··· 486 497 .smp = smp_ops(vexpress_smp_ops), 487 498 .map_io = v2m_dt_map_io, 488 499 .init_early = v2m_dt_init_early, 489 - .init_irq = v2m_dt_init_irq, 500 + .init_irq = irqchip_init, 490 501 .timer = &v2m_dt_timer, 491 502 .init_machine = v2m_dt_init, 492 - .handle_irq = gic_handle_irq, 493 503 .restart = vexpress_restart, 494 504 MACHINE_END
+1 -16
arch/arm/mach-zynq/common.c
··· 31 31 #include <asm/mach-types.h> 32 32 #include <asm/page.h> 33 33 #include <asm/pgtable.h> 34 - #include <asm/hardware/gic.h> 35 34 #include <asm/hardware/cache-l2x0.h> 36 35 37 36 #include "common.h" ··· 52 53 l2x0_of_init(0x02060000, 0xF0F0FFFF); 53 54 54 55 of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL); 55 - } 56 - 57 - static struct of_device_id irq_match[] __initdata = { 58 - { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, 59 - { } 60 - }; 61 - 62 - /** 63 - * xilinx_irq_init() - Interrupt controller initialization for the GIC. 64 - */ 65 - static void __init xilinx_irq_init(void) 66 - { 67 - of_irq_init(irq_match); 68 56 } 69 57 70 58 #define SCU_PERIPH_PHYS 0xF8F00000 ··· 103 117 104 118 MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform") 105 119 .map_io = xilinx_map_io, 106 - .init_irq = xilinx_irq_init, 107 - .handle_irq = gic_handle_irq, 120 + .init_irq = irqchip_init, 108 121 .init_machine = xilinx_init_machine, 109 122 .timer = &xttcpss_sys_timer, 110 123 .dt_compat = xilinx_dt_match,
+1 -2
arch/arm/plat-samsung/s5p-irq-eint.c
··· 15 15 #include <linux/io.h> 16 16 #include <linux/device.h> 17 17 #include <linux/gpio.h> 18 - 19 - #include <asm/hardware/vic.h> 18 + #include <linux/irqchip/arm-vic.h> 20 19 21 20 #include <plat/regs-irqtype.h> 22 21
+1 -2
arch/arm/plat-samsung/s5p-irq.c
··· 13 13 #include <linux/interrupt.h> 14 14 #include <linux/irq.h> 15 15 #include <linux/io.h> 16 - 17 - #include <asm/hardware/vic.h> 16 + #include <linux/irqchip/arm-vic.h> 18 17 19 18 #include <mach/map.h> 20 19 #include <plat/regs-timer.h>
+2 -2
arch/arm/plat-versatile/platsmp.c
··· 14 14 #include <linux/device.h> 15 15 #include <linux/jiffies.h> 16 16 #include <linux/smp.h> 17 + #include <linux/irqchip/arm-gic.h> 17 18 18 19 #include <asm/cacheflush.h> 19 20 #include <asm/smp_plat.h> 20 - #include <asm/hardware/gic.h> 21 21 22 22 /* 23 23 * Write pen_release in a way that is guaranteed to be visible to all ··· 79 79 * the boot monitor to read the system wide flags register, 80 80 * and branch to the address found there. 81 81 */ 82 - gic_raise_softirq(cpumask_of(cpu), 0); 82 + arch_send_wakeup_ipi_mask(cpumask_of(cpu)); 83 83 84 84 timeout = jiffies + (1 * HZ); 85 85 while (time_before(jiffies, timeout)) {
+27
drivers/irqchip/Kconfig
··· 1 + config IRQCHIP 2 + def_bool y 3 + depends on OF_IRQ 4 + 5 + config ARM_GIC 6 + bool 7 + select IRQ_DOMAIN 8 + select MULTI_IRQ_HANDLER 9 + 10 + config GIC_NON_BANKED 11 + bool 12 + 13 + config ARM_VIC 14 + bool 15 + select IRQ_DOMAIN 16 + select MULTI_IRQ_HANDLER 17 + 18 + config ARM_VIC_NR 19 + int 20 + default 4 if ARCH_S5PV210 21 + default 3 if ARCH_S5PC100 22 + default 2 23 + depends on ARM_VIC 24 + help 25 + The maximum number of VICs available in the system, for 26 + power management. 27 + 1 28 config VERSATILE_FPGA_IRQ 2 29 bool 3 30 select IRQ_DOMAIN
+5 -1
drivers/irqchip/Makefile
··· 1 + obj-$(CONFIG_IRQCHIP) += irqchip.o 2 + 1 3 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o 2 4 obj-$(CONFIG_ARCH_SUNXI) += irq-sunxi.o 3 - obj-$(CONFIG_VERSATILE_FPGA_IRQ) += irq-versatile-fpga.o 4 5 obj-$(CONFIG_ARCH_SPEAR3XX) += spear-shirq.o 6 + obj-$(CONFIG_ARM_GIC) += irq-gic.o 7 + obj-$(CONFIG_ARM_VIC) += irq-vic.o 8 + obj-$(CONFIG_VERSATILE_FPGA_IRQ) += irq-versatile-fpga.o
+30
drivers/irqchip/irqchip.c
··· 1 + /* 2 + * Copyright (C) 2012 Thomas Petazzoni 3 + * 4 + * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 5 + * 6 + * This file is licensed under the terms of the GNU General Public 7 + * License version 2. This program is licensed "as is" without any 8 + * warranty of any kind, whether express or implied. 9 + */ 10 + 11 + #include <linux/init.h> 12 + #include <linux/of_irq.h> 13 + 14 + #include "irqchip.h" 15 + 16 + /* 17 + * This special of_device_id is the sentinel at the end of the 18 + * of_device_id[] array of all irqchips. It is automatically placed at 19 + * the end of the array by the linker, thanks to being part of a 20 + * special section. 21 + */ 22 + static const struct of_device_id 23 + irqchip_of_match_end __used __section(__irqchip_of_end); 24 + 25 + extern struct of_device_id __irqchip_begin[]; 26 + 27 + void __init irqchip_init(void) 28 + { 29 + of_irq_init(__irqchip_begin); 30 + }
+29
drivers/irqchip/irqchip.h
··· 1 + /* 2 + * Copyright (C) 2012 Thomas Petazzoni 3 + * 4 + * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 5 + * 6 + * This file is licensed under the terms of the GNU General Public 7 + * License version 2. This program is licensed "as is" without any 8 + * warranty of any kind, whether express or implied. 9 + */ 10 + 11 + #ifndef _IRQCHIP_H 12 + #define _IRQCHIP_H 13 + 14 + /* 15 + * This macro must be used by the different irqchip drivers to declare 16 + * the association between their DT compatible string and their 17 + * initialization function. 18 + * 19 + * @name: name that must be unique accross all IRQCHIP_DECLARE of the 20 + * same file. 21 + * @compstr: compatible string of the irqchip driver 22 + * @fn: initialization function 23 + */ 24 + #define IRQCHIP_DECLARE(name,compstr,fn) \ 25 + static const struct of_device_id irqchip_of_match_##name \ 26 + __used __section(__irqchip_of_table) \ 27 + = { .compatible = compstr, .data = fn } 28 + 29 + #endif
+5
drivers/irqchip/spear-shirq.c
··· 25 25 #include <linux/of_irq.h> 26 26 #include <linux/spinlock.h> 27 27 28 + #include "irqchip.h" 29 + 28 30 static DEFINE_SPINLOCK(lock); 29 31 30 32 /* spear300 shared irq registers offsets and masks */ ··· 302 300 return shirq_init(spear300_shirq_blocks, 303 301 ARRAY_SIZE(spear300_shirq_blocks), np); 304 302 } 303 + IRQCHIP_DECLARE(spear300_shirq, "st,spear300-shirq", spear300_shirq_of_init); 305 304 306 305 int __init spear310_shirq_of_init(struct device_node *np, 307 306 struct device_node *parent) ··· 310 307 return shirq_init(spear310_shirq_blocks, 311 308 ARRAY_SIZE(spear310_shirq_blocks), np); 312 309 } 310 + IRQCHIP_DECLARE(spear310_shirq, "st,spear310-shirq", spear310_shirq_of_init); 313 311 314 312 int __init spear320_shirq_of_init(struct device_node *np, 315 313 struct device_node *parent) ··· 318 314 return shirq_init(spear320_shirq_blocks, 319 315 ARRAY_SIZE(spear320_shirq_blocks), np); 320 316 } 317 + IRQCHIP_DECLARE(spear320_shirq, "st,spear320-shirq", spear320_shirq_of_init);
+1 -1
drivers/mfd/db8500-prcmu.c
··· 26 26 #include <linux/fs.h> 27 27 #include <linux/platform_device.h> 28 28 #include <linux/uaccess.h> 29 + #include <linux/irqchip/arm-gic.h> 29 30 #include <linux/mfd/core.h> 30 31 #include <linux/mfd/dbx500-prcmu.h> 31 32 #include <linux/mfd/abx500/ab8500.h> 32 33 #include <linux/regulator/db8500-prcmu.h> 33 34 #include <linux/regulator/machine.h> 34 35 #include <linux/cpufreq.h> 35 - #include <asm/hardware/gic.h> 36 36 #include <mach/hardware.h> 37 37 #include <mach/irqs.h> 38 38 #include <mach/db8500-regs.h>
+11 -1
include/asm-generic/vmlinux.lds.h
··· 149 149 #define TRACE_SYSCALLS() 150 150 #endif 151 151 152 + #ifdef CONFIG_IRQCHIP 153 + #define IRQCHIP_OF_MATCH_TABLE() \ 154 + . = ALIGN(8); \ 155 + VMLINUX_SYMBOL(__irqchip_begin) = .; \ 156 + *(__irqchip_of_table) \ 157 + *(__irqchip_of_end) 158 + #else 159 + #define IRQCHIP_OF_MATCH_TABLE() 160 + #endif 152 161 153 162 #define KERNEL_DTB() \ 154 163 STRUCT_ALIGN(); \ ··· 502 493 DEV_DISCARD(init.rodata) \ 503 494 CPU_DISCARD(init.rodata) \ 504 495 MEM_DISCARD(init.rodata) \ 505 - KERNEL_DTB() 496 + KERNEL_DTB() \ 497 + IRQCHIP_OF_MATCH_TABLE() 506 498 507 499 #define INIT_TEXT \ 508 500 *(.init.text) \
+16
include/linux/irqchip.h
··· 1 + /* 2 + * Copyright (C) 2012 Thomas Petazzoni 3 + * 4 + * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 5 + * 6 + * This file is licensed under the terms of the GNU General Public 7 + * License version 2. This program is licensed "as is" without any 8 + * warranty of any kind, whether express or implied. 9 + */ 10 + 11 + #ifndef _LINUX_IRQCHIP_H 12 + #define _LINUX_IRQCHIP_H 13 + 14 + void irqchip_init(void); 15 + 16 + #endif