···15851585 }15861586 }1587158715881588- if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {15881588+ if (unlikely(test_bit(IGC_RING_FLAG_TX_HWTSTAMP, &tx_ring->flags) &&15891589+ skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {15891590 /* FIXME: add support for retrieving timestamps from15901591 * the other timer registers before skipping the15911592 * timestamping request.15921593 */15931593- if (adapter->tstamp_config.tx_type == HWTSTAMP_TX_ON &&15941594- !test_and_set_bit_lock(__IGC_PTP_TX_IN_PROGRESS,15951595- &adapter->state)) {15941594+ unsigned long flags;15951595+15961596+ spin_lock_irqsave(&adapter->ptp_tx_lock, flags);15971597+ if (!adapter->ptp_tx_skb) {15961598 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;15971599 tx_flags |= IGC_TX_FLAGS_TSTAMP;15981600···16031601 } else {16041602 adapter->tx_hwtstamp_skipped++;16051603 }16041604+16051605+ spin_unlock_irqrestore(&adapter->ptp_tx_lock, flags);16061606 }1607160716081608 if (skb_vlan_tag_present(skb)) {···5268526452695265 if (tsicr & IGC_TSICR_TXTS) {52705266 /* retrieve hardware timestamp */52715271- schedule_work(&adapter->ptp_tx_work);52675267+ igc_ptp_tx_tstamp_event(adapter);52725268 ack |= IGC_TSICR_TXTS;52735269 }52745270
+102-40
drivers/net/ethernet/intel/igc/igc_ptp.c
···536536 wr32(IGC_TSYNCRXCTL, val);537537}538538539539+static void igc_ptp_clear_tx_tstamp(struct igc_adapter *adapter)540540+{541541+ unsigned long flags;542542+543543+ spin_lock_irqsave(&adapter->ptp_tx_lock, flags);544544+545545+ dev_kfree_skb_any(adapter->ptp_tx_skb);546546+ adapter->ptp_tx_skb = NULL;547547+548548+ spin_unlock_irqrestore(&adapter->ptp_tx_lock, flags);549549+}550550+539551static void igc_ptp_disable_tx_timestamp(struct igc_adapter *adapter)540552{541553 struct igc_hw *hw = &adapter->hw;554554+ int i;555555+556556+ /* Clear the flags first to avoid new packets to be enqueued557557+ * for TX timestamping.558558+ */559559+ for (i = 0; i < adapter->num_tx_queues; i++) {560560+ struct igc_ring *tx_ring = adapter->tx_ring[i];561561+562562+ clear_bit(IGC_RING_FLAG_TX_HWTSTAMP, &tx_ring->flags);563563+ }564564+565565+ /* Now we can clean the pending TX timestamp requests. */566566+ igc_ptp_clear_tx_tstamp(adapter);542567543568 wr32(IGC_TSYNCTXCTL, 0);544569}···571546static void igc_ptp_enable_tx_timestamp(struct igc_adapter *adapter)572547{573548 struct igc_hw *hw = &adapter->hw;549549+ int i;574550575551 wr32(IGC_TSYNCTXCTL, IGC_TSYNCTXCTL_ENABLED | IGC_TSYNCTXCTL_TXSYNSIG);576552577553 /* Read TXSTMP registers to discard any timestamp previously stored. */578554 rd32(IGC_TXSTMPL);579555 rd32(IGC_TXSTMPH);556556+557557+ /* The hardware is ready to accept TX timestamp requests,558558+ * notify the transmit path.559559+ */560560+ for (i = 0; i < adapter->num_tx_queues; i++) {561561+ struct igc_ring *tx_ring = adapter->tx_ring[i];562562+563563+ set_bit(IGC_RING_FLAG_TX_HWTSTAMP, &tx_ring->flags);564564+ }565565+580566}581567582568/**···639603 return 0;640604}641605606606+/* Requires adapter->ptp_tx_lock held by caller. */642607static void igc_ptp_tx_timeout(struct igc_adapter *adapter)643608{644609 struct igc_hw *hw = &adapter->hw;···647610 dev_kfree_skb_any(adapter->ptp_tx_skb);648611 adapter->ptp_tx_skb = NULL;649612 adapter->tx_hwtstamp_timeouts++;650650- clear_bit_unlock(__IGC_PTP_TX_IN_PROGRESS, &adapter->state);651613 /* Clear the tx valid bit in TSYNCTXCTL register to enable interrupt. */652614 rd32(IGC_TXSTMPH);653615 netdev_warn(adapter->netdev, "Tx timestamp timeout\n");···654618655619void igc_ptp_tx_hang(struct igc_adapter *adapter)656620{657657- bool timeout = time_is_before_jiffies(adapter->ptp_tx_start +658658- IGC_PTP_TX_TIMEOUT);621621+ unsigned long flags;659622660660- if (!test_bit(__IGC_PTP_TX_IN_PROGRESS, &adapter->state))661661- return;623623+ spin_lock_irqsave(&adapter->ptp_tx_lock, flags);662624663663- /* If we haven't received a timestamp within the timeout, it is664664- * reasonable to assume that it will never occur, so we can unlock the665665- * timestamp bit when this occurs.666666- */667667- if (timeout) {668668- cancel_work_sync(&adapter->ptp_tx_work);669669- igc_ptp_tx_timeout(adapter);670670- }625625+ if (!adapter->ptp_tx_skb)626626+ goto unlock;627627+628628+ if (time_is_after_jiffies(adapter->ptp_tx_start + IGC_PTP_TX_TIMEOUT))629629+ goto unlock;630630+631631+ igc_ptp_tx_timeout(adapter);632632+633633+unlock:634634+ spin_unlock_irqrestore(&adapter->ptp_tx_lock, flags);671635}672636673637/**···677641 * If we were asked to do hardware stamping and such a time stamp is678642 * available, then it must have been for this skb here because we only679643 * allow only one such packet into the queue.644644+ *645645+ * Context: Expects adapter->ptp_tx_lock to be held by caller.680646 */681647static void igc_ptp_tx_hwtstamp(struct igc_adapter *adapter)682648{683649 struct sk_buff *skb = adapter->ptp_tx_skb;684650 struct skb_shared_hwtstamps shhwtstamps;685651 struct igc_hw *hw = &adapter->hw;652652+ u32 tsynctxctl;686653 int adjust = 0;687654 u64 regval;688655689656 if (WARN_ON_ONCE(!skb))690657 return;691658692692- regval = rd32(IGC_TXSTMPL);693693- regval |= (u64)rd32(IGC_TXSTMPH) << 32;659659+ tsynctxctl = rd32(IGC_TSYNCTXCTL);660660+ tsynctxctl &= IGC_TSYNCTXCTL_TXTT_0;661661+ if (tsynctxctl) {662662+ regval = rd32(IGC_TXSTMPL);663663+ regval |= (u64)rd32(IGC_TXSTMPH) << 32;664664+ } else {665665+ /* There's a bug in the hardware that could cause666666+ * missing interrupts for TX timestamping. The issue667667+ * is that for new interrupts to be triggered, the668668+ * IGC_TXSTMPH_0 register must be read.669669+ *670670+ * To avoid discarding a valid timestamp that just671671+ * happened at the "wrong" time, we need to confirm672672+ * that there was no timestamp captured, we do that by673673+ * assuming that no two timestamps in sequence have674674+ * the same nanosecond value.675675+ *676676+ * So, we read the "low" register, read the "high"677677+ * register (to latch a new timestamp) and read the678678+ * "low" register again, if "old" and "new" versions679679+ * of the "low" register are different, a valid680680+ * timestamp was captured, we can read the "high"681681+ * register again.682682+ */683683+ u32 txstmpl_old, txstmpl_new;684684+685685+ txstmpl_old = rd32(IGC_TXSTMPL);686686+ rd32(IGC_TXSTMPH);687687+ txstmpl_new = rd32(IGC_TXSTMPL);688688+689689+ if (txstmpl_old == txstmpl_new)690690+ return;691691+692692+ regval = txstmpl_new;693693+ regval |= (u64)rd32(IGC_TXSTMPH) << 32;694694+ }694695 if (igc_ptp_systim_to_hwtstamp(adapter, &shhwtstamps, regval))695696 return;696697···749676 shhwtstamps.hwtstamp =750677 ktime_add_ns(shhwtstamps.hwtstamp, adjust);751678752752- /* Clear the lock early before calling skb_tstamp_tx so that753753- * applications are not woken up before the lock bit is clear. We use754754- * a copy of the skb pointer to ensure other threads can't change it755755- * while we're notifying the stack.756756- */757679 adapter->ptp_tx_skb = NULL;758758- clear_bit_unlock(__IGC_PTP_TX_IN_PROGRESS, &adapter->state);759680760681 /* Notify the stack and free the skb after we've unlocked */761682 skb_tstamp_tx(skb, &shhwtstamps);···757690}758691759692/**760760- * igc_ptp_tx_work761761- * @work: pointer to work struct693693+ * igc_ptp_tx_tstamp_event694694+ * @adapter: board private structure762695 *763763- * This work function polls the TSYNCTXCTL valid bit to determine when a764764- * timestamp has been taken for the current stored skb.696696+ * Called when a TX timestamp interrupt happens to retrieve the697697+ * timestamp and send it up to the socket.765698 */766766-static void igc_ptp_tx_work(struct work_struct *work)699699+void igc_ptp_tx_tstamp_event(struct igc_adapter *adapter)767700{768768- struct igc_adapter *adapter = container_of(work, struct igc_adapter,769769- ptp_tx_work);770770- struct igc_hw *hw = &adapter->hw;771771- u32 tsynctxctl;701701+ unsigned long flags;772702773773- if (!test_bit(__IGC_PTP_TX_IN_PROGRESS, &adapter->state))774774- return;703703+ spin_lock_irqsave(&adapter->ptp_tx_lock, flags);775704776776- tsynctxctl = rd32(IGC_TSYNCTXCTL);777777- if (WARN_ON_ONCE(!(tsynctxctl & IGC_TSYNCTXCTL_TXTT_0)))778778- return;705705+ if (!adapter->ptp_tx_skb)706706+ goto unlock;779707780708 igc_ptp_tx_hwtstamp(adapter);709709+710710+unlock:711711+ spin_unlock_irqrestore(&adapter->ptp_tx_lock, flags);781712}782713783714/**···1024959 return;1025960 }1026961962962+ spin_lock_init(&adapter->ptp_tx_lock);1027963 spin_lock_init(&adapter->tmreg_lock);10281028- INIT_WORK(&adapter->ptp_tx_work, igc_ptp_tx_work);10299641030965 adapter->tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;1031966 adapter->tstamp_config.tx_type = HWTSTAMP_TX_OFF;···10851020 if (!(adapter->ptp_flags & IGC_PTP_ENABLED))10861021 return;1087102210881088- cancel_work_sync(&adapter->ptp_tx_work);10891089- dev_kfree_skb_any(adapter->ptp_tx_skb);10901090- adapter->ptp_tx_skb = NULL;10911091- clear_bit_unlock(__IGC_PTP_TX_IN_PROGRESS, &adapter->state);10231023+ igc_ptp_clear_tx_tstamp(adapter);1092102410931025 if (pci_device_is_present(adapter->pdev)) {10941026 igc_ptp_time_save(adapter);
+10-3
drivers/net/ethernet/sfc/ef10.c
···12971297{12981298 struct efx_ef10_nic_data *nic_data = efx->nic_data;1299129913001300+ spin_lock_bh(&efx->stats_lock);13001301 kfree(nic_data->mc_stats);13011302 nic_data->mc_stats = NULL;13031303+ spin_unlock_bh(&efx->stats_lock);13021304}1303130513041306static int efx_ef10_init_nic(struct efx_nic *efx)···1854185218551853 efx_ef10_get_stat_mask(efx, mask);1856185418571857- efx_nic_copy_stats(efx, nic_data->mc_stats);18581858- efx_nic_update_stats(efx_ef10_stat_desc, EF10_STAT_COUNT,18591859- mask, stats, nic_data->mc_stats, false);18551855+ /* If NIC was fini'd (probably resetting), then we can't read18561856+ * updated stats right now.18571857+ */18581858+ if (nic_data->mc_stats) {18591859+ efx_nic_copy_stats(efx, nic_data->mc_stats);18601860+ efx_nic_update_stats(efx_ef10_stat_desc, EF10_STAT_COUNT,18611861+ mask, stats, nic_data->mc_stats, false);18621862+ }1860186318611864 /* Update derived statistics */18621865 efx_nic_fix_nodesc_drop_stat(efx,
-6
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
···74617461 netif_carrier_off(ndev);74627462 unregister_netdev(ndev);7463746374647464- /* Serdes power down needs to happen after VLAN filter74657465- * is deleted that is triggered by unregister_netdev().74667466- */74677467- if (priv->plat->serdes_powerdown)74687468- priv->plat->serdes_powerdown(ndev, priv->plat->bsp_priv);74697469-74707464#ifdef CONFIG_DEBUG_FS74717465 stmmac_exit_fs(ndev);74727466#endif
+5-5
drivers/net/ethernet/xilinx/xilinx_axienet_main.c
···20432043 goto cleanup_clk;20442044 }2045204520462046+ /* Reset core now that clocks are enabled, prior to accessing MDIO */20472047+ ret = __axienet_device_reset(lp);20482048+ if (ret)20492049+ goto cleanup_clk;20502050+20462051 /* Autodetect the need for 64-bit DMA pointers.20472052 * When the IP is configured for a bus width bigger than 32 bits,20482053 * writing the MSB registers is mandatory, even if they are all 0.···21012096 lp->coalesce_usec_rx = XAXIDMA_DFT_RX_USEC;21022097 lp->coalesce_count_tx = XAXIDMA_DFT_TX_THRESHOLD;21032098 lp->coalesce_usec_tx = XAXIDMA_DFT_TX_USEC;21042104-21052105- /* Reset core now that clocks are enabled, prior to accessing MDIO */21062106- ret = __axienet_device_reset(lp);21072107- if (ret)21082108- goto cleanup_clk;2109209921102100 ret = axienet_mdio_setup(lp);21112101 if (ret)
···584584 consume_skb(skb);585585 return NET_XMIT_DROP;586586 }587587- return ipvlan_rcv_frame(addr, &skb, true);587587+ ipvlan_rcv_frame(addr, &skb, true);588588+ return NET_XMIT_SUCCESS;588589 }589590 }590591out:···611610 consume_skb(skb);612611 return NET_XMIT_DROP;613612 }614614- return ipvlan_rcv_frame(addr, &skb, true);613613+ ipvlan_rcv_frame(addr, &skb, true);614614+ return NET_XMIT_SUCCESS;615615 }616616 }617617 skb = skb_share_check(skb, GFP_ATOMIC);···624622 * the skb for the main-dev. At the RX side we just return625623 * RX_PASS for it to be processed further on the stack.626624 */627627- return dev_forward_skb(ipvlan->phy_dev, skb);625625+ dev_forward_skb(ipvlan->phy_dev, skb);626626+ return NET_XMIT_SUCCESS;628627629628 } else if (is_multicast_ether_addr(eth->h_dest)) {630629 skb_reset_mac_header(skb);
+5-18
drivers/net/phy/dp83td510.c
···12121313/* MDIO_MMD_VEND2 registers */1414#define DP83TD510E_PHY_STS 0x101515+/* Bit 7 - mii_interrupt, active high. Clears on read.1616+ * Note: Clearing does not necessarily deactivate IRQ pin if interrupts pending.1717+ * This differs from the DP83TD510E datasheet (2020) which states this bit1818+ * clears on write 0.1919+ */1520#define DP83TD510E_STS_MII_INT BIT(7)1621#define DP83TD510E_LINK_STATUS BIT(0)1722···5853 int ret;59546055 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {6161- /* Clear any pending interrupts */6262- ret = phy_write_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_PHY_STS,6363- 0x0);6464- if (ret)6565- return ret;6666-6756 ret = phy_write_mmd(phydev, MDIO_MMD_VEND2,6857 DP83TD510E_INTERRUPT_REG_1,6958 DP83TD510E_INT1_LINK_EN);···8081 DP83TD510E_GENCFG_INT_EN);8182 if (ret)8283 return ret;8383-8484- /* Clear any pending interrupts */8585- ret = phy_write_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_PHY_STS,8686- 0x0);8784 }88858986 return ret;···8893static irqreturn_t dp83td510_handle_interrupt(struct phy_device *phydev)8994{9095 int ret;9191-9292- ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_PHY_STS);9393- if (ret < 0) {9494- phy_error(phydev);9595- return IRQ_NONE;9696- } else if (!(ret & DP83TD510E_STS_MII_INT)) {9797- return IRQ_NONE;9898- }999610097 /* Read the current enabled interrupts */10198 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_INTERRUPT_REG_1);
···481481};482482extern const struct nfnl_ct_hook __rcu *nfnl_ct_hook;483483484484-/**484484+/*485485 * nf_skb_duplicated - TEE target has sent a packet486486 *487487 * When a xtables target sends a packet, the OUTPUT and POSTROUTING···492492 */493493DECLARE_PER_CPU(bool, nf_skb_duplicated);494494495495-/**495495+/*496496 * Contains bitmask of ctnetlink event subscribers, if any.497497 * Can't be pernet due to NETLINK_LISTEN_ALL_NSID setsockopt flag.498498 */
+10-2
include/net/dsa.h
···314314 struct list_head fdbs;315315 struct list_head mdbs;316316317317- /* List of VLANs that CPU and DSA ports are members of. */318317 struct mutex vlans_lock;319319- struct list_head vlans;318318+ union {319319+ /* List of VLANs that CPU and DSA ports are members of.320320+ * Access to this is serialized by the sleepable @vlans_lock.321321+ */322322+ struct list_head vlans;323323+ /* List of VLANs that user ports are members of.324324+ * Access to this is serialized by netif_addr_lock_bh().325325+ */326326+ struct list_head user_vlans;327327+ };320328};321329322330/* TODO: ideally DSA ports would have a single dp->link_dp member,
+1
include/net/sock.h
···20952095}2096209620972097kuid_t sock_i_uid(struct sock *sk);20982098+unsigned long __sock_i_ino(struct sock *sk);20982099unsigned long sock_i_ino(struct sock *sk);2099210021002101static inline kuid_t sock_net_uid(const struct net *net, const struct sock *sk)
+3-1
lib/ts_bm.c
···6060 struct ts_bm *bm = ts_config_priv(conf);6161 unsigned int i, text_len, consumed = state->offset;6262 const u8 *text;6363- int shift = bm->patlen - 1, bs;6363+ int bs;6464 const u8 icase = conf->flags & TS_IGNORECASE;65656666 for (;;) {6767+ int shift = bm->patlen - 1;6868+6769 text_len = conf->get_next_block(consumed, &text, conf, state);68706971 if (unlikely(text_len == 0))