tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

ide: keep pointer to struct device instead of struct pci_dev in ide_hwif_t

Keep pointer to struct device instead of struct pci_dev in ide_hwif_t.

While on it:
* Use *dev->dma_mask instead of pci_dev->dma_mask in ide_toggle_bounce().

There should be no functionality changes caused by this patch.

Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>

Bartlomiej Zolnierkiewicz 36501650 f6fb786d

+236 -182
+13 -10
drivers/ide/ide-dma.c
··· 184 184 int ide_build_sglist(ide_drive_t *drive, struct request *rq) 185 185 { 186 186 ide_hwif_t *hwif = HWIF(drive); 187 + struct pci_dev *pdev = to_pci_dev(hwif->dev); 187 188 struct scatterlist *sg = hwif->sg_table; 188 189 189 190 ide_map_sg(drive, rq); ··· 194 193 else 195 194 hwif->sg_dma_direction = PCI_DMA_TODEVICE; 196 195 197 - return pci_map_sg(hwif->pci_dev, sg, hwif->sg_nents, hwif->sg_dma_direction); 196 + return pci_map_sg(pdev, sg, hwif->sg_nents, hwif->sg_dma_direction); 198 197 } 199 198 200 199 EXPORT_SYMBOL_GPL(ide_build_sglist); ··· 307 306 308 307 void ide_destroy_dmatable (ide_drive_t *drive) 309 308 { 310 - struct pci_dev *dev = HWIF(drive)->pci_dev; 311 - struct scatterlist *sg = HWIF(drive)->sg_table; 312 - int nents = HWIF(drive)->sg_nents; 309 + ide_hwif_t *hwif = drive->hwif; 310 + struct pci_dev *pdev = to_pci_dev(hwif->dev); 313 311 314 - pci_unmap_sg(dev, sg, nents, HWIF(drive)->sg_dma_direction); 312 + pci_unmap_sg(pdev, hwif->sg_table, hwif->sg_nents, 313 + hwif->sg_dma_direction); 315 314 } 316 315 317 316 EXPORT_SYMBOL_GPL(ide_destroy_dmatable); ··· 844 843 static void ide_release_dma_engine(ide_hwif_t *hwif) 845 844 { 846 845 if (hwif->dmatable_cpu) { 847 - pci_free_consistent(hwif->pci_dev, 848 - PRD_ENTRIES * PRD_BYTES, 849 - hwif->dmatable_cpu, 850 - hwif->dmatable_dma); 846 + struct pci_dev *pdev = to_pci_dev(hwif->dev); 847 + 848 + pci_free_consistent(pdev, PRD_ENTRIES * PRD_BYTES, 849 + hwif->dmatable_cpu, hwif->dmatable_dma); 851 850 hwif->dmatable_cpu = NULL; 852 851 } 853 852 } ··· 875 874 876 875 static int ide_allocate_dma_engine(ide_hwif_t *hwif) 877 876 { 878 - hwif->dmatable_cpu = pci_alloc_consistent(hwif->pci_dev, 877 + struct pci_dev *pdev = to_pci_dev(hwif->dev); 878 + 879 + hwif->dmatable_cpu = pci_alloc_consistent(pdev, 879 880 PRD_ENTRIES * PRD_BYTES, 880 881 &hwif->dmatable_dma); 881 882
+4 -2
drivers/ide/ide-lib.c
··· 358 358 if (!PCI_DMA_BUS_IS_PHYS) { 359 359 addr = BLK_BOUNCE_ANY; 360 360 } else if (on && drive->media == ide_disk) { 361 - if (HWIF(drive)->pci_dev) 362 - addr = HWIF(drive)->pci_dev->dma_mask; 361 + struct device *dev = drive->hwif->dev; 362 + 363 + if (dev && dev->dma_mask) 364 + addr = *dev->dma_mask; 363 365 } 364 366 365 367 if (drive->queue)
+2 -2
drivers/ide/ide-probe.c
··· 622 622 strlcpy(hwif->gendev.bus_id,hwif->name,BUS_ID_SIZE); 623 623 hwif->gendev.driver_data = hwif; 624 624 if (hwif->gendev.parent == NULL) { 625 - if (hwif->pci_dev) 626 - hwif->gendev.parent = &hwif->pci_dev->dev; 625 + if (hwif->dev) 626 + hwif->gendev.parent = hwif->dev; 627 627 else 628 628 /* Would like to do = &device_legacy */ 629 629 hwif->gendev.parent = NULL;
+2 -1
drivers/ide/ide.c
··· 405 405 hwif->chipset = tmp_hwif->chipset; 406 406 hwif->hold = tmp_hwif->hold; 407 407 408 + hwif->dev = tmp_hwif->dev; 409 + 408 410 #ifdef CONFIG_BLK_DEV_IDEPCI 409 - hwif->pci_dev = tmp_hwif->pci_dev; 410 411 hwif->cds = tmp_hwif->cds; 411 412 #endif 412 413
+4 -4
drivers/ide/pci/aec62xx.c
··· 90 90 static void aec6210_set_mode(ide_drive_t *drive, const u8 speed) 91 91 { 92 92 ide_hwif_t *hwif = HWIF(drive); 93 - struct pci_dev *dev = hwif->pci_dev; 93 + struct pci_dev *dev = to_pci_dev(hwif->dev); 94 94 u16 d_conf = 0; 95 95 u8 ultra = 0, ultra_conf = 0; 96 96 u8 tmp0 = 0, tmp1 = 0, tmp2 = 0; ··· 116 116 static void aec6260_set_mode(ide_drive_t *drive, const u8 speed) 117 117 { 118 118 ide_hwif_t *hwif = HWIF(drive); 119 - struct pci_dev *dev = hwif->pci_dev; 119 + struct pci_dev *dev = to_pci_dev(hwif->dev); 120 120 u8 unit = (drive->select.b.unit & 0x01); 121 121 u8 tmp1 = 0, tmp2 = 0; 122 122 u8 ultra = 0, drive_conf = 0, ultra_conf = 0; ··· 170 170 171 171 static void __devinit init_hwif_aec62xx(ide_hwif_t *hwif) 172 172 { 173 - struct pci_dev *dev = hwif->pci_dev; 173 + struct pci_dev *dev = to_pci_dev(hwif->dev); 174 174 175 175 hwif->set_pio_mode = &aec_set_pio_mode; 176 176 ··· 188 188 if (hwif->cbl != ATA_CBL_PATA40_SHORT) { 189 189 u8 ata66 = 0, mask = hwif->channel ? 0x02 : 0x01; 190 190 191 - pci_read_config_byte(hwif->pci_dev, 0x49, &ata66); 191 + pci_read_config_byte(dev, 0x49, &ata66); 192 192 193 193 hwif->cbl = (ata66 & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80; 194 194 }
+5 -4
drivers/ide/pci/alim15x3.c
··· 293 293 static void ali_set_pio_mode(ide_drive_t *drive, const u8 pio) 294 294 { 295 295 ide_hwif_t *hwif = HWIF(drive); 296 - struct pci_dev *dev = hwif->pci_dev; 296 + struct pci_dev *dev = to_pci_dev(hwif->dev); 297 297 int s_time, a_time, c_time; 298 298 u8 s_clc, a_clc, r_clc; 299 299 unsigned long flags; ··· 396 396 static void ali_set_dma_mode(ide_drive_t *drive, const u8 speed) 397 397 { 398 398 ide_hwif_t *hwif = HWIF(drive); 399 - struct pci_dev *dev = hwif->pci_dev; 399 + struct pci_dev *dev = to_pci_dev(hwif->dev); 400 400 u8 speed1 = speed; 401 401 u8 unit = (drive->select.b.unit & 0x01); 402 402 u8 tmpbyte = 0x00; ··· 625 625 626 626 static u8 __devinit ata66_ali15x3(ide_hwif_t *hwif) 627 627 { 628 - struct pci_dev *dev = hwif->pci_dev; 628 + struct pci_dev *dev = to_pci_dev(hwif->dev); 629 629 unsigned long flags; 630 630 u8 cbl = ATA_CBL_PATA40, tmpbyte; 631 631 ··· 688 688 689 689 static void __devinit init_hwif_ali15x3 (ide_hwif_t *hwif) 690 690 { 691 + struct pci_dev *dev = to_pci_dev(hwif->dev); 691 692 u8 ideic, inmir; 692 693 s8 irq_routing_table[] = { -1, 9, 3, 10, 4, 5, 7, 6, 693 694 1, 11, 0, 12, 0, 14, 0, 15 }; 694 695 int irq = -1; 695 696 696 - if (hwif->pci_dev->device == PCI_DEVICE_ID_AL_M5229) 697 + if (dev->device == PCI_DEVICE_ID_AL_M5229) 697 698 hwif->irq = hwif->channel ? 15 : 14; 698 699 699 700 if (isa_dev) {
+5 -2
drivers/ide/pci/amd74xx.c
··· 86 86 static void amd_set_drive(ide_drive_t *drive, const u8 speed) 87 87 { 88 88 ide_hwif_t *hwif = drive->hwif; 89 + struct pci_dev *dev = to_pci_dev(hwif->dev); 89 90 ide_drive_t *peer = hwif->drives + (~drive->dn & 1); 90 91 struct ide_timing t, p; 91 92 int T, UT; ··· 105 104 if (speed == XFER_UDMA_5 && amd_clock <= 33333) t.udma = 1; 106 105 if (speed == XFER_UDMA_6 && amd_clock <= 33333) t.udma = 15; 107 106 108 - amd_set_speed(hwif->pci_dev, drive->dn, udma_mask, &t); 107 + amd_set_speed(dev, drive->dn, udma_mask, &t); 109 108 } 110 109 111 110 /* ··· 203 202 204 203 static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif) 205 204 { 205 + struct pci_dev *dev = to_pci_dev(hwif->dev); 206 + 206 207 if (hwif->irq == 0) /* 0 is bogus but will do for now */ 207 - hwif->irq = pci_get_legacy_ide_irq(hwif->pci_dev, hwif->channel); 208 + hwif->irq = pci_get_legacy_ide_irq(dev, hwif->channel); 208 209 209 210 hwif->set_pio_mode = &amd_set_pio_mode; 210 211 hwif->set_dma_mode = &amd_set_drive;
+4 -5
drivers/ide/pci/atiixp.c
··· 55 55 56 56 static void atiixp_set_pio_mode(ide_drive_t *drive, const u8 pio) 57 57 { 58 - struct pci_dev *dev = drive->hwif->pci_dev; 58 + struct pci_dev *dev = to_pci_dev(drive->hwif->dev); 59 59 unsigned long flags; 60 60 int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8; 61 61 u32 pio_timing_data; ··· 88 88 89 89 static void atiixp_set_dma_mode(ide_drive_t *drive, const u8 speed) 90 90 { 91 - struct pci_dev *dev = drive->hwif->pci_dev; 91 + struct pci_dev *dev = to_pci_dev(drive->hwif->dev); 92 92 unsigned long flags; 93 93 int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8; 94 94 u32 tmp32; ··· 133 133 134 134 static void __devinit init_hwif_atiixp(ide_hwif_t *hwif) 135 135 { 136 - u8 udma_mode = 0; 137 - u8 ch = hwif->channel; 138 - struct pci_dev *pdev = hwif->pci_dev; 136 + struct pci_dev *pdev = to_pci_dev(hwif->dev); 137 + u8 udma_mode = 0, ch = hwif->channel; 139 138 140 139 hwif->set_pio_mode = &atiixp_set_pio_mode; 141 140 hwif->set_dma_mode = &atiixp_set_dma_mode;
+7 -7
drivers/ide/pci/cmd64x.c
··· 71 71 */ 72 72 static void program_cycle_times (ide_drive_t *drive, int cycle_time, int active_time) 73 73 { 74 - struct pci_dev *dev = HWIF(drive)->pci_dev; 74 + struct pci_dev *dev = to_pci_dev(drive->hwif->dev); 75 75 int clock_time = 1000 / system_bus_clock(); 76 76 u8 cycle_count, active_count, recovery_count, drwtim; 77 77 static const u8 recovery_values[] = ··· 118 118 static void cmd64x_tune_pio(ide_drive_t *drive, const u8 pio) 119 119 { 120 120 ide_hwif_t *hwif = HWIF(drive); 121 - struct pci_dev *dev = hwif->pci_dev; 121 + struct pci_dev *dev = to_pci_dev(hwif->dev); 122 122 unsigned int cycle_time; 123 123 u8 setup_count, arttim = 0; 124 124 ··· 183 183 static void cmd64x_set_dma_mode(ide_drive_t *drive, const u8 speed) 184 184 { 185 185 ide_hwif_t *hwif = HWIF(drive); 186 - struct pci_dev *dev = hwif->pci_dev; 186 + struct pci_dev *dev = to_pci_dev(hwif->dev); 187 187 u8 unit = drive->dn & 0x01; 188 188 u8 regU = 0, pciU = hwif->channel ? UDIDETCR1 : UDIDETCR0; 189 189 ··· 245 245 static int cmd64x_ide_dma_end (ide_drive_t *drive) 246 246 { 247 247 ide_hwif_t *hwif = HWIF(drive); 248 - struct pci_dev *dev = hwif->pci_dev; 248 + struct pci_dev *dev = to_pci_dev(hwif->dev); 249 249 int irq_reg = hwif->channel ? ARTTIM23 : CFR; 250 250 u8 irq_mask = hwif->channel ? ARTTIM23_INTR_CH1 : 251 251 CFR_INTR_CH0; ··· 285 285 static int cmd64x_ide_dma_test_irq (ide_drive_t *drive) 286 286 { 287 287 ide_hwif_t *hwif = HWIF(drive); 288 - struct pci_dev *dev = hwif->pci_dev; 288 + struct pci_dev *dev = to_pci_dev(hwif->dev); 289 289 int irq_reg = hwif->channel ? ARTTIM23 : CFR; 290 290 u8 irq_mask = hwif->channel ? ARTTIM23_INTR_CH1 : 291 291 CFR_INTR_CH0; ··· 375 375 376 376 static u8 __devinit ata66_cmd64x(ide_hwif_t *hwif) 377 377 { 378 - struct pci_dev *dev = hwif->pci_dev; 378 + struct pci_dev *dev = to_pci_dev(hwif->dev); 379 379 u8 bmidecsr = 0, mask = hwif->channel ? 0x02 : 0x01; 380 380 381 381 switch (dev->device) { ··· 390 390 391 391 static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif) 392 392 { 393 - struct pci_dev *dev = hwif->pci_dev; 393 + struct pci_dev *dev = to_pci_dev(hwif->dev); 394 394 395 395 hwif->set_pio_mode = &cmd64x_set_pio_mode; 396 396 hwif->set_dma_mode = &cmd64x_set_dma_mode;
+1 -1
drivers/ide/pci/cs5520.c
··· 69 69 static void cs5520_set_pio_mode(ide_drive_t *drive, const u8 pio) 70 70 { 71 71 ide_hwif_t *hwif = HWIF(drive); 72 - struct pci_dev *pdev = hwif->pci_dev; 72 + struct pci_dev *pdev = to_pci_dev(hwif->dev); 73 73 int controller = drive->dn > 1 ? 1 : 0; 74 74 75 75 /* FIXME: if DMA = 1 do we need to set the DMA bit here ? */
+3 -1
drivers/ide/pci/cs5535.c
··· 177 177 */ 178 178 static void __devinit init_hwif_cs5535(ide_hwif_t *hwif) 179 179 { 180 + struct pci_dev *dev = to_pci_dev(hwif->dev); 181 + 180 182 hwif->set_pio_mode = &cs5535_set_pio_mode; 181 183 hwif->set_dma_mode = &cs5535_set_dma_mode; 182 184 183 185 if (hwif->dma_base == 0) 184 186 return; 185 187 186 - hwif->cbl = cs5535_cable_detect(hwif->pci_dev); 188 + hwif->cbl = cs5535_cable_detect(dev); 187 189 } 188 190 189 191 static const struct ide_port_info cs5535_chipset __devinitdata = {
+3 -2
drivers/ide/pci/cy82c693.c
··· 228 228 static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio) 229 229 { 230 230 ide_hwif_t *hwif = HWIF(drive); 231 - struct pci_dev *dev = hwif->pci_dev; 231 + struct pci_dev *dev = to_pci_dev(hwif->dev); 232 232 pio_clocks_t pclk; 233 233 unsigned int addrCtrl; 234 234 ··· 397 397 static void __devinit init_iops_cy82c693(ide_hwif_t *hwif) 398 398 { 399 399 static ide_hwif_t *primary; 400 + struct pci_dev *dev = to_pci_dev(hwif->dev); 400 401 401 - if (PCI_FUNC(hwif->pci_dev->devfn) == 1) 402 + if (PCI_FUNC(dev->devfn) == 1) 402 403 primary = hwif; 403 404 else { 404 405 hwif->mate = primary;
+1 -1
drivers/ide/pci/delkin_cb.c
··· 87 87 return -ENODEV; 88 88 } 89 89 pci_set_drvdata(dev, hwif); 90 - hwif->pci_dev = dev; 90 + hwif->dev = &dev->dev; 91 91 drive = &hwif->drives[0]; 92 92 if (drive->present) { 93 93 drive->io_32bit = 1;
+1 -1
drivers/ide/pci/hpt34x.c
··· 45 45 46 46 static void hpt34x_set_mode(ide_drive_t *drive, const u8 speed) 47 47 { 48 - struct pci_dev *dev = HWIF(drive)->pci_dev; 48 + struct pci_dev *dev = to_pci_dev(drive->hwif->dev); 49 49 u32 reg1= 0, tmp1 = 0, reg2 = 0, tmp2 = 0; 50 50 u8 hi_speed, lo_speed; 51 51
+17 -12
drivers/ide/pci/hpt366.c
··· 626 626 static u8 hpt3xx_udma_filter(ide_drive_t *drive) 627 627 { 628 628 ide_hwif_t *hwif = HWIF(drive); 629 - struct hpt_info *info = pci_get_drvdata(hwif->pci_dev); 629 + struct pci_dev *dev = to_pci_dev(hwif->dev); 630 + struct hpt_info *info = pci_get_drvdata(dev); 630 631 u8 mask = hwif->ultra_mask; 631 632 632 633 switch (info->chip_type) { ··· 666 665 static u8 hpt3xx_mdma_filter(ide_drive_t *drive) 667 666 { 668 667 ide_hwif_t *hwif = HWIF(drive); 669 - struct hpt_info *info = pci_get_drvdata(hwif->pci_dev); 668 + struct pci_dev *dev = to_pci_dev(hwif->dev); 669 + struct hpt_info *info = pci_get_drvdata(dev); 670 670 671 671 switch (info->chip_type) { 672 672 case HPT372 : ··· 701 699 702 700 static void hpt3xx_set_mode(ide_drive_t *drive, const u8 speed) 703 701 { 704 - struct pci_dev *dev = HWIF(drive)->pci_dev; 702 + struct pci_dev *dev = to_pci_dev(drive->hwif->dev); 705 703 struct hpt_info *info = pci_get_drvdata(dev); 706 704 struct hpt_timings *t = info->timings; 707 705 u8 itr_addr = 0x40 + (drive->dn * 4); ··· 744 742 static void hpt3xx_maskproc(ide_drive_t *drive, int mask) 745 743 { 746 744 ide_hwif_t *hwif = HWIF(drive); 747 - struct pci_dev *dev = hwif->pci_dev; 745 + struct pci_dev *dev = to_pci_dev(hwif->dev); 748 746 struct hpt_info *info = pci_get_drvdata(dev); 749 747 750 748 if (drive->quirk_list) { ··· 776 774 */ 777 775 static void hpt366_dma_lost_irq(ide_drive_t *drive) 778 776 { 779 - struct pci_dev *dev = HWIF(drive)->pci_dev; 777 + struct pci_dev *dev = to_pci_dev(drive->hwif->dev); 780 778 u8 mcr1 = 0, mcr3 = 0, scr1 = 0; 781 779 782 780 pci_read_config_byte(dev, 0x50, &mcr1); ··· 792 790 static void hpt370_clear_engine(ide_drive_t *drive) 793 791 { 794 792 ide_hwif_t *hwif = HWIF(drive); 793 + struct pci_dev *dev = to_pci_dev(hwif->dev); 795 794 796 - pci_write_config_byte(hwif->pci_dev, hwif->select_data, 0x37); 795 + pci_write_config_byte(dev, hwif->select_data, 0x37); 797 796 udelay(10); 798 797 } 799 798 800 799 static void hpt370_irq_timeout(ide_drive_t *drive) 801 800 { 802 801 ide_hwif_t *hwif = HWIF(drive); 802 + struct pci_dev *dev = to_pci_dev(hwif->dev); 803 803 u16 bfifo = 0; 804 804 u8 dma_cmd; 805 805 806 - pci_read_config_word(hwif->pci_dev, hwif->select_data + 2, &bfifo); 806 + pci_read_config_word(dev, hwif->select_data + 2, &bfifo); 807 807 printk(KERN_DEBUG "%s: %d bytes in FIFO\n", drive->name, bfifo & 0x1ff); 808 808 809 809 /* get DMA command mode */ ··· 848 844 static int hpt374_ide_dma_test_irq(ide_drive_t *drive) 849 845 { 850 846 ide_hwif_t *hwif = HWIF(drive); 847 + struct pci_dev *dev = to_pci_dev(hwif->dev); 851 848 u16 bfifo = 0; 852 849 u8 dma_stat; 853 850 854 - pci_read_config_word(hwif->pci_dev, hwif->select_data + 2, &bfifo); 851 + pci_read_config_word(dev, hwif->select_data + 2, &bfifo); 855 852 if (bfifo & 0x1FF) { 856 853 // printk("%s: %d bytes in FIFO\n", drive->name, bfifo); 857 854 return 0; ··· 872 867 static int hpt374_ide_dma_end(ide_drive_t *drive) 873 868 { 874 869 ide_hwif_t *hwif = HWIF(drive); 875 - struct pci_dev *dev = hwif->pci_dev; 870 + struct pci_dev *dev = to_pci_dev(hwif->dev); 876 871 u8 mcr = 0, mcr_addr = hwif->select_data; 877 872 u8 bwsr = 0, mask = hwif->channel ? 0x02 : 0x01; 878 873 ··· 947 942 static int hpt3xx_busproc(ide_drive_t *drive, int state) 948 943 { 949 944 ide_hwif_t *hwif = HWIF(drive); 950 - struct pci_dev *dev = hwif->pci_dev; 945 + struct pci_dev *dev = to_pci_dev(hwif->dev); 951 946 u8 mcr_addr = hwif->select_data + 2; 952 947 u8 resetmask = hwif->channel ? 0x80 : 0x40; 953 948 u8 bsr2 = 0; ··· 1283 1278 1284 1279 static void __devinit init_hwif_hpt366(ide_hwif_t *hwif) 1285 1280 { 1286 - struct pci_dev *dev = hwif->pci_dev; 1281 + struct pci_dev *dev = to_pci_dev(hwif->dev); 1287 1282 struct hpt_info *info = pci_get_drvdata(dev); 1288 1283 int serialize = HPT_SERIALIZE_IO; 1289 1284 u8 scr1 = 0, ata66 = hwif->channel ? 0x01 : 0x02; ··· 1398 1393 1399 1394 static void __devinit init_dma_hpt366(ide_hwif_t *hwif, unsigned long dmabase) 1400 1395 { 1401 - struct pci_dev *dev = hwif->pci_dev; 1396 + struct pci_dev *dev = to_pci_dev(hwif->dev); 1402 1397 u8 masterdma = 0, slavedma = 0; 1403 1398 u8 dma_new = 0, dma_old = 0; 1404 1399 unsigned long flags;
+4 -3
drivers/ide/pci/it8213.c
··· 28 28 static void it8213_set_pio_mode(ide_drive_t *drive, const u8 pio) 29 29 { 30 30 ide_hwif_t *hwif = HWIF(drive); 31 - struct pci_dev *dev = hwif->pci_dev; 31 + struct pci_dev *dev = to_pci_dev(hwif->dev); 32 32 int is_slave = drive->dn & 1; 33 33 int master_port = 0x40; 34 34 int slave_port = 0x44; ··· 85 85 static void it8213_set_dma_mode(ide_drive_t *drive, const u8 speed) 86 86 { 87 87 ide_hwif_t *hwif = HWIF(drive); 88 - struct pci_dev *dev = hwif->pci_dev; 88 + struct pci_dev *dev = to_pci_dev(hwif->dev); 89 89 u8 maslave = 0x40; 90 90 int a_speed = 3 << (drive->dn * 4); 91 91 int u_flag = 1 << drive->dn; ··· 152 152 153 153 static void __devinit init_hwif_it8213(ide_hwif_t *hwif) 154 154 { 155 + struct pci_dev *dev = to_pci_dev(hwif->dev); 155 156 u8 reg42h = 0; 156 157 157 158 hwif->set_dma_mode = &it8213_set_dma_mode; ··· 161 160 if (!hwif->dma_base) 162 161 return; 163 162 164 - pci_read_config_byte(hwif->pci_dev, 0x42, &reg42h); 163 + pci_read_config_byte(dev, 0x42, &reg42h); 165 164 166 165 if (hwif->cbl != ATA_CBL_PATA40_SHORT) 167 166 hwif->cbl = (reg42h & 0x02) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
+28 -19
drivers/ide/pci/it821x.c
··· 113 113 114 114 static void it821x_program(ide_drive_t *drive, u16 timing) 115 115 { 116 - ide_hwif_t *hwif = drive->hwif; 116 + ide_hwif_t *hwif = drive->hwif; 117 + struct pci_dev *dev = to_pci_dev(hwif->dev); 117 118 struct it821x_dev *itdev = ide_get_hwifdata(hwif); 118 119 int channel = hwif->channel; 119 120 u8 conf; ··· 124 123 conf = timing >> 8; 125 124 else 126 125 conf = timing & 0xFF; 127 - pci_write_config_byte(hwif->pci_dev, 0x54 + 4 * channel, conf); 126 + 127 + pci_write_config_byte(dev, 0x54 + 4 * channel, conf); 128 128 } 129 129 130 130 /** ··· 139 137 140 138 static void it821x_program_udma(ide_drive_t *drive, u16 timing) 141 139 { 142 - ide_hwif_t *hwif = drive->hwif; 140 + ide_hwif_t *hwif = drive->hwif; 141 + struct pci_dev *dev = to_pci_dev(hwif->dev); 143 142 struct it821x_dev *itdev = ide_get_hwifdata(hwif); 144 143 int channel = hwif->channel; 145 144 int unit = drive->select.b.unit; ··· 151 148 conf = timing >> 8; 152 149 else 153 150 conf = timing & 0xFF; 154 - if(itdev->timing10 == 0) 155 - pci_write_config_byte(hwif->pci_dev, 0x56 + 4 * channel + unit, conf); 151 + 152 + if (itdev->timing10 == 0) 153 + pci_write_config_byte(dev, 0x56 + 4 * channel + unit, conf); 156 154 else { 157 - pci_write_config_byte(hwif->pci_dev, 0x56 + 4 * channel, conf); 158 - pci_write_config_byte(hwif->pci_dev, 0x56 + 4 * channel + 1, conf); 155 + pci_write_config_byte(dev, 0x56 + 4 * channel, conf); 156 + pci_write_config_byte(dev, 0x56 + 4 * channel + 1, conf); 159 157 } 160 158 } 161 159 ··· 171 167 static void it821x_clock_strategy(ide_drive_t *drive) 172 168 { 173 169 ide_hwif_t *hwif = drive->hwif; 170 + struct pci_dev *dev = to_pci_dev(hwif->dev); 174 171 struct it821x_dev *itdev = ide_get_hwifdata(hwif); 175 172 176 173 u8 unit = drive->select.b.unit; ··· 210 205 itdev->clock_mode = ATA_50; 211 206 sel = 1; 212 207 } 213 - pci_read_config_byte(hwif->pci_dev, 0x50, &v); 208 + 209 + pci_read_config_byte(dev, 0x50, &v); 214 210 v &= ~(1 << (1 + hwif->channel)); 215 211 v |= sel << (1 + hwif->channel); 216 - pci_write_config_byte(hwif->pci_dev, 0x50, v); 212 + pci_write_config_byte(dev, 0x50, v); 217 213 218 214 /* 219 215 * Reprogram the UDMA/PIO of the pair drive for the switch ··· 288 282 289 283 static void it821x_tune_mwdma (ide_drive_t *drive, byte mode_wanted) 290 284 { 291 - ide_hwif_t *hwif = drive->hwif; 285 + ide_hwif_t *hwif = drive->hwif; 286 + struct pci_dev *dev = to_pci_dev(hwif->dev); 292 287 struct it821x_dev *itdev = (void *)ide_get_hwifdata(hwif); 293 288 int unit = drive->select.b.unit; 294 289 int channel = hwif->channel; ··· 304 297 itdev->udma[unit] = UDMA_OFF; 305 298 306 299 /* UDMA bits off - Revision 0x10 do them in pairs */ 307 - pci_read_config_byte(hwif->pci_dev, 0x50, &conf); 308 - if(itdev->timing10) 300 + pci_read_config_byte(dev, 0x50, &conf); 301 + if (itdev->timing10) 309 302 conf |= channel ? 0x60: 0x18; 310 303 else 311 304 conf |= 1 << (3 + 2 * channel + unit); 312 - pci_write_config_byte(hwif->pci_dev, 0x50, conf); 305 + pci_write_config_byte(dev, 0x50, conf); 313 306 314 307 it821x_clock_strategy(drive); 315 308 /* FIXME: do we need to program this ? */ ··· 327 320 328 321 static void it821x_tune_udma (ide_drive_t *drive, byte mode_wanted) 329 322 { 330 - ide_hwif_t *hwif = drive->hwif; 323 + ide_hwif_t *hwif = drive->hwif; 324 + struct pci_dev *dev = to_pci_dev(hwif->dev); 331 325 struct it821x_dev *itdev = ide_get_hwifdata(hwif); 332 326 int unit = drive->select.b.unit; 333 327 int channel = hwif->channel; ··· 345 337 itdev->udma[unit] |= 0x8080; /* UDMA 5/6 select on */ 346 338 347 339 /* UDMA on. Again revision 0x10 must do the pair */ 348 - pci_read_config_byte(hwif->pci_dev, 0x50, &conf); 349 - if(itdev->timing10) 340 + pci_read_config_byte(dev, 0x50, &conf); 341 + if (itdev->timing10) 350 342 conf &= channel ? 0x9F: 0xE7; 351 343 else 352 344 conf &= ~ (1 << (3 + 2 * channel + unit)); 353 - pci_write_config_byte(hwif->pci_dev, 0x50, conf); 345 + pci_write_config_byte(dev, 0x50, conf); 354 346 355 347 it821x_clock_strategy(drive); 356 348 it821x_program_udma(drive, itdev->udma[unit]); ··· 528 520 529 521 static void __devinit init_hwif_it821x(ide_hwif_t *hwif) 530 522 { 523 + struct pci_dev *dev = to_pci_dev(hwif->dev); 531 524 struct it821x_dev *idev = kzalloc(sizeof(struct it821x_dev), GFP_KERNEL); 532 525 u8 conf; 533 526 ··· 541 532 542 533 ide_set_hwifdata(hwif, idev); 543 534 544 - pci_read_config_byte(hwif->pci_dev, 0x50, &conf); 535 + pci_read_config_byte(dev, 0x50, &conf); 545 536 if (conf & 1) { 546 537 idev->smart = 1; 547 538 hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA; ··· 564 555 * this is necessary. 565 556 */ 566 557 567 - pci_read_config_byte(hwif->pci_dev, 0x08, &conf); 558 + pci_read_config_byte(dev, 0x08, &conf); 568 559 if (conf == 0x10) { 569 560 idev->timing10 = 1; 570 561 hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA;
+1 -1
drivers/ide/pci/jmicron.c
··· 30 30 31 31 static u8 __devinit ata66_jmicron(ide_hwif_t *hwif) 32 32 { 33 - struct pci_dev *pdev = hwif->pci_dev; 33 + struct pci_dev *pdev = to_pci_dev(hwif->dev); 34 34 35 35 u32 control; 36 36 u32 control5;
+7 -7
drivers/ide/pci/ns87415.c
··· 71 71 72 72 static void __devinit superio_ide_init_iops (struct hwif_s *hwif) 73 73 { 74 + struct pci_dev *pdev = to_pci_dev(hwif->dev); 74 75 u32 base, dmabase; 75 - u8 tmp; 76 - struct pci_dev *pdev = hwif->pci_dev; 77 - u8 port = hwif->channel; 76 + u8 port = hwif->channel, tmp; 78 77 79 78 base = pci_resource_start(pdev, port * 2) & ~3; 80 79 dmabase = pci_resource_start(pdev, 4) & ~3; ··· 92 93 93 94 static void __devinit init_iops_ns87415(ide_hwif_t *hwif) 94 95 { 95 - if (PCI_SLOT(hwif->pci_dev->devfn) == 0xE) { 96 + struct pci_dev *dev = to_pci_dev(hwif->dev); 97 + 98 + if (PCI_SLOT(dev->devfn) == 0xE) 96 99 /* Built-in - assume it's under superio. */ 97 100 superio_ide_init_iops(hwif); 98 - } 99 101 } 100 102 #endif 101 103 ··· 110 110 static void ns87415_prepare_drive (ide_drive_t *drive, unsigned int use_dma) 111 111 { 112 112 ide_hwif_t *hwif = HWIF(drive); 113 + struct pci_dev *dev = to_pci_dev(hwif->dev); 113 114 unsigned int bit, other, new, *old = (unsigned int *) hwif->select_data; 114 - struct pci_dev *dev = hwif->pci_dev; 115 115 unsigned long flags; 116 116 117 117 local_irq_save(flags); ··· 189 189 190 190 static void __devinit init_hwif_ns87415 (ide_hwif_t *hwif) 191 191 { 192 - struct pci_dev *dev = hwif->pci_dev; 192 + struct pci_dev *dev = to_pci_dev(hwif->dev); 193 193 unsigned int ctrl, using_inta; 194 194 u8 progif; 195 195 #ifdef __sparc_v9__
+4 -2
drivers/ide/pci/pdc202xx_new.c
··· 149 149 static void pdcnew_set_dma_mode(ide_drive_t *drive, const u8 speed) 150 150 { 151 151 ide_hwif_t *hwif = HWIF(drive); 152 + struct pci_dev *dev = to_pci_dev(hwif->dev); 152 153 u8 adj = (drive->dn & 1) ? 0x08 : 0x00; 153 154 154 155 /* ··· 160 159 * As we set up the PLL to output 133 MHz for UltraDMA/133 capable 161 160 * chips, we must override the default register settings... 162 161 */ 163 - if (max_dma_rate(hwif->pci_dev) == 4) { 162 + if (max_dma_rate(dev) == 4) { 164 163 u8 mode = speed & 0x07; 165 164 166 165 if (speed >= XFER_UDMA_0) { ··· 187 186 static void pdcnew_set_pio_mode(ide_drive_t *drive, const u8 pio) 188 187 { 189 188 ide_hwif_t *hwif = drive->hwif; 189 + struct pci_dev *dev = to_pci_dev(hwif->dev); 190 190 u8 adj = (drive->dn & 1) ? 0x08 : 0x00; 191 191 192 - if (max_dma_rate(hwif->pci_dev) == 4) { 192 + if (max_dma_rate(dev) == 4) { 193 193 set_indexed_reg(hwif, 0x0c + adj, pio_timings[pio].reg0c); 194 194 set_indexed_reg(hwif, 0x0d + adj, pio_timings[pio].reg0d); 195 195 set_indexed_reg(hwif, 0x13 + adj, pio_timings[pio].reg13);
+7 -4
drivers/ide/pci/pdc202xx_old.c
··· 66 66 static void pdc202xx_set_mode(ide_drive_t *drive, const u8 speed) 67 67 { 68 68 ide_hwif_t *hwif = HWIF(drive); 69 - struct pci_dev *dev = hwif->pci_dev; 69 + struct pci_dev *dev = to_pci_dev(hwif->dev); 70 70 u8 drive_pci = 0x60 + (drive->dn << 2); 71 71 72 72 u8 AP = 0, BP = 0, CP = 0; ··· 144 144 145 145 static u8 pdc202xx_old_cable_detect (ide_hwif_t *hwif) 146 146 { 147 + struct pci_dev *dev = to_pci_dev(hwif->dev); 147 148 u16 CIS = 0, mask = (hwif->channel) ? (1<<11) : (1<<10); 148 149 149 - pci_read_config_word(hwif->pci_dev, 0x50, &CIS); 150 + pci_read_config_word(dev, 0x50, &CIS); 150 151 151 152 return (CIS & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80; 152 153 } ··· 306 305 307 306 static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif) 308 307 { 308 + struct pci_dev *dev = to_pci_dev(hwif->dev); 309 + 309 310 hwif->set_pio_mode = &pdc202xx_set_pio_mode; 310 311 hwif->set_dma_mode = &pdc202xx_set_mode; 311 312 312 313 hwif->quirkproc = &pdc202xx_quirkproc; 313 314 314 - if (hwif->pci_dev->device != PCI_DEVICE_ID_PROMISE_20246) 315 + if (dev->device != PCI_DEVICE_ID_PROMISE_20246) 315 316 hwif->resetproc = &pdc202xx_reset; 316 317 317 318 if (hwif->dma_base == 0) ··· 322 319 hwif->dma_lost_irq = &pdc202xx_dma_lost_irq; 323 320 hwif->dma_timeout = &pdc202xx_dma_timeout; 324 321 325 - if (hwif->pci_dev->device != PCI_DEVICE_ID_PROMISE_20246) { 322 + if (dev->device != PCI_DEVICE_ID_PROMISE_20246) { 326 323 if (hwif->cbl != ATA_CBL_PATA40_SHORT) 327 324 hwif->cbl = pdc202xx_old_cable_detect(hwif); 328 325
+3 -3
drivers/ide/pci/piix.c
··· 71 71 static void piix_set_pio_mode(ide_drive_t *drive, const u8 pio) 72 72 { 73 73 ide_hwif_t *hwif = HWIF(drive); 74 - struct pci_dev *dev = hwif->pci_dev; 74 + struct pci_dev *dev = to_pci_dev(hwif->dev); 75 75 int is_slave = drive->dn & 1; 76 76 int master_port = hwif->channel ? 0x42 : 0x40; 77 77 int slave_port = 0x44; ··· 140 140 static void piix_set_dma_mode(ide_drive_t *drive, const u8 speed) 141 141 { 142 142 ide_hwif_t *hwif = HWIF(drive); 143 - struct pci_dev *dev = hwif->pci_dev; 143 + struct pci_dev *dev = to_pci_dev(hwif->dev); 144 144 u8 maslave = hwif->channel ? 0x42 : 0x40; 145 145 int a_speed = 3 << (drive->dn * 4); 146 146 int u_flag = 1 << drive->dn; ··· 260 260 261 261 static u8 __devinit piix_cable_detect(ide_hwif_t *hwif) 262 262 { 263 - struct pci_dev *pdev = hwif->pci_dev; 263 + struct pci_dev *pdev = to_pci_dev(hwif->dev); 264 264 const struct ich_laptop *lap = &ich_laptop[0]; 265 265 u8 reg54h = 0, mask = hwif->channel ? 0xc0 : 0x30; 266 266
+1 -1
drivers/ide/pci/rz1000.c
··· 32 32 33 33 static void __devinit init_hwif_rz1000 (ide_hwif_t *hwif) 34 34 { 35 + struct pci_dev *dev = to_pci_dev(hwif->dev); 35 36 u16 reg; 36 - struct pci_dev *dev = hwif->pci_dev; 37 37 38 38 if (!pci_read_config_word (dev, 0x40, &reg) && 39 39 !pci_write_config_word(dev, 0x40, reg & 0xdfff)) {
+6 -6
drivers/ide/pci/sc1200.c
··· 87 87 static void sc1200_tunepio(ide_drive_t *drive, u8 pio) 88 88 { 89 89 ide_hwif_t *hwif = drive->hwif; 90 - struct pci_dev *pdev = hwif->pci_dev; 90 + struct pci_dev *pdev = to_pci_dev(hwif->dev); 91 91 unsigned int basereg = hwif->channel ? 0x50 : 0x40, format = 0; 92 92 93 93 pci_read_config_dword(pdev, basereg + 4, &format); ··· 130 130 static void sc1200_set_dma_mode(ide_drive_t *drive, const u8 mode) 131 131 { 132 132 ide_hwif_t *hwif = HWIF(drive); 133 + struct pci_dev *dev = to_pci_dev(hwif->dev); 133 134 int unit = drive->select.b.unit; 134 135 unsigned int reg, timings; 135 136 unsigned short pci_clock; ··· 161 160 timings = mwdma_timing[pci_clock][mode - XFER_MW_DMA_0]; 162 161 163 162 if (unit == 0) { /* are we configuring drive0? */ 164 - pci_read_config_dword(hwif->pci_dev, basereg+4, &reg); 163 + pci_read_config_dword(dev, basereg + 4, &reg); 165 164 timings |= reg & 0x80000000; /* preserve PIO format bit */ 166 - pci_write_config_dword(hwif->pci_dev, basereg+4, timings); 167 - } else { 168 - pci_write_config_dword(hwif->pci_dev, basereg+12, timings); 169 - } 165 + pci_write_config_dword(dev, basereg + 4, timings); 166 + } else 167 + pci_write_config_dword(dev, basereg + 12, timings); 170 168 } 171 169 172 170 /* Replacement for the standard ide_dma_end action in
+6 -7
drivers/ide/pci/scc_pata.c
··· 594 594 595 595 static void __devinit init_mmio_iops_scc(ide_hwif_t *hwif) 596 596 { 597 - struct pci_dev *dev = hwif->pci_dev; 597 + struct pci_dev *dev = to_pci_dev(hwif->dev); 598 598 struct scc_ports *ports = pci_get_drvdata(dev); 599 599 unsigned long dma_base = ports->dma; 600 600 ··· 620 620 hwif->io_ports[IDE_STATUS_OFFSET] = dma_base + 0x3c; 621 621 hwif->io_ports[IDE_CONTROL_OFFSET] = dma_base + 0x40; 622 622 623 - hwif->irq = hwif->pci_dev->irq; 623 + hwif->irq = dev->irq; 624 624 hwif->dma_base = dma_base; 625 625 hwif->config_data = ports->ctl; 626 626 hwif->mmio = 1; ··· 636 636 637 637 static void __devinit init_iops_scc(ide_hwif_t *hwif) 638 638 { 639 - struct pci_dev *dev = hwif->pci_dev; 639 + struct pci_dev *dev = to_pci_dev(hwif->dev); 640 + 640 641 hwif->hwif_data = NULL; 641 642 if (pci_get_drvdata(dev) == NULL) 642 643 return; ··· 727 726 unsigned long dma_size = pci_resource_len(dev, 1); 728 727 729 728 if (hwif->dmatable_cpu) { 730 - pci_free_consistent(hwif->pci_dev, 731 - PRD_ENTRIES * PRD_BYTES, 732 - hwif->dmatable_cpu, 733 - hwif->dmatable_dma); 729 + pci_free_consistent(dev, PRD_ENTRIES * PRD_BYTES, 730 + hwif->dmatable_cpu, hwif->dmatable_dma); 734 731 hwif->dmatable_cpu = NULL; 735 732 } 736 733
+11 -7
drivers/ide/pci/serverworks.c
··· 67 67 68 68 static u8 svwks_udma_filter(ide_drive_t *drive) 69 69 { 70 - struct pci_dev *dev = HWIF(drive)->pci_dev; 70 + struct pci_dev *dev = to_pci_dev(drive->hwif->dev); 71 71 u8 mask = 0; 72 72 73 73 if (dev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE) ··· 130 130 static const u8 pio_modes[] = { 0x5d, 0x47, 0x34, 0x22, 0x20 }; 131 131 static const u8 drive_pci[] = { 0x41, 0x40, 0x43, 0x42 }; 132 132 133 - struct pci_dev *dev = drive->hwif->pci_dev; 133 + struct pci_dev *dev = to_pci_dev(drive->hwif->dev); 134 134 135 135 pci_write_config_byte(dev, drive_pci[drive->dn], pio_modes[pio]); 136 136 ··· 153 153 static const u8 drive_pci2[] = { 0x45, 0x44, 0x47, 0x46 }; 154 154 155 155 ide_hwif_t *hwif = HWIF(drive); 156 - struct pci_dev *dev = hwif->pci_dev; 156 + struct pci_dev *dev = to_pci_dev(hwif->dev); 157 157 u8 unit = (drive->select.b.unit & 0x01); 158 158 159 159 u8 ultra_enable = 0, ultra_timing = 0, dma_timing = 0; ··· 287 287 */ 288 288 static u8 __devinit ata66_svwks_dell(ide_hwif_t *hwif) 289 289 { 290 - struct pci_dev *dev = hwif->pci_dev; 290 + struct pci_dev *dev = to_pci_dev(hwif->dev); 291 + 291 292 if (dev->subsystem_vendor == PCI_VENDOR_ID_DELL && 292 293 dev->vendor == PCI_VENDOR_ID_SERVERWORKS && 293 294 (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE || ··· 306 305 */ 307 306 static u8 __devinit ata66_svwks_cobalt(ide_hwif_t *hwif) 308 307 { 309 - struct pci_dev *dev = hwif->pci_dev; 308 + struct pci_dev *dev = to_pci_dev(hwif->dev); 309 + 310 310 if (dev->subsystem_vendor == PCI_VENDOR_ID_SUN && 311 311 dev->vendor == PCI_VENDOR_ID_SERVERWORKS && 312 312 dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE) ··· 318 316 319 317 static u8 __devinit ata66_svwks(ide_hwif_t *hwif) 320 318 { 321 - struct pci_dev *dev = hwif->pci_dev; 319 + struct pci_dev *dev = to_pci_dev(hwif->dev); 322 320 323 321 /* Server Works */ 324 322 if (dev->subsystem_vendor == PCI_VENDOR_ID_SERVERWORKS) ··· 342 340 343 341 static void __devinit init_hwif_svwks (ide_hwif_t *hwif) 344 342 { 343 + struct pci_dev *dev = to_pci_dev(hwif->dev); 344 + 345 345 hwif->set_pio_mode = &svwks_set_pio_mode; 346 346 hwif->set_dma_mode = &svwks_set_dma_mode; 347 347 hwif->udma_filter = &svwks_udma_filter; ··· 351 347 if (!hwif->dma_base) 352 348 return; 353 349 354 - if (hwif->pci_dev->device != PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) { 350 + if (dev->device != PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) { 355 351 if (hwif->cbl != ATA_CBL_PATA40_SHORT) 356 352 hwif->cbl = ata66_svwks(hwif); 357 353 }
+8 -8
drivers/ide/pci/sgiioc4.c
··· 159 159 } 160 160 161 161 if (intr_reg & 0x02) { 162 + struct pci_dev *dev = to_pci_dev(hwif->dev); 162 163 /* Error when transferring DMA data on PCI bus */ 163 164 u32 pci_err_addr_low, pci_err_addr_high, 164 165 pci_stat_cmd_reg; ··· 168 167 readl((void __iomem *)hwif->io_ports[IDE_IRQ_OFFSET]); 169 168 pci_err_addr_high = 170 169 readl((void __iomem *)(hwif->io_ports[IDE_IRQ_OFFSET] + 4)); 171 - pci_read_config_dword(hwif->pci_dev, PCI_COMMAND, 170 + pci_read_config_dword(dev, PCI_COMMAND, 172 171 &pci_stat_cmd_reg); 173 172 printk(KERN_ERR 174 173 "%s(%s) : PCI Bus Error when doing DMA:" ··· 179 178 __FUNCTION__, drive->name, 180 179 pci_err_addr_high, pci_err_addr_low); 181 180 /* Clear the PCI Error indicator */ 182 - pci_write_config_dword(hwif->pci_dev, PCI_COMMAND, 183 - 0x00000146); 181 + pci_write_config_dword(dev, PCI_COMMAND, 0x00000146); 184 182 } 185 183 186 184 /* Clear the Interrupt, Error bits on the IOC4 */ ··· 334 334 static int __devinit 335 335 ide_dma_sgiioc4(ide_hwif_t * hwif, unsigned long dma_base) 336 336 { 337 + struct pci_dev *dev = to_pci_dev(hwif->dev); 337 338 void __iomem *virt_dma_base; 338 339 int num_ports = sizeof (ioc4_dma_regs_t); 339 340 void *pad; ··· 360 359 } 361 360 hwif->dma_base = (unsigned long) virt_dma_base; 362 361 363 - hwif->dmatable_cpu = pci_alloc_consistent(hwif->pci_dev, 362 + hwif->dmatable_cpu = pci_alloc_consistent(dev, 364 363 IOC4_PRD_ENTRIES * IOC4_PRD_BYTES, 365 364 &hwif->dmatable_dma); 366 365 ··· 369 368 370 369 hwif->sg_max_nents = IOC4_PRD_ENTRIES; 371 370 372 - pad = pci_alloc_consistent(hwif->pci_dev, IOC4_IDE_CACHELINE_SIZE, 371 + pad = pci_alloc_consistent(dev, IOC4_IDE_CACHELINE_SIZE, 373 372 (dma_addr_t *) &(hwif->dma_status)); 374 373 375 374 if (pad) { ··· 377 376 return 0; 378 377 } 379 378 380 - pci_free_consistent(hwif->pci_dev, 381 - IOC4_PRD_ENTRIES * IOC4_PRD_BYTES, 379 + pci_free_consistent(dev, IOC4_PRD_ENTRIES * IOC4_PRD_BYTES, 382 380 hwif->dmatable_cpu, hwif->dmatable_dma); 383 381 printk(KERN_INFO 384 382 "%s() -- Error! Unable to allocate DMA Maps for drive %s\n", ··· 640 640 hw.dev = &dev->dev; 641 641 ide_init_port_hw(hwif, &hw); 642 642 643 - hwif->pci_dev = dev; 643 + hwif->dev = &dev->dev; 644 644 hwif->channel = 0; /* Single Channel chip */ 645 645 646 646 /* The IOC4 uses MMIO rather than Port IO. */
+30 -21
drivers/ide/pci/siimage.c
··· 79 79 80 80 static inline int is_sata(ide_hwif_t *hwif) 81 81 { 82 - return pdev_is_sata(hwif->pci_dev); 82 + return pdev_is_sata(to_pci_dev(hwif->dev)); 83 83 } 84 84 85 85 /** ··· 140 140 static u8 sil_pata_udma_filter(ide_drive_t *drive) 141 141 { 142 142 ide_hwif_t *hwif = drive->hwif; 143 + struct pci_dev *dev = to_pci_dev(hwif->dev); 143 144 unsigned long base = (unsigned long) hwif->hwif_data; 144 145 u8 mask = 0, scsc = 0; 145 146 146 147 if (hwif->mmio) 147 148 scsc = hwif->INB(base + 0x4A); 148 149 else 149 - pci_read_config_byte(hwif->pci_dev, 0x8A, &scsc); 150 + pci_read_config_byte(dev, 0x8A, &scsc); 150 151 151 152 if ((scsc & 0x30) == 0x10) /* 133 */ 152 153 mask = ATA_UDMA6; ··· 220 219 mode |= (unit ? 0x10 : 0x01); 221 220 hwif->OUTB(mode, base + addr_mask); 222 221 } else { 223 - pci_write_config_word(hwif->pci_dev, addr, speedp); 224 - pci_write_config_word(hwif->pci_dev, tfaddr, speedt); 225 - pci_read_config_word(hwif->pci_dev, tfaddr-2, &speedp); 222 + struct pci_dev *dev = to_pci_dev(hwif->dev); 223 + 224 + pci_write_config_word(dev, addr, speedp); 225 + pci_write_config_word(dev, tfaddr, speedt); 226 + pci_read_config_word(dev, tfaddr - 2, &speedp); 226 227 speedp &= ~0x200; 227 228 /* Set IORDY for mode 3 or 4 */ 228 229 if (pio > 2) 229 230 speedp |= 0x200; 230 - pci_write_config_word(hwif->pci_dev, tfaddr-2, speedp); 231 + pci_write_config_word(dev, tfaddr - 2, speedp); 231 232 232 - pci_read_config_byte(hwif->pci_dev, addr_mask, &mode); 233 + pci_read_config_byte(dev, addr_mask, &mode); 233 234 mode &= ~(unit ? 0x30 : 0x03); 234 235 mode |= (unit ? 0x10 : 0x01); 235 - pci_write_config_byte(hwif->pci_dev, addr_mask, mode); 236 + pci_write_config_byte(dev, addr_mask, mode); 236 237 } 237 238 } 238 239 ··· 253 250 u16 dma[] = { 0x2208, 0x10C2, 0x10C1 }; 254 251 255 252 ide_hwif_t *hwif = HWIF(drive); 253 + struct pci_dev *dev = to_pci_dev(hwif->dev); 256 254 u16 ultra = 0, multi = 0; 257 255 u8 mode = 0, unit = drive->select.b.unit; 258 256 unsigned long base = (unsigned long)hwif->hwif_data; ··· 270 266 multi = hwif->INW(ma); 271 267 ultra = hwif->INW(ua); 272 268 } else { 273 - pci_read_config_byte(hwif->pci_dev, 0x8A, &scsc); 274 - pci_read_config_byte(hwif->pci_dev, addr_mask, &mode); 275 - pci_read_config_word(hwif->pci_dev, ma, &multi); 276 - pci_read_config_word(hwif->pci_dev, ua, &ultra); 269 + pci_read_config_byte(dev, 0x8A, &scsc); 270 + pci_read_config_byte(dev, addr_mask, &mode); 271 + pci_read_config_word(dev, ma, &multi); 272 + pci_read_config_word(dev, ua, &ultra); 277 273 } 278 274 279 275 mode &= ~((unit) ? 0x30 : 0x03); ··· 297 293 hwif->OUTW(multi, ma); 298 294 hwif->OUTW(ultra, ua); 299 295 } else { 300 - pci_write_config_byte(hwif->pci_dev, addr_mask, mode); 301 - pci_write_config_word(hwif->pci_dev, ma, multi); 302 - pci_write_config_word(hwif->pci_dev, ua, ultra); 296 + pci_write_config_byte(dev, addr_mask, mode); 297 + pci_write_config_word(dev, ma, multi); 298 + pci_write_config_word(dev, ua, ultra); 303 299 } 304 300 } 305 301 ··· 307 303 static int siimage_io_ide_dma_test_irq (ide_drive_t *drive) 308 304 { 309 305 ide_hwif_t *hwif = HWIF(drive); 306 + struct pci_dev *dev = to_pci_dev(hwif->dev); 310 307 u8 dma_altstat = 0; 311 308 unsigned long addr = siimage_selreg(hwif, 1); 312 309 ··· 316 311 return 1; 317 312 318 313 /* return 1 if Device INTR asserted */ 319 - pci_read_config_byte(hwif->pci_dev, addr, &dma_altstat); 314 + pci_read_config_byte(dev, addr, &dma_altstat); 320 315 if (dma_altstat & 8) 321 316 return 0; //return 1; 322 317 return 0; ··· 382 377 static int sil_sata_busproc(ide_drive_t * drive, int state) 383 378 { 384 379 ide_hwif_t *hwif = HWIF(drive); 380 + struct pci_dev *dev = to_pci_dev(hwif->dev); 385 381 u32 stat_config = 0; 386 382 unsigned long addr = siimage_selreg(hwif, 0); 387 383 388 384 if (hwif->mmio) 389 385 stat_config = readl((void __iomem *)addr); 390 386 else 391 - pci_read_config_dword(hwif->pci_dev, addr, &stat_config); 387 + pci_read_config_dword(dev, addr, &stat_config); 392 388 393 389 switch (state) { 394 390 case BUSSTATE_ON: ··· 649 643 650 644 static void __devinit init_mmio_iops_siimage(ide_hwif_t *hwif) 651 645 { 652 - struct pci_dev *dev = hwif->pci_dev; 646 + struct pci_dev *dev = to_pci_dev(hwif->dev); 653 647 void *addr = pci_get_drvdata(dev); 654 648 u8 ch = hwif->channel; 655 649 hw_regs_t hw; ··· 762 756 763 757 static void __devinit init_iops_siimage(ide_hwif_t *hwif) 764 758 { 759 + struct pci_dev *dev = to_pci_dev(hwif->dev); 760 + 765 761 hwif->hwif_data = NULL; 766 762 767 763 /* Pessimal until we finish probing */ 768 764 hwif->rqsize = 15; 769 765 770 - if (pci_get_drvdata(hwif->pci_dev) == NULL) 766 + if (pci_get_drvdata(dev) == NULL) 771 767 return; 772 768 773 769 init_mmio_iops_siimage(hwif); ··· 785 777 786 778 static u8 __devinit ata66_siimage(ide_hwif_t *hwif) 787 779 { 780 + struct pci_dev *dev = to_pci_dev(hwif->dev); 788 781 unsigned long addr = siimage_selreg(hwif, 0); 789 782 u8 ata66 = 0; 790 783 791 - if (pci_get_drvdata(hwif->pci_dev) == NULL) 792 - pci_read_config_byte(hwif->pci_dev, addr, &ata66); 784 + if (pci_get_drvdata(dev) == NULL) 785 + pci_read_config_byte(dev, addr, &ata66); 793 786 else 794 787 ata66 = hwif->INB(addr); 795 788
+11 -11
drivers/ide/pci/sis5513.c
··· 197 197 198 198 static u8 sis_ata133_get_base(ide_drive_t *drive) 199 199 { 200 - struct pci_dev *dev = drive->hwif->pci_dev; 200 + struct pci_dev *dev = to_pci_dev(drive->hwif->dev); 201 201 u32 reg54 = 0; 202 202 203 203 pci_read_config_dword(dev, 0x54, &reg54); ··· 207 207 208 208 static void sis_ata16_program_timings(ide_drive_t *drive, const u8 mode) 209 209 { 210 - struct pci_dev *dev = drive->hwif->pci_dev; 210 + struct pci_dev *dev = to_pci_dev(drive->hwif->dev); 211 211 u16 t1 = 0; 212 212 u8 drive_pci = 0x40 + drive->dn * 2; 213 213 ··· 230 230 231 231 static void sis_ata100_program_timings(ide_drive_t *drive, const u8 mode) 232 232 { 233 - struct pci_dev *dev = drive->hwif->pci_dev; 233 + struct pci_dev *dev = to_pci_dev(drive->hwif->dev); 234 234 u8 t1, drive_pci = 0x40 + drive->dn * 2; 235 235 236 236 /* timing bits: 7:4 active 3:0 recovery */ ··· 253 253 254 254 static void sis_ata133_program_timings(ide_drive_t *drive, const u8 mode) 255 255 { 256 - struct pci_dev *dev = drive->hwif->pci_dev; 256 + struct pci_dev *dev = to_pci_dev(drive->hwif->dev); 257 257 u32 t1 = 0; 258 258 u8 drive_pci = sis_ata133_get_base(drive), clk, idx; 259 259 ··· 286 286 static void config_drive_art_rwp (ide_drive_t *drive) 287 287 { 288 288 ide_hwif_t *hwif = HWIF(drive); 289 - struct pci_dev *dev = hwif->pci_dev; 289 + struct pci_dev *dev = to_pci_dev(hwif->dev); 290 290 u8 reg4bh = 0; 291 291 u8 rw_prefetch = 0; 292 292 ··· 307 307 308 308 static void sis_ata133_program_udma_timings(ide_drive_t *drive, const u8 mode) 309 309 { 310 - struct pci_dev *dev = drive->hwif->pci_dev; 310 + struct pci_dev *dev = to_pci_dev(drive->hwif->dev); 311 311 u32 regdw = 0; 312 312 u8 drive_pci = sis_ata133_get_base(drive), clk, idx; 313 313 ··· 326 326 327 327 static void sis_ata33_program_udma_timings(ide_drive_t *drive, const u8 mode) 328 328 { 329 - struct pci_dev *dev = drive->hwif->pci_dev; 329 + struct pci_dev *dev = to_pci_dev(drive->hwif->dev); 330 330 u8 drive_pci = 0x40 + drive->dn * 2, reg = 0, i = chipset_family; 331 331 332 332 pci_read_config_byte(dev, drive_pci + 1, &reg); ··· 359 359 360 360 static u8 sis5513_ata133_udma_filter(ide_drive_t *drive) 361 361 { 362 - struct pci_dev *dev = drive->hwif->pci_dev; 362 + struct pci_dev *dev = to_pci_dev(drive->hwif->dev); 363 363 u32 regdw = 0; 364 364 u8 drive_pci = sis_ata133_get_base(drive); 365 365 ··· 530 530 531 531 static u8 __devinit ata66_sis5513(ide_hwif_t *hwif) 532 532 { 533 - struct pci_dev *pdev = hwif->pci_dev; 533 + struct pci_dev *pdev = to_pci_dev(hwif->dev); 534 534 const struct sis_laptop *lap = &sis_laptop[0]; 535 535 u8 ata66 = 0; 536 536 ··· 545 545 if (chipset_family >= ATA_133) { 546 546 u16 regw = 0; 547 547 u16 reg_addr = hwif->channel ? 0x52: 0x50; 548 - pci_read_config_word(hwif->pci_dev, reg_addr, &regw); 548 + pci_read_config_word(pdev, reg_addr, &regw); 549 549 ata66 = (regw & 0x8000) ? 0 : 1; 550 550 } else if (chipset_family >= ATA_66) { 551 551 u8 reg48h = 0; 552 552 u8 mask = hwif->channel ? 0x20 : 0x10; 553 - pci_read_config_byte(hwif->pci_dev, 0x48, &reg48h); 553 + pci_read_config_byte(pdev, 0x48, &reg48h); 554 554 ata66 = (reg48h & mask) ? 0 : 1; 555 555 } 556 556
+10 -7
drivers/ide/pci/sl82c105.c
··· 78 78 */ 79 79 static void sl82c105_set_pio_mode(ide_drive_t *drive, const u8 pio) 80 80 { 81 - struct pci_dev *dev = HWIF(drive)->pci_dev; 81 + struct pci_dev *dev = to_pci_dev(drive->hwif->dev); 82 82 int reg = 0x44 + drive->dn * 4; 83 83 u16 drv_ctrl; 84 84 ··· 147 147 static void sl82c105_dma_lost_irq(ide_drive_t *drive) 148 148 { 149 149 ide_hwif_t *hwif = HWIF(drive); 150 - struct pci_dev *dev = hwif->pci_dev; 150 + struct pci_dev *dev = to_pci_dev(hwif->dev); 151 151 u32 val, mask = hwif->channel ? CTRL_IDE_IRQB : CTRL_IDE_IRQA; 152 152 u8 dma_cmd; 153 153 ··· 184 184 static void sl82c105_dma_start(ide_drive_t *drive) 185 185 { 186 186 ide_hwif_t *hwif = HWIF(drive); 187 - struct pci_dev *dev = hwif->pci_dev; 187 + struct pci_dev *dev = to_pci_dev(hwif->dev); 188 188 int reg = 0x44 + drive->dn * 4; 189 189 190 190 DBG(("%s(drive:%s)\n", __FUNCTION__, drive->name)); ··· 197 197 198 198 static void sl82c105_dma_timeout(ide_drive_t *drive) 199 199 { 200 + struct pci_dev *dev = to_pci_dev(drive->hwif->dev); 201 + 200 202 DBG(("sl82c105_dma_timeout(drive:%s)\n", drive->name)); 201 203 202 - sl82c105_reset_host(HWIF(drive)->pci_dev); 204 + sl82c105_reset_host(dev); 203 205 ide_dma_timeout(drive); 204 206 } 205 207 206 208 static int sl82c105_dma_end(ide_drive_t *drive) 207 209 { 208 - struct pci_dev *dev = HWIF(drive)->pci_dev; 210 + struct pci_dev *dev = to_pci_dev(drive->hwif->dev); 209 211 int reg = 0x44 + drive->dn * 4; 210 212 int ret; 211 213 ··· 226 224 */ 227 225 static void sl82c105_resetproc(ide_drive_t *drive) 228 226 { 229 - struct pci_dev *dev = HWIF(drive)->pci_dev; 227 + struct pci_dev *dev = to_pci_dev(drive->hwif->dev); 230 228 u32 val; 231 229 232 230 DBG(("sl82c105_resetproc(drive:%s)\n", drive->name)); ··· 295 293 */ 296 294 static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif) 297 295 { 296 + struct pci_dev *dev = to_pci_dev(hwif->dev); 298 297 unsigned int rev; 299 298 300 299 DBG(("init_hwif_sl82c105(hwif: ide%d)\n", hwif->index)); ··· 307 304 if (!hwif->dma_base) 308 305 return; 309 306 310 - rev = sl82c105_bridge_revision(hwif->pci_dev); 307 + rev = sl82c105_bridge_revision(dev); 311 308 if (rev <= 5) { 312 309 /* 313 310 * Never ever EVER under any circumstances enable
+4 -3
drivers/ide/pci/slc90e66.c
··· 26 26 static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio) 27 27 { 28 28 ide_hwif_t *hwif = HWIF(drive); 29 - struct pci_dev *dev = hwif->pci_dev; 29 + struct pci_dev *dev = to_pci_dev(hwif->dev); 30 30 int is_slave = drive->dn & 1; 31 31 int master_port = hwif->channel ? 0x42 : 0x40; 32 32 int slave_port = 0x44; ··· 79 79 static void slc90e66_set_dma_mode(ide_drive_t *drive, const u8 speed) 80 80 { 81 81 ide_hwif_t *hwif = HWIF(drive); 82 - struct pci_dev *dev = hwif->pci_dev; 82 + struct pci_dev *dev = to_pci_dev(hwif->dev); 83 83 u8 maslave = hwif->channel ? 0x42 : 0x40; 84 84 int sitre = 0, a_speed = 7 << (drive->dn * 4); 85 85 int u_speed = 0, u_flag = 1 << drive->dn; ··· 122 122 123 123 static void __devinit init_hwif_slc90e66 (ide_hwif_t *hwif) 124 124 { 125 + struct pci_dev *dev = to_pci_dev(hwif->dev); 125 126 u8 reg47 = 0; 126 127 u8 mask = hwif->channel ? 0x01 : 0x02; /* bit0:Primary */ 127 128 128 129 hwif->set_pio_mode = &slc90e66_set_pio_mode; 129 130 hwif->set_dma_mode = &slc90e66_set_dma_mode; 130 131 131 - pci_read_config_byte(hwif->pci_dev, 0x47, &reg47); 132 + pci_read_config_byte(dev, 0x47, &reg47); 132 133 133 134 if (hwif->dma_base == 0) 134 135 return;
+2 -1
drivers/ide/pci/tc86c001.c
··· 164 164 165 165 static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif) 166 166 { 167 - unsigned long sc_base = pci_resource_start(hwif->pci_dev, 5); 167 + struct pci_dev *dev = to_pci_dev(hwif->dev); 168 + unsigned long sc_base = pci_resource_start(dev, 5); 168 169 u16 scr1 = inw(sc_base + 0x00); 169 170 170 171 /* System Control 1 Register bit 15 (Soft Reset) set */
+1 -1
drivers/ide/pci/triflex.c
··· 43 43 static void triflex_set_mode(ide_drive_t *drive, const u8 speed) 44 44 { 45 45 ide_hwif_t *hwif = HWIF(drive); 46 - struct pci_dev *dev = hwif->pci_dev; 46 + struct pci_dev *dev = to_pci_dev(hwif->dev); 47 47 u8 channel_offset = hwif->channel ? 0x74 : 0x70; 48 48 u16 timing = 0; 49 49 u32 triflex_timings = 0;
+1 -1
drivers/ide/pci/trm290.c
··· 245 245 246 246 static void __devinit init_hwif_trm290(ide_hwif_t *hwif) 247 247 { 248 - struct pci_dev *dev = hwif->pci_dev; 248 + struct pci_dev *dev = to_pci_dev(hwif->dev); 249 249 unsigned int cfg_base = pci_resource_start(dev, 4); 250 250 unsigned long flags; 251 251 u8 reg = 0;
+7 -5
drivers/ide/pci/via82cxxx.c
··· 121 121 122 122 static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ide_timing *timing) 123 123 { 124 - struct pci_dev *dev = hwif->pci_dev; 125 - struct via82cxxx_dev *vdev = pci_get_drvdata(hwif->pci_dev); 124 + struct pci_dev *dev = to_pci_dev(hwif->dev); 125 + struct via82cxxx_dev *vdev = pci_get_drvdata(dev); 126 126 u8 t; 127 127 128 128 if (~vdev->via_config->flags & VIA_BAD_AST) { ··· 159 159 160 160 static void via_set_drive(ide_drive_t *drive, const u8 speed) 161 161 { 162 - ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1); 163 - struct via82cxxx_dev *vdev = pci_get_drvdata(drive->hwif->pci_dev); 162 + ide_hwif_t *hwif = drive->hwif; 163 + ide_drive_t *peer = hwif->drives + (~drive->dn & 1); 164 + struct pci_dev *dev = to_pci_dev(hwif->dev); 165 + struct via82cxxx_dev *vdev = pci_get_drvdata(dev); 164 166 struct ide_timing t, p; 165 167 unsigned int T, UT; 166 168 ··· 410 408 411 409 static u8 __devinit via82cxxx_cable_detect(ide_hwif_t *hwif) 412 410 { 413 - struct pci_dev *pdev = hwif->pci_dev; 411 + struct pci_dev *pdev = to_pci_dev(hwif->dev); 414 412 struct via82cxxx_dev *vdev = pci_get_drvdata(pdev); 415 413 416 414 if (via_cable_override(pdev))
+6 -4
drivers/ide/ppc/pmac.c
··· 1200 1200 base = ioremap(macio_resource_start(mdev, 0), 0x400); 1201 1201 regbase = (unsigned long) base; 1202 1202 1203 - hwif->pci_dev = mdev->bus->pdev; 1203 + hwif->dev = &mdev->bus->pdev->dev; 1204 1204 1205 1205 pmif->mdev = mdev; 1206 1206 pmif->node = mdev->ofdev.node; ··· 1315 1315 return -ENXIO; 1316 1316 } 1317 1317 1318 - hwif->pci_dev = pdev; 1318 + hwif->dev = &pdev->dev; 1319 1319 pmif->mdev = NULL; 1320 1320 pmif->node = np; 1321 1321 ··· 1725 1725 static void __devinit 1726 1726 pmac_ide_setup_dma(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif) 1727 1727 { 1728 + struct pci_dev *dev = to_pci_dev(hwif->dev); 1729 + 1728 1730 /* We won't need pci_dev if we switch to generic consistent 1729 1731 * DMA routines ... 1730 1732 */ 1731 - if (hwif->pci_dev == NULL) 1733 + if (dev == NULL) 1732 1734 return; 1733 1735 /* 1734 1736 * Allocate space for the DBDMA commands. ··· 1738 1736 * aligning the start address to a multiple of 16 bytes. 1739 1737 */ 1740 1738 pmif->dma_table_cpu = (struct dbdma_cmd*)pci_alloc_consistent( 1741 - hwif->pci_dev, 1739 + dev, 1742 1740 (MAX_DCMDS + 2) * sizeof(struct dbdma_cmd), 1743 1741 &hwif->dmatable_dma); 1744 1742 if (pmif->dma_table_cpu == NULL) {
+3 -3
drivers/ide/setup-pci.c
··· 162 162 163 163 static unsigned long ide_get_or_set_dma_base(const struct ide_port_info *d, ide_hwif_t *hwif) 164 164 { 165 - unsigned long dma_base = 0; 166 - struct pci_dev *dev = hwif->pci_dev; 165 + struct pci_dev *dev = to_pci_dev(hwif->dev); 166 + unsigned long dma_base = 0; 167 167 u8 dma_stat = 0; 168 168 169 169 if (hwif->mmio) ··· 391 391 392 392 hwif->noprobe = oldnoprobe; 393 393 394 - hwif->pci_dev = dev; 394 + hwif->dev = &dev->dev; 395 395 hwif->cds = d; 396 396 hwif->channel = port; 397 397
+3 -2
include/linux/ide.h
··· 503 503 504 504 hwif_chipset_t chipset; /* sub-module for tuning.. */ 505 505 506 - struct pci_dev *pci_dev; /* for pci chipsets */ 506 + struct device *dev; 507 + 507 508 const struct ide_port_info *cds; /* chipset device struct */ 508 509 509 510 ide_ack_intr_t *ack_intr; ··· 1300 1299 1301 1300 static inline int hwif_to_node(ide_hwif_t *hwif) 1302 1301 { 1303 - struct pci_dev *dev = hwif->pci_dev; 1302 + struct pci_dev *dev = to_pci_dev(hwif->dev); 1304 1303 return dev ? pcibus_to_node(dev->bus) : -1; 1305 1304 } 1306 1305