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Merge branch 'net-convert-gianfar-triple-speed-ethernet-controller-bindings-to-yaml'

J. Neuschäfer says:

====================
net: Convert Gianfar (Triple Speed Ethernet Controller) bindings to YAML

The aim of this series is to modernize the device tree bindings for the
Freescale "Gianfar" ethernet controller (a.k.a. TSEC, Triple Speed
Ethernet Controller) by converting them to YAML.

v1: https://lore.kernel.org/20250220-gianfar-yaml-v1-0-0ba97fd1ef92@posteo.net
====================

Link: https://patch.msgid.link/20250228-gianfar-yaml-v2-0-6beeefbd4818@posteo.net
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

+363 -77
+112
Documentation/devicetree/bindings/net/fsl,gianfar-mdio.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/net/fsl,gianfar-mdio.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Freescale Gianfar (TSEC) MDIO Device 8 + 9 + description: 10 + This binding describes the MDIO is a bus to which the PHY devices are 11 + connected. For each device that exists on this bus, a child node should be 12 + created. 13 + 14 + Some TSECs are associated with an internal Ten-Bit Interface (TBI) PHY. This 15 + PHY is accessed through the local MDIO bus. These buses are defined similarly 16 + to the mdio buses, except they are compatible with "fsl,gianfar-tbi". The TBI 17 + PHYs underneath them are similar to normal PHYs, but the reg property is 18 + considered instructive, rather than descriptive. The reg property should be 19 + chosen so it doesn't interfere with other PHYs on the bus. 20 + 21 + maintainers: 22 + - J. Neuschäfer <j.ne@posteo.net> 23 + 24 + # This is needed to distinguish gianfar.yaml and gianfar-mdio.yaml, because 25 + # both use compatible = "gianfar" (with different device_type values) 26 + select: 27 + oneOf: 28 + - properties: 29 + compatible: 30 + contains: 31 + const: gianfar 32 + device_type: 33 + const: mdio 34 + required: 35 + - device_type 36 + 37 + - properties: 38 + compatible: 39 + contains: 40 + enum: 41 + - fsl,gianfar-tbi 42 + - fsl,gianfar-mdio 43 + - fsl,etsec2-tbi 44 + - fsl,etsec2-mdio 45 + - fsl,ucc-mdio 46 + - ucc_geth_phy 47 + 48 + required: 49 + - compatible 50 + 51 + properties: 52 + compatible: 53 + enum: 54 + - fsl,gianfar-tbi 55 + - fsl,gianfar-mdio 56 + - fsl,etsec2-tbi 57 + - fsl,etsec2-mdio 58 + - fsl,ucc-mdio 59 + - gianfar 60 + - ucc_geth_phy 61 + 62 + reg: 63 + minItems: 1 64 + items: 65 + - description: 66 + Offset and length of the register set for the device 67 + 68 + - description: 69 + Optionally, the offset and length of the TBIPA register (TBI PHY 70 + address register). If TBIPA register is not specified, the driver 71 + will attempt to infer it from the register set specified (your 72 + mileage may vary). 73 + 74 + device_type: 75 + const: mdio 76 + 77 + required: 78 + - reg 79 + - "#address-cells" 80 + - "#size-cells" 81 + 82 + allOf: 83 + - $ref: mdio.yaml# 84 + 85 + - if: 86 + properties: 87 + compatible: 88 + contains: 89 + const: ucc_geth_phy 90 + then: 91 + required: 92 + - device_type 93 + 94 + unevaluatedProperties: false 95 + 96 + examples: 97 + - | 98 + soc { 99 + #address-cells = <1>; 100 + #size-cells = <1>; 101 + 102 + mdio@24520 { 103 + reg = <0x24520 0x20>; 104 + compatible = "fsl,gianfar-mdio"; 105 + #address-cells = <1>; 106 + #size-cells = <0>; 107 + 108 + ethernet-phy@0 { 109 + reg = <0>; 110 + }; 111 + }; 112 + };
+248
Documentation/devicetree/bindings/net/fsl,gianfar.yaml
··· 1 + # SPDX-License-Identifier: GPL-2.0 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/net/fsl,gianfar.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Freescale Three-Speed Ethernet Controller (TSEC), "Gianfar" 8 + 9 + maintainers: 10 + - J. Neuschäfer <j.ne@posteo.net> 11 + 12 + # This is needed to distinguish gianfar.yaml and gianfar-mdio.yaml, because 13 + # both use compatible = "gianfar" (with different device_type values) 14 + select: 15 + oneOf: 16 + - properties: 17 + compatible: 18 + contains: 19 + const: gianfar 20 + device_type: 21 + const: network 22 + required: 23 + - device_type 24 + 25 + - properties: 26 + compatible: 27 + const: fsl,etsec2 28 + 29 + required: 30 + - compatible 31 + 32 + properties: 33 + compatible: 34 + enum: 35 + - gianfar 36 + - fsl,etsec2 37 + 38 + device_type: 39 + const: network 40 + 41 + model: 42 + enum: 43 + - FEC 44 + - TSEC 45 + - eTSEC 46 + 47 + reg: 48 + maxItems: 1 49 + 50 + ranges: true 51 + 52 + "#address-cells": 53 + enum: [ 1, 2 ] 54 + 55 + "#size-cells": 56 + enum: [ 1, 2 ] 57 + 58 + cell-index: 59 + $ref: /schemas/types.yaml#/definitions/uint32 60 + 61 + interrupts: 62 + minItems: 1 63 + items: 64 + - description: Transmit interrupt or single combined interrupt 65 + - description: Receive interrupt 66 + - description: Error interrupt 67 + 68 + dma-coherent: true 69 + 70 + fsl,magic-packet: 71 + type: boolean 72 + description: 73 + If present, indicates that the hardware supports waking up via magic packet. 74 + 75 + fsl,wake-on-filer: 76 + type: boolean 77 + description: 78 + If present, indicates that the hardware supports waking up by Filer 79 + General Purpose Interrupt (FGPI) asserted on the Rx int line. This is 80 + an advanced power management capability allowing certain packet types 81 + (user) defined by filer rules to wake up the system. 82 + 83 + bd-stash: 84 + type: boolean 85 + description: 86 + If present, indicates that the hardware supports stashing buffer 87 + descriptors in the L2. 88 + 89 + rx-stash-len: 90 + $ref: /schemas/types.yaml#/definitions/uint32 91 + description: 92 + Denotes the number of bytes of a received buffer to stash in the L2. 93 + 94 + rx-stash-idx: 95 + $ref: /schemas/types.yaml#/definitions/uint32 96 + description: 97 + Denotes the index of the first byte from the received buffer to stash in 98 + the L2. 99 + 100 + fsl,num_rx_queues: 101 + $ref: /schemas/types.yaml#/definitions/uint32 102 + description: Number of receive queues 103 + const: 8 104 + 105 + fsl,num_tx_queues: 106 + $ref: /schemas/types.yaml#/definitions/uint32 107 + description: Number of transmit queues 108 + const: 8 109 + 110 + tbi-handle: 111 + $ref: /schemas/types.yaml#/definitions/phandle 112 + description: Reference (phandle) to the TBI node 113 + 114 + required: 115 + - compatible 116 + - model 117 + 118 + patternProperties: 119 + "^mdio@[0-9a-f]+$": 120 + $ref: /schemas/net/fsl,gianfar-mdio.yaml# 121 + 122 + allOf: 123 + - $ref: ethernet-controller.yaml# 124 + 125 + # eTSEC2 controller nodes have "queue group" subnodes and don't need a "reg" 126 + # property. 127 + - if: 128 + properties: 129 + compatible: 130 + contains: 131 + const: fsl,etsec2 132 + then: 133 + patternProperties: 134 + "^queue-group@[0-9a-f]+$": 135 + type: object 136 + 137 + properties: 138 + reg: 139 + maxItems: 1 140 + 141 + interrupts: 142 + items: 143 + - description: Transmit interrupt 144 + - description: Receive interrupt 145 + - description: Error interrupt 146 + 147 + required: 148 + - reg 149 + - interrupts 150 + 151 + additionalProperties: false 152 + else: 153 + required: 154 + - reg 155 + 156 + # TSEC and eTSEC devices require three interrupts 157 + - if: 158 + properties: 159 + model: 160 + contains: 161 + enum: [ TSEC, eTSEC ] 162 + then: 163 + properties: 164 + interrupts: 165 + items: 166 + - description: Transmit interrupt 167 + - description: Receive interrupt 168 + - description: Error interrupt 169 + 170 + 171 + 172 + unevaluatedProperties: false 173 + 174 + examples: 175 + - | 176 + ethernet@24000 { 177 + device_type = "network"; 178 + model = "TSEC"; 179 + compatible = "gianfar"; 180 + reg = <0x24000 0x1000>; 181 + local-mac-address = [ 00 00 00 00 00 00 ]; 182 + interrupts = <29 2>, <30 2>, <34 2>; 183 + interrupt-parent = <&mpic>; 184 + phy-handle = <&phy0>; 185 + }; 186 + 187 + - | 188 + #include <dt-bindings/interrupt-controller/irq.h> 189 + 190 + ethernet@24000 { 191 + compatible = "gianfar"; 192 + reg = <0x24000 0x1000>; 193 + ranges = <0x0 0x24000 0x1000>; 194 + #address-cells = <1>; 195 + #size-cells = <1>; 196 + cell-index = <0>; 197 + device_type = "network"; 198 + model = "eTSEC"; 199 + local-mac-address = [ 00 00 00 00 00 00 ]; 200 + interrupts = <32 IRQ_TYPE_LEVEL_LOW>, 201 + <33 IRQ_TYPE_LEVEL_LOW>, 202 + <34 IRQ_TYPE_LEVEL_LOW>; 203 + interrupt-parent = <&ipic>; 204 + 205 + mdio@520 { 206 + #address-cells = <1>; 207 + #size-cells = <0>; 208 + compatible = "fsl,gianfar-mdio"; 209 + reg = <0x520 0x20>; 210 + }; 211 + }; 212 + 213 + - | 214 + #include <dt-bindings/interrupt-controller/irq.h> 215 + #include <dt-bindings/interrupt-controller/arm-gic.h> 216 + 217 + bus { 218 + #address-cells = <2>; 219 + #size-cells = <2>; 220 + 221 + ethernet { 222 + compatible = "fsl,etsec2"; 223 + ranges; 224 + device_type = "network"; 225 + #address-cells = <2>; 226 + #size-cells = <2>; 227 + interrupt-parent = <&gic>; 228 + model = "eTSEC"; 229 + fsl,magic-packet; 230 + dma-coherent; 231 + 232 + queue-group@2d10000 { 233 + reg = <0x0 0x2d10000 0x0 0x1000>; 234 + interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>, 235 + <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>, 236 + <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 237 + }; 238 + 239 + queue-group@2d14000 { 240 + reg = <0x0 0x2d14000 0x0 0x1000>; 241 + interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>, 242 + <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 243 + <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; 244 + }; 245 + }; 246 + }; 247 + 248 + ...
+3 -77
Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
··· 1 1 * MDIO IO device 2 2 3 - The MDIO is a bus to which the PHY devices are connected. For each 4 - device that exists on this bus, a child node should be created. See 5 - the definition of the PHY node in booting-without-of.txt for an example 6 - of how to define a PHY. 7 - 8 - Required properties: 9 - - reg : Offset and length of the register set for the device, and optionally 10 - the offset and length of the TBIPA register (TBI PHY address 11 - register). If TBIPA register is not specified, the driver will 12 - attempt to infer it from the register set specified (your mileage may 13 - vary). 14 - - compatible : Should define the compatible device type for the 15 - mdio. Currently supported strings/devices are: 16 - - "fsl,gianfar-tbi" 17 - - "fsl,gianfar-mdio" 18 - - "fsl,etsec2-tbi" 19 - - "fsl,etsec2-mdio" 20 - - "fsl,ucc-mdio" 21 - - "fsl,fman-mdio" 22 - When device_type is "mdio", the following strings are also considered: 23 - - "gianfar" 24 - - "ucc_geth_phy" 25 - 26 - Example: 27 - 28 - mdio@24520 { 29 - reg = <24520 20>; 30 - compatible = "fsl,gianfar-mdio"; 31 - 32 - ethernet-phy@0 { 33 - ...... 34 - }; 35 - }; 3 + Refer to Documentation/devicetree/bindings/net/fsl,gianfar-mdio.yaml 36 4 37 5 * TBI Internal MDIO bus 38 6 39 - As of this writing, every tsec is associated with an internal TBI PHY. 40 - This PHY is accessed through the local MDIO bus. These buses are defined 41 - similarly to the mdio buses, except they are compatible with "fsl,gianfar-tbi". 42 - The TBI PHYs underneath them are similar to normal PHYs, but the reg property 43 - is considered instructive, rather than descriptive. The reg property should 44 - be chosen so it doesn't interfere with other PHYs on the bus. 7 + Refer to Documentation/devicetree/bindings/net/fsl,gianfar-mdio.yaml 45 8 46 9 * Gianfar-compatible ethernet nodes 47 10 48 - Properties: 49 - 50 - - device_type : Should be "network" 51 - - model : Model of the device. Can be "TSEC", "eTSEC", or "FEC" 52 - - compatible : Should be "gianfar" 53 - - reg : Offset and length of the register set for the device 54 - - interrupts : For FEC devices, the first interrupt is the device's 55 - interrupt. For TSEC and eTSEC devices, the first interrupt is 56 - transmit, the second is receive, and the third is error. 57 - - phy-handle : See ethernet.txt file in the same directory. 58 - - fixed-link : See fixed-link.txt in the same directory. 59 - - phy-connection-type : See ethernet.txt file in the same directory. 60 - This property is only really needed if the connection is of type 61 - "rgmii-id", as all other connection types are detected by hardware. 62 - - fsl,magic-packet : If present, indicates that the hardware supports 63 - waking up via magic packet. 64 - - fsl,wake-on-filer : If present, indicates that the hardware supports 65 - waking up by Filer General Purpose Interrupt (FGPI) asserted on the 66 - Rx int line. This is an advanced power management capability allowing 67 - certain packet types (user) defined by filer rules to wake up the system. 68 - - bd-stash : If present, indicates that the hardware supports stashing 69 - buffer descriptors in the L2. 70 - - rx-stash-len : Denotes the number of bytes of a received buffer to stash 71 - in the L2. 72 - - rx-stash-idx : Denotes the index of the first byte from the received 73 - buffer to stash in the L2. 74 - 75 - Example: 76 - ethernet@24000 { 77 - device_type = "network"; 78 - model = "TSEC"; 79 - compatible = "gianfar"; 80 - reg = <0x24000 0x1000>; 81 - local-mac-address = [ 00 E0 0C 00 73 00 ]; 82 - interrupts = <29 2 30 2 34 2>; 83 - interrupt-parent = <&mpic>; 84 - phy-handle = <&phy0> 85 - }; 11 + Refer to Documentation/devicetree/bindings/net/fsl,gianfar.yaml 86 12 87 13 * Gianfar PTP clock nodes 88 14