tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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tty: xuartps: Refactor read-modify-writes

A lot of read-modify-write sequences used a one-line statement which
nests a readl() within a writel(). Convert this into code sequences that
make the three steps more obvious.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Soren Brinkmann and committed by
Greg Kroah-Hartman 35dc5a53 5ce15d2d

+24 -28
+24 -28
drivers/tty/serial/xilinx_uartps.c
··· 437 437 spin_lock_irqsave(&xuartps->port->lock, flags); 438 438 439 439 /* Disable the TX and RX to set baud rate */ 440 - xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) | 441 - (XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS), 442 - XUARTPS_CR_OFFSET); 440 + ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET); 441 + ctrl_reg |= XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS; 442 + xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET); 443 443 444 444 spin_unlock_irqrestore(&xuartps->port->lock, flags); 445 445 ··· 464 464 spin_lock_irqsave(&xuartps->port->lock, flags); 465 465 466 466 /* Set TX/RX Reset */ 467 - xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) | 468 - (XUARTPS_CR_TXRST | XUARTPS_CR_RXRST), 469 - XUARTPS_CR_OFFSET); 467 + ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET); 468 + ctrl_reg |= XUARTPS_CR_TXRST | XUARTPS_CR_RXRST; 469 + xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET); 470 470 471 471 while (xuartps_readl(XUARTPS_CR_OFFSET) & 472 472 (XUARTPS_CR_TXRST | XUARTPS_CR_RXRST)) ··· 479 479 */ 480 480 xuartps_writel(rx_timeout, XUARTPS_RXTOUT_OFFSET); 481 481 ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET); 482 - xuartps_writel( 483 - (ctrl_reg & ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS)) | 484 - (XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN), 485 - XUARTPS_CR_OFFSET); 482 + ctrl_reg &= ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS); 483 + ctrl_reg |= XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN; 484 + xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET); 486 485 487 486 spin_unlock_irqrestore(&xuartps->port->lock, flags); 488 487 ··· 630 631 } 631 632 632 633 /* Disable the TX and RX to set baud rate */ 633 - xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) | 634 - (XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS), 635 - XUARTPS_CR_OFFSET); 634 + ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET); 635 + ctrl_reg |= XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS; 636 + xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET); 636 637 637 638 /* 638 639 * Min baud rate = 6bps and Max Baud Rate is 10Mbps for 100Mhz clk ··· 650 651 uart_update_timeout(port, termios->c_cflag, baud); 651 652 652 653 /* Set TX/RX Reset */ 653 - xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) | 654 - (XUARTPS_CR_TXRST | XUARTPS_CR_RXRST), 655 - XUARTPS_CR_OFFSET); 656 - 657 654 ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET); 655 + ctrl_reg |= XUARTPS_CR_TXRST | XUARTPS_CR_RXRST; 656 + xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET); 658 657 659 658 /* 660 659 * Clear the RX disable and TX disable bits and then set the TX enable 661 660 * bit and RX enable bit to enable the transmitter and receiver. 662 661 */ 663 - xuartps_writel( 664 - (ctrl_reg & ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS)) 665 - | (XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN), 666 - XUARTPS_CR_OFFSET); 662 + ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET); 663 + ctrl_reg &= ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS); 664 + ctrl_reg |= XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN; 665 + xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET); 667 666 668 667 xuartps_writel(rx_timeout, XUARTPS_RXTOUT_OFFSET); 669 668 ··· 1245 1248 spin_lock_irqsave(&port->lock, flags); 1246 1249 1247 1250 /* Set TX/RX Reset */ 1248 - xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) | 1249 - (XUARTPS_CR_TXRST | XUARTPS_CR_RXRST), 1250 - XUARTPS_CR_OFFSET); 1251 + ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET); 1252 + ctrl_reg |= XUARTPS_CR_TXRST | XUARTPS_CR_RXRST; 1253 + xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET); 1251 1254 while (xuartps_readl(XUARTPS_CR_OFFSET) & 1252 1255 (XUARTPS_CR_TXRST | XUARTPS_CR_RXRST)) 1253 1256 cpu_relax(); ··· 1256 1259 xuartps_writel(rx_timeout, XUARTPS_RXTOUT_OFFSET); 1257 1260 /* Enable Tx/Rx */ 1258 1261 ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET); 1259 - xuartps_writel( 1260 - (ctrl_reg & ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS)) | 1261 - (XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN), 1262 - XUARTPS_CR_OFFSET); 1262 + ctrl_reg &= ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS); 1263 + ctrl_reg |= XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN; 1264 + xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET); 1263 1265 1264 1266 spin_unlock_irqrestore(&port->lock, flags); 1265 1267 } else {