Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branch 'for-2.6.25' of master.kernel.org:/pub/scm/linux/kernel/git/jwboyer/powerpc-4xx into merge

+180 -188
+1
arch/powerpc/boot/cuboot-bamboo.c
··· 17 17 #include "44x.h" 18 18 #include "cuboot.h" 19 19 20 + #define TARGET_4xx 20 21 #define TARGET_44x 21 22 #include "ppcboot.h" 22 23
+1
arch/powerpc/boot/cuboot-ebony.c
··· 17 17 #include "44x.h" 18 18 #include "cuboot.h" 19 19 20 + #define TARGET_4xx 20 21 #define TARGET_44x 21 22 #include "ppcboot.h" 22 23
+1
arch/powerpc/boot/cuboot-katmai.c
··· 22 22 #include "44x.h" 23 23 #include "cuboot.h" 24 24 25 + #define TARGET_4xx 25 26 #define TARGET_44x 26 27 #include "ppcboot.h" 27 28
+2
arch/powerpc/boot/cuboot-taishan.c
··· 21 21 #include "dcr.h" 22 22 #include "4xx.h" 23 23 24 + #define TARGET_4xx 24 25 #define TARGET_44x 26 + #define TARGET_440GX 25 27 #include "ppcboot.h" 26 28 27 29 static bd_t bd;
+1
arch/powerpc/boot/cuboot-warp.c
··· 11 11 #include "4xx.h" 12 12 #include "cuboot.h" 13 13 14 + #define TARGET_4xx 14 15 #define TARGET_44x 15 16 #include "ppcboot.h" 16 17
+1 -1
arch/powerpc/boot/dts/haleakala.dts
··· 235 235 #interrupt-cells = <1>; 236 236 #size-cells = <2>; 237 237 #address-cells = <3>; 238 - compatible = "ibm,plb-pciex-405exr", "ibm,plb-pciex"; 238 + compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; 239 239 primary; 240 240 port = <0>; /* port number */ 241 241 reg = <a0000000 20000000 /* Config space access */
+29 -29
arch/powerpc/boot/dts/katmai.dts
··· 38 38 timebase-frequency = <0>; /* Filled in by zImage */ 39 39 i-cache-line-size = <20>; 40 40 d-cache-line-size = <20>; 41 - i-cache-size = <20000>; 42 - d-cache-size = <20000>; 41 + i-cache-size = <8000>; 42 + d-cache-size = <8000>; 43 43 dcr-controller; 44 44 dcr-access-method = "native"; 45 45 }; ··· 136 136 }; 137 137 138 138 POB0: opb { 139 - compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb"; 139 + compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb"; 140 140 #address-cells = <1>; 141 141 #size-cells = <1>; 142 - ranges = <00000000 4 e0000000 20000000>; 143 - clock-frequency = <0>; /* Filled in by zImage */ 142 + ranges = <00000000 4 e0000000 20000000>; 143 + clock-frequency = <0>; /* Filled in by zImage */ 144 144 145 145 EBC0: ebc { 146 146 compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc"; ··· 153 153 }; 154 154 155 155 UART0: serial@10000200 { 156 - device_type = "serial"; 157 - compatible = "ns16550"; 158 - reg = <10000200 8>; 156 + device_type = "serial"; 157 + compatible = "ns16550"; 158 + reg = <10000200 8>; 159 159 virtual-reg = <a0000200>; 160 - clock-frequency = <0>; /* Filled in by zImage */ 161 - current-speed = <1c200>; 162 - interrupt-parent = <&UIC0>; 163 - interrupts = <0 4>; 164 - }; 160 + clock-frequency = <0>; /* Filled in by zImage */ 161 + current-speed = <1c200>; 162 + interrupt-parent = <&UIC0>; 163 + interrupts = <0 4>; 164 + }; 165 165 166 166 UART1: serial@10000300 { 167 - device_type = "serial"; 168 - compatible = "ns16550"; 169 - reg = <10000300 8>; 167 + device_type = "serial"; 168 + compatible = "ns16550"; 169 + reg = <10000300 8>; 170 170 virtual-reg = <a0000300>; 171 - clock-frequency = <0>; 172 - current-speed = <0>; 173 - interrupt-parent = <&UIC0>; 174 - interrupts = <1 4>; 175 - }; 171 + clock-frequency = <0>; 172 + current-speed = <0>; 173 + interrupt-parent = <&UIC0>; 174 + interrupts = <1 4>; 175 + }; 176 176 177 177 178 178 UART2: serial@10000600 { 179 - device_type = "serial"; 180 - compatible = "ns16550"; 181 - reg = <10000600 8>; 179 + device_type = "serial"; 180 + compatible = "ns16550"; 181 + reg = <10000600 8>; 182 182 virtual-reg = <a0000600>; 183 - clock-frequency = <0>; 184 - current-speed = <0>; 185 - interrupt-parent = <&UIC1>; 186 - interrupts = <5 4>; 187 - }; 183 + clock-frequency = <0>; 184 + current-speed = <0>; 185 + interrupt-parent = <&UIC1>; 186 + interrupts = <5 4>; 187 + }; 188 188 189 189 IIC0: i2c@10000400 { 190 190 compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
+40 -40
drivers/char/xilinx_hwicap/buffer_icap.c
··· 73 73 #define XHI_BUFFER_START 0 74 74 75 75 /** 76 - * buffer_icap_get_status: Get the contents of the status register. 77 - * @parameter base_address: is the base address of the device 76 + * buffer_icap_get_status - Get the contents of the status register. 77 + * @base_address: is the base address of the device 78 78 * 79 79 * The status register contains the ICAP status and the done bit. 80 80 * ··· 94 94 } 95 95 96 96 /** 97 - * buffer_icap_get_bram: Reads data from the storage buffer bram. 98 - * @parameter base_address: contains the base address of the component. 99 - * @parameter offset: The word offset from which the data should be read. 97 + * buffer_icap_get_bram - Reads data from the storage buffer bram. 98 + * @base_address: contains the base address of the component. 99 + * @offset: The word offset from which the data should be read. 100 100 * 101 101 * A bram is used as a configuration memory cache. One frame of data can 102 102 * be stored in this "storage buffer". ··· 108 108 } 109 109 110 110 /** 111 - * buffer_icap_busy: Return true if the icap device is busy 112 - * @parameter base_address: is the base address of the device 111 + * buffer_icap_busy - Return true if the icap device is busy 112 + * @base_address: is the base address of the device 113 113 * 114 114 * The queries the low order bit of the status register, which 115 115 * indicates whether the current configuration or readback operation ··· 121 121 } 122 122 123 123 /** 124 - * buffer_icap_busy: Return true if the icap device is not busy 125 - * @parameter base_address: is the base address of the device 124 + * buffer_icap_busy - Return true if the icap device is not busy 125 + * @base_address: is the base address of the device 126 126 * 127 127 * The queries the low order bit of the status register, which 128 128 * indicates whether the current configuration or readback operation ··· 134 134 } 135 135 136 136 /** 137 - * buffer_icap_set_size: Set the size register. 138 - * @parameter base_address: is the base address of the device 139 - * @parameter data: The size in bytes. 137 + * buffer_icap_set_size - Set the size register. 138 + * @base_address: is the base address of the device 139 + * @data: The size in bytes. 140 140 * 141 141 * The size register holds the number of 8 bit bytes to transfer between 142 142 * bram and the icap (or icap to bram). ··· 148 148 } 149 149 150 150 /** 151 - * buffer_icap_mSetoffsetReg: Set the bram offset register. 152 - * @parameter base_address: contains the base address of the device. 153 - * @parameter data: is the value to be written to the data register. 151 + * buffer_icap_set_offset - Set the bram offset register. 152 + * @base_address: contains the base address of the device. 153 + * @data: is the value to be written to the data register. 154 154 * 155 155 * The bram offset register holds the starting bram address to transfer 156 156 * data from during configuration or write data to during readback. ··· 162 162 } 163 163 164 164 /** 165 - * buffer_icap_set_rnc: Set the RNC (Readback not Configure) register. 166 - * @parameter base_address: contains the base address of the device. 167 - * @parameter data: is the value to be written to the data register. 165 + * buffer_icap_set_rnc - Set the RNC (Readback not Configure) register. 166 + * @base_address: contains the base address of the device. 167 + * @data: is the value to be written to the data register. 168 168 * 169 169 * The RNC register determines the direction of the data transfer. It 170 170 * controls whether a configuration or readback take place. Writing to ··· 178 178 } 179 179 180 180 /** 181 - * buffer_icap_set_bram: Write data to the storage buffer bram. 182 - * @parameter base_address: contains the base address of the component. 183 - * @parameter offset: The word offset at which the data should be written. 184 - * @parameter data: The value to be written to the bram offset. 181 + * buffer_icap_set_bram - Write data to the storage buffer bram. 182 + * @base_address: contains the base address of the component. 183 + * @offset: The word offset at which the data should be written. 184 + * @data: The value to be written to the bram offset. 185 185 * 186 186 * A bram is used as a configuration memory cache. One frame of data can 187 187 * be stored in this "storage buffer". ··· 193 193 } 194 194 195 195 /** 196 - * buffer_icap_device_read: Transfer bytes from ICAP to the storage buffer. 197 - * @parameter drvdata: a pointer to the drvdata. 198 - * @parameter offset: The storage buffer start address. 199 - * @parameter count: The number of words (32 bit) to read from the 196 + * buffer_icap_device_read - Transfer bytes from ICAP to the storage buffer. 197 + * @drvdata: a pointer to the drvdata. 198 + * @offset: The storage buffer start address. 199 + * @count: The number of words (32 bit) to read from the 200 200 * device (ICAP). 201 201 **/ 202 202 static int buffer_icap_device_read(struct hwicap_drvdata *drvdata, ··· 227 227 }; 228 228 229 229 /** 230 - * buffer_icap_device_write: Transfer bytes from ICAP to the storage buffer. 231 - * @parameter drvdata: a pointer to the drvdata. 232 - * @parameter offset: The storage buffer start address. 233 - * @parameter count: The number of words (32 bit) to read from the 230 + * buffer_icap_device_write - Transfer bytes from ICAP to the storage buffer. 231 + * @drvdata: a pointer to the drvdata. 232 + * @offset: The storage buffer start address. 233 + * @count: The number of words (32 bit) to read from the 234 234 * device (ICAP). 235 235 **/ 236 236 static int buffer_icap_device_write(struct hwicap_drvdata *drvdata, ··· 261 261 }; 262 262 263 263 /** 264 - * buffer_icap_reset: Reset the logic of the icap device. 265 - * @parameter drvdata: a pointer to the drvdata. 264 + * buffer_icap_reset - Reset the logic of the icap device. 265 + * @drvdata: a pointer to the drvdata. 266 266 * 267 267 * Writing to the status register resets the ICAP logic in an internal 268 268 * version of the core. For the version of the core published in EDK, ··· 274 274 } 275 275 276 276 /** 277 - * buffer_icap_set_configuration: Load a partial bitstream from system memory. 278 - * @parameter drvdata: a pointer to the drvdata. 279 - * @parameter data: Kernel address of the partial bitstream. 280 - * @parameter size: the size of the partial bitstream in 32 bit words. 277 + * buffer_icap_set_configuration - Load a partial bitstream from system memory. 278 + * @drvdata: a pointer to the drvdata. 279 + * @data: Kernel address of the partial bitstream. 280 + * @size: the size of the partial bitstream in 32 bit words. 281 281 **/ 282 282 int buffer_icap_set_configuration(struct hwicap_drvdata *drvdata, u32 *data, 283 283 u32 size) ··· 333 333 }; 334 334 335 335 /** 336 - * buffer_icap_get_configuration: Read configuration data from the device. 337 - * @parameter drvdata: a pointer to the drvdata. 338 - * @parameter data: Address of the data representing the partial bitstream 339 - * @parameter size: the size of the partial bitstream in 32 bit words. 336 + * buffer_icap_get_configuration - Read configuration data from the device. 337 + * @drvdata: a pointer to the drvdata. 338 + * @data: Address of the data representing the partial bitstream 339 + * @size: the size of the partial bitstream in 32 bit words. 340 340 **/ 341 341 int buffer_icap_get_configuration(struct hwicap_drvdata *drvdata, u32 *data, 342 342 u32 size)
+30 -30
drivers/char/xilinx_hwicap/fifo_icap.c
··· 94 94 95 95 96 96 /** 97 - * fifo_icap_fifo_write: Write data to the write FIFO. 98 - * @parameter drvdata: a pointer to the drvdata. 99 - * @parameter data: the 32-bit value to be written to the FIFO. 97 + * fifo_icap_fifo_write - Write data to the write FIFO. 98 + * @drvdata: a pointer to the drvdata. 99 + * @data: the 32-bit value to be written to the FIFO. 100 100 * 101 101 * This function will silently fail if the fifo is full. 102 102 **/ ··· 108 108 } 109 109 110 110 /** 111 - * fifo_icap_fifo_read: Read data from the Read FIFO. 112 - * @parameter drvdata: a pointer to the drvdata. 111 + * fifo_icap_fifo_read - Read data from the Read FIFO. 112 + * @drvdata: a pointer to the drvdata. 113 113 * 114 114 * This function will silently fail if the fifo is empty. 115 115 **/ ··· 121 121 } 122 122 123 123 /** 124 - * fifo_icap_set_read_size: Set the the size register. 125 - * @parameter drvdata: a pointer to the drvdata. 126 - * @parameter data: the size of the following read transaction, in words. 124 + * fifo_icap_set_read_size - Set the the size register. 125 + * @drvdata: a pointer to the drvdata. 126 + * @data: the size of the following read transaction, in words. 127 127 **/ 128 128 static inline void fifo_icap_set_read_size(struct hwicap_drvdata *drvdata, 129 129 u32 data) ··· 132 132 } 133 133 134 134 /** 135 - * fifo_icap_start_config: Initiate a configuration (write) to the device. 136 - * @parameter drvdata: a pointer to the drvdata. 135 + * fifo_icap_start_config - Initiate a configuration (write) to the device. 136 + * @drvdata: a pointer to the drvdata. 137 137 **/ 138 138 static inline void fifo_icap_start_config(struct hwicap_drvdata *drvdata) 139 139 { ··· 142 142 } 143 143 144 144 /** 145 - * fifo_icap_start_readback: Initiate a readback from the device. 146 - * @parameter drvdata: a pointer to the drvdata. 145 + * fifo_icap_start_readback - Initiate a readback from the device. 146 + * @drvdata: a pointer to the drvdata. 147 147 **/ 148 148 static inline void fifo_icap_start_readback(struct hwicap_drvdata *drvdata) 149 149 { ··· 152 152 } 153 153 154 154 /** 155 - * fifo_icap_busy: Return true if the ICAP is still processing a transaction. 156 - * @parameter drvdata: a pointer to the drvdata. 155 + * fifo_icap_busy - Return true if the ICAP is still processing a transaction. 156 + * @drvdata: a pointer to the drvdata. 157 157 **/ 158 158 static inline u32 fifo_icap_busy(struct hwicap_drvdata *drvdata) 159 159 { ··· 163 163 } 164 164 165 165 /** 166 - * fifo_icap_write_fifo_vacancy: Query the write fifo available space. 167 - * @parameter drvdata: a pointer to the drvdata. 166 + * fifo_icap_write_fifo_vacancy - Query the write fifo available space. 167 + * @drvdata: a pointer to the drvdata. 168 168 * 169 169 * Return the number of words that can be safely pushed into the write fifo. 170 170 **/ ··· 175 175 } 176 176 177 177 /** 178 - * fifo_icap_read_fifo_occupancy: Query the read fifo available data. 179 - * @parameter drvdata: a pointer to the drvdata. 178 + * fifo_icap_read_fifo_occupancy - Query the read fifo available data. 179 + * @drvdata: a pointer to the drvdata. 180 180 * 181 181 * Return the number of words that can be safely read from the read fifo. 182 182 **/ ··· 187 187 } 188 188 189 189 /** 190 - * fifo_icap_set_configuration: Send configuration data to the ICAP. 191 - * @parameter drvdata: a pointer to the drvdata. 192 - * @parameter frame_buffer: a pointer to the data to be written to the 190 + * fifo_icap_set_configuration - Send configuration data to the ICAP. 191 + * @drvdata: a pointer to the drvdata. 192 + * @frame_buffer: a pointer to the data to be written to the 193 193 * ICAP device. 194 - * @parameter num_words: the number of words (32 bit) to write to the ICAP 194 + * @num_words: the number of words (32 bit) to write to the ICAP 195 195 * device. 196 196 197 197 * This function writes the given user data to the Write FIFO in ··· 266 266 } 267 267 268 268 /** 269 - * fifo_icap_get_configuration: Read configuration data from the device. 270 - * @parameter drvdata: a pointer to the drvdata. 271 - * @parameter data: Address of the data representing the partial bitstream 272 - * @parameter size: the size of the partial bitstream in 32 bit words. 269 + * fifo_icap_get_configuration - Read configuration data from the device. 270 + * @drvdata: a pointer to the drvdata. 271 + * @data: Address of the data representing the partial bitstream 272 + * @size: the size of the partial bitstream in 32 bit words. 273 273 * 274 274 * This function reads the specified number of words from the ICAP device in 275 275 * the polled mode. ··· 335 335 } 336 336 337 337 /** 338 - * buffer_icap_reset: Reset the logic of the icap device. 339 - * @parameter drvdata: a pointer to the drvdata. 338 + * buffer_icap_reset - Reset the logic of the icap device. 339 + * @drvdata: a pointer to the drvdata. 340 340 * 341 341 * This function forces the software reset of the complete HWICAP device. 342 342 * All the registers will return to the default value and the FIFO is also ··· 360 360 } 361 361 362 362 /** 363 - * fifo_icap_flush_fifo: This function flushes the FIFOs in the device. 364 - * @parameter drvdata: a pointer to the drvdata. 363 + * fifo_icap_flush_fifo - This function flushes the FIFOs in the device. 364 + * @drvdata: a pointer to the drvdata. 365 365 */ 366 366 void fifo_icap_flush_fifo(struct hwicap_drvdata *drvdata) 367 367 {
+62 -76
drivers/char/xilinx_hwicap/xilinx_hwicap.c
··· 84 84 #include <linux/init.h> 85 85 #include <linux/poll.h> 86 86 #include <linux/proc_fs.h> 87 - #include <asm/semaphore.h> 87 + #include <linux/mutex.h> 88 88 #include <linux/sysctl.h> 89 89 #include <linux/version.h> 90 90 #include <linux/fs.h> ··· 119 119 120 120 /* An array, which is set to true when the device is registered. */ 121 121 static bool probed_devices[HWICAP_DEVICES]; 122 + static struct mutex icap_sem; 122 123 123 124 static struct class *icap_class; 124 125 ··· 200 199 }; 201 200 202 201 /** 203 - * hwicap_command_desync: Send a DESYNC command to the ICAP port. 204 - * @parameter drvdata: a pointer to the drvdata. 202 + * hwicap_command_desync - Send a DESYNC command to the ICAP port. 203 + * @drvdata: a pointer to the drvdata. 205 204 * 206 205 * This command desynchronizes the ICAP After this command, a 207 206 * bitstream containing a NULL packet, followed by a SYNCH packet is 208 207 * required before the ICAP will recognize commands. 209 208 */ 210 - int hwicap_command_desync(struct hwicap_drvdata *drvdata) 209 + static int hwicap_command_desync(struct hwicap_drvdata *drvdata) 211 210 { 212 211 u32 buffer[4]; 213 212 u32 index = 0; ··· 229 228 } 230 229 231 230 /** 232 - * hwicap_command_capture: Send a CAPTURE command to the ICAP port. 233 - * @parameter drvdata: a pointer to the drvdata. 234 - * 235 - * This command captures all of the flip flop states so they will be 236 - * available during readback. One can use this command instead of 237 - * enabling the CAPTURE block in the design. 238 - */ 239 - int hwicap_command_capture(struct hwicap_drvdata *drvdata) 240 - { 241 - u32 buffer[7]; 242 - u32 index = 0; 243 - 244 - /* 245 - * Create the data to be written to the ICAP. 246 - */ 247 - buffer[index++] = XHI_DUMMY_PACKET; 248 - buffer[index++] = XHI_SYNC_PACKET; 249 - buffer[index++] = XHI_NOOP_PACKET; 250 - buffer[index++] = hwicap_type_1_write(drvdata->config_regs->CMD) | 1; 251 - buffer[index++] = XHI_CMD_GCAPTURE; 252 - buffer[index++] = XHI_DUMMY_PACKET; 253 - buffer[index++] = XHI_DUMMY_PACKET; 254 - 255 - /* 256 - * Write the data to the FIFO and intiate the transfer of data 257 - * present in the FIFO to the ICAP device. 258 - */ 259 - return drvdata->config->set_configuration(drvdata, 260 - &buffer[0], index); 261 - 262 - } 263 - 264 - /** 265 - * hwicap_get_configuration_register: Query a configuration register. 266 - * @parameter drvdata: a pointer to the drvdata. 267 - * @parameter reg: a constant which represents the configuration 231 + * hwicap_get_configuration_register - Query a configuration register. 232 + * @drvdata: a pointer to the drvdata. 233 + * @reg: a constant which represents the configuration 268 234 * register value to be returned. 269 235 * Examples: XHI_IDCODE, XHI_FLR. 270 - * @parameter RegData: returns the value of the register. 236 + * @reg_data: returns the value of the register. 271 237 * 272 238 * Sends a query packet to the ICAP and then receives the response. 273 239 * The icap is left in Synched state. 274 240 */ 275 - int hwicap_get_configuration_register(struct hwicap_drvdata *drvdata, 276 - u32 reg, u32 *RegData) 241 + static int hwicap_get_configuration_register(struct hwicap_drvdata *drvdata, 242 + u32 reg, u32 *reg_data) 277 243 { 278 244 int status; 279 245 u32 buffer[6]; ··· 268 300 /* 269 301 * Read the configuration register 270 302 */ 271 - status = drvdata->config->get_configuration(drvdata, RegData, 1); 303 + status = drvdata->config->get_configuration(drvdata, reg_data, 1); 272 304 if (status) 273 305 return status; 274 306 275 307 return 0; 276 308 } 277 309 278 - int hwicap_initialize_hwicap(struct hwicap_drvdata *drvdata) 310 + static int hwicap_initialize_hwicap(struct hwicap_drvdata *drvdata) 279 311 { 280 312 int status; 281 313 u32 idcode; ··· 312 344 } 313 345 314 346 static ssize_t 315 - hwicap_read(struct file *file, char *buf, size_t count, loff_t *ppos) 347 + hwicap_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) 316 348 { 317 349 struct hwicap_drvdata *drvdata = file->private_data; 318 350 ssize_t bytes_to_read = 0; ··· 321 353 u32 bytes_remaining; 322 354 int status; 323 355 324 - if (down_interruptible(&drvdata->sem)) 325 - return -ERESTARTSYS; 356 + status = mutex_lock_interruptible(&drvdata->sem); 357 + if (status) 358 + return status; 326 359 327 360 if (drvdata->read_buffer_in_use) { 328 361 /* If there are leftover bytes in the buffer, just */ ··· 339 370 goto error; 340 371 } 341 372 drvdata->read_buffer_in_use -= bytes_to_read; 342 - memcpy(drvdata->read_buffer + bytes_to_read, 343 - drvdata->read_buffer, 4 - bytes_to_read); 373 + memmove(drvdata->read_buffer, 374 + drvdata->read_buffer + bytes_to_read, 375 + 4 - bytes_to_read); 344 376 } else { 345 377 /* Get new data from the ICAP, and return was was requested. */ 346 378 kbuf = (u32 *) get_zeroed_page(GFP_KERNEL); ··· 384 414 status = -EFAULT; 385 415 goto error; 386 416 } 387 - memcpy(kbuf, drvdata->read_buffer, bytes_remaining); 417 + memcpy(drvdata->read_buffer, 418 + kbuf, 419 + bytes_remaining); 388 420 drvdata->read_buffer_in_use = bytes_remaining; 389 421 free_page((unsigned long)kbuf); 390 422 } 391 423 status = bytes_to_read; 392 424 error: 393 - up(&drvdata->sem); 425 + mutex_unlock(&drvdata->sem); 394 426 return status; 395 427 } 396 428 397 429 static ssize_t 398 - hwicap_write(struct file *file, const char *buf, 430 + hwicap_write(struct file *file, const char __user *buf, 399 431 size_t count, loff_t *ppos) 400 432 { 401 433 struct hwicap_drvdata *drvdata = file->private_data; ··· 407 435 ssize_t len; 408 436 ssize_t status; 409 437 410 - if (down_interruptible(&drvdata->sem)) 411 - return -ERESTARTSYS; 438 + status = mutex_lock_interruptible(&drvdata->sem); 439 + if (status) 440 + return status; 412 441 413 442 left += drvdata->write_buffer_in_use; 414 443 ··· 438 465 memcpy(kbuf, drvdata->write_buffer, 439 466 drvdata->write_buffer_in_use); 440 467 if (copy_from_user( 441 - (((char *)kbuf) + (drvdata->write_buffer_in_use)), 468 + (((char *)kbuf) + drvdata->write_buffer_in_use), 442 469 buf + written, 443 470 len - (drvdata->write_buffer_in_use))) { 444 471 free_page((unsigned long)kbuf); ··· 481 508 free_page((unsigned long)kbuf); 482 509 status = written; 483 510 error: 484 - up(&drvdata->sem); 511 + mutex_unlock(&drvdata->sem); 485 512 return status; 486 513 } 487 514 ··· 492 519 493 520 drvdata = container_of(inode->i_cdev, struct hwicap_drvdata, cdev); 494 521 495 - if (down_interruptible(&drvdata->sem)) 496 - return -ERESTARTSYS; 522 + status = mutex_lock_interruptible(&drvdata->sem); 523 + if (status) 524 + return status; 497 525 498 526 if (drvdata->is_open) { 499 527 status = -EBUSY; ··· 513 539 drvdata->is_open = 1; 514 540 515 541 error: 516 - up(&drvdata->sem); 542 + mutex_unlock(&drvdata->sem); 517 543 return status; 518 544 } 519 545 ··· 523 549 int i; 524 550 int status = 0; 525 551 526 - if (down_interruptible(&drvdata->sem)) 527 - return -ERESTARTSYS; 552 + mutex_lock(&drvdata->sem); 528 553 529 554 if (drvdata->write_buffer_in_use) { 530 555 /* Flush write buffer. */ ··· 542 569 543 570 error: 544 571 drvdata->is_open = 0; 545 - up(&drvdata->sem); 572 + mutex_unlock(&drvdata->sem); 546 573 return status; 547 574 } 548 575 ··· 565 592 566 593 dev_info(dev, "Xilinx icap port driver\n"); 567 594 595 + mutex_lock(&icap_sem); 596 + 568 597 if (id < 0) { 569 598 for (id = 0; id < HWICAP_DEVICES; id++) 570 599 if (!probed_devices[id]) 571 600 break; 572 601 } 573 602 if (id < 0 || id >= HWICAP_DEVICES) { 603 + mutex_unlock(&icap_sem); 574 604 dev_err(dev, "%s%i too large\n", DRIVER_NAME, id); 575 605 return -EINVAL; 576 606 } 577 607 if (probed_devices[id]) { 608 + mutex_unlock(&icap_sem); 578 609 dev_err(dev, "cannot assign to %s%i; it is already in use\n", 579 610 DRIVER_NAME, id); 580 611 return -EBUSY; 581 612 } 582 613 583 614 probed_devices[id] = 1; 615 + mutex_unlock(&icap_sem); 584 616 585 617 devt = MKDEV(xhwicap_major, xhwicap_minor + id); 586 618 587 - drvdata = kmalloc(sizeof(struct hwicap_drvdata), GFP_KERNEL); 619 + drvdata = kzalloc(sizeof(struct hwicap_drvdata), GFP_KERNEL); 588 620 if (!drvdata) { 589 621 dev_err(dev, "Couldn't allocate device private record\n"); 590 - return -ENOMEM; 622 + retval = -ENOMEM; 623 + goto failed0; 591 624 } 592 - memset((void *)drvdata, 0, sizeof(struct hwicap_drvdata)); 593 625 dev_set_drvdata(dev, (void *)drvdata); 594 626 595 627 if (!regs_res) { ··· 626 648 drvdata->config = config; 627 649 drvdata->config_regs = config_regs; 628 650 629 - init_MUTEX(&drvdata->sem); 651 + mutex_init(&drvdata->sem); 630 652 drvdata->is_open = 0; 631 653 632 654 dev_info(dev, "ioremap %lx to %p with size %x\n", ··· 641 663 goto failed3; 642 664 } 643 665 /* devfs_mk_cdev(devt, S_IFCHR|S_IRUGO|S_IWUGO, DRIVER_NAME); */ 644 - class_device_create(icap_class, NULL, devt, NULL, DRIVER_NAME); 666 + device_create(icap_class, dev, devt, "%s%d", DRIVER_NAME, id); 645 667 return 0; /* success */ 646 668 647 669 failed3: ··· 652 674 653 675 failed1: 654 676 kfree(drvdata); 677 + 678 + failed0: 679 + mutex_lock(&icap_sem); 680 + probed_devices[id] = 0; 681 + mutex_unlock(&icap_sem); 655 682 656 683 return retval; 657 684 } ··· 682 699 if (!drvdata) 683 700 return 0; 684 701 685 - class_device_destroy(icap_class, drvdata->devt); 702 + device_destroy(icap_class, drvdata->devt); 686 703 cdev_del(&drvdata->cdev); 687 704 iounmap(drvdata->base_address); 688 705 release_mem_region(drvdata->mem_start, drvdata->mem_size); 689 706 kfree(drvdata); 690 707 dev_set_drvdata(dev, NULL); 691 - probed_devices[MINOR(dev->devt)-xhwicap_minor] = 0; 692 708 709 + mutex_lock(&icap_sem); 710 + probed_devices[MINOR(dev->devt)-xhwicap_minor] = 0; 711 + mutex_unlock(&icap_sem); 693 712 return 0; /* success */ 694 713 } 695 714 ··· 806 821 }; 807 822 808 823 /* Registration helpers to keep the number of #ifdefs to a minimum */ 809 - static inline int __devinit hwicap_of_register(void) 824 + static inline int __init hwicap_of_register(void) 810 825 { 811 826 pr_debug("hwicap: calling of_register_platform_driver()\n"); 812 827 return of_register_platform_driver(&hwicap_of_driver); 813 828 } 814 829 815 - static inline void __devexit hwicap_of_unregister(void) 830 + static inline void __exit hwicap_of_unregister(void) 816 831 { 817 832 of_unregister_platform_driver(&hwicap_of_driver); 818 833 } 819 834 #else /* CONFIG_OF */ 820 835 /* CONFIG_OF not enabled; do nothing helpers */ 821 - static inline int __devinit hwicap_of_register(void) { return 0; } 822 - static inline void __devexit hwicap_of_unregister(void) { } 836 + static inline int __init hwicap_of_register(void) { return 0; } 837 + static inline void __exit hwicap_of_unregister(void) { } 823 838 #endif /* CONFIG_OF */ 824 839 825 - static int __devinit hwicap_module_init(void) 840 + static int __init hwicap_module_init(void) 826 841 { 827 842 dev_t devt; 828 843 int retval; 829 844 830 845 icap_class = class_create(THIS_MODULE, "xilinx_config"); 846 + mutex_init(&icap_sem); 831 847 832 848 if (xhwicap_major) { 833 849 devt = MKDEV(xhwicap_major, xhwicap_minor); ··· 869 883 return retval; 870 884 } 871 885 872 - static void __devexit hwicap_module_cleanup(void) 886 + static void __exit hwicap_module_cleanup(void) 873 887 { 874 888 dev_t devt = MKDEV(xhwicap_major, xhwicap_minor); 875 889
+12 -12
drivers/char/xilinx_hwicap/xilinx_hwicap.h
··· 48 48 u8 write_buffer[4]; 49 49 u32 read_buffer_in_use; /* Always in [0,3] */ 50 50 u8 read_buffer[4]; 51 - u32 mem_start; /* phys. address of the control registers */ 52 - u32 mem_end; /* phys. address of the control registers */ 53 - u32 mem_size; 51 + resource_size_t mem_start;/* phys. address of the control registers */ 52 + resource_size_t mem_end; /* phys. address of the control registers */ 53 + resource_size_t mem_size; 54 54 void __iomem *base_address;/* virt. address of the control registers */ 55 55 56 56 struct device *dev; ··· 61 61 const struct config_registers *config_regs; 62 62 void *private_data; 63 63 bool is_open; 64 - struct semaphore sem; 64 + struct mutex sem; 65 65 }; 66 66 67 67 struct hwicap_driver_config { ··· 164 164 #define XHI_DISABLED_AUTO_CRC 0x0000DEFCUL 165 165 166 166 /** 167 - * hwicap_type_1_read: Generates a Type 1 read packet header. 168 - * @parameter: Register is the address of the register to be read back. 167 + * hwicap_type_1_read - Generates a Type 1 read packet header. 168 + * @reg: is the address of the register to be read back. 169 169 * 170 170 * Generates a Type 1 read packet header, which is used to indirectly 171 171 * read registers in the configuration logic. This packet must then 172 172 * be sent through the icap device, and a return packet received with 173 173 * the information. 174 174 **/ 175 - static inline u32 hwicap_type_1_read(u32 Register) 175 + static inline u32 hwicap_type_1_read(u32 reg) 176 176 { 177 177 return (XHI_TYPE_1 << XHI_TYPE_SHIFT) | 178 - (Register << XHI_REGISTER_SHIFT) | 178 + (reg << XHI_REGISTER_SHIFT) | 179 179 (XHI_OP_READ << XHI_OP_SHIFT); 180 180 } 181 181 182 182 /** 183 - * hwicap_type_1_write: Generates a Type 1 write packet header 184 - * @parameter: Register is the address of the register to be read back. 183 + * hwicap_type_1_write - Generates a Type 1 write packet header 184 + * @reg: is the address of the register to be read back. 185 185 **/ 186 - static inline u32 hwicap_type_1_write(u32 Register) 186 + static inline u32 hwicap_type_1_write(u32 reg) 187 187 { 188 188 return (XHI_TYPE_1 << XHI_TYPE_SHIFT) | 189 - (Register << XHI_REGISTER_SHIFT) | 189 + (reg << XHI_REGISTER_SHIFT) | 190 190 (XHI_OP_WRITE << XHI_OP_SHIFT); 191 191 } 192 192