Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net

Cross-merge networking fixes after downstream PR.

Conflicts:

net/dsa/port.c
9945c1fb03a3 ("net: dsa: fix older DSA drivers using phylink")
a88dd7538461 ("net: dsa: remove legacy_pre_march2020 detection")
https://lore.kernel.org/all/20230731102254.2c9868ca@canb.auug.org.au/

net/xdp/xsk.c
3c5b4d69c358 ("net: annotate data-races around sk->sk_mark")
b7f72a30e9ac ("xsk: introduce wrappers and helpers for supporting multi-buffer in Tx path")
https://lore.kernel.org/all/20230731102631.39988412@canb.auug.org.au/

drivers/net/ethernet/broadcom/bnxt/bnxt.c
37b61cda9c16 ("bnxt: don't handle XDP in netpoll")
2b56b3d99241 ("eth: bnxt: handle invalid Tx completions more gracefully")
https://lore.kernel.org/all/20230801101708.1dc7faac@canb.auug.org.au/

Adjacent changes:

drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c
62da08331f1a ("net/mlx5e: Set proper IPsec source port in L4 selector")
fbd517549c32 ("net/mlx5e: Add function to get IPsec offload namespace")

drivers/net/ethernet/sfc/selftest.c
55c1528f9b97 ("sfc: fix field-spanning memcpy in selftest")
ae9d445cd41f ("sfc: Miscellaneous comment removals")

Signed-off-by: Jakub Kicinski <kuba@kernel.org>

+3242 -1832
+96 -1
.mailmap
··· 13 13 Aaron Durbin <adurbin@google.com> 14 14 Abel Vesa <abelvesa@kernel.org> <abel.vesa@nxp.com> 15 15 Abel Vesa <abelvesa@kernel.org> <abelvesa@gmail.com> 16 + Abhijeet Dharmapurikar <quic_adharmap@quicinc.com> <adharmap@codeaurora.org> 16 17 Abhinav Kumar <quic_abhinavk@quicinc.com> <abhinavk@codeaurora.org> 18 + Ahmad Masri <quic_amasri@quicinc.com> <amasri@codeaurora.org> 17 19 Adam Oldham <oldhamca@gmail.com> 18 20 Adam Radford <aradford@gmail.com> 19 21 Adriana Reus <adi.reus@gmail.com> <adriana.reus@intel.com> ··· 32 30 Alexander Mikhalitsyn <alexander@mihalicyn.com> <aleksandr.mikhalitsyn@canonical.com> 33 31 Alexandre Belloni <alexandre.belloni@bootlin.com> <alexandre.belloni@free-electrons.com> 34 32 Alexandre Ghiti <alex@ghiti.fr> <alexandre.ghiti@canonical.com> 33 + Alexei Avshalom Lazar <quic_ailizaro@quicinc.com> <ailizaro@codeaurora.org> 35 34 Alexei Starovoitov <ast@kernel.org> <alexei.starovoitov@gmail.com> 36 35 Alexei Starovoitov <ast@kernel.org> <ast@fb.com> 37 36 Alexei Starovoitov <ast@kernel.org> <ast@plumgrid.com> ··· 40 37 Alex Shi <alexs@kernel.org> <alex.shi@intel.com> 41 38 Alex Shi <alexs@kernel.org> <alex.shi@linaro.org> 42 39 Alex Shi <alexs@kernel.org> <alex.shi@linux.alibaba.com> 40 + Aloka Dixit <quic_alokad@quicinc.com> <alokad@codeaurora.org> 43 41 Al Viro <viro@ftp.linux.org.uk> 44 42 Al Viro <viro@zenIV.linux.org.uk> 43 + Amit Blay <quic_ablay@quicinc.com> <ablay@codeaurora.org> 44 + Amit Nischal <quic_anischal@quicinc.com> <anischal@codeaurora.org> 45 45 Andi Kleen <ak@linux.intel.com> <ak@suse.de> 46 46 Andi Shyti <andi@etezian.org> <andi.shyti@samsung.com> 47 47 Andreas Herrmann <aherrman@de.ibm.com> ··· 60 54 Andrzej Hajda <andrzej.hajda@intel.com> <a.hajda@samsung.com> 61 55 André Almeida <andrealmeid@igalia.com> <andrealmeid@collabora.com> 62 56 Andy Adamson <andros@citi.umich.edu> 57 + Anilkumar Kolli <quic_akolli@quicinc.com> <akolli@codeaurora.org> 58 + Anirudh Ghayal <quic_aghayal@quicinc.com> <aghayal@codeaurora.org> 63 59 Antoine Tenart <atenart@kernel.org> <antoine.tenart@bootlin.com> 64 60 Antoine Tenart <atenart@kernel.org> <antoine.tenart@free-electrons.com> 65 61 Antonio Ospite <ao2@ao2.it> <ao2@amarulasolutions.com> ··· 70 62 Ard Biesheuvel <ardb@kernel.org> <ard.biesheuvel@linaro.org> 71 63 Arnaud Patard <arnaud.patard@rtp-net.org> 72 64 Arnd Bergmann <arnd@arndb.de> 65 + Arun Kumar Neelakantam <quic_aneela@quicinc.com> <aneela@codeaurora.org> 66 + Ashok Raj Nagarajan <quic_arnagara@quicinc.com> <arnagara@codeaurora.org> 67 + Ashwin Chaugule <quic_ashwinc@quicinc.com> <ashwinc@codeaurora.org> 68 + Asutosh Das <quic_asutoshd@quicinc.com> <asutoshd@codeaurora.org> 73 69 Atish Patra <atishp@atishpatra.org> <atish.patra@wdc.com> 70 + Avaneesh Kumar Dwivedi <quic_akdwived@quicinc.com> <akdwived@codeaurora.org> 74 71 Axel Dyks <xl@xlsigned.net> 75 72 Axel Lin <axel.lin@gmail.com> 73 + Balakrishna Godavarthi <quic_bgodavar@quicinc.com> <bgodavar@codeaurora.org> 74 + Banajit Goswami <quic_bgoswami@quicinc.com> <bgoswami@codeaurora.org> 75 + Baochen Qiang <quic_bqiang@quicinc.com> <bqiang@codeaurora.org> 76 76 Baolin Wang <baolin.wang@linux.alibaba.com> <baolin.wang@linaro.org> 77 77 Baolin Wang <baolin.wang@linux.alibaba.com> <baolin.wang@spreadtrum.com> 78 78 Baolin Wang <baolin.wang@linux.alibaba.com> <baolin.wang@unisoc.com> ··· 109 93 Brian King <brking@us.ibm.com> 110 94 Brian Silverman <bsilver16384@gmail.com> <brian.silverman@bluerivertech.com> 111 95 Cai Huoqing <cai.huoqing@linux.dev> <caihuoqing@baidu.com> 96 + Can Guo <quic_cang@quicinc.com> <cang@codeaurora.org> 97 + Carl Huang <quic_cjhuang@quicinc.com> <cjhuang@codeaurora.org> 112 98 Changbin Du <changbin.du@intel.com> <changbin.du@gmail.com> 113 99 Changbin Du <changbin.du@intel.com> <changbin.du@intel.com> 114 100 Chao Yu <chao@kernel.org> <chao2.yu@samsung.com> 115 101 Chao Yu <chao@kernel.org> <yuchao0@huawei.com> 116 102 Chris Chiu <chris.chiu@canonical.com> <chiu@endlessm.com> 117 103 Chris Chiu <chris.chiu@canonical.com> <chiu@endlessos.org> 104 + Chris Lew <quic_clew@quicinc.com> <clew@codeaurora.org> 118 105 Christian Borntraeger <borntraeger@linux.ibm.com> <borntraeger@de.ibm.com> 119 106 Christian Borntraeger <borntraeger@linux.ibm.com> <cborntra@de.ibm.com> 120 107 Christian Borntraeger <borntraeger@linux.ibm.com> <borntrae@de.ibm.com> ··· 138 119 Daniel Borkmann <daniel@iogearbox.net> <dborkman@redhat.com> 139 120 Daniel Borkmann <daniel@iogearbox.net> <dxchgb@gmail.com> 140 121 David Brownell <david-b@pacbell.net> 122 + David Collins <quic_collinsd@quicinc.com> <collinsd@codeaurora.org> 141 123 David Woodhouse <dwmw2@shinybook.infradead.org> 124 + Dedy Lansky <quic_dlansky@quicinc.com> <dlansky@codeaurora.org> 125 + Deepak Kumar Singh <quic_deesin@quicinc.com> <deesin@codeaurora.org> 142 126 Dengcheng Zhu <dzhu@wavecomp.com> <dczhu@mips.com> 143 127 Dengcheng Zhu <dzhu@wavecomp.com> <dengcheng.zhu@gmail.com> 144 128 Dengcheng Zhu <dzhu@wavecomp.com> <dengcheng.zhu@imgtec.com> ··· 158 136 Domen Puncer <domen@coderock.org> 159 137 Douglas Gilbert <dougg@torque.net> 160 138 Ed L. Cashin <ecashin@coraid.com> 139 + Elliot Berman <quic_eberman@quicinc.com> <eberman@codeaurora.org> 161 140 Enric Balletbo i Serra <eballetbo@kernel.org> <enric.balletbo@collabora.com> 162 141 Enric Balletbo i Serra <eballetbo@kernel.org> <eballetbo@iseebcn.com> 163 142 Erik Kaneda <erik.kaneda@intel.com> <erik.schmauss@intel.com> ··· 171 148 Felipe W Damasio <felipewd@terra.com.br> 172 149 Felix Kuhling <fxkuehl@gmx.de> 173 150 Felix Moeller <felix@derklecks.de> 151 + Fenglin Wu <quic_fenglinw@quicinc.com> <fenglinw@codeaurora.org> 174 152 Filipe Lautert <filipe@icewall.org> 175 153 Finn Thain <fthain@linux-m68k.org> <fthain@telegraphics.com.au> 176 154 Franck Bui-Huu <vagabon.xyz@gmail.com> ··· 195 171 Gregory CLEMENT <gregory.clement@bootlin.com> <gregory.clement@free-electrons.com> 196 172 Guilherme G. Piccoli <kernel@gpiccoli.net> <gpiccoli@linux.vnet.ibm.com> 197 173 Guilherme G. Piccoli <kernel@gpiccoli.net> <gpiccoli@canonical.com> 174 + Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com> <gokulsri@codeaurora.org> 175 + Govindaraj Saminathan <quic_gsamin@quicinc.com> <gsamin@codeaurora.org> 198 176 Guo Ren <guoren@kernel.org> <guoren@linux.alibaba.com> 199 177 Guo Ren <guoren@kernel.org> <ren_guo@c-sky.com> 178 + Guru Das Srinagesh <quic_gurus@quicinc.com> <gurus@codeaurora.org> 200 179 Gustavo Padovan <gustavo@las.ic.unicamp.br> 201 180 Gustavo Padovan <padovan@profusion.mobi> 202 181 Hanjun Guo <guohanjun@huawei.com> <hanjun.guo@linaro.org> ··· 217 190 J. Bruce Fields <bfields@fieldses.org> <bfields@redhat.com> 218 191 J. Bruce Fields <bfields@fieldses.org> <bfields@citi.umich.edu> 219 192 Jacob Shin <Jacob.Shin@amd.com> 193 + Jack Pham <quic_jackp@quicinc.com> <jackp@codeaurora.org> 220 194 Jaegeuk Kim <jaegeuk@kernel.org> <jaegeuk@google.com> 221 195 Jaegeuk Kim <jaegeuk@kernel.org> <jaegeuk.kim@samsung.com> 222 196 Jaegeuk Kim <jaegeuk@kernel.org> <jaegeuk@motorola.com> ··· 245 217 Jayachandran C <c.jayachandran@gmail.com> <jnair@caviumnetworks.com> 246 218 <jean-philippe@linaro.org> <jean-philippe.brucker@arm.com> 247 219 Jean Tourrilhes <jt@hpl.hp.com> 220 + Jeevan Shriram <quic_jshriram@quicinc.com> <jshriram@codeaurora.org> 248 221 Jeff Garzik <jgarzik@pretzel.yyz.us> 249 222 Jeff Layton <jlayton@kernel.org> <jlayton@poochiereds.net> 250 223 Jeff Layton <jlayton@kernel.org> <jlayton@primarydata.com> 251 224 Jeff Layton <jlayton@kernel.org> <jlayton@redhat.com> 225 + Jeffrey Hugo <quic_jhugo@quicinc.com> <jhugo@codeaurora.org> 252 226 Jens Axboe <axboe@kernel.dk> <axboe@suse.de> 253 227 Jens Axboe <axboe@kernel.dk> <jens.axboe@oracle.com> 254 228 Jens Axboe <axboe@kernel.dk> <axboe@fb.com> ··· 258 228 Jens Osterkamp <Jens.Osterkamp@de.ibm.com> 259 229 Jernej Skrabec <jernej.skrabec@gmail.com> <jernej.skrabec@siol.net> 260 230 Jessica Zhang <quic_jesszhan@quicinc.com> <jesszhan@codeaurora.org> 231 + Jilai Wang <quic_jilaiw@quicinc.com> <jilaiw@codeaurora.org> 261 232 Jiri Pirko <jiri@resnulli.us> <jiri@nvidia.com> 262 233 Jiri Pirko <jiri@resnulli.us> <jiri@mellanox.com> 263 234 Jiri Pirko <jiri@resnulli.us> <jpirko@redhat.com> ··· 269 238 Jiri Slaby <jirislaby@kernel.org> <xslaby@fi.muni.cz> 270 239 Jisheng Zhang <jszhang@kernel.org> <jszhang@marvell.com> 271 240 Jisheng Zhang <jszhang@kernel.org> <Jisheng.Zhang@synaptics.com> 241 + Jishnu Prakash <quic_jprakash@quicinc.com> <jprakash@codeaurora.org> 272 242 Johan Hovold <johan@kernel.org> <jhovold@gmail.com> 273 243 Johan Hovold <johan@kernel.org> <johan@hovoldconsulting.com> 274 244 John Crispin <john@phrozen.org> <blogic@openwrt.org> ··· 288 256 <josh@joshtriplett.org> <josht@vnet.ibm.com> 289 257 Josh Poimboeuf <jpoimboe@kernel.org> <jpoimboe@redhat.com> 290 258 Josh Poimboeuf <jpoimboe@kernel.org> <jpoimboe@us.ibm.com> 259 + Jouni Malinen <quic_jouni@quicinc.com> <jouni@codeaurora.org> 291 260 Juha Yrjola <at solidboot.com> 292 261 Juha Yrjola <juha.yrjola@nokia.com> 293 262 Juha Yrjola <juha.yrjola@solidboot.com> ··· 296 263 Iskren Chernev <me@iskren.info> <iskren.chernev@gmail.com> 297 264 Kalle Valo <kvalo@kernel.org> <kvalo@codeaurora.org> 298 265 Kalyan Thota <quic_kalyant@quicinc.com> <kalyan_t@codeaurora.org> 266 + Karthikeyan Periyasamy <quic_periyasa@quicinc.com> <periyasa@codeaurora.org> 267 + Kathiravan T <quic_kathirav@quicinc.com> <kathirav@codeaurora.org> 299 268 Kay Sievers <kay.sievers@vrfy.org> 300 269 Kees Cook <keescook@chromium.org> <kees.cook@canonical.com> 301 270 Kees Cook <keescook@chromium.org> <keescook@google.com> ··· 306 271 Keith Busch <kbusch@kernel.org> <keith.busch@intel.com> 307 272 Keith Busch <kbusch@kernel.org> <keith.busch@linux.intel.com> 308 273 Kenneth W Chen <kenneth.w.chen@intel.com> 274 + Kenneth Westfield <quic_kwestfie@quicinc.com> <kwestfie@codeaurora.org> 275 + Kiran Gunda <quic_kgunda@quicinc.com> <kgunda@codeaurora.org> 309 276 Kirill Tkhai <tkhai@ya.ru> <ktkhai@virtuozzo.com> 310 277 Konstantin Khlebnikov <koct9i@gmail.com> <khlebnikov@yandex-team.ru> 311 278 Konstantin Khlebnikov <koct9i@gmail.com> <k.khlebnikov@samsung.com> ··· 316 279 Krzysztof Kozlowski <krzk@kernel.org> <k.kozlowski.k@gmail.com> 317 280 Krzysztof Kozlowski <krzk@kernel.org> <k.kozlowski@samsung.com> 318 281 Krzysztof Kozlowski <krzk@kernel.org> <krzysztof.kozlowski@canonical.com> 282 + Kshitiz Godara <quic_kgodara@quicinc.com> <kgodara@codeaurora.org> 319 283 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> 320 284 Kuogee Hsieh <quic_khsieh@quicinc.com> <khsieh@codeaurora.org> 321 285 Lee Jones <lee@kernel.org> <joneslee@google.com> ··· 330 292 Leon Romanovsky <leon@kernel.org> <leon@leon.nu> 331 293 Leon Romanovsky <leon@kernel.org> <leonro@mellanox.com> 332 294 Leon Romanovsky <leon@kernel.org> <leonro@nvidia.com> 295 + Liam Mark <quic_lmark@quicinc.com> <lmark@codeaurora.org> 333 296 Linas Vepstas <linas@austin.ibm.com> 334 297 Linus Lüssing <linus.luessing@c0d3.blue> <linus.luessing@ascom.ch> 335 298 Linus Lüssing <linus.luessing@c0d3.blue> <linus.luessing@web.de> 336 299 <linux-hardening@vger.kernel.org> <kernel-hardening@lists.openwall.com> 337 300 Li Yang <leoyang.li@nxp.com> <leoli@freescale.com> 338 301 Li Yang <leoyang.li@nxp.com> <leo@zh-kernel.org> 302 + Lior David <quic_liord@quicinc.com> <liord@codeaurora.org> 339 303 Lorenzo Pieralisi <lpieralisi@kernel.org> <lorenzo.pieralisi@arm.com> 340 304 Luca Ceresoli <luca.ceresoli@bootlin.com> <luca@lucaceresoli.net> 341 305 Lukasz Luba <lukasz.luba@arm.com> <l.luba@partner.samsung.com> 306 + Luo Jie <quic_luoj@quicinc.com> <luoj@codeaurora.org> 342 307 Maciej W. Rozycki <macro@mips.com> <macro@imgtec.com> 343 308 Maciej W. Rozycki <macro@orcam.me.uk> <macro@linux-mips.org> 309 + Maharaja Kennadyrajan <quic_mkenna@quicinc.com> <mkenna@codeaurora.org> 310 + Maheshwar Ajja <quic_majja@quicinc.com> <majja@codeaurora.org> 311 + Malathi Gottam <quic_mgottam@quicinc.com> <mgottam@codeaurora.org> 312 + Manikanta Pubbisetty <quic_mpubbise@quicinc.com> <mpubbise@codeaurora.org> 344 313 Manivannan Sadhasivam <mani@kernel.org> <manivannanece23@gmail.com> 345 314 Manivannan Sadhasivam <mani@kernel.org> <manivannan.sadhasivam@linaro.org> 315 + Manoj Basapathi <quic_manojbm@quicinc.com> <manojbm@codeaurora.org> 346 316 Marcin Nowakowski <marcin.nowakowski@mips.com> <marcin.nowakowski@imgtec.com> 347 317 Marc Zyngier <maz@kernel.org> <marc.zyngier@arm.com> 348 318 Marek Behún <kabel@kernel.org> <marek.behun@nic.cz> ··· 380 334 Matt Ranostay <mranostay@gmail.com> Matthew Ranostay <mranostay@embeddedalley.com> 381 335 Matt Ranostay <mranostay@gmail.com> <matt.ranostay@intel.com> 382 336 Matt Redfearn <matt.redfearn@mips.com> <matt.redfearn@imgtec.com> 337 + Maulik Shah <quic_mkshah@quicinc.com> <mkshah@codeaurora.org> 383 338 Mauro Carvalho Chehab <mchehab@kernel.org> <maurochehab@gmail.com> 384 339 Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@brturbo.com.br> 385 340 Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@infradead.org> ··· 393 346 Maxime Ripard <mripard@kernel.org> <maxime@cerno.tech> 394 347 Maxime Ripard <mripard@kernel.org> <maxime.ripard@bootlin.com> 395 348 Maxime Ripard <mripard@kernel.org> <maxime.ripard@free-electrons.com> 349 + Maya Erez <quic_merez@quicinc.com> <merez@codeaurora.org> 396 350 Mayuresh Janorkar <mayur@ti.com> 351 + Md Sadre Alam <quic_mdalam@quicinc.com> <mdalam@codeaurora.org> 352 + Miaoqing Pan <quic_miaoqing@quicinc.com> <miaoqing@codeaurora.org> 397 353 Michael Buesch <m@bues.ch> 398 354 Michal Simek <michal.simek@amd.com> <michal.simek@xilinx.com> 399 355 Michel Dänzer <michel@tungstengraphics.com> ··· 407 357 Mike Rapoport <rppt@kernel.org> <mike@compulab.co.il> 408 358 Mike Rapoport <rppt@kernel.org> <mike.rapoport@gmail.com> 409 359 Mike Rapoport <rppt@kernel.org> <rppt@linux.ibm.com> 360 + Mike Tipton <quic_mdtipton@quicinc.com> <mdtipton@codeaurora.org> 410 361 Miodrag Dinic <miodrag.dinic@mips.com> <miodrag.dinic@imgtec.com> 411 362 Miquel Raynal <miquel.raynal@bootlin.com> <miquel.raynal@free-electrons.com> 412 363 Mitesh shah <mshah@teja.com> ··· 416 365 Morten Welinder <welinder@anemone.rentec.com> 417 366 Morten Welinder <welinder@darter.rentec.com> 418 367 Morten Welinder <welinder@troll.com> 368 + Mukesh Ojha <quic_mojha@quicinc.com> <mojha@codeaurora.org> 369 + Muna Sinada <quic_msinada@quicinc.com> <msinada@codeaurora.org> 370 + Murali Nalajala <quic_mnalajal@quicinc.com> <mnalajal@codeaurora.org> 419 371 Mythri P K <mythripk@ti.com> 420 372 Nadia Yvette Chambers <nyc@holomorphy.com> William Lee Irwin III <wli@holomorphy.com> 421 373 Nathan Chancellor <nathan@kernel.org> <natechancellor@gmail.com> 374 + Neeraj Upadhyay <quic_neeraju@quicinc.com> <neeraju@codeaurora.org> 422 375 Neil Armstrong <neil.armstrong@linaro.org> <narmstrong@baylibre.com> 423 376 Nguyen Anh Quynh <aquynh@gmail.com> 424 377 Nicholas Piggin <npiggin@gmail.com> <npiggen@suse.de> ··· 441 386 Nikolay Aleksandrov <razor@blackwall.org> <nikolay@cumulusnetworks.com> 442 387 Nikolay Aleksandrov <razor@blackwall.org> <nikolay@nvidia.com> 443 388 Nikolay Aleksandrov <razor@blackwall.org> <nikolay@isovalent.com> 389 + Odelu Kukatla <quic_okukatla@quicinc.com> <okukatla@codeaurora.org> 444 390 Oleksandr Natalenko <oleksandr@natalenko.name> <oleksandr@redhat.com> 445 391 Oleksij Rempel <linux@rempel-privat.de> <bug-track@fisher-privat.net> 446 392 Oleksij Rempel <linux@rempel-privat.de> <external.Oleksij.Rempel@de.bosch.com> ··· 449 393 Oleksij Rempel <linux@rempel-privat.de> <o.rempel@pengutronix.de> 450 394 Oleksij Rempel <linux@rempel-privat.de> <ore@pengutronix.de> 451 395 Oliver Upton <oliver.upton@linux.dev> <oupton@google.com> 396 + Oza Pawandeep <quic_poza@quicinc.com> <poza@codeaurora.org> 452 397 Pali Rohár <pali@kernel.org> <pali.rohar@gmail.com> 453 398 Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> 454 399 Patrick Mochel <mochel@digitalimplant.org> ··· 461 404 Paul E. McKenney <paulmck@kernel.org> <paulmck@us.ibm.com> 462 405 Paul Mackerras <paulus@ozlabs.org> <paulus@samba.org> 463 406 Paul Mackerras <paulus@ozlabs.org> <paulus@au1.ibm.com> 407 + Pavankumar Kondeti <quic_pkondeti@quicinc.com> <pkondeti@codeaurora.org> 464 408 Peter A Jonsson <pj@ludd.ltu.se> 465 409 Peter Oruba <peter.oruba@amd.com> 466 410 Peter Oruba <peter@oruba.de> 467 411 Pratyush Anand <pratyush.anand@gmail.com> <pratyush.anand@st.com> 468 412 Praveen BP <praveenbp@ti.com> 413 + Pradeep Kumar Chitrapu <quic_pradeepc@quicinc.com> <pradeepc@codeaurora.org> 414 + Prasad Sodagudi <quic_psodagud@quicinc.com> <psodagud@codeaurora.org> 469 415 Punit Agrawal <punitagrawal@gmail.com> <punit.agrawal@arm.com> 470 416 Qais Yousef <qyousef@layalina.io> <qais.yousef@imgtec.com> 471 417 Qais Yousef <qyousef@layalina.io> <qais.yousef@arm.com> ··· 477 417 Rafael J. Wysocki <rjw@rjwysocki.net> <rjw@sisk.pl> 478 418 Rajeev Nandan <quic_rajeevny@quicinc.com> <rajeevny@codeaurora.org> 479 419 Rajendra Nayak <quic_rjendra@quicinc.com> <rnayak@codeaurora.org> 420 + Rajeshwari Ravindra Kamble <quic_rkambl@quicinc.com> <rkambl@codeaurora.org> 421 + Raju P.L.S.S.S.N <quic_rplsssn@quicinc.com> <rplsssn@codeaurora.org> 480 422 Rajesh Shah <rajesh.shah@intel.com> 423 + Rakesh Pillai <quic_pillair@quicinc.com> <pillair@codeaurora.org> 481 424 Ralf Baechle <ralf@linux-mips.org> 482 425 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> 426 + Ram Chandra Jangir <quic_rjangir@quicinc.com> <rjangir@codeaurora.org> 483 427 Randy Dunlap <rdunlap@infradead.org> <rdunlap@xenotime.net> 428 + Ravi Kumar Bokka <quic_rbokka@quicinc.com> <rbokka@codeaurora.org> 429 + Ravi Kumar Siddojigari <quic_rsiddoji@quicinc.com> <rsiddoji@codeaurora.org> 484 430 Rémi Denis-Courmont <rdenis@simphalempin.com> 485 431 Ricardo Ribalda <ribalda@kernel.org> <ricardo@ribalda.com> 486 432 Ricardo Ribalda <ribalda@kernel.org> Ricardo Ribalda Delgado <ribalda@kernel.org> ··· 495 429 Richard Leitner <richard.leitner@linux.dev> <me@g0hl1n.net> 496 430 Richard Leitner <richard.leitner@linux.dev> <richard.leitner@skidata.com> 497 431 Robert Foss <rfoss@kernel.org> <robert.foss@linaro.org> 432 + Rocky Liao <quic_rjliao@quicinc.com> <rjliao@codeaurora.org> 498 433 Roman Gushchin <roman.gushchin@linux.dev> <guro@fb.com> 499 434 Roman Gushchin <roman.gushchin@linux.dev> <guroan@gmail.com> 500 435 Roman Gushchin <roman.gushchin@linux.dev> <klamm@yandex-team.ru> ··· 513 446 Santosh Shilimkar <ssantosh@kernel.org> 514 447 Sarangdhar Joshi <spjoshi@codeaurora.org> 515 448 Sascha Hauer <s.hauer@pengutronix.de> 449 + Sahitya Tummala <quic_stummala@quicinc.com> <stummala@codeaurora.org> 450 + Sathishkumar Muruganandam <quic_murugana@quicinc.com> <murugana@codeaurora.org> 516 451 Satya Priya <quic_c_skakit@quicinc.com> <skakit@codeaurora.org> 517 452 S.Çağlar Onur <caglar@pardus.org.tr> 453 + Sayali Lokhande <quic_sayalil@quicinc.com> <sayalil@codeaurora.org> 518 454 Sean Christopherson <seanjc@google.com> <sean.j.christopherson@intel.com> 519 455 Sean Nyekjaer <sean@geanix.com> <sean.nyekjaer@prevas.dk> 456 + Sean Tranchetti <quic_stranche@quicinc.com> <stranche@codeaurora.org> 520 457 Sebastian Reichel <sre@kernel.org> <sebastian.reichel@collabora.co.uk> 521 458 Sebastian Reichel <sre@kernel.org> <sre@debian.org> 522 459 Sedat Dilek <sedat.dilek@gmail.com> <sedat.dilek@credativ.de> 460 + Senthilkumar N L <quic_snlakshm@quicinc.com> <snlakshm@codeaurora.org> 523 461 Seth Forshee <sforshee@kernel.org> <seth.forshee@canonical.com> 524 462 Shannon Nelson <shannon.nelson@amd.com> <snelson@pensando.io> 525 463 Shannon Nelson <shannon.nelson@amd.com> <shannon.nelson@intel.com> 526 464 Shannon Nelson <shannon.nelson@amd.com> <shannon.nelson@oracle.com> 465 + Sharath Chandra Vurukala <quic_sharathv@quicinc.com> <sharathv@codeaurora.org> 527 466 Shiraz Hashim <shiraz.linux.kernel@gmail.com> <shiraz.hashim@st.com> 528 467 Shuah Khan <shuah@kernel.org> <shuahkhan@gmail.com> 529 468 Shuah Khan <shuah@kernel.org> <shuah.khan@hp.com> 530 469 Shuah Khan <shuah@kernel.org> <shuahkh@osg.samsung.com> 531 470 Shuah Khan <shuah@kernel.org> <shuah.kh@samsung.com> 471 + Sibi Sankar <quic_sibis@quicinc.com> <sibis@codeaurora.org> 472 + Sid Manning <quic_sidneym@quicinc.com> <sidneym@codeaurora.org> 532 473 Simon Arlott <simon@octiron.net> <simon@fire.lp0.eu> 533 474 Simon Kelley <simon@thekelleys.org.uk> 475 + Sricharan Ramabadhran <quic_srichara@quicinc.com> <sricharan@codeaurora.org> 476 + Srinivas Ramana <quic_sramana@quicinc.com> <sramana@codeaurora.org> 477 + Sriram R <quic_srirrama@quicinc.com> <srirrama@codeaurora.org> 534 478 Stéphane Witzmann <stephane.witzmann@ubpmes.univ-bpclermont.fr> 535 479 Stephen Hemminger <stephen@networkplumber.org> <shemminger@linux-foundation.org> 536 480 Stephen Hemminger <stephen@networkplumber.org> <shemminger@osdl.org> ··· 549 471 Stephen Hemminger <stephen@networkplumber.org> <sthemmin@vyatta.com> 550 472 Steve Wise <larrystevenwise@gmail.com> <swise@chelsio.com> 551 473 Steve Wise <larrystevenwise@gmail.com> <swise@opengridcomputing.com> 552 - Subash Abhinov Kasiviswanathan <subashab@codeaurora.org> 474 + Subash Abhinov Kasiviswanathan <quic_subashab@quicinc.com> <subashab@codeaurora.org> 475 + Subbaraman Narayanamurthy <quic_subbaram@quicinc.com> <subbaram@codeaurora.org> 553 476 Subhash Jadavani <subhashj@codeaurora.org> 477 + Sudarshan Rajagopalan <quic_sudaraja@quicinc.com> <sudaraja@codeaurora.org> 554 478 Sudeep Holla <sudeep.holla@arm.com> Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com> 555 479 Sumit Semwal <sumit.semwal@ti.com> 480 + Surabhi Vishnoi <quic_svishnoi@quicinc.com> <svishnoi@codeaurora.org> 556 481 Takashi YOSHII <takashi.yoshii.zj@renesas.com> 482 + Tamizh Chelvam Raja <quic_tamizhr@quicinc.com> <tamizhr@codeaurora.org> 483 + Taniya Das <quic_tdas@quicinc.com> <tdas@codeaurora.org> 557 484 Tejun Heo <htejun@gmail.com> 558 485 Thomas Graf <tgraf@suug.ch> 559 486 Thomas Körper <socketcan@esd.eu> <thomas.koerper@esd.eu> 560 487 Thomas Pedersen <twp@codeaurora.org> 561 488 Tiezhu Yang <yangtiezhu@loongson.cn> <kernelpatch@126.com> 489 + Tingwei Zhang <quic_tingwei@quicinc.com> <tingwei@codeaurora.org> 490 + Tirupathi Reddy <quic_tirupath@quicinc.com> <tirupath@codeaurora.org> 562 491 Tobias Klauser <tklauser@distanz.ch> <tobias.klauser@gmail.com> 563 492 Tobias Klauser <tklauser@distanz.ch> <klto@zhaw.ch> 564 493 Tobias Klauser <tklauser@distanz.ch> <tklauser@nuerscht.ch> 565 494 Tobias Klauser <tklauser@distanz.ch> <tklauser@xenon.tklauser.home> 566 495 Todor Tomov <todor.too@gmail.com> <todor.tomov@linaro.org> 567 496 Tony Luck <tony.luck@intel.com> 497 + Trilok Soni <quic_tsoni@quicinc.com> <tsoni@codeaurora.org> 568 498 TripleX Chung <xxx.phy@gmail.com> <triplex@zh-kernel.org> 569 499 TripleX Chung <xxx.phy@gmail.com> <zhongyu@18mail.cn> 570 500 Tsuneo Yoshioka <Tsuneo.Yoshioka@f-secure.com> ··· 585 499 Uwe Kleine-König <ukl@pengutronix.de> 586 500 Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com> 587 501 Valdis Kletnieks <Valdis.Kletnieks@vt.edu> 502 + Vara Reddy <quic_varar@quicinc.com> <varar@codeaurora.org> 503 + Varadarajan Narayanan <quic_varada@quicinc.com> <varada@codeaurora.org> 504 + Vasanthakumar Thiagarajan <quic_vthiagar@quicinc.com> <vthiagar@codeaurora.org> 588 505 Vasily Averin <vasily.averin@linux.dev> <vvs@virtuozzo.com> 589 506 Vasily Averin <vasily.averin@linux.dev> <vvs@openvz.org> 590 507 Vasily Averin <vasily.averin@linux.dev> <vvs@parallels.com> 591 508 Vasily Averin <vasily.averin@linux.dev> <vvs@sw.ru> 592 509 Valentin Schneider <vschneid@redhat.com> <valentin.schneider@arm.com> 510 + Veera Sundaram Sankaran <quic_veeras@quicinc.com> <veeras@codeaurora.org> 511 + Veerabhadrarao Badiganti <quic_vbadigan@quicinc.com> <vbadigan@codeaurora.org> 512 + Venkateswara Naralasetty <quic_vnaralas@quicinc.com> <vnaralas@codeaurora.org> 593 513 Vikash Garodia <quic_vgarodia@quicinc.com> <vgarodia@codeaurora.org> 594 514 Vinod Koul <vkoul@kernel.org> <vinod.koul@intel.com> 595 515 Vinod Koul <vkoul@kernel.org> <vinod.koul@linux.intel.com> ··· 605 513 Viresh Kumar <vireshk@kernel.org> <viresh.linux@gmail.com> 606 514 Viresh Kumar <viresh.kumar@linaro.org> <viresh.kumar@linaro.org> 607 515 Viresh Kumar <viresh.kumar@linaro.org> <viresh.kumar@linaro.com> 516 + Vivek Aknurwar <quic_viveka@quicinc.com> <viveka@codeaurora.org> 608 517 Vivien Didelot <vivien.didelot@gmail.com> <vivien.didelot@savoirfairelinux.com> 609 518 Vlad Dogaru <ddvlad@gmail.com> <vlad.dogaru@intel.com> 610 519 Vladimir Davydov <vdavydov.dev@gmail.com> <vdavydov@parallels.com> 611 520 Vladimir Davydov <vdavydov.dev@gmail.com> <vdavydov@virtuozzo.com> 612 521 WeiXiong Liao <gmpy.liaowx@gmail.com> <liaoweixiong@allwinnertech.com> 522 + Wen Gong <quic_wgong@quicinc.com> <wgong@codeaurora.org> 523 + Wesley Cheng <quic_wcheng@quicinc.com> <wcheng@codeaurora.org> 613 524 Will Deacon <will@kernel.org> <will.deacon@arm.com> 614 525 Wolfram Sang <wsa@kernel.org> <w.sang@pengutronix.de> 615 526 Wolfram Sang <wsa@kernel.org> <wsa@the-dreams.de>
+11
Documentation/ABI/testing/sysfs-module
··· 60 60 C staging driver module 61 61 E unsigned module 62 62 == ===================== 63 + 64 + What: /sys/module/grant_table/parameters/free_per_iteration 65 + Date: July 2023 66 + KernelVersion: 6.5 but backported to all supported stable branches 67 + Contact: Xen developer discussion <xen-devel@lists.xenproject.org> 68 + Description: Read and write number of grant entries to attempt to free per iteration. 69 + 70 + Note: Future versions of Xen and Linux may provide a better 71 + interface for controlling the rate of deferred grant reclaim 72 + or may not need it at all. 73 + Users: Qubes OS (https://www.qubes-os.org)
+1 -1
Documentation/admin-guide/devices.txt
··· 2691 2691 45 = /dev/ttyMM1 Marvell MPSC - port 1 (obsolete unused) 2692 2692 46 = /dev/ttyCPM0 PPC CPM (SCC or SMC) - port 0 2693 2693 ... 2694 - 47 = /dev/ttyCPM5 PPC CPM (SCC or SMC) - port 5 2694 + 49 = /dev/ttyCPM5 PPC CPM (SCC or SMC) - port 3 2695 2695 50 = /dev/ttyIOC0 Altix serial card 2696 2696 ... 2697 2697 81 = /dev/ttyIOC31 Altix serial card
+7 -4
Documentation/admin-guide/hw-vuln/spectre.rst
··· 484 484 485 485 Systems which support enhanced IBRS (eIBRS) enable IBRS protection once at 486 486 boot, by setting the IBRS bit, and they're automatically protected against 487 - Spectre v2 variant attacks, including cross-thread branch target injections 488 - on SMT systems (STIBP). In other words, eIBRS enables STIBP too. 487 + Spectre v2 variant attacks. 489 488 490 - Legacy IBRS systems clear the IBRS bit on exit to userspace and 491 - therefore explicitly enable STIBP for that 489 + On Intel's enhanced IBRS systems, this includes cross-thread branch target 490 + injections on SMT systems (STIBP). In other words, Intel eIBRS enables 491 + STIBP, too. 492 + 493 + AMD Automatic IBRS does not protect userspace, and Legacy IBRS systems clear 494 + the IBRS bit on exit to userspace, therefore both explicitly enable STIBP. 492 495 493 496 The retpoline mitigation is turned on by default on vulnerable 494 497 CPUs. It can be forced on or off by the administrator
+3
Documentation/arch/arm64/silicon-errata.rst
··· 148 148 | ARM | MMU-700 | #2268618,2812531| N/A | 149 149 +----------------+-----------------+-----------------+-----------------------------+ 150 150 +----------------+-----------------+-----------------+-----------------------------+ 151 + | ARM | GIC-700 | #2941627 | ARM64_ERRATUM_2941627 | 152 + +----------------+-----------------+-----------------+-----------------------------+ 153 + +----------------+-----------------+-----------------+-----------------------------+ 151 154 | Broadcom | Brahma-B53 | N/A | ARM64_ERRATUM_845719 | 152 155 +----------------+-----------------+-----------------+-----------------------------+ 153 156 | Broadcom | Brahma-B53 | N/A | ARM64_ERRATUM_843419 |
+1 -6
Documentation/devicetree/bindings/net/mediatek,net.yaml
··· 388 388 patternProperties: 389 389 "^mac@[0-1]$": 390 390 type: object 391 - additionalProperties: false 391 + unevaluatedProperties: false 392 392 allOf: 393 393 - $ref: ethernet-controller.yaml# 394 394 description: ··· 400 400 reg: 401 401 maxItems: 1 402 402 403 - phy-handle: true 404 - 405 - phy-mode: true 406 - 407 403 required: 408 404 - reg 409 405 - compatible 410 - - phy-handle 411 406 412 407 required: 413 408 - compatible
+8 -2
Documentation/devicetree/bindings/net/rockchip-dwmac.yaml
··· 92 92 $ref: /schemas/types.yaml#/definitions/phandle 93 93 94 94 tx_delay: 95 - description: Delay value for TXD timing. Range value is 0~0x7F, 0x30 as default. 95 + description: Delay value for TXD timing. 96 96 $ref: /schemas/types.yaml#/definitions/uint32 97 + minimum: 0 98 + maximum: 0x7F 99 + default: 0x30 97 100 98 101 rx_delay: 99 - description: Delay value for RXD timing. Range value is 0~0x7F, 0x10 as default. 102 + description: Delay value for RXD timing. 100 103 $ref: /schemas/types.yaml#/definitions/uint32 104 + minimum: 0 105 + maximum: 0x7F 106 + default: 0x10 101 107 102 108 phy-supply: 103 109 description: PHY regulator
+3 -1
Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml
··· 16 16 - enum: 17 17 - atmel,at91rm9200-usart 18 18 - atmel,at91sam9260-usart 19 - - microchip,sam9x60-usart 20 19 - items: 21 20 - const: atmel,at91rm9200-dbgu 22 21 - const: atmel,at91rm9200-usart 23 22 - items: 24 23 - const: atmel,at91sam9260-dbgu 24 + - const: atmel,at91sam9260-usart 25 + - items: 26 + - const: microchip,sam9x60-usart 25 27 - const: atmel,at91sam9260-usart 26 28 - items: 27 29 - const: microchip,sam9x60-dbgu
+19 -26
Documentation/filesystems/tmpfs.rst
··· 84 84 is half of the number of your physical RAM pages, or (on a 85 85 machine with highmem) the number of lowmem RAM pages, 86 86 whichever is the lower. 87 - noswap Disables swap. Remounts must respect the original settings. 88 - By default swap is enabled. 89 87 ========= ============================================================ 90 88 91 89 These parameters accept a suffix k, m or g for kilo, mega and giga and ··· 97 99 use up all the memory on the machine; but enhances the scalability of 98 100 that instance in a system with many CPUs making intensive use of it. 99 101 102 + tmpfs blocks may be swapped out, when there is a shortage of memory. 103 + tmpfs has a mount option to disable its use of swap: 104 + 105 + ====== =========================================================== 106 + noswap Disables swap. Remounts must respect the original settings. 107 + By default swap is enabled. 108 + ====== =========================================================== 109 + 100 110 tmpfs also supports Transparent Huge Pages which requires a kernel 101 111 configured with CONFIG_TRANSPARENT_HUGEPAGE and with huge supported for 102 112 your system (has_transparent_hugepage(), which is architecture specific). 103 113 The mount options for this are: 104 114 105 - ====== ============================================================ 106 - huge=0 never: disables huge pages for the mount 107 - huge=1 always: enables huge pages for the mount 108 - huge=2 within_size: only allocate huge pages if the page will be 109 - fully within i_size, also respect fadvise()/madvise() hints. 110 - huge=3 advise: only allocate huge pages if requested with 111 - fadvise()/madvise() 112 - ====== ============================================================ 115 + ================ ============================================================== 116 + huge=never Do not allocate huge pages. This is the default. 117 + huge=always Attempt to allocate huge page every time a new page is needed. 118 + huge=within_size Only allocate huge page if it will be fully within i_size. 119 + Also respect madvise(2) hints. 120 + huge=advise Only allocate huge page if requested with madvise(2). 121 + ================ ============================================================== 113 122 114 - There is a sysfs file which you can also use to control system wide THP 115 - configuration for all tmpfs mounts, the file is: 116 - 117 - /sys/kernel/mm/transparent_hugepage/shmem_enabled 118 - 119 - This sysfs file is placed on top of THP sysfs directory and so is registered 120 - by THP code. It is however only used to control all tmpfs mounts with one 121 - single knob. Since it controls all tmpfs mounts it should only be used either 122 - for emergency or testing purposes. The values you can set for shmem_enabled are: 123 - 124 - == ============================================================ 125 - -1 deny: disables huge on shm_mnt and all mounts, for 126 - emergency use 127 - -2 force: enables huge on shm_mnt and all mounts, w/o needing 128 - option, for testing 129 - == ============================================================ 123 + See also Documentation/admin-guide/mm/transhuge.rst, which describes the 124 + sysfs file /sys/kernel/mm/transparent_hugepage/shmem_enabled: which can 125 + be used to deny huge pages on all tmpfs mounts in an emergency, or to 126 + force huge pages on all tmpfs mounts for testing. 130 127 131 128 tmpfs has a mount option to set the NUMA memory allocation policy for 132 129 all files in that instance (if CONFIG_NUMA is enabled) - which can be
-3
Documentation/process/embargoed-hardware-issues.rst
··· 254 254 Samsung Javier González <javier.gonz@samsung.com> 255 255 256 256 Microsoft James Morris <jamorris@linux.microsoft.com> 257 - VMware 258 257 Xen Andrew Cooper <andrew.cooper3@citrix.com> 259 258 260 259 Canonical John Johansen <john.johansen@canonical.com> ··· 262 263 Red Hat Josh Poimboeuf <jpoimboe@redhat.com> 263 264 SUSE Jiri Kosina <jkosina@suse.cz> 264 265 265 - Amazon 266 266 Google Kees Cook <keescook@chromium.org> 267 267 268 - GCC 269 268 LLVM Nick Desaulniers <ndesaulniers@google.com> 270 269 ============= ======================================================== 271 270
+17 -20
Documentation/process/security-bugs.rst
··· 63 63 of the report are treated confidentially even after the embargo has been 64 64 lifted, in perpetuity. 65 65 66 - Coordination 67 - ------------ 66 + Coordination with other groups 67 + ------------------------------ 68 68 69 - Fixes for sensitive bugs, such as those that might lead to privilege 70 - escalations, may need to be coordinated with the private 71 - <linux-distros@vs.openwall.org> mailing list so that distribution vendors 72 - are well prepared to issue a fixed kernel upon public disclosure of the 73 - upstream fix. Distros will need some time to test the proposed patch and 74 - will generally request at least a few days of embargo, and vendor update 75 - publication prefers to happen Tuesday through Thursday. When appropriate, 76 - the security team can assist with this coordination, or the reporter can 77 - include linux-distros from the start. In this case, remember to prefix 78 - the email Subject line with "[vs]" as described in the linux-distros wiki: 79 - <http://oss-security.openwall.org/wiki/mailing-lists/distros#how-to-use-the-lists> 69 + The kernel security team strongly recommends that reporters of potential 70 + security issues NEVER contact the "linux-distros" mailing list until 71 + AFTER discussing it with the kernel security team. Do not Cc: both 72 + lists at once. You may contact the linux-distros mailing list after a 73 + fix has been agreed on and you fully understand the requirements that 74 + doing so will impose on you and the kernel community. 75 + 76 + The different lists have different goals and the linux-distros rules do 77 + not contribute to actually fixing any potential security problems. 80 78 81 79 CVE assignment 82 80 -------------- 83 81 84 - The security team does not normally assign CVEs, nor do we require them 85 - for reports or fixes, as this can needlessly complicate the process and 86 - may delay the bug handling. If a reporter wishes to have a CVE identifier 87 - assigned ahead of public disclosure, they will need to contact the private 88 - linux-distros list, described above. When such a CVE identifier is known 89 - before a patch is provided, it is desirable to mention it in the commit 90 - message if the reporter agrees. 82 + The security team does not assign CVEs, nor do we require them for 83 + reports or fixes, as this can needlessly complicate the process and may 84 + delay the bug handling. If a reporter wishes to have a CVE identifier 85 + assigned, they should find one by themselves, for example by contacting 86 + MITRE directly. However under no circumstances will a patch inclusion 87 + be delayed to wait for a CVE identifier to arrive. 91 88 92 89 Non-disclosure agreements 93 90 -------------------------
+27 -26
MAINTAINERS
··· 3262 3262 F: drivers/input/touchscreen/atmel_mxt_ts.c 3263 3263 3264 3264 ATMEL WIRELESS DRIVER 3265 - M: Simon Kelley <simon@thekelleys.org.uk> 3266 3265 L: linux-wireless@vger.kernel.org 3267 - S: Maintained 3266 + S: Orphan 3268 3267 W: http://www.thekelleys.org.uk/atmel 3269 3268 W: http://atmelwlandriver.sourceforge.net/ 3270 3269 F: drivers/net/wireless/atmel/atmel* ··· 3393 3394 B43 WIRELESS DRIVER 3394 3395 L: linux-wireless@vger.kernel.org 3395 3396 L: b43-dev@lists.infradead.org 3396 - S: Odd Fixes 3397 + S: Orphan 3397 3398 W: https://wireless.wiki.kernel.org/en/users/Drivers/b43 3398 3399 F: drivers/net/wireless/broadcom/b43/ 3399 3400 ··· 4474 4475 M: Peter Chen <peter.chen@kernel.org> 4475 4476 M: Pawel Laszczak <pawell@cadence.com> 4476 4477 R: Roger Quadros <rogerq@kernel.org> 4477 - R: Aswath Govindraju <a-govindraju@ti.com> 4478 4478 L: linux-usb@vger.kernel.org 4479 4479 S: Maintained 4480 4480 T: git git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/usb.git ··· 5159 5161 F: include/linux/compiler_attributes.h 5160 5162 5161 5163 COMPUTE EXPRESS LINK (CXL) 5164 + M: Davidlohr Bueso <dave@stgolabs.net> 5165 + M: Jonathan Cameron <jonathan.cameron@huawei.com> 5166 + M: Dave Jiang <dave.jiang@intel.com> 5162 5167 M: Alison Schofield <alison.schofield@intel.com> 5163 5168 M: Vishal Verma <vishal.l.verma@intel.com> 5164 5169 M: Ira Weiny <ira.weiny@intel.com> 5165 - M: Ben Widawsky <bwidawsk@kernel.org> 5166 5170 M: Dan Williams <dan.j.williams@intel.com> 5167 5171 L: linux-cxl@vger.kernel.org 5168 5172 S: Maintained ··· 5473 5473 F: drivers/net/can/ctucanfd/ 5474 5474 5475 5475 CW1200 WLAN driver 5476 - M: Solomon Peachy <pizza@shaftnet.org> 5477 - S: Maintained 5476 + S: Orphan 5478 5477 F: drivers/net/wireless/st/cw1200/ 5479 5478 5480 5479 CX18 VIDEO4LINUX DRIVER ··· 12610 12611 F: drivers/net/ethernet/marvell/mvpp2/ 12611 12612 12612 12613 MARVELL MWIFIEX WIRELESS DRIVER 12613 - M: Amitkumar Karwar <amitkarwar@gmail.com> 12614 - M: Ganapathi Bhat <ganapathi017@gmail.com> 12615 - M: Sharvari Harisangam <sharvari.harisangam@nxp.com> 12616 - M: Xinming Hu <huxinming820@gmail.com> 12614 + M: Brian Norris <briannorris@chromium.org> 12617 12615 L: linux-wireless@vger.kernel.org 12618 - S: Maintained 12616 + S: Odd Fixes 12619 12617 F: drivers/net/wireless/marvell/mwifiex/ 12620 12618 12621 12619 MARVELL MWL8K WIRELESS DRIVER 12622 - M: Lennert Buytenhek <buytenh@wantstofly.org> 12623 12620 L: linux-wireless@vger.kernel.org 12624 - S: Odd Fixes 12621 + S: Orphan 12625 12622 F: drivers/net/wireless/marvell/mwl8k.c 12626 12623 12627 12624 MARVELL NAND CONTROLLER DRIVER ··· 17463 17468 17464 17469 QUALCOMM ATH12K WIRELESS DRIVER 17465 17470 M: Kalle Valo <kvalo@kernel.org> 17471 + M: Jeff Johnson <quic_jjohnson@quicinc.com> 17466 17472 L: ath12k@lists.infradead.org 17467 17473 S: Supported 17468 17474 T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git ··· 17471 17475 17472 17476 QUALCOMM ATHEROS ATH10K WIRELESS DRIVER 17473 17477 M: Kalle Valo <kvalo@kernel.org> 17478 + M: Jeff Johnson <quic_jjohnson@quicinc.com> 17474 17479 L: ath10k@lists.infradead.org 17475 17480 S: Supported 17476 17481 W: https://wireless.wiki.kernel.org/en/users/Drivers/ath10k ··· 17481 17484 17482 17485 QUALCOMM ATHEROS ATH11K WIRELESS DRIVER 17483 17486 M: Kalle Valo <kvalo@kernel.org> 17487 + M: Jeff Johnson <quic_jjohnson@quicinc.com> 17484 17488 L: ath11k@lists.infradead.org 17485 17489 S: Supported 17486 17490 W: https://wireless.wiki.kernel.org/en/users/Drivers/ath11k ··· 18002 18004 F: drivers/net/wireless/realtek/rtlwifi/ 18003 18005 18004 18006 REALTEK WIRELESS DRIVER (rtw88) 18005 - M: Yan-Hsuan Chuang <tony0620emma@gmail.com> 18007 + M: Ping-Ke Shih <pkshih@realtek.com> 18006 18008 L: linux-wireless@vger.kernel.org 18007 18009 S: Maintained 18008 18010 F: drivers/net/wireless/realtek/rtw88/ ··· 20421 20423 F: include/linux/*/stm32-*tim* 20422 20424 20423 20425 STMMAC ETHERNET DRIVER 20424 - M: Giuseppe Cavallaro <peppe.cavallaro@st.com> 20425 20426 M: Alexandre Torgue <alexandre.torgue@foss.st.com> 20426 20427 M: Jose Abreu <joabreu@synopsys.com> 20427 20428 L: netdev@vger.kernel.org ··· 21658 21661 TTY LAYER 21659 21662 M: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 21660 21663 M: Jiri Slaby <jirislaby@kernel.org> 21664 + L: linux-kernel@vger.kernel.org 21665 + L: linux-serial@vger.kernel.org 21661 21666 S: Supported 21662 21667 T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty.git 21663 21668 F: Documentation/driver-api/serial/ 21664 21669 F: drivers/tty/ 21670 + F: drivers/tty/serial/serial_base.h 21671 + F: drivers/tty/serial/serial_base_bus.c 21665 21672 F: drivers/tty/serial/serial_core.c 21673 + F: drivers/tty/serial/serial_ctrl.c 21674 + F: drivers/tty/serial/serial_port.c 21666 21675 F: include/linux/selection.h 21667 21676 F: include/linux/serial.h 21668 21677 F: include/linux/serial_core.h ··· 21697 21694 F: drivers/net/ethernet/dec/tulip/ 21698 21695 21699 21696 TUN/TAP driver 21700 - M: Maxim Krasnyansky <maxk@qti.qualcomm.com> 21697 + M: Willem de Bruijn <willemdebruijn.kernel@gmail.com> 21698 + M: Jason Wang <jasowang@redhat.com> 21701 21699 S: Maintained 21702 21700 W: http://vtun.sourceforge.net/tun 21703 21701 F: Documentation/networking/tuntap.rst 21704 21702 F: arch/um/os-Linux/drivers/ 21703 + F: drivers/net/tap.c 21704 + F: drivers/net/tun.c 21705 21705 21706 21706 TURBOCHANNEL SUBSYSTEM 21707 21707 M: "Maciej W. Rozycki" <macro@orcam.me.uk> ··· 21927 21921 F: drivers/usb/misc/apple-mfi-fastcharge.c 21928 21922 21929 21923 USB AR5523 WIRELESS DRIVER 21930 - M: Pontus Fuchs <pontus.fuchs@gmail.com> 21931 21924 L: linux-wireless@vger.kernel.org 21932 - S: Maintained 21925 + S: Orphan 21933 21926 F: drivers/net/wireless/ath/ar5523/ 21934 21927 21935 21928 USB ATTACHED SCSI ··· 22205 22200 F: include/uapi/linux/usb/g_uvc.h 22206 22201 22207 22202 USB WIRELESS RNDIS DRIVER (rndis_wlan) 22208 - M: Jussi Kivilinna <jussi.kivilinna@iki.fi> 22209 22203 L: linux-wireless@vger.kernel.org 22210 - S: Maintained 22204 + S: Orphan 22211 22205 F: drivers/net/wireless/legacy/rndis_wlan.c 22212 22206 22213 22207 USB XHCI DRIVER ··· 22981 22977 22982 22978 WL3501 WIRELESS PCMCIA CARD DRIVER 22983 22979 L: linux-wireless@vger.kernel.org 22984 - S: Odd fixes 22980 + S: Orphan 22985 22981 F: drivers/net/wireless/legacy/wl3501* 22986 22982 22987 22983 WMI BINARY MOF DRIVER ··· 23552 23548 F: mm/zbud.c 23553 23549 23554 23550 ZD1211RW WIRELESS DRIVER 23555 - M: Ulrich Kunitz <kune@deine-taler.de> 23556 23551 L: linux-wireless@vger.kernel.org 23557 - L: zd1211-devs@lists.sourceforge.net (subscribers-only) 23558 - S: Maintained 23559 - W: http://zd1211.ath.cx/wiki/DriverRewrite 23552 + S: Orphan 23560 23553 F: drivers/net/wireless/zydas/zd1211rw/ 23561 23554 23562 23555 ZD1301 MEDIA DRIVER
+1 -1
Makefile
··· 2 2 VERSION = 6 3 3 PATCHLEVEL = 5 4 4 SUBLEVEL = 0 5 - EXTRAVERSION = -rc3 5 + EXTRAVERSION = -rc4 6 6 NAME = Hurr durr I'ma ninja sloth 7 7 8 8 # *DOCUMENTATION*
+13 -13
arch/arm/boot/dts/microchip/sam9x60.dtsi
··· 172 172 status = "disabled"; 173 173 174 174 uart4: serial@200 { 175 - compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 175 + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; 176 176 reg = <0x200 0x200>; 177 177 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>; 178 178 dmas = <&dma0 ··· 240 240 status = "disabled"; 241 241 242 242 uart5: serial@200 { 243 - compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 243 + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; 244 244 reg = <0x200 0x200>; 245 245 atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 246 246 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>; ··· 370 370 status = "disabled"; 371 371 372 372 uart11: serial@200 { 373 - compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 373 + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; 374 374 reg = <0x200 0x200>; 375 375 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 7>; 376 376 dmas = <&dma0 ··· 419 419 status = "disabled"; 420 420 421 421 uart12: serial@200 { 422 - compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 422 + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; 423 423 reg = <0x200 0x200>; 424 424 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 7>; 425 425 dmas = <&dma0 ··· 576 576 status = "disabled"; 577 577 578 578 uart6: serial@200 { 579 - compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 579 + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; 580 580 reg = <0x200 0x200>; 581 581 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>; 582 582 dmas = <&dma0 ··· 625 625 status = "disabled"; 626 626 627 627 uart7: serial@200 { 628 - compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 628 + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; 629 629 reg = <0x200 0x200>; 630 630 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 7>; 631 631 dmas = <&dma0 ··· 674 674 status = "disabled"; 675 675 676 676 uart8: serial@200 { 677 - compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 677 + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; 678 678 reg = <0x200 0x200>; 679 679 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 7>; 680 680 dmas = <&dma0 ··· 723 723 status = "disabled"; 724 724 725 725 uart0: serial@200 { 726 - compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 726 + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; 727 727 reg = <0x200 0x200>; 728 728 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>; 729 729 dmas = <&dma0 ··· 791 791 status = "disabled"; 792 792 793 793 uart1: serial@200 { 794 - compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 794 + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; 795 795 reg = <0x200 0x200>; 796 796 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>; 797 797 dmas = <&dma0 ··· 859 859 status = "disabled"; 860 860 861 861 uart2: serial@200 { 862 - compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 862 + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; 863 863 reg = <0x200 0x200>; 864 864 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>; 865 865 dmas = <&dma0 ··· 927 927 status = "disabled"; 928 928 929 929 uart3: serial@200 { 930 - compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 930 + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; 931 931 reg = <0x200 0x200>; 932 932 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>; 933 933 dmas = <&dma0 ··· 1050 1050 status = "disabled"; 1051 1051 1052 1052 uart9: serial@200 { 1053 - compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 1053 + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; 1054 1054 reg = <0x200 0x200>; 1055 1055 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 7>; 1056 1056 dmas = <&dma0 ··· 1099 1099 status = "disabled"; 1100 1100 1101 1101 uart10: serial@200 { 1102 - compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 1102 + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; 1103 1103 reg = <0x200 0x200>; 1104 1104 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 7>; 1105 1105 dmas = <&dma0
+1 -1
arch/arm/boot/dts/nspire/nspire.dtsi
··· 161 161 }; 162 162 163 163 watchdog: watchdog@90060000 { 164 - compatible = "arm,amba-primecell"; 164 + compatible = "arm,primecell"; 165 165 reg = <0x90060000 0x1000>; 166 166 interrupts = <3>; 167 167 };
+10
arch/arm/boot/dts/nxp/imx/imx53-sk-imx53.dts
··· 60 60 status = "okay"; 61 61 }; 62 62 63 + &cpu0 { 64 + /* CPU rated to 800 MHz, not the default 1.2GHz. */ 65 + operating-points = < 66 + /* kHz uV */ 67 + 166666 850000 68 + 400000 900000 69 + 800000 1050000 70 + >; 71 + }; 72 + 63 73 &ecspi1 { 64 74 pinctrl-names = "default"; 65 75 pinctrl-0 = <&pinctrl_ecspi1>;
+1 -1
arch/arm/boot/dts/nxp/imx/imx6sll.dtsi
··· 552 552 reg = <0x020ca000 0x1000>; 553 553 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; 554 554 clocks = <&clks IMX6SLL_CLK_USBPHY2>; 555 - phy-reg_3p0-supply = <&reg_3p0>; 555 + phy-3p0-supply = <&reg_3p0>; 556 556 fsl,anatop = <&anatop>; 557 557 }; 558 558
+1 -1
arch/arm/configs/axm55xx_defconfig
··· 197 197 CONFIG_EXT3_FS=y 198 198 # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set 199 199 CONFIG_EXT4_FS=y 200 - CONFIG_AUTOFS4_FS=y 200 + CONFIG_AUTOFS_FS=y 201 201 CONFIG_FUSE_FS=y 202 202 CONFIG_CUSE=y 203 203 CONFIG_FSCACHE=y
+1 -1
arch/arm/configs/davinci_all_defconfig
··· 232 232 CONFIG_EXT3_FS=y 233 233 CONFIG_EXT4_FS_POSIX_ACL=y 234 234 CONFIG_XFS_FS=m 235 - CONFIG_AUTOFS4_FS=m 235 + CONFIG_AUTOFS_FS=m 236 236 CONFIG_MSDOS_FS=y 237 237 CONFIG_VFAT_FS=y 238 238 CONFIG_TMPFS=y
+1 -1
arch/arm/configs/exynos_defconfig
··· 327 327 CONFIG_PHY_EXYNOS5250_SATA=y 328 328 CONFIG_EXT2_FS=y 329 329 CONFIG_EXT4_FS=y 330 - CONFIG_AUTOFS4_FS=y 330 + CONFIG_AUTOFS_FS=y 331 331 CONFIG_MSDOS_FS=y 332 332 CONFIG_VFAT_FS=y 333 333 CONFIG_TMPFS=y
+1 -1
arch/arm/configs/footbridge_defconfig
··· 94 94 CONFIG_LEDS_TRIGGERS=y 95 95 CONFIG_LEDS_TRIGGER_TIMER=y 96 96 CONFIG_EXT2_FS=y 97 - CONFIG_AUTOFS4_FS=y 97 + CONFIG_AUTOFS_FS=y 98 98 CONFIG_ISO9660_FS=m 99 99 CONFIG_JOLIET=y 100 100 CONFIG_MSDOS_FS=m
+1 -1
arch/arm/configs/imx_v6_v7_defconfig
··· 442 442 CONFIG_QUOTA=y 443 443 CONFIG_QUOTA_NETLINK_INTERFACE=y 444 444 # CONFIG_PRINT_QUOTA_WARNING is not set 445 - CONFIG_AUTOFS4_FS=y 445 + CONFIG_AUTOFS_FS=y 446 446 CONFIG_FUSE_FS=y 447 447 CONFIG_ISO9660_FS=m 448 448 CONFIG_JOLIET=y
+1 -1
arch/arm/configs/keystone_defconfig
··· 207 207 CONFIG_EXT4_FS=y 208 208 CONFIG_EXT4_FS_POSIX_ACL=y 209 209 CONFIG_FANOTIFY=y 210 - CONFIG_AUTOFS4_FS=y 210 + CONFIG_AUTOFS_FS=y 211 211 CONFIG_MSDOS_FS=y 212 212 CONFIG_VFAT_FS=y 213 213 CONFIG_NTFS_FS=y
+1 -1
arch/arm/configs/lpc32xx_defconfig
··· 162 162 CONFIG_PWM=y 163 163 CONFIG_PWM_LPC32XX=y 164 164 CONFIG_EXT2_FS=y 165 - CONFIG_AUTOFS4_FS=y 165 + CONFIG_AUTOFS_FS=y 166 166 CONFIG_MSDOS_FS=y 167 167 CONFIG_VFAT_FS=y 168 168 CONFIG_TMPFS=y
+1 -1
arch/arm/configs/milbeaut_m10v_defconfig
··· 81 81 CONFIG_MEMORY=y 82 82 # CONFIG_ARM_PMU is not set 83 83 CONFIG_EXT4_FS=y 84 - CONFIG_AUTOFS4_FS=y 84 + CONFIG_AUTOFS_FS=y 85 85 CONFIG_MSDOS_FS=y 86 86 CONFIG_VFAT_FS=y 87 87 CONFIG_NTFS_FS=y
+1 -1
arch/arm/configs/multi_v7_defconfig
··· 1226 1226 CONFIG_STM32_TIMER_CNT=m 1227 1227 CONFIG_STM32_LPTIMER_CNT=m 1228 1228 CONFIG_EXT4_FS=y 1229 - CONFIG_AUTOFS4_FS=y 1229 + CONFIG_AUTOFS_FS=y 1230 1230 CONFIG_MSDOS_FS=y 1231 1231 CONFIG_VFAT_FS=y 1232 1232 CONFIG_NTFS_FS=y
+1 -1
arch/arm/configs/omap1_defconfig
··· 188 188 CONFIG_EXT2_FS=y 189 189 CONFIG_EXT3_FS=y 190 190 # CONFIG_DNOTIFY is not set 191 - CONFIG_AUTOFS4_FS=y 191 + CONFIG_AUTOFS_FS=y 192 192 CONFIG_ISO9660_FS=y 193 193 CONFIG_JOLIET=y 194 194 CONFIG_MSDOS_FS=y
+1 -1
arch/arm/configs/omap2plus_defconfig
··· 678 678 CONFIG_FANOTIFY=y 679 679 CONFIG_QUOTA=y 680 680 CONFIG_QFMT_V2=y 681 - CONFIG_AUTOFS4_FS=m 681 + CONFIG_AUTOFS_FS=m 682 682 CONFIG_MSDOS_FS=y 683 683 CONFIG_VFAT_FS=y 684 684 CONFIG_TMPFS=y
+1 -1
arch/arm/configs/pxa_defconfig
··· 589 589 CONFIG_REISERFS_FS_POSIX_ACL=y 590 590 CONFIG_REISERFS_FS_SECURITY=y 591 591 CONFIG_XFS_FS=m 592 - CONFIG_AUTOFS4_FS=m 592 + CONFIG_AUTOFS_FS=m 593 593 CONFIG_FUSE_FS=m 594 594 CONFIG_CUSE=m 595 595 CONFIG_FSCACHE=y
+1 -1
arch/arm/configs/rpc_defconfig
··· 79 79 CONFIG_RTC_DRV_PCF8583=y 80 80 CONFIG_EXT2_FS=y 81 81 CONFIG_EXT3_FS=y 82 - CONFIG_AUTOFS4_FS=m 82 + CONFIG_AUTOFS_FS=m 83 83 CONFIG_ISO9660_FS=y 84 84 CONFIG_JOLIET=y 85 85 CONFIG_MSDOS_FS=m
+1 -1
arch/arm/configs/s5pv210_defconfig
··· 103 103 CONFIG_PHY_S5PV210_USB2=y 104 104 CONFIG_EXT2_FS=y 105 105 CONFIG_EXT4_FS=y 106 - CONFIG_AUTOFS4_FS=y 106 + CONFIG_AUTOFS_FS=y 107 107 CONFIG_MSDOS_FS=y 108 108 CONFIG_VFAT_FS=y 109 109 CONFIG_TMPFS=y
+1 -1
arch/arm/configs/socfpga_defconfig
··· 136 136 CONFIG_EXT2_FS_XATTR=y 137 137 CONFIG_EXT2_FS_POSIX_ACL=y 138 138 CONFIG_EXT3_FS=y 139 - CONFIG_AUTOFS4_FS=y 139 + CONFIG_AUTOFS_FS=y 140 140 CONFIG_VFAT_FS=y 141 141 CONFIG_NTFS_FS=y 142 142 CONFIG_NTFS_RW=y
+1 -1
arch/arm/configs/spear13xx_defconfig
··· 85 85 CONFIG_EXT2_FS_SECURITY=y 86 86 CONFIG_EXT3_FS=y 87 87 CONFIG_EXT3_FS_SECURITY=y 88 - CONFIG_AUTOFS4_FS=m 88 + CONFIG_AUTOFS_FS=m 89 89 CONFIG_FUSE_FS=y 90 90 CONFIG_MSDOS_FS=m 91 91 CONFIG_VFAT_FS=m
+1 -1
arch/arm/configs/spear3xx_defconfig
··· 68 68 CONFIG_EXT2_FS_SECURITY=y 69 69 CONFIG_EXT3_FS=y 70 70 CONFIG_EXT3_FS_SECURITY=y 71 - CONFIG_AUTOFS4_FS=m 71 + CONFIG_AUTOFS_FS=m 72 72 CONFIG_MSDOS_FS=m 73 73 CONFIG_VFAT_FS=m 74 74 CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
+1 -1
arch/arm/configs/spear6xx_defconfig
··· 54 54 CONFIG_EXT2_FS_SECURITY=y 55 55 CONFIG_EXT3_FS=y 56 56 CONFIG_EXT3_FS_SECURITY=y 57 - CONFIG_AUTOFS4_FS=m 57 + CONFIG_AUTOFS_FS=m 58 58 CONFIG_MSDOS_FS=m 59 59 CONFIG_VFAT_FS=m 60 60 CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
-1
arch/arm/mach-pxa/sharpsl_pm.h
··· 105 105 #define MAX1111_ACIN_VOLT 6u 106 106 int sharpsl_pm_pxa_read_max1111(int channel); 107 107 108 - void corgi_lcd_limit_intensity(int limit); 109 108 #endif
+1
arch/arm/mach-pxa/spitz_pm.c
··· 15 15 #include <linux/interrupt.h> 16 16 #include <linux/platform_device.h> 17 17 #include <linux/apm-emulation.h> 18 + #include <linux/spi/corgi_lcd.h> 18 19 19 20 #include <asm/irq.h> 20 21 #include <asm/mach-types.h>
+1 -1
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
··· 145 145 status = "okay"; 146 146 clock-frequency = <100000>; 147 147 i2c-sda-falling-time-ns = <890>; /* hcnt */ 148 - i2c-sdl-falling-time-ns = <890>; /* lcnt */ 148 + i2c-scl-falling-time-ns = <890>; /* lcnt */ 149 149 150 150 pinctrl-names = "default", "gpio"; 151 151 pinctrl-0 = <&i2c1_pmx_func>;
+1 -1
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts
··· 141 141 status = "okay"; 142 142 clock-frequency = <100000>; 143 143 i2c-sda-falling-time-ns = <890>; /* hcnt */ 144 - i2c-sdl-falling-time-ns = <890>; /* lcnt */ 144 + i2c-scl-falling-time-ns = <890>; /* lcnt */ 145 145 146 146 adc@14 { 147 147 compatible = "lltc,ltc2497";
+1 -1
arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts
··· 141 141 }; 142 142 143 143 &gpio1 { 144 - gpio-line-names = "nINT_ETHPHY", "LED_RED", "WDOG_INT", "X_RTC_INT", 144 + gpio-line-names = "", "LED_RED", "WDOG_INT", "X_RTC_INT", 145 145 "", "", "", "RESET_ETHPHY", 146 146 "CAN_nINT", "CAN_EN", "nENABLE_FLATLINK", "", 147 147 "USB_OTG_VBUS_EN", "", "LED_GREEN", "LED_BLUE";
+2 -2
arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi
··· 111 111 }; 112 112 113 113 &gpio1 { 114 - gpio-line-names = "nINT_ETHPHY", "", "WDOG_INT", "X_RTC_INT", 114 + gpio-line-names = "", "", "WDOG_INT", "X_RTC_INT", 115 115 "", "", "", "RESET_ETHPHY", 116 116 "", "", "nENABLE_FLATLINK"; 117 117 }; ··· 210 210 }; 211 211 }; 212 212 213 - reg_vdd_gpu: buck3 { 213 + reg_vdd_vpu: buck3 { 214 214 regulator-always-on; 215 215 regulator-boot-on; 216 216 regulator-max-microvolt = <1000000>;
+4
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts
··· 567 567 status = "okay"; 568 568 }; 569 569 570 + &disp_blk_ctrl { 571 + status = "disabled"; 572 + }; 573 + 570 574 &pgc_mipi { 571 575 status = "disabled"; 572 576 };
+4
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts
··· 628 628 status = "okay"; 629 629 }; 630 630 631 + &disp_blk_ctrl { 632 + status = "disabled"; 633 + }; 634 + 631 635 &pgc_mipi { 632 636 status = "disabled"; 633 637 };
+1 -1
arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi
··· 358 358 MX8MN_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 359 359 MX8MN_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 360 360 MX8MN_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f 361 - MX8MN_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19 361 + MX8MN_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x159 362 362 >; 363 363 }; 364 364
+1 -1
arch/arm64/boot/dts/freescale/imx8mq.dtsi
··· 772 772 <&clk IMX8MQ_SYS1_PLL_800M>, 773 773 <&clk IMX8MQ_VPU_PLL>; 774 774 assigned-clock-rates = <600000000>, 775 - <600000000>, 775 + <300000000>, 776 776 <800000000>, 777 777 <0>; 778 778 };
+8 -8
arch/arm64/boot/dts/renesas/r9a07g044.dtsi
··· 223 223 <GIC_SPI 212 IRQ_TYPE_EDGE_RISING>, 224 224 <GIC_SPI 213 IRQ_TYPE_EDGE_RISING>; 225 225 interrupt-names = "tgia0", "tgib0", "tgic0", "tgid0", 226 - "tgiv0", "tgie0", "tgif0", 227 - "tgia1", "tgib1", "tgiv1", "tgiu1", 228 - "tgia2", "tgib2", "tgiv2", "tgiu2", 226 + "tciv0", "tgie0", "tgif0", 227 + "tgia1", "tgib1", "tciv1", "tciu1", 228 + "tgia2", "tgib2", "tciv2", "tciu2", 229 229 "tgia3", "tgib3", "tgic3", "tgid3", 230 - "tgiv3", 230 + "tciv3", 231 231 "tgia4", "tgib4", "tgic4", "tgid4", 232 - "tgiv4", 232 + "tciv4", 233 233 "tgiu5", "tgiv5", "tgiw5", 234 234 "tgia6", "tgib6", "tgic6", "tgid6", 235 - "tgiv6", 235 + "tciv6", 236 236 "tgia7", "tgib7", "tgic7", "tgid7", 237 - "tgiv7", 237 + "tciv7", 238 238 "tgia8", "tgib8", "tgic8", "tgid8", 239 - "tgiv8", "tgiu8"; 239 + "tciv8", "tciu8"; 240 240 clocks = <&cpg CPG_MOD R9A07G044_MTU_X_MCK_MTU3>; 241 241 power-domains = <&cpg>; 242 242 resets = <&cpg R9A07G044_MTU_X_PRESET_MTU3>;
+8 -8
arch/arm64/boot/dts/renesas/r9a07g054.dtsi
··· 223 223 <GIC_SPI 212 IRQ_TYPE_EDGE_RISING>, 224 224 <GIC_SPI 213 IRQ_TYPE_EDGE_RISING>; 225 225 interrupt-names = "tgia0", "tgib0", "tgic0", "tgid0", 226 - "tgiv0", "tgie0", "tgif0", 227 - "tgia1", "tgib1", "tgiv1", "tgiu1", 228 - "tgia2", "tgib2", "tgiv2", "tgiu2", 226 + "tciv0", "tgie0", "tgif0", 227 + "tgia1", "tgib1", "tciv1", "tciu1", 228 + "tgia2", "tgib2", "tciv2", "tciu2", 229 229 "tgia3", "tgib3", "tgic3", "tgid3", 230 - "tgiv3", 230 + "tciv3", 231 231 "tgia4", "tgib4", "tgic4", "tgid4", 232 - "tgiv4", 232 + "tciv4", 233 233 "tgiu5", "tgiv5", "tgiw5", 234 234 "tgia6", "tgib6", "tgic6", "tgid6", 235 - "tgiv6", 235 + "tciv6", 236 236 "tgia7", "tgib7", "tgic7", "tgid7", 237 - "tgiv7", 237 + "tciv7", 238 238 "tgia8", "tgib8", "tgic8", "tgid8", 239 - "tgiv8", "tgiu8"; 239 + "tciv8", "tciu8"; 240 240 clocks = <&cpg CPG_MOD R9A07G054_MTU_X_MCK_MTU3>; 241 241 power-domains = <&cpg>; 242 242 resets = <&cpg R9A07G054_MTU_X_PRESET_MTU3>;
+1 -1
arch/arm64/configs/defconfig
··· 1469 1469 CONFIG_FANOTIFY=y 1470 1470 CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y 1471 1471 CONFIG_QUOTA=y 1472 - CONFIG_AUTOFS4_FS=y 1472 + CONFIG_AUTOFS_FS=y 1473 1473 CONFIG_FUSE_FS=m 1474 1474 CONFIG_CUSE=m 1475 1475 CONFIG_OVERLAY_FS=m
+2 -3
arch/arm64/kernel/fpsimd.c
··· 917 917 if (task == current) 918 918 put_cpu_fpsimd_context(); 919 919 920 + task_set_vl(task, type, vl); 921 + 920 922 /* 921 923 * Free the changed states if they are not in use, SME will be 922 924 * reallocated to the correct size on next use and we just ··· 932 930 933 931 if (free_sme) 934 932 sme_free(task); 935 - 936 - task_set_vl(task, type, vl); 937 933 938 934 out: 939 935 update_tsk_thread_flag(task, vec_vl_inherit_flag(type), ··· 1666 1666 1667 1667 fpsimd_flush_thread_vl(ARM64_VEC_SME); 1668 1668 current->thread.svcr = 0; 1669 - sme_smstop(); 1670 1669 } 1671 1670 1672 1671 current->thread.fp_type = FP_STATE_FPSIMD;
+1 -1
arch/ia64/configs/bigsur_defconfig
··· 77 77 CONFIG_XFS_FS=y 78 78 CONFIG_XFS_QUOTA=y 79 79 CONFIG_XFS_POSIX_ACL=y 80 - CONFIG_AUTOFS4_FS=m 80 + CONFIG_AUTOFS_FS=m 81 81 CONFIG_ISO9660_FS=m 82 82 CONFIG_JOLIET=y 83 83 CONFIG_UDF_FS=m
+1 -1
arch/ia64/configs/generic_defconfig
··· 146 146 CONFIG_REISERFS_FS_POSIX_ACL=y 147 147 CONFIG_REISERFS_FS_SECURITY=y 148 148 CONFIG_XFS_FS=y 149 - CONFIG_AUTOFS4_FS=m 149 + CONFIG_AUTOFS_FS=m 150 150 CONFIG_ISO9660_FS=m 151 151 CONFIG_JOLIET=y 152 152 CONFIG_UDF_FS=m
+1 -1
arch/ia64/configs/gensparse_defconfig
··· 127 127 CONFIG_REISERFS_FS_POSIX_ACL=y 128 128 CONFIG_REISERFS_FS_SECURITY=y 129 129 CONFIG_XFS_FS=y 130 - CONFIG_AUTOFS4_FS=y 130 + CONFIG_AUTOFS_FS=y 131 131 CONFIG_ISO9660_FS=m 132 132 CONFIG_JOLIET=y 133 133 CONFIG_UDF_FS=m
+1 -1
arch/ia64/configs/tiger_defconfig
··· 110 110 CONFIG_REISERFS_FS_POSIX_ACL=y 111 111 CONFIG_REISERFS_FS_SECURITY=y 112 112 CONFIG_XFS_FS=y 113 - CONFIG_AUTOFS4_FS=y 113 + CONFIG_AUTOFS_FS=y 114 114 CONFIG_ISO9660_FS=m 115 115 CONFIG_JOLIET=y 116 116 CONFIG_UDF_FS=m
+1
arch/loongarch/Kconfig
··· 14 14 select ARCH_HAS_CPU_FINALIZE_INIT 15 15 select ARCH_HAS_FORTIFY_SOURCE 16 16 select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS 17 + select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE 17 18 select ARCH_HAS_PTE_SPECIAL 18 19 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 19 20 select ARCH_INLINE_READ_LOCK if !PREEMPTION
+3 -1
arch/loongarch/Makefile
··· 68 68 ifdef CONFIG_AS_HAS_EXPLICIT_RELOCS 69 69 cflags-y += $(call cc-option,-mexplicit-relocs) 70 70 KBUILD_CFLAGS_KERNEL += $(call cc-option,-mdirect-extern-access) 71 + KBUILD_AFLAGS_MODULE += $(call cc-option,-mno-relax) $(call cc-option,-Wa$(comma)-mno-relax) 72 + KBUILD_CFLAGS_MODULE += $(call cc-option,-mno-relax) $(call cc-option,-Wa$(comma)-mno-relax) 71 73 else 72 74 cflags-y += $(call cc-option,-mno-explicit-relocs) 73 75 KBUILD_AFLAGS_KERNEL += -Wa,-mla-global-with-pcrel ··· 113 111 114 112 KBUILD_LDFLAGS += -m $(ld-emul) 115 113 116 - ifdef CONFIG_LOONGARCH 114 + ifdef need-compiler 117 115 CHECKFLAGS += $(shell $(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) -dM -E -x c /dev/null | \ 118 116 grep -E -vw '__GNUC_(MINOR_|PATCHLEVEL_)?_' | \ 119 117 sed -e "s/^\#define /-D'/" -e "s/ /'='/" -e "s/$$/'/" -e 's/\$$/&&/g')
+1 -1
arch/loongarch/configs/loongson3_defconfig
··· 769 769 # CONFIG_PRINT_QUOTA_WARNING is not set 770 770 CONFIG_QFMT_V1=m 771 771 CONFIG_QFMT_V2=m 772 - CONFIG_AUTOFS4_FS=y 772 + CONFIG_AUTOFS_FS=y 773 773 CONFIG_FUSE_FS=m 774 774 CONFIG_OVERLAY_FS=y 775 775 CONFIG_OVERLAY_FS_INDEX=y
+4 -11
arch/loongarch/include/asm/fpu.h
··· 218 218 219 219 static inline void init_lsx_upper(void) 220 220 { 221 - /* 222 - * Check cpu_has_lsx only if it's a constant. This will allow the 223 - * compiler to optimise out code for CPUs without LSX without adding 224 - * an extra redundant check for CPUs with LSX. 225 - */ 226 - if (__builtin_constant_p(cpu_has_lsx) && !cpu_has_lsx) 227 - return; 228 - 229 - _init_lsx_upper(); 221 + if (cpu_has_lsx) 222 + _init_lsx_upper(); 230 223 } 231 224 232 225 static inline void restore_lsx_upper(struct task_struct *t) ··· 287 294 288 295 static inline int thread_lsx_context_live(void) 289 296 { 290 - if (__builtin_constant_p(cpu_has_lsx) && !cpu_has_lsx) 297 + if (!cpu_has_lsx) 291 298 return 0; 292 299 293 300 return test_thread_flag(TIF_LSX_CTX_LIVE); ··· 295 302 296 303 static inline int thread_lasx_context_live(void) 297 304 { 298 - if (__builtin_constant_p(cpu_has_lasx) && !cpu_has_lasx) 305 + if (!cpu_has_lasx) 299 306 return 0; 300 307 301 308 return test_thread_flag(TIF_LASX_CTX_LIVE);
+16
arch/loongarch/kernel/setup.c
··· 332 332 strlcat(boot_command_line, " ", COMMAND_LINE_SIZE); 333 333 334 334 strlcat(boot_command_line, init_command_line, COMMAND_LINE_SIZE); 335 + goto out; 335 336 } 336 337 #endif 338 + 339 + /* 340 + * Append built-in command line to the bootloader command line if 341 + * CONFIG_CMDLINE_EXTEND is enabled. 342 + */ 343 + if (IS_ENABLED(CONFIG_CMDLINE_EXTEND) && CONFIG_CMDLINE[0]) { 344 + strlcat(boot_command_line, " ", COMMAND_LINE_SIZE); 345 + strlcat(boot_command_line, CONFIG_CMDLINE, COMMAND_LINE_SIZE); 346 + } 347 + 348 + /* 349 + * Use built-in command line if the bootloader command line is empty. 350 + */ 351 + if (IS_ENABLED(CONFIG_CMDLINE_BOOTLOADER) && !boot_command_line[0]) 352 + strscpy(boot_command_line, CONFIG_CMDLINE, COMMAND_LINE_SIZE); 337 353 338 354 out: 339 355 *cmdline_p = boot_command_line;
+2 -1
arch/loongarch/lib/clear_user.S
··· 108 108 addi.d a3, a2, -8 109 109 bgeu a0, a3, .Llt8 110 110 15: st.d zero, a0, 0 111 + addi.d a0, a0, 8 111 112 112 113 .Llt8: 113 114 16: st.d zero, a2, -8 ··· 189 188 _asm_extable 13b, .L_fixup_handle_0 190 189 _asm_extable 14b, .L_fixup_handle_1 191 190 _asm_extable 15b, .L_fixup_handle_0 192 - _asm_extable 16b, .L_fixup_handle_1 191 + _asm_extable 16b, .L_fixup_handle_0 193 192 _asm_extable 17b, .L_fixup_handle_s0 194 193 _asm_extable 18b, .L_fixup_handle_s0 195 194 _asm_extable 19b, .L_fixup_handle_s0
+2 -1
arch/loongarch/lib/copy_user.S
··· 136 136 bgeu a1, a4, .Llt8 137 137 30: ld.d t0, a1, 0 138 138 31: st.d t0, a0, 0 139 + addi.d a0, a0, 8 139 140 140 141 .Llt8: 141 142 32: ld.d t0, a3, -8 ··· 247 246 _asm_extable 30b, .L_fixup_handle_0 248 247 _asm_extable 31b, .L_fixup_handle_0 249 248 _asm_extable 32b, .L_fixup_handle_0 250 - _asm_extable 33b, .L_fixup_handle_1 249 + _asm_extable 33b, .L_fixup_handle_0 251 250 _asm_extable 34b, .L_fixup_handle_s0 252 251 _asm_extable 35b, .L_fixup_handle_s0 253 252 _asm_extable 36b, .L_fixup_handle_s0
+1 -1
arch/loongarch/net/bpf_jit.h
··· 150 150 * no need to call lu32id to do a new filled operation. 151 151 */ 152 152 imm_51_31 = (imm >> 31) & 0x1fffff; 153 - if (imm_51_31 != 0 || imm_51_31 != 0x1fffff) { 153 + if (imm_51_31 != 0 && imm_51_31 != 0x1fffff) { 154 154 /* lu32id rd, imm_51_32 */ 155 155 imm_51_32 = (imm >> 32) & 0xfffff; 156 156 emit_insn(ctx, lu32id, rd, imm_51_32);
+1 -1
arch/mips/configs/bigsur_defconfig
··· 153 153 CONFIG_QUOTA_NETLINK_INTERFACE=y 154 154 # CONFIG_PRINT_QUOTA_WARNING is not set 155 155 CONFIG_QFMT_V2=m 156 - CONFIG_AUTOFS4_FS=m 156 + CONFIG_AUTOFS_FS=m 157 157 CONFIG_FUSE_FS=m 158 158 CONFIG_ISO9660_FS=m 159 159 CONFIG_JOLIET=y
+1 -1
arch/mips/configs/fuloong2e_defconfig
··· 178 178 CONFIG_EXT4_FS_POSIX_ACL=y 179 179 CONFIG_EXT4_FS_SECURITY=y 180 180 CONFIG_REISERFS_FS=m 181 - CONFIG_AUTOFS4_FS=y 181 + CONFIG_AUTOFS_FS=y 182 182 CONFIG_FUSE_FS=y 183 183 CONFIG_ISO9660_FS=m 184 184 CONFIG_JOLIET=y
+1 -1
arch/mips/configs/ip22_defconfig
··· 245 245 CONFIG_QUOTA_NETLINK_INTERFACE=y 246 246 # CONFIG_PRINT_QUOTA_WARNING is not set 247 247 CONFIG_QFMT_V2=m 248 - CONFIG_AUTOFS4_FS=m 248 + CONFIG_AUTOFS_FS=m 249 249 CONFIG_FUSE_FS=m 250 250 CONFIG_ISO9660_FS=m 251 251 CONFIG_JOLIET=y
+1 -1
arch/mips/configs/ip32_defconfig
··· 95 95 CONFIG_QUOTA=y 96 96 CONFIG_QFMT_V1=m 97 97 CONFIG_QFMT_V2=m 98 - CONFIG_AUTOFS4_FS=m 98 + CONFIG_AUTOFS_FS=m 99 99 CONFIG_FUSE_FS=m 100 100 CONFIG_ISO9660_FS=m 101 101 CONFIG_JOLIET=y
+1 -1
arch/mips/configs/jazz_defconfig
··· 76 76 CONFIG_REISERFS_FS_SECURITY=y 77 77 CONFIG_XFS_FS=m 78 78 CONFIG_XFS_QUOTA=y 79 - CONFIG_AUTOFS4_FS=m 79 + CONFIG_AUTOFS_FS=m 80 80 CONFIG_FUSE_FS=m 81 81 CONFIG_ISO9660_FS=m 82 82 CONFIG_JOLIET=y
+1 -1
arch/mips/configs/lemote2f_defconfig
··· 240 240 CONFIG_BTRFS_FS=m 241 241 CONFIG_QUOTA=y 242 242 CONFIG_QFMT_V2=m 243 - CONFIG_AUTOFS4_FS=m 243 + CONFIG_AUTOFS_FS=m 244 244 CONFIG_FSCACHE=m 245 245 CONFIG_CACHEFILES=m 246 246 CONFIG_ISO9660_FS=m
+1 -1
arch/mips/configs/loongson2k_defconfig
··· 296 296 CONFIG_XFS_POSIX_ACL=y 297 297 CONFIG_QUOTA=y 298 298 # CONFIG_PRINT_QUOTA_WARNING is not set 299 - CONFIG_AUTOFS4_FS=y 299 + CONFIG_AUTOFS_FS=y 300 300 CONFIG_FUSE_FS=m 301 301 CONFIG_ISO9660_FS=m 302 302 CONFIG_JOLIET=y
+1 -1
arch/mips/configs/loongson3_defconfig
··· 352 352 # CONFIG_PRINT_QUOTA_WARNING is not set 353 353 CONFIG_QFMT_V1=m 354 354 CONFIG_QFMT_V2=m 355 - CONFIG_AUTOFS4_FS=y 355 + CONFIG_AUTOFS_FS=y 356 356 CONFIG_FUSE_FS=m 357 357 CONFIG_VIRTIO_FS=m 358 358 CONFIG_FSCACHE=m
+1 -1
arch/mips/configs/mtx1_defconfig
··· 601 601 CONFIG_EXT3_FS_POSIX_ACL=y 602 602 CONFIG_EXT3_FS_SECURITY=y 603 603 CONFIG_QUOTA=y 604 - CONFIG_AUTOFS4_FS=y 604 + CONFIG_AUTOFS_FS=y 605 605 CONFIG_FUSE_FS=m 606 606 CONFIG_ISO9660_FS=m 607 607 CONFIG_JOLIET=y
+1 -1
arch/mips/configs/pic32mzda_defconfig
··· 66 66 CONFIG_EXT4_FS=y 67 67 CONFIG_EXT4_FS_POSIX_ACL=y 68 68 CONFIG_EXT4_FS_SECURITY=y 69 - CONFIG_AUTOFS4_FS=m 69 + CONFIG_AUTOFS_FS=m 70 70 CONFIG_FUSE_FS=m 71 71 CONFIG_FSCACHE=m 72 72 CONFIG_ISO9660_FS=m
+1 -1
arch/mips/configs/rm200_defconfig
··· 317 317 CONFIG_REISERFS_FS_SECURITY=y 318 318 CONFIG_XFS_FS=m 319 319 CONFIG_XFS_QUOTA=y 320 - CONFIG_AUTOFS4_FS=m 320 + CONFIG_AUTOFS_FS=m 321 321 CONFIG_FUSE_FS=m 322 322 CONFIG_ISO9660_FS=m 323 323 CONFIG_JOLIET=y
+1 -1
arch/parisc/configs/generic-32bit_defconfig
··· 237 237 CONFIG_QUOTA=y 238 238 CONFIG_QUOTA_NETLINK_INTERFACE=y 239 239 CONFIG_QFMT_V2=y 240 - CONFIG_AUTOFS4_FS=y 240 + CONFIG_AUTOFS_FS=y 241 241 CONFIG_ISO9660_FS=y 242 242 CONFIG_JOLIET=y 243 243 CONFIG_VFAT_FS=y
+1 -1
arch/parisc/configs/generic-64bit_defconfig
··· 259 259 CONFIG_QUOTA=y 260 260 CONFIG_QUOTA_NETLINK_INTERFACE=y 261 261 CONFIG_QFMT_V2=y 262 - CONFIG_AUTOFS4_FS=y 262 + CONFIG_AUTOFS_FS=y 263 263 CONFIG_FUSE_FS=y 264 264 CONFIG_CUSE=y 265 265 CONFIG_ISO9660_FS=y
+1 -1
arch/powerpc/configs/44x/sam440ep_defconfig
··· 79 79 CONFIG_EXT4_FS=y 80 80 CONFIG_EXT4_FS_POSIX_ACL=y 81 81 CONFIG_REISERFS_FS=y 82 - CONFIG_AUTOFS4_FS=y 82 + CONFIG_AUTOFS_FS=y 83 83 CONFIG_ISO9660_FS=y 84 84 CONFIG_JOLIET=y 85 85 CONFIG_ZISOFS=y
+1 -1
arch/powerpc/configs/85xx/stx_gp3_defconfig
··· 50 50 CONFIG_SOUND=m 51 51 CONFIG_EXT2_FS=y 52 52 CONFIG_EXT4_FS=y 53 - CONFIG_AUTOFS4_FS=y 53 + CONFIG_AUTOFS_FS=y 54 54 CONFIG_ISO9660_FS=m 55 55 CONFIG_UDF_FS=m 56 56 CONFIG_MSDOS_FS=m
+1 -1
arch/powerpc/configs/cell_defconfig
··· 172 172 CONFIG_UIO=m 173 173 CONFIG_EXT2_FS=y 174 174 CONFIG_EXT4_FS=y 175 - CONFIG_AUTOFS4_FS=m 175 + CONFIG_AUTOFS_FS=m 176 176 CONFIG_ISO9660_FS=m 177 177 CONFIG_JOLIET=y 178 178 CONFIG_UDF_FS=m
+1 -1
arch/powerpc/configs/ep8248e_defconfig
··· 47 47 # CONFIG_USB_SUPPORT is not set 48 48 CONFIG_EXT2_FS=y 49 49 CONFIG_EXT4_FS=y 50 - CONFIG_AUTOFS4_FS=y 50 + CONFIG_AUTOFS_FS=y 51 51 CONFIG_PROC_KCORE=y 52 52 CONFIG_TMPFS=y 53 53 CONFIG_CRAMFS=y
+1 -1
arch/powerpc/configs/mgcoge_defconfig
··· 60 60 CONFIG_USB_G_SERIAL=y 61 61 CONFIG_UIO=y 62 62 CONFIG_EXT2_FS=y 63 - CONFIG_AUTOFS4_FS=y 63 + CONFIG_AUTOFS_FS=y 64 64 CONFIG_PROC_KCORE=y 65 65 CONFIG_TMPFS=y 66 66 CONFIG_JFFS2_FS=y
+1 -1
arch/powerpc/configs/pasemi_defconfig
··· 143 143 CONFIG_EXT2_FS_XATTR=y 144 144 CONFIG_EXT2_FS_POSIX_ACL=y 145 145 CONFIG_EXT4_FS=y 146 - CONFIG_AUTOFS4_FS=y 146 + CONFIG_AUTOFS_FS=y 147 147 CONFIG_ISO9660_FS=y 148 148 CONFIG_UDF_FS=y 149 149 CONFIG_MSDOS_FS=y
+1 -1
arch/powerpc/configs/pmac32_defconfig
··· 254 254 CONFIG_EXT2_FS=y 255 255 CONFIG_EXT4_FS=y 256 256 CONFIG_EXT4_FS_POSIX_ACL=y 257 - CONFIG_AUTOFS4_FS=m 257 + CONFIG_AUTOFS_FS=m 258 258 CONFIG_FUSE_FS=m 259 259 CONFIG_ISO9660_FS=y 260 260 CONFIG_JOLIET=y
+1 -1
arch/powerpc/configs/powernv_defconfig
··· 270 270 CONFIG_BTRFS_FS_POSIX_ACL=y 271 271 CONFIG_NILFS2_FS=m 272 272 CONFIG_FANOTIFY=y 273 - CONFIG_AUTOFS4_FS=m 273 + CONFIG_AUTOFS_FS=m 274 274 CONFIG_FUSE_FS=m 275 275 CONFIG_OVERLAY_FS=m 276 276 CONFIG_ISO9660_FS=y
+1 -1
arch/powerpc/configs/ppc64_defconfig
··· 327 327 CONFIG_BTRFS_FS_POSIX_ACL=y 328 328 CONFIG_NILFS2_FS=m 329 329 CONFIG_FS_DAX=y 330 - CONFIG_AUTOFS4_FS=m 330 + CONFIG_AUTOFS_FS=m 331 331 CONFIG_FUSE_FS=m 332 332 CONFIG_OVERLAY_FS=m 333 333 CONFIG_ISO9660_FS=y
+1 -1
arch/powerpc/configs/ppc64e_defconfig
··· 185 185 CONFIG_XFS_FS=m 186 186 CONFIG_XFS_POSIX_ACL=y 187 187 CONFIG_FS_DAX=y 188 - CONFIG_AUTOFS4_FS=m 188 + CONFIG_AUTOFS_FS=m 189 189 CONFIG_ISO9660_FS=y 190 190 CONFIG_UDF_FS=m 191 191 CONFIG_MSDOS_FS=y
+1 -1
arch/powerpc/configs/ppc6xx_defconfig
··· 969 969 CONFIG_GFS2_FS=m 970 970 CONFIG_FS_DAX=y 971 971 CONFIG_QUOTA_NETLINK_INTERFACE=y 972 - CONFIG_AUTOFS4_FS=m 972 + CONFIG_AUTOFS_FS=m 973 973 CONFIG_FUSE_FS=m 974 974 CONFIG_ISO9660_FS=y 975 975 CONFIG_JOLIET=y
+1 -1
arch/powerpc/configs/ps3_defconfig
··· 129 129 CONFIG_EXT4_FS=y 130 130 CONFIG_QUOTA=y 131 131 CONFIG_QFMT_V2=y 132 - CONFIG_AUTOFS4_FS=m 132 + CONFIG_AUTOFS_FS=m 133 133 CONFIG_ISO9660_FS=m 134 134 CONFIG_JOLIET=y 135 135 CONFIG_UDF_FS=m
+1 -1
arch/powerpc/include/asm/word-at-a-time.h
··· 34 34 return leading_zero_bits >> 3; 35 35 } 36 36 37 - static inline bool has_zero(unsigned long val, unsigned long *data, const struct word_at_a_time *c) 37 + static inline unsigned long has_zero(unsigned long val, unsigned long *data, const struct word_at_a_time *c) 38 38 { 39 39 unsigned long rhs = val | c->low_bits; 40 40 *data = rhs;
+1 -1
arch/riscv/configs/defconfig
··· 192 192 CONFIG_EXT4_FS_SECURITY=y 193 193 CONFIG_BTRFS_FS=m 194 194 CONFIG_BTRFS_FS_POSIX_ACL=y 195 - CONFIG_AUTOFS4_FS=y 195 + CONFIG_AUTOFS_FS=y 196 196 CONFIG_OVERLAY_FS=m 197 197 CONFIG_ISO9660_FS=y 198 198 CONFIG_JOLIET=y
+1 -1
arch/riscv/configs/rv32_defconfig
··· 98 98 CONFIG_RPMSG_VIRTIO=y 99 99 CONFIG_EXT4_FS=y 100 100 CONFIG_EXT4_FS_POSIX_ACL=y 101 - CONFIG_AUTOFS4_FS=y 101 + CONFIG_AUTOFS_FS=y 102 102 CONFIG_MSDOS_FS=y 103 103 CONFIG_VFAT_FS=y 104 104 CONFIG_TMPFS=y
+7 -6
arch/s390/configs/debug_defconfig
··· 116 116 CONFIG_UNIX_DIAG=m 117 117 CONFIG_XFRM_USER=m 118 118 CONFIG_NET_KEY=m 119 - CONFIG_NET_TC_SKB_EXT=y 120 119 CONFIG_SMC=m 121 120 CONFIG_SMC_DIAG=m 122 121 CONFIG_INET=y ··· 192 193 CONFIG_NFT_COMPAT=m 193 194 CONFIG_NFT_HASH=m 194 195 CONFIG_NFT_FIB_INET=m 196 + CONFIG_NETFILTER_XTABLES_COMPAT=y 195 197 CONFIG_NETFILTER_XT_SET=m 196 198 CONFIG_NETFILTER_XT_TARGET_AUDIT=m 197 199 CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m ··· 379 379 CONFIG_NET_ACT_SKBEDIT=m 380 380 CONFIG_NET_ACT_CSUM=m 381 381 CONFIG_NET_ACT_GATE=m 382 + CONFIG_NET_TC_SKB_EXT=y 382 383 CONFIG_DNS_RESOLVER=y 383 384 CONFIG_OPENVSWITCH=m 384 385 CONFIG_VSOCKETS=m ··· 396 395 CONFIG_HOTPLUG_PCI_S390=y 397 396 CONFIG_DEVTMPFS=y 398 397 CONFIG_DEVTMPFS_SAFE=y 398 + # CONFIG_FW_LOADER is not set 399 399 CONFIG_CONNECTOR=y 400 400 CONFIG_ZRAM=y 401 401 CONFIG_BLK_DEV_LOOP=m ··· 504 502 # CONFIG_NET_VENDOR_GOOGLE is not set 505 503 # CONFIG_NET_VENDOR_HUAWEI is not set 506 504 # CONFIG_NET_VENDOR_INTEL is not set 507 - # CONFIG_NET_VENDOR_WANGXUN is not set 508 505 # CONFIG_NET_VENDOR_LITEX is not set 509 506 # CONFIG_NET_VENDOR_MARVELL is not set 510 507 CONFIG_MLX4_EN=m ··· 543 542 # CONFIG_NET_VENDOR_TI is not set 544 543 # CONFIG_NET_VENDOR_VERTEXCOM is not set 545 544 # CONFIG_NET_VENDOR_VIA is not set 545 + # CONFIG_NET_VENDOR_WANGXUN is not set 546 546 # CONFIG_NET_VENDOR_WIZNET is not set 547 547 # CONFIG_NET_VENDOR_XILINX is not set 548 548 CONFIG_PPP=m ··· 626 624 CONFIG_QUOTA_DEBUG=y 627 625 CONFIG_QFMT_V1=m 628 626 CONFIG_QFMT_V2=m 629 - CONFIG_AUTOFS4_FS=m 627 + CONFIG_AUTOFS_FS=m 630 628 CONFIG_FUSE_FS=y 631 629 CONFIG_CUSE=m 632 630 CONFIG_VIRTIO_FS=m ··· 648 646 CONFIG_TMPFS_POSIX_ACL=y 649 647 CONFIG_TMPFS_INODE64=y 650 648 CONFIG_HUGETLBFS=y 651 - CONFIG_CONFIGFS_FS=m 652 649 CONFIG_ECRYPT_FS=m 653 650 CONFIG_CRAMFS=m 654 651 CONFIG_SQUASHFS=m ··· 691 690 CONFIG_FORTIFY_SOURCE=y 692 691 CONFIG_SECURITY_SELINUX=y 693 692 CONFIG_SECURITY_SELINUX_BOOTPARAM=y 694 - CONFIG_SECURITY_SELINUX_DISABLE=y 695 693 CONFIG_SECURITY_LOCKDOWN_LSM=y 696 694 CONFIG_SECURITY_LOCKDOWN_LSM_EARLY=y 697 695 CONFIG_SECURITY_LANDLOCK=y ··· 744 744 CONFIG_CRYPTO_MD5=y 745 745 CONFIG_CRYPTO_MICHAEL_MIC=m 746 746 CONFIG_CRYPTO_RMD160=m 747 - CONFIG_CRYPTO_SHA3=m 748 747 CONFIG_CRYPTO_SM3_GENERIC=m 749 748 CONFIG_CRYPTO_VMAC=m 750 749 CONFIG_CRYPTO_WP512=m ··· 843 844 CONFIG_SCHED_TRACER=y 844 845 CONFIG_FTRACE_SYSCALLS=y 845 846 CONFIG_BLK_DEV_IO_TRACE=y 847 + CONFIG_USER_EVENTS=y 846 848 CONFIG_HIST_TRIGGERS=y 847 849 CONFIG_FTRACE_STARTUP_TEST=y 848 850 # CONFIG_EVENT_TRACE_STARTUP_TEST is not set ··· 866 866 CONFIG_FAIL_IO_TIMEOUT=y 867 867 CONFIG_FAIL_FUTEX=y 868 868 CONFIG_FAULT_INJECTION_DEBUG_FS=y 869 + CONFIG_FAULT_INJECTION_CONFIGFS=y 869 870 CONFIG_FAULT_INJECTION_STACKTRACE_FILTER=y 870 871 CONFIG_LKDTM=m 871 872 CONFIG_TEST_MIN_HEAP=y
+6 -5
arch/s390/configs/defconfig
··· 107 107 CONFIG_UNIX_DIAG=m 108 108 CONFIG_XFRM_USER=m 109 109 CONFIG_NET_KEY=m 110 - CONFIG_NET_TC_SKB_EXT=y 111 110 CONFIG_SMC=m 112 111 CONFIG_SMC_DIAG=m 113 112 CONFIG_INET=y ··· 183 184 CONFIG_NFT_COMPAT=m 184 185 CONFIG_NFT_HASH=m 185 186 CONFIG_NFT_FIB_INET=m 187 + CONFIG_NETFILTER_XTABLES_COMPAT=y 186 188 CONFIG_NETFILTER_XT_SET=m 187 189 CONFIG_NETFILTER_XT_TARGET_AUDIT=m 188 190 CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m ··· 369 369 CONFIG_NET_ACT_SKBEDIT=m 370 370 CONFIG_NET_ACT_CSUM=m 371 371 CONFIG_NET_ACT_GATE=m 372 + CONFIG_NET_TC_SKB_EXT=y 372 373 CONFIG_DNS_RESOLVER=y 373 374 CONFIG_OPENVSWITCH=m 374 375 CONFIG_VSOCKETS=m ··· 386 385 CONFIG_UEVENT_HELPER=y 387 386 CONFIG_DEVTMPFS=y 388 387 CONFIG_DEVTMPFS_SAFE=y 388 + # CONFIG_FW_LOADER is not set 389 389 CONFIG_CONNECTOR=y 390 390 CONFIG_ZRAM=y 391 391 CONFIG_BLK_DEV_LOOP=m ··· 494 492 # CONFIG_NET_VENDOR_GOOGLE is not set 495 493 # CONFIG_NET_VENDOR_HUAWEI is not set 496 494 # CONFIG_NET_VENDOR_INTEL is not set 497 - # CONFIG_NET_VENDOR_WANGXUN is not set 498 495 # CONFIG_NET_VENDOR_LITEX is not set 499 496 # CONFIG_NET_VENDOR_MARVELL is not set 500 497 CONFIG_MLX4_EN=m ··· 533 532 # CONFIG_NET_VENDOR_TI is not set 534 533 # CONFIG_NET_VENDOR_VERTEXCOM is not set 535 534 # CONFIG_NET_VENDOR_VIA is not set 535 + # CONFIG_NET_VENDOR_WANGXUN is not set 536 536 # CONFIG_NET_VENDOR_WIZNET is not set 537 537 # CONFIG_NET_VENDOR_XILINX is not set 538 538 CONFIG_PPP=m ··· 611 609 CONFIG_QUOTA_NETLINK_INTERFACE=y 612 610 CONFIG_QFMT_V1=m 613 611 CONFIG_QFMT_V2=m 614 - CONFIG_AUTOFS4_FS=m 612 + CONFIG_AUTOFS_FS=m 615 613 CONFIG_FUSE_FS=y 616 614 CONFIG_CUSE=m 617 615 CONFIG_VIRTIO_FS=m ··· 675 673 CONFIG_SECURITY_NETWORK=y 676 674 CONFIG_SECURITY_SELINUX=y 677 675 CONFIG_SECURITY_SELINUX_BOOTPARAM=y 678 - CONFIG_SECURITY_SELINUX_DISABLE=y 679 676 CONFIG_SECURITY_LOCKDOWN_LSM=y 680 677 CONFIG_SECURITY_LOCKDOWN_LSM_EARLY=y 681 678 CONFIG_SECURITY_LANDLOCK=y ··· 730 729 CONFIG_CRYPTO_MD5=y 731 730 CONFIG_CRYPTO_MICHAEL_MIC=m 732 731 CONFIG_CRYPTO_RMD160=m 733 - CONFIG_CRYPTO_SHA3=m 734 732 CONFIG_CRYPTO_SM3_GENERIC=m 735 733 CONFIG_CRYPTO_VMAC=m 736 734 CONFIG_CRYPTO_WP512=m ··· 793 793 CONFIG_SCHED_TRACER=y 794 794 CONFIG_FTRACE_SYSCALLS=y 795 795 CONFIG_BLK_DEV_IO_TRACE=y 796 + CONFIG_USER_EVENTS=y 796 797 CONFIG_HIST_TRIGGERS=y 797 798 CONFIG_SAMPLES=y 798 799 CONFIG_SAMPLE_TRACE_PRINTK=m
-1
arch/s390/configs/zfcpdump_defconfig
··· 53 53 # CONFIG_HVC_IUCV is not set 54 54 # CONFIG_HW_RANDOM_S390 is not set 55 55 # CONFIG_HMC_DRV is not set 56 - # CONFIG_S390_UV_UAPI is not set 57 56 # CONFIG_S390_TAPE is not set 58 57 # CONFIG_VMCP is not set 59 58 # CONFIG_MONWRITER is not set
+2
arch/s390/include/uapi/asm/ptrace.h
··· 8 8 #ifndef _UAPI_S390_PTRACE_H 9 9 #define _UAPI_S390_PTRACE_H 10 10 11 + #include <linux/const.h> 12 + 11 13 /* 12 14 * Offsets in the user_regs_struct. They are used for the ptrace 13 15 * system call and in entry.S
+3 -3
arch/s390/kernel/sthyi.c
··· 459 459 * 460 460 * Fills the destination with system information returned by the STHYI 461 461 * instruction. The data is generated by emulation or execution of STHYI, 462 - * if available. The return value is the condition code that would be 463 - * returned, the rc parameter is the return code which is passed in 464 - * register R2 + 1. 462 + * if available. The return value is either a negative error value or 463 + * the condition code that would be returned, the rc parameter is the 464 + * return code which is passed in register R2 + 1. 465 465 */ 466 466 int sthyi_fill(void *dst, u64 *rc) 467 467 {
+6 -3
arch/s390/kvm/intercept.c
··· 389 389 */ 390 390 int handle_sthyi(struct kvm_vcpu *vcpu) 391 391 { 392 - int reg1, reg2, r = 0; 393 - u64 code, addr, cc = 0, rc = 0; 392 + int reg1, reg2, cc = 0, r = 0; 393 + u64 code, addr, rc = 0; 394 394 struct sthyi_sctns *sctns = NULL; 395 395 396 396 if (!test_kvm_facility(vcpu->kvm, 74)) ··· 421 421 return -ENOMEM; 422 422 423 423 cc = sthyi_fill(sctns, &rc); 424 - 424 + if (cc < 0) { 425 + free_page((unsigned long)sctns); 426 + return cc; 427 + } 425 428 out: 426 429 if (!cc) { 427 430 if (kvm_s390_pv_cpu_is_protected(vcpu)) {
+2
arch/s390/mm/vmem.c
··· 763 763 if (static_key_enabled(&cpu_has_bear)) 764 764 set_memory_nx(0, 1); 765 765 set_memory_nx(PAGE_SIZE, 1); 766 + if (debug_pagealloc_enabled()) 767 + set_memory_4k(0, ident_map_size >> PAGE_SHIFT); 766 768 767 769 pr_info("Write protected kernel read-only data: %luk\n", 768 770 (unsigned long)(__end_rodata - _stext) >> 10);
+1 -1
arch/sh/configs/espt_defconfig
··· 61 61 CONFIG_EXT2_FS=y 62 62 CONFIG_EXT3_FS=y 63 63 # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set 64 - CONFIG_AUTOFS4_FS=y 64 + CONFIG_AUTOFS_FS=y 65 65 CONFIG_PROC_KCORE=y 66 66 CONFIG_TMPFS=y 67 67 CONFIG_TMPFS_POSIX_ACL=y
+1 -1
arch/sh/configs/sdk7780_defconfig
··· 105 105 CONFIG_EXT3_FS=y 106 106 # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set 107 107 CONFIG_EXT3_FS_POSIX_ACL=y 108 - CONFIG_AUTOFS4_FS=y 108 + CONFIG_AUTOFS_FS=y 109 109 CONFIG_ISO9660_FS=y 110 110 CONFIG_MSDOS_FS=y 111 111 CONFIG_VFAT_FS=y
+1 -1
arch/sh/configs/sdk7786_defconfig
··· 168 168 CONFIG_EXT4_FS=y 169 169 CONFIG_XFS_FS=y 170 170 CONFIG_BTRFS_FS=y 171 - CONFIG_AUTOFS4_FS=m 171 + CONFIG_AUTOFS_FS=m 172 172 CONFIG_FUSE_FS=y 173 173 CONFIG_CUSE=m 174 174 CONFIG_FSCACHE=m
+1 -1
arch/sh/configs/sh03_defconfig
··· 60 60 CONFIG_EXT3_FS=y 61 61 # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set 62 62 CONFIG_EXT3_FS_POSIX_ACL=y 63 - CONFIG_AUTOFS4_FS=y 63 + CONFIG_AUTOFS_FS=y 64 64 CONFIG_ISO9660_FS=m 65 65 CONFIG_JOLIET=y 66 66 CONFIG_ZISOFS=y
+1 -1
arch/sh/configs/sh7763rdp_defconfig
··· 63 63 CONFIG_EXT2_FS=y 64 64 CONFIG_EXT3_FS=y 65 65 # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set 66 - CONFIG_AUTOFS4_FS=y 66 + CONFIG_AUTOFS_FS=y 67 67 CONFIG_MSDOS_FS=y 68 68 CONFIG_VFAT_FS=y 69 69 CONFIG_PROC_KCORE=y
+1 -1
arch/sparc/configs/sparc32_defconfig
··· 65 65 CONFIG_EXT2_FS_XATTR=y 66 66 CONFIG_EXT2_FS_POSIX_ACL=y 67 67 CONFIG_EXT2_FS_SECURITY=y 68 - CONFIG_AUTOFS4_FS=m 68 + CONFIG_AUTOFS_FS=m 69 69 CONFIG_ISO9660_FS=m 70 70 CONFIG_PROC_KCORE=y 71 71 CONFIG_ROMFS_FS=m
+1 -1
arch/um/configs/i386_defconfig
··· 62 62 CONFIG_EXT4_FS=y 63 63 CONFIG_REISERFS_FS=y 64 64 CONFIG_QUOTA=y 65 - CONFIG_AUTOFS4_FS=m 65 + CONFIG_AUTOFS_FS=m 66 66 CONFIG_ISO9660_FS=m 67 67 CONFIG_JOLIET=y 68 68 CONFIG_PROC_KCORE=y
+1 -1
arch/um/configs/x86_64_defconfig
··· 60 60 CONFIG_EXT4_FS=y 61 61 CONFIG_REISERFS_FS=y 62 62 CONFIG_QUOTA=y 63 - CONFIG_AUTOFS4_FS=m 63 + CONFIG_AUTOFS_FS=m 64 64 CONFIG_ISO9660_FS=m 65 65 CONFIG_JOLIET=y 66 66 CONFIG_PROC_KCORE=y
+4 -3
arch/um/os-Linux/sigio.c
··· 3 3 * Copyright (C) 2002 - 2008 Jeff Dike (jdike@{addtoit,linux.intel}.com) 4 4 */ 5 5 6 - #include <linux/minmax.h> 7 6 #include <unistd.h> 8 7 #include <errno.h> 9 8 #include <fcntl.h> ··· 50 51 51 52 static int write_sigio_thread(void *unused) 52 53 { 53 - struct pollfds *fds; 54 + struct pollfds *fds, tmp; 54 55 struct pollfd *p; 55 56 int i, n, respond_fd; 56 57 char c; ··· 77 78 "write_sigio_thread : " 78 79 "read on socket failed, " 79 80 "err = %d\n", errno); 80 - swap(current_poll, next_poll); 81 + tmp = current_poll; 82 + current_poll = next_poll; 83 + next_poll = tmp; 81 84 respond_fd = sigio_private[1]; 82 85 } 83 86 else {
+1 -1
arch/x86/configs/i386_defconfig
··· 245 245 CONFIG_QUOTA_NETLINK_INTERFACE=y 246 246 # CONFIG_PRINT_QUOTA_WARNING is not set 247 247 CONFIG_QFMT_V2=y 248 - CONFIG_AUTOFS4_FS=y 248 + CONFIG_AUTOFS_FS=y 249 249 CONFIG_ISO9660_FS=y 250 250 CONFIG_JOLIET=y 251 251 CONFIG_ZISOFS=y
+1 -1
arch/x86/configs/x86_64_defconfig
··· 242 242 CONFIG_QUOTA_NETLINK_INTERFACE=y 243 243 # CONFIG_PRINT_QUOTA_WARNING is not set 244 244 CONFIG_QFMT_V2=y 245 - CONFIG_AUTOFS4_FS=y 245 + CONFIG_AUTOFS_FS=y 246 246 CONFIG_ISO9660_FS=y 247 247 CONFIG_JOLIET=y 248 248 CONFIG_ZISOFS=y
+15 -1
arch/x86/entry/entry_64.S
··· 285 285 */ 286 286 .pushsection .text, "ax" 287 287 SYM_CODE_START(ret_from_fork_asm) 288 - UNWIND_HINT_REGS 288 + /* 289 + * This is the start of the kernel stack; even through there's a 290 + * register set at the top, the regset isn't necessarily coherent 291 + * (consider kthreads) and one cannot unwind further. 292 + * 293 + * This ensures stack unwinds of kernel threads terminate in a known 294 + * good state. 295 + */ 296 + UNWIND_HINT_END_OF_STACK 289 297 ANNOTATE_NOENDBR // copy_thread 290 298 CALL_DEPTH_ACCOUNT 291 299 ··· 303 295 movq %r12, %rcx /* fn_arg */ 304 296 call ret_from_fork 305 297 298 + /* 299 + * Set the stack state to what is expected for the target function 300 + * -- at this point the register set should be a valid user set 301 + * and unwind should work normally. 302 + */ 303 + UNWIND_HINT_REGS 306 304 jmp swapgs_restore_regs_and_return_to_usermode 307 305 SYM_CODE_END(ret_from_fork_asm) 308 306 .popsection
+1
arch/x86/include/asm/kvm-x86-ops.h
··· 37 37 KVM_X86_OP(get_cpl) 38 38 KVM_X86_OP(set_segment) 39 39 KVM_X86_OP(get_cs_db_l_bits) 40 + KVM_X86_OP(is_valid_cr0) 40 41 KVM_X86_OP(set_cr0) 41 42 KVM_X86_OP_OPTIONAL(post_set_cr3) 42 43 KVM_X86_OP(is_valid_cr4)
+2 -1
arch/x86/include/asm/kvm_host.h
··· 1566 1566 void (*set_segment)(struct kvm_vcpu *vcpu, 1567 1567 struct kvm_segment *var, int seg); 1568 1568 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 1569 + bool (*is_valid_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 1569 1570 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 1570 1571 void (*post_set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 1571 - bool (*is_valid_cr4)(struct kvm_vcpu *vcpu, unsigned long cr0); 1572 + bool (*is_valid_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 1572 1573 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 1573 1574 int (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 1574 1575 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
+9 -6
arch/x86/kernel/cpu/bugs.c
··· 1150 1150 } 1151 1151 1152 1152 /* 1153 - * If no STIBP, enhanced IBRS is enabled, or SMT impossible, STIBP 1153 + * If no STIBP, Intel enhanced IBRS is enabled, or SMT impossible, STIBP 1154 1154 * is not required. 1155 1155 * 1156 - * Enhanced IBRS also protects against cross-thread branch target 1156 + * Intel's Enhanced IBRS also protects against cross-thread branch target 1157 1157 * injection in user-mode as the IBRS bit remains always set which 1158 1158 * implicitly enables cross-thread protections. However, in legacy IBRS 1159 1159 * mode, the IBRS bit is set only on kernel entry and cleared on return 1160 - * to userspace. This disables the implicit cross-thread protection, 1161 - * so allow for STIBP to be selected in that case. 1160 + * to userspace. AMD Automatic IBRS also does not protect userspace. 1161 + * These modes therefore disable the implicit cross-thread protection, 1162 + * so allow for STIBP to be selected in those cases. 1162 1163 */ 1163 1164 if (!boot_cpu_has(X86_FEATURE_STIBP) || 1164 1165 !smt_possible || 1165 - spectre_v2_in_eibrs_mode(spectre_v2_enabled)) 1166 + (spectre_v2_in_eibrs_mode(spectre_v2_enabled) && 1167 + !boot_cpu_has(X86_FEATURE_AUTOIBRS))) 1166 1168 return; 1167 1169 1168 1170 /* ··· 2296 2294 2297 2295 static char *stibp_state(void) 2298 2296 { 2299 - if (spectre_v2_in_eibrs_mode(spectre_v2_enabled)) 2297 + if (spectre_v2_in_eibrs_mode(spectre_v2_enabled) && 2298 + !boot_cpu_has(X86_FEATURE_AUTOIBRS)) 2300 2299 return ""; 2301 2300 2302 2301 switch (spectre_v2_user_stibp) {
+2 -2
arch/x86/kernel/cpu/mce/amd.c
··· 1261 1261 struct threshold_block *pos = NULL; 1262 1262 struct threshold_block *tmp = NULL; 1263 1263 1264 - kobject_del(b->kobj); 1264 + kobject_put(b->kobj); 1265 1265 1266 1266 list_for_each_entry_safe(pos, tmp, &b->blocks->miscj, miscj) 1267 - kobject_del(&pos->kobj); 1267 + kobject_put(b->kobj); 1268 1268 } 1269 1269 1270 1270 static void threshold_remove_bank(struct threshold_bank *bank)
+17 -8
arch/x86/kvm/lapic.c
··· 637 637 *max_irr = -1; 638 638 639 639 for (i = vec = 0; i <= 7; i++, vec += 32) { 640 + u32 *p_irr = (u32 *)(regs + APIC_IRR + i * 0x10); 641 + 642 + irr_val = *p_irr; 640 643 pir_val = READ_ONCE(pir[i]); 641 - irr_val = *((u32 *)(regs + APIC_IRR + i * 0x10)); 644 + 642 645 if (pir_val) { 646 + pir_val = xchg(&pir[i], 0); 647 + 643 648 prev_irr_val = irr_val; 644 - irr_val |= xchg(&pir[i], 0); 645 - *((u32 *)(regs + APIC_IRR + i * 0x10)) = irr_val; 646 - if (prev_irr_val != irr_val) { 647 - max_updated_irr = 648 - __fls(irr_val ^ prev_irr_val) + vec; 649 - } 649 + do { 650 + irr_val = prev_irr_val | pir_val; 651 + } while (prev_irr_val != irr_val && 652 + !try_cmpxchg(p_irr, &prev_irr_val, irr_val)); 653 + 654 + if (prev_irr_val != irr_val) 655 + max_updated_irr = __fls(irr_val ^ prev_irr_val) + vec; 650 656 } 651 657 if (irr_val) 652 658 *max_irr = __fls(irr_val) + vec; ··· 666 660 bool kvm_apic_update_irr(struct kvm_vcpu *vcpu, u32 *pir, int *max_irr) 667 661 { 668 662 struct kvm_lapic *apic = vcpu->arch.apic; 663 + bool irr_updated = __kvm_apic_update_irr(pir, apic->regs, max_irr); 669 664 670 - return __kvm_apic_update_irr(pir, apic->regs, max_irr); 665 + if (unlikely(!apic->apicv_active && irr_updated)) 666 + apic->irr_pending = true; 667 + return irr_updated; 671 668 } 672 669 EXPORT_SYMBOL_GPL(kvm_apic_update_irr); 673 670
+8 -8
arch/x86/kvm/svm/svm.c
··· 1786 1786 } 1787 1787 } 1788 1788 1789 + static bool svm_is_valid_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) 1790 + { 1791 + return true; 1792 + } 1793 + 1789 1794 void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) 1790 1795 { 1791 1796 struct vcpu_svm *svm = to_svm(vcpu); ··· 3991 3986 3992 3987 static fastpath_t svm_exit_handlers_fastpath(struct kvm_vcpu *vcpu) 3993 3988 { 3994 - struct vmcb_control_area *control = &to_svm(vcpu)->vmcb->control; 3995 - 3996 - /* 3997 - * Note, the next RIP must be provided as SRCU isn't held, i.e. KVM 3998 - * can't read guest memory (dereference memslots) to decode the WRMSR. 3999 - */ 4000 - if (control->exit_code == SVM_EXIT_MSR && control->exit_info_1 && 4001 - nrips && control->next_rip) 3989 + if (to_svm(vcpu)->vmcb->control.exit_code == SVM_EXIT_MSR && 3990 + to_svm(vcpu)->vmcb->control.exit_info_1) 4002 3991 return handle_fastpath_set_msr_irqoff(vcpu); 4003 3992 4004 3993 return EXIT_FASTPATH_NONE; ··· 4814 4815 .set_segment = svm_set_segment, 4815 4816 .get_cpl = svm_get_cpl, 4816 4817 .get_cs_db_l_bits = svm_get_cs_db_l_bits, 4818 + .is_valid_cr0 = svm_is_valid_cr0, 4817 4819 .set_cr0 = svm_set_cr0, 4818 4820 .post_set_cr3 = sev_post_set_cr3, 4819 4821 .is_valid_cr4 = svm_is_valid_cr4,
+4 -4
arch/x86/kvm/vmx/vmenter.S
··· 303 303 VMX_DO_EVENT_IRQOFF call asm_exc_nmi_kvm_vmx 304 304 SYM_FUNC_END(vmx_do_nmi_irqoff) 305 305 306 - 307 - .section .text, "ax" 308 - 309 306 #ifndef CONFIG_CC_HAS_ASM_GOTO_OUTPUT 307 + 310 308 /** 311 309 * vmread_error_trampoline - Trampoline from inline asm to vmread_error() 312 310 * @field: VMCS field encoding that failed ··· 333 335 mov 3*WORD_SIZE(%_ASM_BP), %_ASM_ARG2 334 336 mov 2*WORD_SIZE(%_ASM_BP), %_ASM_ARG1 335 337 336 - call vmread_error 338 + call vmread_error_trampoline2 337 339 338 340 /* Zero out @fault, which will be popped into the result register. */ 339 341 _ASM_MOV $0, 3*WORD_SIZE(%_ASM_BP) ··· 354 356 RET 355 357 SYM_FUNC_END(vmread_error_trampoline) 356 358 #endif 359 + 360 + .section .text, "ax" 357 361 358 362 SYM_FUNC_START(vmx_do_interrupt_irqoff) 359 363 VMX_DO_EVENT_IRQOFF CALL_NOSPEC _ASM_ARG1
+47 -17
arch/x86/kvm/vmx/vmx.c
··· 441 441 pr_warn_ratelimited(fmt); \ 442 442 } while (0) 443 443 444 - void vmread_error(unsigned long field, bool fault) 444 + noinline void vmread_error(unsigned long field) 445 445 { 446 - if (fault) 447 - kvm_spurious_fault(); 448 - else 449 - vmx_insn_failed("vmread failed: field=%lx\n", field); 446 + vmx_insn_failed("vmread failed: field=%lx\n", field); 450 447 } 448 + 449 + #ifndef CONFIG_CC_HAS_ASM_GOTO_OUTPUT 450 + noinstr void vmread_error_trampoline2(unsigned long field, bool fault) 451 + { 452 + if (fault) { 453 + kvm_spurious_fault(); 454 + } else { 455 + instrumentation_begin(); 456 + vmread_error(field); 457 + instrumentation_end(); 458 + } 459 + } 460 + #endif 451 461 452 462 noinline void vmwrite_error(unsigned long field, unsigned long value) 453 463 { ··· 1513 1503 struct vcpu_vmx *vmx = to_vmx(vcpu); 1514 1504 unsigned long old_rflags; 1515 1505 1506 + /* 1507 + * Unlike CR0 and CR4, RFLAGS handling requires checking if the vCPU 1508 + * is an unrestricted guest in order to mark L2 as needing emulation 1509 + * if L1 runs L2 as a restricted guest. 1510 + */ 1516 1511 if (is_unrestricted_guest(vcpu)) { 1517 1512 kvm_register_mark_available(vcpu, VCPU_EXREG_RFLAGS); 1518 1513 vmx->rflags = rflags; ··· 3052 3037 struct vcpu_vmx *vmx = to_vmx(vcpu); 3053 3038 struct kvm_vmx *kvm_vmx = to_kvm_vmx(vcpu->kvm); 3054 3039 3040 + /* 3041 + * KVM should never use VM86 to virtualize Real Mode when L2 is active, 3042 + * as using VM86 is unnecessary if unrestricted guest is enabled, and 3043 + * if unrestricted guest is disabled, VM-Enter (from L1) with CR0.PG=0 3044 + * should VM-Fail and KVM should reject userspace attempts to stuff 3045 + * CR0.PG=0 when L2 is active. 3046 + */ 3047 + WARN_ON_ONCE(is_guest_mode(vcpu)); 3048 + 3055 3049 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_TR], VCPU_SREG_TR); 3056 3050 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_ES], VCPU_SREG_ES); 3057 3051 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_DS], VCPU_SREG_DS); ··· 3250 3226 #define CR3_EXITING_BITS (CPU_BASED_CR3_LOAD_EXITING | \ 3251 3227 CPU_BASED_CR3_STORE_EXITING) 3252 3228 3229 + static bool vmx_is_valid_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) 3230 + { 3231 + if (is_guest_mode(vcpu)) 3232 + return nested_guest_cr0_valid(vcpu, cr0); 3233 + 3234 + if (to_vmx(vcpu)->nested.vmxon) 3235 + return nested_host_cr0_valid(vcpu, cr0); 3236 + 3237 + return true; 3238 + } 3239 + 3253 3240 void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) 3254 3241 { 3255 3242 struct vcpu_vmx *vmx = to_vmx(vcpu); ··· 3270 3235 old_cr0_pg = kvm_read_cr0_bits(vcpu, X86_CR0_PG); 3271 3236 3272 3237 hw_cr0 = (cr0 & ~KVM_VM_CR0_ALWAYS_OFF); 3273 - if (is_unrestricted_guest(vcpu)) 3238 + if (enable_unrestricted_guest) 3274 3239 hw_cr0 |= KVM_VM_CR0_ALWAYS_ON_UNRESTRICTED_GUEST; 3275 3240 else { 3276 3241 hw_cr0 |= KVM_VM_CR0_ALWAYS_ON; ··· 3298 3263 } 3299 3264 #endif 3300 3265 3301 - if (enable_ept && !is_unrestricted_guest(vcpu)) { 3266 + if (enable_ept && !enable_unrestricted_guest) { 3302 3267 /* 3303 3268 * Ensure KVM has an up-to-date snapshot of the guest's CR3. If 3304 3269 * the below code _enables_ CR3 exiting, vmx_cache_reg() will ··· 3429 3394 * this bit, even if host CR4.MCE == 0. 3430 3395 */ 3431 3396 hw_cr4 = (cr4_read_shadow() & X86_CR4_MCE) | (cr4 & ~X86_CR4_MCE); 3432 - if (is_unrestricted_guest(vcpu)) 3397 + if (enable_unrestricted_guest) 3433 3398 hw_cr4 |= KVM_VM_CR4_ALWAYS_ON_UNRESTRICTED_GUEST; 3434 3399 else if (vmx->rmode.vm86_active) 3435 3400 hw_cr4 |= KVM_RMODE_VM_CR4_ALWAYS_ON; ··· 3449 3414 vcpu->arch.cr4 = cr4; 3450 3415 kvm_register_mark_available(vcpu, VCPU_EXREG_CR4); 3451 3416 3452 - if (!is_unrestricted_guest(vcpu)) { 3417 + if (!enable_unrestricted_guest) { 3453 3418 if (enable_ept) { 3454 3419 if (!is_paging(vcpu)) { 3455 3420 hw_cr4 &= ~X86_CR4_PAE; ··· 4686 4651 if (kvm_vmx->pid_table) 4687 4652 return 0; 4688 4653 4689 - pages = alloc_pages(GFP_KERNEL | __GFP_ZERO, vmx_get_pid_table_order(kvm)); 4654 + pages = alloc_pages(GFP_KERNEL_ACCOUNT | __GFP_ZERO, 4655 + vmx_get_pid_table_order(kvm)); 4690 4656 if (!pages) 4691 4657 return -ENOMEM; 4692 4658 ··· 5400 5364 val = (val & ~vmcs12->cr0_guest_host_mask) | 5401 5365 (vmcs12->guest_cr0 & vmcs12->cr0_guest_host_mask); 5402 5366 5403 - if (!nested_guest_cr0_valid(vcpu, val)) 5404 - return 1; 5405 - 5406 5367 if (kvm_set_cr0(vcpu, val)) 5407 5368 return 1; 5408 5369 vmcs_writel(CR0_READ_SHADOW, orig_val); 5409 5370 return 0; 5410 5371 } else { 5411 - if (to_vmx(vcpu)->nested.vmxon && 5412 - !nested_host_cr0_valid(vcpu, val)) 5413 - return 1; 5414 - 5415 5372 return kvm_set_cr0(vcpu, val); 5416 5373 } 5417 5374 } ··· 8232 8203 .set_segment = vmx_set_segment, 8233 8204 .get_cpl = vmx_get_cpl, 8234 8205 .get_cs_db_l_bits = vmx_get_cs_db_l_bits, 8206 + .is_valid_cr0 = vmx_is_valid_cr0, 8235 8207 .set_cr0 = vmx_set_cr0, 8236 8208 .is_valid_cr4 = vmx_is_valid_cr4, 8237 8209 .set_cr4 = vmx_set_cr4,
+9 -3
arch/x86/kvm/vmx/vmx_ops.h
··· 10 10 #include "vmcs.h" 11 11 #include "../x86.h" 12 12 13 - void vmread_error(unsigned long field, bool fault); 13 + void vmread_error(unsigned long field); 14 14 void vmwrite_error(unsigned long field, unsigned long value); 15 15 void vmclear_error(struct vmcs *vmcs, u64 phys_addr); 16 16 void vmptrld_error(struct vmcs *vmcs, u64 phys_addr); ··· 31 31 * void vmread_error_trampoline(unsigned long field, bool fault); 32 32 */ 33 33 extern unsigned long vmread_error_trampoline; 34 + 35 + /* 36 + * The second VMREAD error trampoline, called from the assembly trampoline, 37 + * exists primarily to enable instrumentation for the VM-Fail path. 38 + */ 39 + void vmread_error_trampoline2(unsigned long field, bool fault); 40 + 34 41 #endif 35 42 36 43 static __always_inline void vmcs_check16(unsigned long field) ··· 108 101 109 102 do_fail: 110 103 instrumentation_begin(); 111 - WARN_ONCE(1, KBUILD_MODNAME ": vmread failed: field=%lx\n", field); 112 - pr_warn_ratelimited(KBUILD_MODNAME ": vmread failed: field=%lx\n", field); 104 + vmread_error(field); 113 105 instrumentation_end(); 114 106 return 0; 115 107
+34 -16
arch/x86/kvm/x86.c
··· 906 906 } 907 907 EXPORT_SYMBOL_GPL(load_pdptrs); 908 908 909 + static bool kvm_is_valid_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) 910 + { 911 + #ifdef CONFIG_X86_64 912 + if (cr0 & 0xffffffff00000000UL) 913 + return false; 914 + #endif 915 + 916 + if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) 917 + return false; 918 + 919 + if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) 920 + return false; 921 + 922 + return static_call(kvm_x86_is_valid_cr0)(vcpu, cr0); 923 + } 924 + 909 925 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0) 910 926 { 911 927 /* ··· 968 952 { 969 953 unsigned long old_cr0 = kvm_read_cr0(vcpu); 970 954 955 + if (!kvm_is_valid_cr0(vcpu, cr0)) 956 + return 1; 957 + 971 958 cr0 |= X86_CR0_ET; 972 959 973 - #ifdef CONFIG_X86_64 974 - if (cr0 & 0xffffffff00000000UL) 975 - return 1; 976 - #endif 977 - 960 + /* Write to CR0 reserved bits are ignored, even on Intel. */ 978 961 cr0 &= ~CR0_RESERVED_BITS; 979 - 980 - if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) 981 - return 1; 982 - 983 - if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) 984 - return 1; 985 962 986 963 #ifdef CONFIG_X86_64 987 964 if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) && ··· 2181 2172 u64 data; 2182 2173 fastpath_t ret = EXIT_FASTPATH_NONE; 2183 2174 2175 + kvm_vcpu_srcu_read_lock(vcpu); 2176 + 2184 2177 switch (msr) { 2185 2178 case APIC_BASE_MSR + (APIC_ICR >> 4): 2186 2179 data = kvm_read_edx_eax(vcpu); ··· 2204 2193 2205 2194 if (ret != EXIT_FASTPATH_NONE) 2206 2195 trace_kvm_msr_write(msr, data); 2196 + 2197 + kvm_vcpu_srcu_read_unlock(vcpu); 2207 2198 2208 2199 return ret; 2209 2200 } ··· 10216 10203 if (r < 0) 10217 10204 goto out; 10218 10205 if (r) { 10219 - kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false); 10220 - static_call(kvm_x86_inject_irq)(vcpu, false); 10221 - WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0); 10206 + int irq = kvm_cpu_get_interrupt(vcpu); 10207 + 10208 + if (!WARN_ON_ONCE(irq == -1)) { 10209 + kvm_queue_interrupt(vcpu, irq, false); 10210 + static_call(kvm_x86_inject_irq)(vcpu, false); 10211 + WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0); 10212 + } 10222 10213 } 10223 10214 if (kvm_cpu_has_injectable_intr(vcpu)) 10224 10215 static_call(kvm_x86_enable_irq_window)(vcpu); ··· 11477 11460 return false; 11478 11461 } 11479 11462 11480 - return kvm_is_valid_cr4(vcpu, sregs->cr4); 11463 + return kvm_is_valid_cr4(vcpu, sregs->cr4) && 11464 + kvm_is_valid_cr0(vcpu, sregs->cr0); 11481 11465 } 11482 11466 11483 11467 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs, ··· 13203 13185 13204 13186 bool kvm_arch_has_irq_bypass(void) 13205 13187 { 13206 - return true; 13188 + return enable_apicv && irq_remapping_cap(IRQ_POSTING_CAP); 13207 13189 } 13208 13190 13209 13191 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
-3
drivers/acpi/arm64/iort.c
··· 1007 1007 for (i = 0; i < node->mapping_count; i++, map++) { 1008 1008 struct acpi_iort_node *parent; 1009 1009 1010 - if (!map->id_count) 1011 - continue; 1012 - 1013 1010 parent = ACPI_ADD_PTR(struct acpi_iort_node, iort_table, 1014 1011 map->output_reference); 1015 1012 if (parent != iommu)
+2 -2
drivers/ata/libata-core.c
··· 4938 4938 if (qc->result_tf.status & ATA_SENSE && 4939 4939 ((ata_is_ncq(qc->tf.protocol) && 4940 4940 dev->flags & ATA_DFLAG_CDL_ENABLED) || 4941 - (!(ata_is_ncq(qc->tf.protocol) && 4942 - ata_id_sense_reporting_enabled(dev->id))))) { 4941 + (!ata_is_ncq(qc->tf.protocol) && 4942 + ata_id_sense_reporting_enabled(dev->id)))) { 4943 4943 /* 4944 4944 * Tell SCSI EH to not overwrite scmd->result even if 4945 4945 * this command is finished with result SAM_STAT_GOOD.
+2 -1
drivers/ata/pata_arasan_cf.c
··· 529 529 /* dma_request_channel may sleep, so calling from process context */ 530 530 acdev->dma_chan = dma_request_chan(acdev->host->dev, "data"); 531 531 if (IS_ERR(acdev->dma_chan)) { 532 - dev_err(acdev->host->dev, "Unable to get dma_chan\n"); 532 + dev_err_probe(acdev->host->dev, PTR_ERR(acdev->dma_chan), 533 + "Unable to get dma_chan\n"); 533 534 acdev->dma_chan = NULL; 534 535 goto chan_request_fail; 535 536 }
+1 -1
drivers/ata/pata_ns87415.c
··· 260 260 * LOCKING: 261 261 * Inherited from caller. 262 262 */ 263 - void ns87560_tf_read(struct ata_port *ap, struct ata_taskfile *tf) 263 + static void ns87560_tf_read(struct ata_port *ap, struct ata_taskfile *tf) 264 264 { 265 265 struct ata_ioports *ioaddr = &ap->ioaddr; 266 266
+3 -3
drivers/ata/pata_octeon_cf.c
··· 815 815 irq_handler_t irq_handler = NULL; 816 816 void __iomem *base; 817 817 struct octeon_cf_port *cf_port; 818 - int rv = -ENOMEM; 819 818 u32 bus_width; 819 + int rv; 820 820 821 821 node = pdev->dev.of_node; 822 822 if (node == NULL) ··· 893 893 cs0 = devm_ioremap(&pdev->dev, res_cs0->start, 894 894 resource_size(res_cs0)); 895 895 if (!cs0) 896 - return rv; 896 + return -ENOMEM; 897 897 898 898 /* allocate host */ 899 899 host = ata_host_alloc(&pdev->dev, 1); 900 900 if (!host) 901 - return rv; 901 + return -ENOMEM; 902 902 903 903 ap = host->ports[0]; 904 904 ap->private_data = cf_port;
+1
drivers/base/power/power.h
··· 29 29 #define WAKE_IRQ_DEDICATED_MASK (WAKE_IRQ_DEDICATED_ALLOCATED | \ 30 30 WAKE_IRQ_DEDICATED_MANAGED | \ 31 31 WAKE_IRQ_DEDICATED_REVERSE) 32 + #define WAKE_IRQ_DEDICATED_ENABLED BIT(3) 32 33 33 34 struct wake_irq { 34 35 struct device *dev;
+8 -53
drivers/base/power/wakeirq.c
··· 194 194 return err; 195 195 } 196 196 197 - 198 197 /** 199 198 * dev_pm_set_dedicated_wake_irq - Request a dedicated wake-up interrupt 200 199 * @dev: Device entry ··· 205 206 * Sets up a threaded interrupt handler for a device that has 206 207 * a dedicated wake-up interrupt in addition to the device IO 207 208 * interrupt. 208 - * 209 - * The interrupt starts disabled, and needs to be managed for 210 - * the device by the bus code or the device driver using 211 - * dev_pm_enable_wake_irq*() and dev_pm_disable_wake_irq*() 212 - * functions. 213 209 */ 214 210 int dev_pm_set_dedicated_wake_irq(struct device *dev, int irq) 215 211 { ··· 226 232 * the status of WAKE_IRQ_DEDICATED_REVERSE to tell rpm_suspend() 227 233 * to enable dedicated wake-up interrupt after running the runtime suspend 228 234 * callback for @dev. 229 - * 230 - * The interrupt starts disabled, and needs to be managed for 231 - * the device by the bus code or the device driver using 232 - * dev_pm_enable_wake_irq*() and dev_pm_disable_wake_irq*() 233 - * functions. 234 235 */ 235 236 int dev_pm_set_dedicated_wake_irq_reverse(struct device *dev, int irq) 236 237 { 237 238 return __dev_pm_set_dedicated_wake_irq(dev, irq, WAKE_IRQ_DEDICATED_REVERSE); 238 239 } 239 240 EXPORT_SYMBOL_GPL(dev_pm_set_dedicated_wake_irq_reverse); 240 - 241 - /** 242 - * dev_pm_enable_wake_irq - Enable device wake-up interrupt 243 - * @dev: Device 244 - * 245 - * Optionally called from the bus code or the device driver for 246 - * runtime_resume() to override the PM runtime core managed wake-up 247 - * interrupt handling to enable the wake-up interrupt. 248 - * 249 - * Note that for runtime_suspend()) the wake-up interrupts 250 - * should be unconditionally enabled unlike for suspend() 251 - * that is conditional. 252 - */ 253 - void dev_pm_enable_wake_irq(struct device *dev) 254 - { 255 - struct wake_irq *wirq = dev->power.wakeirq; 256 - 257 - if (wirq && (wirq->status & WAKE_IRQ_DEDICATED_ALLOCATED)) 258 - enable_irq(wirq->irq); 259 - } 260 - EXPORT_SYMBOL_GPL(dev_pm_enable_wake_irq); 261 - 262 - /** 263 - * dev_pm_disable_wake_irq - Disable device wake-up interrupt 264 - * @dev: Device 265 - * 266 - * Optionally called from the bus code or the device driver for 267 - * runtime_suspend() to override the PM runtime core managed wake-up 268 - * interrupt handling to disable the wake-up interrupt. 269 - */ 270 - void dev_pm_disable_wake_irq(struct device *dev) 271 - { 272 - struct wake_irq *wirq = dev->power.wakeirq; 273 - 274 - if (wirq && (wirq->status & WAKE_IRQ_DEDICATED_ALLOCATED)) 275 - disable_irq_nosync(wirq->irq); 276 - } 277 - EXPORT_SYMBOL_GPL(dev_pm_disable_wake_irq); 278 241 279 242 /** 280 243 * dev_pm_enable_wake_irq_check - Checks and enables wake-up interrupt ··· 265 314 return; 266 315 267 316 enable: 268 - if (!can_change_status || !(wirq->status & WAKE_IRQ_DEDICATED_REVERSE)) 317 + if (!can_change_status || !(wirq->status & WAKE_IRQ_DEDICATED_REVERSE)) { 269 318 enable_irq(wirq->irq); 319 + wirq->status |= WAKE_IRQ_DEDICATED_ENABLED; 320 + } 270 321 } 271 322 272 323 /** ··· 289 336 if (cond_disable && (wirq->status & WAKE_IRQ_DEDICATED_REVERSE)) 290 337 return; 291 338 292 - if (wirq->status & WAKE_IRQ_DEDICATED_MANAGED) 339 + if (wirq->status & WAKE_IRQ_DEDICATED_MANAGED) { 340 + wirq->status &= ~WAKE_IRQ_DEDICATED_ENABLED; 293 341 disable_irq_nosync(wirq->irq); 342 + } 294 343 } 295 344 296 345 /** ··· 331 376 332 377 if (device_may_wakeup(wirq->dev)) { 333 378 if (wirq->status & WAKE_IRQ_DEDICATED_ALLOCATED && 334 - !pm_runtime_status_suspended(wirq->dev)) 379 + !(wirq->status & WAKE_IRQ_DEDICATED_ENABLED)) 335 380 enable_irq(wirq->irq); 336 381 337 382 enable_irq_wake(wirq->irq); ··· 354 399 disable_irq_wake(wirq->irq); 355 400 356 401 if (wirq->status & WAKE_IRQ_DEDICATED_ALLOCATED && 357 - !pm_runtime_status_suspended(wirq->dev)) 402 + !(wirq->status & WAKE_IRQ_DEDICATED_ENABLED)) 358 403 disable_irq_nosync(wirq->irq); 359 404 } 360 405 }
+86 -38
drivers/block/rbd.c
··· 3849 3849 list_splice_tail_init(&rbd_dev->acquiring_list, &rbd_dev->running_list); 3850 3850 } 3851 3851 3852 - static int get_lock_owner_info(struct rbd_device *rbd_dev, 3853 - struct ceph_locker **lockers, u32 *num_lockers) 3852 + static bool locker_equal(const struct ceph_locker *lhs, 3853 + const struct ceph_locker *rhs) 3854 + { 3855 + return lhs->id.name.type == rhs->id.name.type && 3856 + lhs->id.name.num == rhs->id.name.num && 3857 + !strcmp(lhs->id.cookie, rhs->id.cookie) && 3858 + ceph_addr_equal_no_type(&lhs->info.addr, &rhs->info.addr); 3859 + } 3860 + 3861 + static void free_locker(struct ceph_locker *locker) 3862 + { 3863 + if (locker) 3864 + ceph_free_lockers(locker, 1); 3865 + } 3866 + 3867 + static struct ceph_locker *get_lock_owner_info(struct rbd_device *rbd_dev) 3854 3868 { 3855 3869 struct ceph_osd_client *osdc = &rbd_dev->rbd_client->client->osdc; 3870 + struct ceph_locker *lockers; 3871 + u32 num_lockers; 3856 3872 u8 lock_type; 3857 3873 char *lock_tag; 3874 + u64 handle; 3858 3875 int ret; 3859 - 3860 - dout("%s rbd_dev %p\n", __func__, rbd_dev); 3861 3876 3862 3877 ret = ceph_cls_lock_info(osdc, &rbd_dev->header_oid, 3863 3878 &rbd_dev->header_oloc, RBD_LOCK_NAME, 3864 - &lock_type, &lock_tag, lockers, num_lockers); 3865 - if (ret) 3866 - return ret; 3879 + &lock_type, &lock_tag, &lockers, &num_lockers); 3880 + if (ret) { 3881 + rbd_warn(rbd_dev, "failed to retrieve lockers: %d", ret); 3882 + return ERR_PTR(ret); 3883 + } 3867 3884 3868 - if (*num_lockers == 0) { 3885 + if (num_lockers == 0) { 3869 3886 dout("%s rbd_dev %p no lockers detected\n", __func__, rbd_dev); 3887 + lockers = NULL; 3870 3888 goto out; 3871 3889 } 3872 3890 3873 3891 if (strcmp(lock_tag, RBD_LOCK_TAG)) { 3874 3892 rbd_warn(rbd_dev, "locked by external mechanism, tag %s", 3875 3893 lock_tag); 3876 - ret = -EBUSY; 3877 - goto out; 3894 + goto err_busy; 3878 3895 } 3879 3896 3880 - if (lock_type == CEPH_CLS_LOCK_SHARED) { 3881 - rbd_warn(rbd_dev, "shared lock type detected"); 3882 - ret = -EBUSY; 3883 - goto out; 3897 + if (lock_type != CEPH_CLS_LOCK_EXCLUSIVE) { 3898 + rbd_warn(rbd_dev, "incompatible lock type detected"); 3899 + goto err_busy; 3884 3900 } 3885 3901 3886 - if (strncmp((*lockers)[0].id.cookie, RBD_LOCK_COOKIE_PREFIX, 3887 - strlen(RBD_LOCK_COOKIE_PREFIX))) { 3902 + WARN_ON(num_lockers != 1); 3903 + ret = sscanf(lockers[0].id.cookie, RBD_LOCK_COOKIE_PREFIX " %llu", 3904 + &handle); 3905 + if (ret != 1) { 3888 3906 rbd_warn(rbd_dev, "locked by external mechanism, cookie %s", 3889 - (*lockers)[0].id.cookie); 3890 - ret = -EBUSY; 3891 - goto out; 3907 + lockers[0].id.cookie); 3908 + goto err_busy; 3892 3909 } 3910 + if (ceph_addr_is_blank(&lockers[0].info.addr)) { 3911 + rbd_warn(rbd_dev, "locker has a blank address"); 3912 + goto err_busy; 3913 + } 3914 + 3915 + dout("%s rbd_dev %p got locker %s%llu@%pISpc/%u handle %llu\n", 3916 + __func__, rbd_dev, ENTITY_NAME(lockers[0].id.name), 3917 + &lockers[0].info.addr.in_addr, 3918 + le32_to_cpu(lockers[0].info.addr.nonce), handle); 3893 3919 3894 3920 out: 3895 3921 kfree(lock_tag); 3896 - return ret; 3922 + return lockers; 3923 + 3924 + err_busy: 3925 + kfree(lock_tag); 3926 + ceph_free_lockers(lockers, num_lockers); 3927 + return ERR_PTR(-EBUSY); 3897 3928 } 3898 3929 3899 3930 static int find_watcher(struct rbd_device *rbd_dev, ··· 3978 3947 static int rbd_try_lock(struct rbd_device *rbd_dev) 3979 3948 { 3980 3949 struct ceph_client *client = rbd_dev->rbd_client->client; 3981 - struct ceph_locker *lockers; 3982 - u32 num_lockers; 3950 + struct ceph_locker *locker, *refreshed_locker; 3983 3951 int ret; 3984 3952 3985 3953 for (;;) { 3954 + locker = refreshed_locker = NULL; 3955 + 3986 3956 ret = rbd_lock(rbd_dev); 3987 3957 if (ret != -EBUSY) 3988 - return ret; 3958 + goto out; 3989 3959 3990 3960 /* determine if the current lock holder is still alive */ 3991 - ret = get_lock_owner_info(rbd_dev, &lockers, &num_lockers); 3992 - if (ret) 3993 - return ret; 3994 - 3995 - if (num_lockers == 0) 3961 + locker = get_lock_owner_info(rbd_dev); 3962 + if (IS_ERR(locker)) { 3963 + ret = PTR_ERR(locker); 3964 + locker = NULL; 3965 + goto out; 3966 + } 3967 + if (!locker) 3996 3968 goto again; 3997 3969 3998 - ret = find_watcher(rbd_dev, lockers); 3970 + ret = find_watcher(rbd_dev, locker); 3999 3971 if (ret) 4000 3972 goto out; /* request lock or error */ 4001 3973 3974 + refreshed_locker = get_lock_owner_info(rbd_dev); 3975 + if (IS_ERR(refreshed_locker)) { 3976 + ret = PTR_ERR(refreshed_locker); 3977 + refreshed_locker = NULL; 3978 + goto out; 3979 + } 3980 + if (!refreshed_locker || 3981 + !locker_equal(locker, refreshed_locker)) 3982 + goto again; 3983 + 4002 3984 rbd_warn(rbd_dev, "breaking header lock owned by %s%llu", 4003 - ENTITY_NAME(lockers[0].id.name)); 3985 + ENTITY_NAME(locker->id.name)); 4004 3986 4005 3987 ret = ceph_monc_blocklist_add(&client->monc, 4006 - &lockers[0].info.addr); 3988 + &locker->info.addr); 4007 3989 if (ret) { 4008 - rbd_warn(rbd_dev, "blocklist of %s%llu failed: %d", 4009 - ENTITY_NAME(lockers[0].id.name), ret); 3990 + rbd_warn(rbd_dev, "failed to blocklist %s%llu: %d", 3991 + ENTITY_NAME(locker->id.name), ret); 4010 3992 goto out; 4011 3993 } 4012 3994 4013 3995 ret = ceph_cls_break_lock(&client->osdc, &rbd_dev->header_oid, 4014 3996 &rbd_dev->header_oloc, RBD_LOCK_NAME, 4015 - lockers[0].id.cookie, 4016 - &lockers[0].id.name); 4017 - if (ret && ret != -ENOENT) 3997 + locker->id.cookie, &locker->id.name); 3998 + if (ret && ret != -ENOENT) { 3999 + rbd_warn(rbd_dev, "failed to break header lock: %d", 4000 + ret); 4018 4001 goto out; 4002 + } 4019 4003 4020 4004 again: 4021 - ceph_free_lockers(lockers, num_lockers); 4005 + free_locker(refreshed_locker); 4006 + free_locker(locker); 4022 4007 } 4023 4008 4024 4009 out: 4025 - ceph_free_lockers(lockers, num_lockers); 4010 + free_locker(refreshed_locker); 4011 + free_locker(locker); 4026 4012 return ret; 4027 4013 } 4028 4014
+7 -4
drivers/block/ublk_drv.c
··· 1847 1847 if (ublksrv_pid <= 0) 1848 1848 return -EINVAL; 1849 1849 1850 - wait_for_completion_interruptible(&ub->completion); 1850 + if (wait_for_completion_interruptible(&ub->completion) != 0) 1851 + return -EINTR; 1851 1852 1852 1853 schedule_delayed_work(&ub->monitor_work, UBLK_DAEMON_MONITOR_PERIOD); 1853 1854 ··· 2126 2125 * - the device number is freed already, we will not find this 2127 2126 * device via ublk_get_device_from_id() 2128 2127 */ 2129 - wait_event_interruptible(ublk_idr_wq, ublk_idr_freed(idx)); 2130 - 2128 + if (wait_event_interruptible(ublk_idr_wq, ublk_idr_freed(idx))) 2129 + return -EINTR; 2131 2130 return 0; 2132 2131 } 2133 2132 ··· 2324 2323 pr_devel("%s: Waiting for new ubq_daemons(nr: %d) are ready, dev id %d...\n", 2325 2324 __func__, ub->dev_info.nr_hw_queues, header->dev_id); 2326 2325 /* wait until new ubq_daemon sending all FETCH_REQ */ 2327 - wait_for_completion_interruptible(&ub->completion); 2326 + if (wait_for_completion_interruptible(&ub->completion)) 2327 + return -EINTR; 2328 + 2328 2329 pr_devel("%s: All new ubq_daemons(nr: %d) are ready, dev id %d\n", 2329 2330 __func__, ub->dev_info.nr_hw_queues, header->dev_id); 2330 2331
+1 -1
drivers/char/tpm/st33zp24/i2c.c
··· 160 160 .of_match_table = of_match_ptr(of_st33zp24_i2c_match), 161 161 .acpi_match_table = ACPI_PTR(st33zp24_i2c_acpi_match), 162 162 }, 163 - .probe_new = st33zp24_i2c_probe, 163 + .probe = st33zp24_i2c_probe, 164 164 .remove = st33zp24_i2c_remove, 165 165 .id_table = st33zp24_i2c_id 166 166 };
+1 -1
drivers/char/tpm/tpm_i2c_atmel.c
··· 203 203 204 204 static struct i2c_driver i2c_atmel_driver = { 205 205 .id_table = i2c_atmel_id, 206 - .probe_new = i2c_atmel_probe, 206 + .probe = i2c_atmel_probe, 207 207 .remove = i2c_atmel_remove, 208 208 .driver = { 209 209 .name = I2C_DRIVER_NAME,
+1 -1
drivers/char/tpm/tpm_i2c_infineon.c
··· 716 716 717 717 static struct i2c_driver tpm_tis_i2c_driver = { 718 718 .id_table = tpm_tis_i2c_table, 719 - .probe_new = tpm_tis_i2c_probe, 719 + .probe = tpm_tis_i2c_probe, 720 720 .remove = tpm_tis_i2c_remove, 721 721 .driver = { 722 722 .name = "tpm_i2c_infineon",
+1 -1
drivers/char/tpm/tpm_i2c_nuvoton.c
··· 650 650 651 651 static struct i2c_driver i2c_nuvoton_driver = { 652 652 .id_table = i2c_nuvoton_id, 653 - .probe_new = i2c_nuvoton_probe, 653 + .probe = i2c_nuvoton_probe, 654 654 .remove = i2c_nuvoton_remove, 655 655 .driver = { 656 656 .name = "tpm_i2c_nuvoton",
+7 -2
drivers/char/tpm/tpm_tis_core.c
··· 366 366 goto out; 367 367 } 368 368 369 - size += recv_data(chip, &buf[TPM_HEADER_SIZE], 370 - expected - TPM_HEADER_SIZE); 369 + rc = recv_data(chip, &buf[TPM_HEADER_SIZE], 370 + expected - TPM_HEADER_SIZE); 371 + if (rc < 0) { 372 + size = rc; 373 + goto out; 374 + } 375 + size += rc; 371 376 if (size < expected) { 372 377 dev_err(&chip->dev, "Unable to read remainder of result\n"); 373 378 size = -ETIME;
+1 -1
drivers/char/tpm/tpm_tis_i2c.c
··· 394 394 .pm = &tpm_tis_pm, 395 395 .of_match_table = of_match_ptr(of_tis_i2c_match), 396 396 }, 397 - .probe_new = tpm_tis_i2c_probe, 397 + .probe = tpm_tis_i2c_probe, 398 398 .remove = tpm_tis_i2c_remove, 399 399 .id_table = tpm_tis_i2c_id, 400 400 };
+1 -1
drivers/char/tpm/tpm_tis_i2c_cr50.c
··· 779 779 static SIMPLE_DEV_PM_OPS(cr50_i2c_pm, tpm_pm_suspend, tpm_pm_resume); 780 780 781 781 static struct i2c_driver cr50_i2c_driver = { 782 - .probe_new = tpm_cr50_i2c_probe, 782 + .probe = tpm_cr50_i2c_probe, 783 783 .remove = tpm_cr50_i2c_remove, 784 784 .driver = { 785 785 .name = "cr50_i2c",
+2 -1
drivers/cxl/Kconfig
··· 2 2 menuconfig CXL_BUS 3 3 tristate "CXL (Compute Express Link) Devices Support" 4 4 depends on PCI 5 + select FW_LOADER 6 + select FW_UPLOAD 5 7 select PCI_DOE 6 8 help 7 9 CXL is a bus that is electrically compatible with PCI Express, but ··· 84 82 config CXL_MEM 85 83 tristate "CXL: Memory Expansion" 86 84 depends on CXL_PCI 87 - select FW_UPLOAD 88 85 default CXL_BUS 89 86 help 90 87 The CXL.mem protocol allows a device to act as a provider of "System
+2 -3
drivers/cxl/acpi.c
··· 296 296 else 297 297 rc = cxl_decoder_autoremove(dev, cxld); 298 298 if (rc) { 299 - dev_err(dev, "Failed to add decode range [%#llx - %#llx]\n", 300 - cxld->hpa_range.start, cxld->hpa_range.end); 301 - return 0; 299 + dev_err(dev, "Failed to add decode range: %pr", res); 300 + return rc; 302 301 } 303 302 dev_dbg(dev, "add: %s node: %d range [%#llx - %#llx]\n", 304 303 dev_name(&cxld->dev),
+1 -1
drivers/cxl/cxlmem.h
··· 323 323 324 324 /* FW state bits */ 325 325 #define CXL_FW_STATE_BITS 32 326 - #define CXL_FW_CANCEL BIT(0) 326 + #define CXL_FW_CANCEL 0 327 327 328 328 /** 329 329 * struct cxl_fw_state - Firmware upload / activation state
+3 -1
drivers/firmware/arm_scmi/mailbox.c
··· 166 166 return -ENOMEM; 167 167 168 168 shmem = of_parse_phandle(cdev->of_node, "shmem", idx); 169 - if (!of_device_is_compatible(shmem, "arm,scmi-shmem")) 169 + if (!of_device_is_compatible(shmem, "arm,scmi-shmem")) { 170 + of_node_put(shmem); 170 171 return -ENXIO; 172 + } 171 173 172 174 ret = of_address_to_resource(shmem, 0, &res); 173 175 of_node_put(shmem);
+4 -1
drivers/firmware/arm_scmi/raw_mode.c
··· 818 818 * before sending it with a single RAW xfer. 819 819 */ 820 820 if (rd->tx_size < rd->tx_req_size) { 821 - size_t cnt; 821 + ssize_t cnt; 822 822 823 823 cnt = simple_write_to_buffer(rd->tx.buf, rd->tx.len, ppos, 824 824 buf, count); 825 + if (cnt < 0) 826 + return cnt; 827 + 825 828 rd->tx_size += cnt; 826 829 if (cnt < count) 827 830 return cnt;
+14 -7
drivers/firmware/arm_scmi/smc.c
··· 40 40 /** 41 41 * struct scmi_smc - Structure representing a SCMI smc transport 42 42 * 43 + * @irq: An optional IRQ for completion 43 44 * @cinfo: SCMI channel info 44 45 * @shmem: Transmit/Receive shared memory area 45 46 * @shmem_lock: Lock to protect access to Tx/Rx shared memory area. ··· 53 52 */ 54 53 55 54 struct scmi_smc { 55 + int irq; 56 56 struct scmi_chan_info *cinfo; 57 57 struct scmi_shared_mem __iomem *shmem; 58 58 /* Protect access to shmem area */ ··· 129 127 struct resource res; 130 128 struct device_node *np; 131 129 u32 func_id; 132 - int ret, irq; 130 + int ret; 133 131 134 132 if (!tx) 135 133 return -ENODEV; ··· 139 137 return -ENOMEM; 140 138 141 139 np = of_parse_phandle(cdev->of_node, "shmem", 0); 142 - if (!of_device_is_compatible(np, "arm,scmi-shmem")) 140 + if (!of_device_is_compatible(np, "arm,scmi-shmem")) { 141 + of_node_put(np); 143 142 return -ENXIO; 143 + } 144 144 145 145 ret = of_address_to_resource(np, 0, &res); 146 146 of_node_put(np); ··· 171 167 * completion of a message is signaled by an interrupt rather than by 172 168 * the return of the SMC call. 173 169 */ 174 - irq = of_irq_get_byname(cdev->of_node, "a2p"); 175 - if (irq > 0) { 176 - ret = devm_request_irq(dev, irq, smc_msg_done_isr, 177 - IRQF_NO_SUSPEND, 178 - dev_name(dev), scmi_info); 170 + scmi_info->irq = of_irq_get_byname(cdev->of_node, "a2p"); 171 + if (scmi_info->irq > 0) { 172 + ret = request_irq(scmi_info->irq, smc_msg_done_isr, 173 + IRQF_NO_SUSPEND, dev_name(dev), scmi_info); 179 174 if (ret) { 180 175 dev_err(dev, "failed to setup SCMI smc irq\n"); 181 176 return ret; ··· 195 192 { 196 193 struct scmi_chan_info *cinfo = p; 197 194 struct scmi_smc *scmi_info = cinfo->transport_info; 195 + 196 + /* Ignore any possible further reception on the IRQ path */ 197 + if (scmi_info->irq > 0) 198 + free_irq(scmi_info->irq, scmi_info); 198 199 199 200 cinfo->transport_info = NULL; 200 201 scmi_info->cinfo = NULL;
+2 -3
drivers/firmware/smccc/soc_id.c
··· 34 34 35 35 static int __init smccc_soc_init(void) 36 36 { 37 - struct arm_smccc_res res; 38 37 int soc_id_rev, soc_id_version; 39 38 static char soc_id_str[20], soc_id_rev_str[12]; 40 39 static char soc_id_jep106_id_str[12]; ··· 48 49 } 49 50 50 51 if (soc_id_version < 0) { 51 - pr_err("ARCH_SOC_ID(0) returned error: %lx\n", res.a0); 52 + pr_err("Invalid SoC Version: %x\n", soc_id_version); 52 53 return -EINVAL; 53 54 } 54 55 55 56 soc_id_rev = arm_smccc_get_soc_id_revision(); 56 57 if (soc_id_rev < 0) { 57 - pr_err("ARCH_SOC_ID(1) returned error: %lx\n", res.a0); 58 + pr_err("Invalid SoC Revision: %x\n", soc_id_rev); 58 59 return -EINVAL; 59 60 } 60 61
+3 -3
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
··· 498 498 return 0; 499 499 500 500 failed2: 501 - amdgpu_bo_free_kernel(&psp->fw_pri_bo, 502 - &psp->fw_pri_mc_addr, &psp->fw_pri_buf); 503 - failed1: 504 501 amdgpu_bo_free_kernel(&psp->fence_buf_bo, 505 502 &psp->fence_buf_mc_addr, &psp->fence_buf); 503 + failed1: 504 + amdgpu_bo_free_kernel(&psp->fw_pri_bo, 505 + &psp->fw_pri_mc_addr, &psp->fw_pri_buf); 506 506 return ret; 507 507 } 508 508
+2 -1
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
··· 46 46 #define RLCG_UCODE_LOADING_START_ADDRESS 0x00002000L 47 47 48 48 #define GOLDEN_GB_ADDR_CONFIG 0x2a114042 49 + #define CP_HQD_PERSISTENT_STATE_DEFAULT 0xbe05301 49 50 50 51 struct amdgpu_gfx_ras gfx_v9_4_3_ras; 51 52 ··· 1737 1736 1738 1737 WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_IQ_TIMER, 0); 1739 1738 WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_IB_CONTROL, 0); 1740 - WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PERSISTENT_STATE, 0); 1739 + WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PERSISTENT_STATE, CP_HQD_PERSISTENT_STATE_DEFAULT); 1741 1740 WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL, 0x40000000); 1742 1741 WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL, 0); 1743 1742 WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_RPTR, 0);
+1 -4
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
··· 402 402 static int gfxhub_v1_2_xcc_gart_enable(struct amdgpu_device *adev, 403 403 uint32_t xcc_mask) 404 404 { 405 - uint32_t tmp_mask; 406 405 int i; 407 406 408 - tmp_mask = xcc_mask; 409 407 /* 410 408 * MC_VM_FB_LOCATION_BASE/TOP is NULL for VF, because they are 411 409 * VF copy registers so vbios post doesn't program them, for 412 410 * SRIOV driver need to program them 413 411 */ 414 412 if (amdgpu_sriov_vf(adev)) { 415 - for_each_inst(i, tmp_mask) { 416 - i = ffs(tmp_mask) - 1; 413 + for_each_inst(i, xcc_mask) { 417 414 WREG32_SOC15_RLC(GC, GET_INST(GC, i), regMC_VM_FB_LOCATION_BASE, 418 415 adev->gmc.vram_start >> 24); 419 416 WREG32_SOC15_RLC(GC, GET_INST(GC, i), regMC_VM_FB_LOCATION_TOP,
+2 -3
drivers/gpu/drm/amd/amdkfd/kfd_debug.c
··· 302 302 if (!q) 303 303 return 0; 304 304 305 - if (KFD_GC_VERSION(q->device) < IP_VERSION(11, 0, 0) || 306 - KFD_GC_VERSION(q->device) >= IP_VERSION(12, 0, 0)) 305 + if (!kfd_dbg_has_cwsr_workaround(q->device)) 307 306 return 0; 308 307 309 308 if (enable && q->properties.is_user_cu_masked) ··· 348 349 { 349 350 uint32_t spi_dbg_cntl = pdd->spi_dbg_override | pdd->spi_dbg_launch_mode; 350 351 uint32_t flags = pdd->process->dbg_flags; 351 - bool sq_trap_en = !!spi_dbg_cntl; 352 + bool sq_trap_en = !!spi_dbg_cntl || !kfd_dbg_has_cwsr_workaround(pdd->dev); 352 353 353 354 if (!kfd_dbg_is_per_vmid_supported(pdd->dev)) 354 355 return 0;
+6
drivers/gpu/drm/amd/amdkfd/kfd_debug.h
··· 100 100 KFD_GC_VERSION(dev) == IP_VERSION(10, 1, 1)); 101 101 } 102 102 103 + static inline bool kfd_dbg_has_cwsr_workaround(struct kfd_node *dev) 104 + { 105 + return KFD_GC_VERSION(dev) >= IP_VERSION(11, 0, 0) && 106 + KFD_GC_VERSION(dev) <= IP_VERSION(11, 0, 3); 107 + } 108 + 103 109 static inline bool kfd_dbg_has_gws_support(struct kfd_node *dev) 104 110 { 105 111 if ((KFD_GC_VERSION(dev) == IP_VERSION(9, 0, 1)
+2 -4
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
··· 226 226 queue_input.paging = false; 227 227 queue_input.tba_addr = qpd->tba_addr; 228 228 queue_input.tma_addr = qpd->tma_addr; 229 - queue_input.trap_en = KFD_GC_VERSION(q->device) < IP_VERSION(11, 0, 0) || 230 - KFD_GC_VERSION(q->device) > IP_VERSION(11, 0, 3); 229 + queue_input.trap_en = !kfd_dbg_has_cwsr_workaround(q->device); 231 230 queue_input.skip_process_ctx_clear = qpd->pqm->process->debug_trap_enabled; 232 231 233 232 queue_type = convert_to_mes_queue_type(q->properties.type); ··· 1805 1806 */ 1806 1807 q->properties.is_evicted = !!qpd->evicted; 1807 1808 q->properties.is_dbg_wa = qpd->pqm->process->debug_trap_enabled && 1808 - KFD_GC_VERSION(q->device) >= IP_VERSION(11, 0, 0) && 1809 - KFD_GC_VERSION(q->device) <= IP_VERSION(11, 0, 3); 1809 + kfd_dbg_has_cwsr_workaround(q->device); 1810 1810 1811 1811 if (qd) 1812 1812 mqd_mgr->restore_mqd(mqd_mgr, &q->mqd, q->mqd_mem_obj, &q->gart_mqd_addr,
+1 -1
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
··· 706 706 707 707 if (retry == 3) { 708 708 DRM_ERROR("Failed to ack MST event.\n"); 709 - return; 709 + break; 710 710 } 711 711 712 712 drm_dp_mst_hpd_irq_send_new_request(&aconnector->mst_mgr);
+3
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
··· 1792 1792 hws->funcs.edp_backlight_control(edp_link_with_sink, false); 1793 1793 } 1794 1794 /*resume from S3, no vbios posting, no need to power down again*/ 1795 + clk_mgr_exit_optimized_pwr_state(dc, dc->clk_mgr); 1796 + 1795 1797 power_down_all_hw_blocks(dc); 1796 1798 disable_vga_and_power_gate_all_controllers(dc); 1797 1799 if (edp_link_with_sink && !keep_edp_vdd_on) 1798 1800 dc->hwss.edp_power_control(edp_link_with_sink, false); 1801 + clk_mgr_optimize_pwr_state(dc, dc->clk_mgr); 1799 1802 } 1800 1803 bios_set_scratch_acc_mode_change(dc->ctx->dc_bios, 1); 1801 1804 }
+2 -1
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.c
··· 84 84 struct dcn_dccg *dccg_dcn, 85 85 enum phyd32clk_clock_source src) 86 86 { 87 - if (dccg_dcn->base.ctx->asic_id.hw_internal_rev == YELLOW_CARP_B0) { 87 + if (dccg_dcn->base.ctx->asic_id.chip_family == FAMILY_YELLOW_CARP && 88 + dccg_dcn->base.ctx->asic_id.hw_internal_rev == YELLOW_CARP_B0) { 88 89 if (src == PHYD32CLKC) 89 90 src = PHYD32CLKF; 90 91 if (src == PHYD32CLKD)
+4 -1
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c
··· 49 49 uint32_t dispclk_rdivider_value = 0; 50 50 51 51 REG_GET(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_RDIVIDER, &dispclk_rdivider_value); 52 - REG_UPDATE(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_WDIVIDER, dispclk_rdivider_value); 52 + 53 + /* Not valid for the WDIVIDER to be set to 0 */ 54 + if (dispclk_rdivider_value != 0) 55 + REG_UPDATE(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_WDIVIDER, dispclk_rdivider_value); 53 56 } 54 57 55 58 static void dccg32_get_pixel_rate_div(
+1 -1
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
··· 1734 1734 gpu_metrics->average_vclk1_frequency = metrics->AverageVclk1Frequency; 1735 1735 gpu_metrics->average_dclk1_frequency = metrics->AverageDclk1Frequency; 1736 1736 1737 - gpu_metrics->current_gfxclk = metrics->CurrClock[PPCLK_GFXCLK]; 1737 + gpu_metrics->current_gfxclk = gpu_metrics->average_gfxclk_frequency; 1738 1738 gpu_metrics->current_socclk = metrics->CurrClock[PPCLK_SOCCLK]; 1739 1739 gpu_metrics->current_uclk = metrics->CurrClock[PPCLK_UCLK]; 1740 1740 gpu_metrics->current_vclk0 = metrics->CurrClock[PPCLK_VCLK_0];
+3 -1
drivers/gpu/drm/i915/display/intel_dpt.c
··· 166 166 i915_vma_get(vma); 167 167 } 168 168 169 + dpt->obj->mm.dirty = true; 170 + 169 171 atomic_dec(&i915->gpu_error.pending_fb_pin); 170 172 intel_runtime_pm_put(&i915->runtime_pm, wakeref); 171 173 ··· 263 261 dpt_obj = i915_gem_object_create_stolen(i915, size); 264 262 if (IS_ERR(dpt_obj) && !HAS_LMEM(i915)) { 265 263 drm_dbg_kms(&i915->drm, "Allocating dpt from smem\n"); 266 - dpt_obj = i915_gem_object_create_internal(i915, size); 264 + dpt_obj = i915_gem_object_create_shmem(i915, size); 267 265 } 268 266 if (IS_ERR(dpt_obj)) 269 267 return ERR_CAST(dpt_obj);
+4 -2
drivers/gpu/drm/i915/gem/selftests/huge_pages.c
··· 1246 1246 * times in succession a possibility by enlarging the permutation array. 1247 1247 */ 1248 1248 order = i915_random_order(count * count, &prng); 1249 - if (!order) 1250 - return -ENOMEM; 1249 + if (!order) { 1250 + err = -ENOMEM; 1251 + goto out; 1252 + } 1251 1253 1252 1254 max_page_size = rounddown_pow_of_two(obj->mm.page_sizes.sg); 1253 1255 max = div_u64(max - size, max_page_size);
+1 -1
drivers/gpu/drm/msm/adreno/a5xx_gpu.c
··· 89 89 * since we've already mapped it once in 90 90 * submit_reloc() 91 91 */ 92 - if (WARN_ON(!ptr)) 92 + if (WARN_ON(IS_ERR_OR_NULL(ptr))) 93 93 return; 94 94 95 95 for (i = 0; i < dwords; i++) {
+1 -1
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h
··· 206 206 SHADER(A6XX_SP_LB_3_DATA, 0x800), 207 207 SHADER(A6XX_SP_LB_4_DATA, 0x800), 208 208 SHADER(A6XX_SP_LB_5_DATA, 0x200), 209 - SHADER(A6XX_SP_CB_BINDLESS_DATA, 0x2000), 209 + SHADER(A6XX_SP_CB_BINDLESS_DATA, 0x800), 210 210 SHADER(A6XX_SP_CB_LEGACY_DATA, 0x280), 211 211 SHADER(A6XX_SP_UAV_DATA, 0x80), 212 212 SHADER(A6XX_SP_INST_TAG, 0x80),
-2
drivers/gpu/drm/msm/adreno/adreno_device.c
··· 369 369 .hwcg = a640_hwcg, 370 370 }, { 371 371 .rev = ADRENO_REV(6, 9, 0, ANY_ID), 372 - .revn = 690, 373 - .name = "A690", 374 372 .fw = { 375 373 [ADRENO_FW_SQE] = "a660_sqe.fw", 376 374 [ADRENO_FW_GMU] = "a690_gmu.bin",
+8 -4
drivers/gpu/drm/msm/adreno/adreno_gpu.h
··· 149 149 150 150 static inline bool adreno_is_revn(const struct adreno_gpu *gpu, uint32_t revn) 151 151 { 152 - WARN_ON_ONCE(!gpu->revn); 152 + /* revn can be zero, but if not is set at same time as info */ 153 + WARN_ON_ONCE(!gpu->info); 153 154 154 155 return gpu->revn == revn; 155 156 } ··· 162 161 163 162 static inline bool adreno_is_a2xx(const struct adreno_gpu *gpu) 164 163 { 165 - WARN_ON_ONCE(!gpu->revn); 164 + /* revn can be zero, but if not is set at same time as info */ 165 + WARN_ON_ONCE(!gpu->info); 166 166 167 167 return (gpu->revn < 300); 168 168 } 169 169 170 170 static inline bool adreno_is_a20x(const struct adreno_gpu *gpu) 171 171 { 172 - WARN_ON_ONCE(!gpu->revn); 172 + /* revn can be zero, but if not is set at same time as info */ 173 + WARN_ON_ONCE(!gpu->info); 173 174 174 175 return (gpu->revn < 210); 175 176 } ··· 310 307 311 308 static inline int adreno_is_a690(const struct adreno_gpu *gpu) 312 309 { 313 - return adreno_is_revn(gpu, 690); 310 + /* The order of args is important here to handle ANY_ID correctly */ 311 + return adreno_cmp_rev(ADRENO_REV(6, 9, 0, ANY_ID), gpu->rev); 314 312 }; 315 313 316 314 /* check for a615, a616, a618, a619 or any derivatives */
-13
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h
··· 15 15 #define DPU_PERF_DEFAULT_MAX_CORE_CLK_RATE 412500000 16 16 17 17 /** 18 - * enum dpu_core_perf_data_bus_id - data bus identifier 19 - * @DPU_CORE_PERF_DATA_BUS_ID_MNOC: DPU/MNOC data bus 20 - * @DPU_CORE_PERF_DATA_BUS_ID_LLCC: MNOC/LLCC data bus 21 - * @DPU_CORE_PERF_DATA_BUS_ID_EBI: LLCC/EBI data bus 22 - */ 23 - enum dpu_core_perf_data_bus_id { 24 - DPU_CORE_PERF_DATA_BUS_ID_MNOC, 25 - DPU_CORE_PERF_DATA_BUS_ID_LLCC, 26 - DPU_CORE_PERF_DATA_BUS_ID_EBI, 27 - DPU_CORE_PERF_DATA_BUS_ID_MAX, 28 - }; 29 - 30 - /** 31 18 * struct dpu_core_perf_params - definition of performance parameters 32 19 * @max_per_pipe_ib: maximum instantaneous bandwidth request 33 20 * @bw_ctl: arbitrated bandwidth request
+7 -1
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
··· 51 51 52 52 static const u32 fetch_tbl[SSPP_MAX] = {CTL_INVALID_BIT, 16, 17, 18, 19, 53 53 CTL_INVALID_BIT, CTL_INVALID_BIT, CTL_INVALID_BIT, CTL_INVALID_BIT, 0, 54 - 1, 2, 3, CTL_INVALID_BIT, CTL_INVALID_BIT}; 54 + 1, 2, 3, 4, 5}; 55 55 56 56 static int _mixer_stages(const struct dpu_lm_cfg *mixer, int count, 57 57 enum dpu_lm lm) ··· 197 197 break; 198 198 case SSPP_DMA3: 199 199 ctx->pending_flush_mask |= BIT(25); 200 + break; 201 + case SSPP_DMA4: 202 + ctx->pending_flush_mask |= BIT(13); 203 + break; 204 + case SSPP_DMA5: 205 + ctx->pending_flush_mask |= BIT(14); 200 206 break; 201 207 case SSPP_CURSOR0: 202 208 ctx->pending_flush_mask |= BIT(22);
-2
drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
··· 1087 1087 1088 1088 const struct msm_dsi_phy_cfg dsi_phy_14nm_2290_cfgs = { 1089 1089 .has_phy_lane = true, 1090 - .regulator_data = dsi_phy_14nm_17mA_regulators, 1091 - .num_regulators = ARRAY_SIZE(dsi_phy_14nm_17mA_regulators), 1092 1090 .ops = { 1093 1091 .enable = dsi_14nm_phy_enable, 1094 1092 .disable = dsi_14nm_phy_disable,
+6
drivers/gpu/drm/msm/msm_fence.c
··· 191 191 192 192 f->fctx = fctx; 193 193 194 + /* 195 + * Until this point, the fence was just some pre-allocated memory, 196 + * no-one should have taken a reference to it yet. 197 + */ 198 + WARN_ON(kref_read(&fence->refcount)); 199 + 194 200 dma_fence_init(&f->base, &msm_fence_ops, &fctx->spinlock, 195 201 fctx->context, ++fctx->last_fence); 196 202 }
+14 -2
drivers/gpu/drm/msm/msm_gem_submit.c
··· 86 86 } 87 87 88 88 dma_fence_put(submit->user_fence); 89 - dma_fence_put(submit->hw_fence); 89 + 90 + /* 91 + * If the submit is freed before msm_job_run(), then hw_fence is 92 + * just some pre-allocated memory, not a reference counted fence. 93 + * Once the job runs and the hw_fence is initialized, it will 94 + * have a refcount of at least one, since the submit holds a ref 95 + * to the hw_fence. 96 + */ 97 + if (kref_read(&submit->hw_fence->refcount) == 0) { 98 + kfree(submit->hw_fence); 99 + } else { 100 + dma_fence_put(submit->hw_fence); 101 + } 90 102 91 103 put_pid(submit->pid); 92 104 msm_submitqueue_put(submit->queue); ··· 901 889 * after the job is armed 902 890 */ 903 891 if ((args->flags & MSM_SUBMIT_FENCE_SN_IN) && 904 - idr_find(&queue->fence_idr, args->fence)) { 892 + (!args->fence || idr_find(&queue->fence_idr, args->fence))) { 905 893 spin_unlock(&queue->idr_lock); 906 894 idr_preload_end(); 907 895 ret = -EINVAL;
+17 -2
drivers/gpu/drm/msm/msm_mdss.c
··· 189 189 #define UBWC_2_0 0x20000000 190 190 #define UBWC_3_0 0x30000000 191 191 #define UBWC_4_0 0x40000000 192 + #define UBWC_4_3 0x40030000 192 193 193 194 static void msm_mdss_setup_ubwc_dec_20(struct msm_mdss *msm_mdss) 194 195 { ··· 228 227 writel_relaxed(1, msm_mdss->mmio + UBWC_CTRL_2); 229 228 writel_relaxed(0, msm_mdss->mmio + UBWC_PREDICTION_MODE); 230 229 } else { 231 - writel_relaxed(2, msm_mdss->mmio + UBWC_CTRL_2); 230 + if (data->ubwc_dec_version == UBWC_4_3) 231 + writel_relaxed(3, msm_mdss->mmio + UBWC_CTRL_2); 232 + else 233 + writel_relaxed(2, msm_mdss->mmio + UBWC_CTRL_2); 232 234 writel_relaxed(1, msm_mdss->mmio + UBWC_PREDICTION_MODE); 233 235 } 234 236 } ··· 275 271 msm_mdss_setup_ubwc_dec_30(msm_mdss); 276 272 break; 277 273 case UBWC_4_0: 274 + case UBWC_4_3: 278 275 msm_mdss_setup_ubwc_dec_40(msm_mdss); 279 276 break; 280 277 default: ··· 574 569 .macrotile_mode = 1, 575 570 }; 576 571 572 + static const struct msm_mdss_data sm8550_data = { 573 + .ubwc_version = UBWC_4_0, 574 + .ubwc_dec_version = UBWC_4_3, 575 + .ubwc_swizzle = 6, 576 + .ubwc_static = 1, 577 + /* TODO: highest_bank_bit = 2 for LP_DDR4 */ 578 + .highest_bank_bit = 3, 579 + .macrotile_mode = 1, 580 + }; 581 + 577 582 static const struct of_device_id mdss_dt_match[] = { 578 583 { .compatible = "qcom,mdss" }, 579 584 { .compatible = "qcom,msm8998-mdss" }, ··· 600 585 { .compatible = "qcom,sm8250-mdss", .data = &sm8250_data }, 601 586 { .compatible = "qcom,sm8350-mdss", .data = &sm8250_data }, 602 587 { .compatible = "qcom,sm8450-mdss", .data = &sm8250_data }, 603 - { .compatible = "qcom,sm8550-mdss", .data = &sm8250_data }, 588 + { .compatible = "qcom,sm8550-mdss", .data = &sm8550_data }, 604 589 {} 605 590 }; 606 591 MODULE_DEVICE_TABLE(of, mdss_dt_match);
+1 -1
drivers/hwmon/aquacomputer_d5next.c
··· 1027 1027 if (ret < 0) 1028 1028 return ret; 1029 1029 1030 - *val = aqc_percent_to_pwm(ret); 1030 + *val = aqc_percent_to_pwm(*val); 1031 1031 break; 1032 1032 } 1033 1033 break;
+15 -2
drivers/hwmon/k10temp.c
··· 77 77 #define ZEN_CUR_TEMP_RANGE_SEL_MASK BIT(19) 78 78 #define ZEN_CUR_TEMP_TJ_SEL_MASK GENMASK(17, 16) 79 79 80 + /* 81 + * AMD's Industrial processor 3255 supports temperature from -40 deg to 105 deg Celsius. 82 + * Use the model name to identify 3255 CPUs and set a flag to display negative temperature. 83 + * Do not round off to zero for negative Tctl or Tdie values if the flag is set 84 + */ 85 + #define AMD_I3255_STR "3255" 86 + 80 87 struct k10temp_data { 81 88 struct pci_dev *pdev; 82 89 void (*read_htcreg)(struct pci_dev *pdev, u32 *regval); ··· 93 86 u32 show_temp; 94 87 bool is_zen; 95 88 u32 ccd_offset; 89 + bool disp_negative; 96 90 }; 97 91 98 92 #define TCTL_BIT 0 ··· 212 204 switch (channel) { 213 205 case 0: /* Tctl */ 214 206 *val = get_raw_temp(data); 215 - if (*val < 0) 207 + if (*val < 0 && !data->disp_negative) 216 208 *val = 0; 217 209 break; 218 210 case 1: /* Tdie */ 219 211 *val = get_raw_temp(data) - data->temp_offset; 220 - if (*val < 0) 212 + if (*val < 0 && !data->disp_negative) 221 213 *val = 0; 222 214 break; 223 215 case 2 ... 13: /* Tccd{1-12} */ ··· 412 404 413 405 data->pdev = pdev; 414 406 data->show_temp |= BIT(TCTL_BIT); /* Always show Tctl */ 407 + 408 + if (boot_cpu_data.x86 == 0x17 && 409 + strstr(boot_cpu_data.x86_model_id, AMD_I3255_STR)) { 410 + data->disp_negative = true; 411 + } 415 412 416 413 if (boot_cpu_data.x86 == 0x15 && 417 414 ((boot_cpu_data.x86_model & 0xf0) == 0x60 ||
+22 -6
drivers/hwmon/nct6775-core.c
··· 955 955 800, 800 956 956 }; 957 957 958 - static inline long in_from_reg(u8 reg, u8 nr) 958 + /* 959 + * NCT6798 scaling: 960 + * CPUVC, IN1, AVSB, 3VCC, IN0, IN8, IN4, 3VSB, VBAT, VTT, IN5, IN6, IN2, 961 + * IN3, IN7 962 + * Additional scales to be added later: IN9 (800), VHIF (1600) 963 + */ 964 + static const u16 scale_in_6798[15] = { 965 + 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 1600, 1600, 1600, 800, 966 + 800, 800 967 + }; 968 + 969 + static inline long in_from_reg(u8 reg, u8 nr, const u16 *scales) 959 970 { 960 - return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100); 971 + return DIV_ROUND_CLOSEST(reg * scales[nr], 100); 961 972 } 962 973 963 - static inline u8 in_to_reg(u32 val, u8 nr) 974 + static inline u8 in_to_reg(u32 val, u8 nr, const u16 *scales) 964 975 { 965 - return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255); 976 + return clamp_val(DIV_ROUND_CLOSEST(val * 100, scales[nr]), 0, 255); 966 977 } 967 978 968 979 /* TSI temperatures are in 8.3 format */ ··· 1684 1673 if (IS_ERR(data)) 1685 1674 return PTR_ERR(data); 1686 1675 1687 - return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr)); 1676 + return sprintf(buf, "%ld\n", 1677 + in_from_reg(data->in[nr][index], nr, data->scale_in)); 1688 1678 } 1689 1679 1690 1680 static ssize_t ··· 1703 1691 if (err < 0) 1704 1692 return err; 1705 1693 mutex_lock(&data->update_lock); 1706 - data->in[nr][index] = in_to_reg(val, nr); 1694 + data->in[nr][index] = in_to_reg(val, nr, data->scale_in); 1707 1695 err = nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr], data->in[nr][index]); 1708 1696 mutex_unlock(&data->update_lock); 1709 1697 return err ? : count; ··· 3474 3462 mutex_init(&data->update_lock); 3475 3463 data->name = nct6775_device_names[data->kind]; 3476 3464 data->bank = 0xff; /* Force initial bank selection */ 3465 + data->scale_in = scale_in; 3477 3466 3478 3467 switch (data->kind) { 3479 3468 case nct6106: ··· 3989 3976 num_reg_tsi_temp = 0; 3990 3977 break; 3991 3978 } 3979 + 3980 + if (data->kind == nct6798 || data->kind == nct6799) 3981 + data->scale_in = scale_in_6798; 3992 3982 3993 3983 reg_temp = NCT6779_REG_TEMP; 3994 3984 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
+1 -1
drivers/hwmon/nct6775-platform.c
··· 586 586 int creb; 587 587 int cred; 588 588 589 - cre6 = sio_data->sio_inb(sio_data, 0xe0); 589 + cre6 = sio_data->sio_inb(sio_data, 0xe6); 590 590 591 591 sio_data->sio_select(sio_data, NCT6775_LD_12); 592 592 cre0 = sio_data->sio_inb(sio_data, 0xe0);
+1
drivers/hwmon/nct6775.h
··· 98 98 u8 bank; /* current register bank */ 99 99 u8 in_num; /* number of in inputs we have */ 100 100 u8 in[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */ 101 + const u16 *scale_in; /* internal scaling factors */ 101 102 unsigned int rpm[NUM_FAN]; 102 103 u16 fan_min[NUM_FAN]; 103 104 u8 fan_pulses[NUM_FAN];
+1 -1
drivers/hwmon/nct7802.c
··· 725 725 if (index >= 38 && index < 46 && !(reg & 0x01)) /* PECI 0 */ 726 726 return 0; 727 727 728 - if (index >= 0x46 && (!(reg & 0x02))) /* PECI 1 */ 728 + if (index >= 46 && !(reg & 0x02)) /* PECI 1 */ 729 729 return 0; 730 730 731 731 return attr->mode;
+24 -14
drivers/hwmon/oxp-sensors.c
··· 220 220 } 221 221 222 222 /* Callbacks for turbo toggle attribute */ 223 + static umode_t tt_toggle_is_visible(struct kobject *kobj, 224 + struct attribute *attr, int n) 225 + { 226 + switch (board) { 227 + case aok_zoe_a1: 228 + case oxp_mini_amd_a07: 229 + case oxp_mini_amd_pro: 230 + return attr->mode; 231 + default: 232 + break; 233 + } 234 + return 0; 235 + } 236 + 223 237 static ssize_t tt_toggle_store(struct device *dev, 224 238 struct device_attribute *attr, const char *buf, 225 239 size_t count) ··· 410 396 NULL 411 397 }; 412 398 413 - ATTRIBUTE_GROUPS(oxp_ec); 399 + static struct attribute_group oxp_ec_attribute_group = { 400 + .is_visible = tt_toggle_is_visible, 401 + .attrs = oxp_ec_attrs, 402 + }; 403 + 404 + static const struct attribute_group *oxp_ec_groups[] = { 405 + &oxp_ec_attribute_group, 406 + NULL 407 + }; 414 408 415 409 static const struct hwmon_ops oxp_ec_hwmon_ops = { 416 410 .is_visible = oxp_ec_hwmon_is_visible, ··· 437 415 const struct dmi_system_id *dmi_entry; 438 416 struct device *dev = &pdev->dev; 439 417 struct device *hwdev; 440 - int ret; 441 418 442 419 /* 443 420 * Have to check for AMD processor here because DMI strings are the ··· 451 430 452 431 board = (enum oxp_board)(unsigned long)dmi_entry->driver_data; 453 432 454 - switch (board) { 455 - case aok_zoe_a1: 456 - case oxp_mini_amd_a07: 457 - case oxp_mini_amd_pro: 458 - ret = devm_device_add_groups(dev, oxp_ec_groups); 459 - if (ret) 460 - return ret; 461 - break; 462 - default: 463 - break; 464 - } 465 - 466 433 hwdev = devm_hwmon_device_register_with_info(dev, "oxpec", NULL, 467 434 &oxp_ec_chip_info, NULL); 468 435 ··· 460 451 static struct platform_driver oxp_platform_driver = { 461 452 .driver = { 462 453 .name = "oxp-platform", 454 + .dev_groups = oxp_ec_groups, 463 455 }, 464 456 .probe = oxp_platform_probe, 465 457 };
+11 -9
drivers/hwmon/pmbus/pmbus_core.c
··· 2745 2745 }, 2746 2746 }; 2747 2747 2748 - static int _pmbus_is_enabled(struct device *dev, u8 page) 2748 + static int _pmbus_is_enabled(struct i2c_client *client, u8 page) 2749 2749 { 2750 - struct i2c_client *client = to_i2c_client(dev->parent); 2751 2750 int ret; 2752 2751 2753 2752 ret = _pmbus_read_byte_data(client, page, PMBUS_OPERATION); ··· 2757 2758 return !!(ret & PB_OPERATION_CONTROL_ON); 2758 2759 } 2759 2760 2760 - static int __maybe_unused pmbus_is_enabled(struct device *dev, u8 page) 2761 + static int __maybe_unused pmbus_is_enabled(struct i2c_client *client, u8 page) 2761 2762 { 2762 - struct i2c_client *client = to_i2c_client(dev->parent); 2763 2763 struct pmbus_data *data = i2c_get_clientdata(client); 2764 2764 int ret; 2765 2765 2766 2766 mutex_lock(&data->update_lock); 2767 - ret = _pmbus_is_enabled(dev, page); 2767 + ret = _pmbus_is_enabled(client, page); 2768 2768 mutex_unlock(&data->update_lock); 2769 2769 2770 - return !!(ret & PB_OPERATION_CONTROL_ON); 2770 + return ret; 2771 2771 } 2772 2772 2773 2773 #define to_dev_attr(_dev_attr) \ ··· 2842 2844 if (status < 0) 2843 2845 return status; 2844 2846 2845 - if (_pmbus_is_enabled(dev, page)) { 2847 + if (_pmbus_is_enabled(client, page)) { 2846 2848 if (status & PB_STATUS_OFF) { 2847 2849 *flags |= REGULATOR_ERROR_FAIL; 2848 2850 *event |= REGULATOR_EVENT_FAIL; ··· 2896 2898 #if IS_ENABLED(CONFIG_REGULATOR) 2897 2899 static int pmbus_regulator_is_enabled(struct regulator_dev *rdev) 2898 2900 { 2899 - return pmbus_is_enabled(rdev_get_dev(rdev), rdev_get_id(rdev)); 2901 + struct device *dev = rdev_get_dev(rdev); 2902 + struct i2c_client *client = to_i2c_client(dev->parent); 2903 + 2904 + return pmbus_is_enabled(client, rdev_get_id(rdev)); 2900 2905 } 2901 2906 2902 2907 static int _pmbus_regulator_on_off(struct regulator_dev *rdev, bool enable) ··· 2946 2945 struct pmbus_data *data = i2c_get_clientdata(client); 2947 2946 u8 page = rdev_get_id(rdev); 2948 2947 int status, ret; 2948 + int event; 2949 2949 2950 2950 mutex_lock(&data->update_lock); 2951 2951 status = pmbus_get_status(client, page, PMBUS_STATUS_WORD); ··· 2966 2964 goto unlock; 2967 2965 } 2968 2966 2969 - ret = pmbus_regulator_get_error_flags(rdev, &status); 2967 + ret = _pmbus_get_flags(data, rdev_get_id(rdev), &status, &event, false); 2970 2968 if (ret) 2971 2969 goto unlock; 2972 2970
+2
drivers/infiniband/core/cma.c
··· 4062 4062 RDMA_CM_ADDR_QUERY))) 4063 4063 return -EINVAL; 4064 4064 4065 + } else { 4066 + memcpy(cma_dst_addr(id_priv), dst_addr, rdma_addr_size(dst_addr)); 4065 4067 } 4066 4068 4067 4069 if (cma_family(id_priv) != dst_addr->sa_family) {
+12
drivers/infiniband/hw/bnxt_re/ib_verbs.c
··· 869 869 int bnxt_re_destroy_qp(struct ib_qp *ib_qp, struct ib_udata *udata) 870 870 { 871 871 struct bnxt_re_qp *qp = container_of(ib_qp, struct bnxt_re_qp, ib_qp); 872 + struct bnxt_qplib_qp *qplib_qp = &qp->qplib_qp; 872 873 struct bnxt_re_dev *rdev = qp->rdev; 874 + struct bnxt_qplib_nq *scq_nq = NULL; 875 + struct bnxt_qplib_nq *rcq_nq = NULL; 873 876 unsigned int flags; 874 877 int rc; 875 878 ··· 905 902 906 903 ib_umem_release(qp->rumem); 907 904 ib_umem_release(qp->sumem); 905 + 906 + /* Flush all the entries of notification queue associated with 907 + * given qp. 908 + */ 909 + scq_nq = qplib_qp->scq->nq; 910 + rcq_nq = qplib_qp->rcq->nq; 911 + bnxt_re_synchronize_nq(scq_nq); 912 + if (scq_nq != rcq_nq) 913 + bnxt_re_synchronize_nq(rcq_nq); 908 914 909 915 return 0; 910 916 }
+23 -5
drivers/infiniband/hw/bnxt_re/qplib_fp.c
··· 381 381 spin_unlock_bh(&hwq->lock); 382 382 } 383 383 384 + /* bnxt_re_synchronize_nq - self polling notification queue. 385 + * @nq - notification queue pointer 386 + * 387 + * This function will start polling entries of a given notification queue 388 + * for all pending entries. 389 + * This function is useful to synchronize notification entries while resources 390 + * are going away. 391 + */ 392 + 393 + void bnxt_re_synchronize_nq(struct bnxt_qplib_nq *nq) 394 + { 395 + int budget = nq->budget; 396 + 397 + nq->budget = nq->hwq.max_elements; 398 + bnxt_qplib_service_nq(&nq->nq_tasklet); 399 + nq->budget = budget; 400 + } 401 + 384 402 static irqreturn_t bnxt_qplib_nq_irq(int irq, void *dev_instance) 385 403 { 386 404 struct bnxt_qplib_nq *nq = dev_instance; ··· 420 402 if (!nq->requested) 421 403 return; 422 404 423 - tasklet_disable(&nq->nq_tasklet); 405 + nq->requested = false; 424 406 /* Mask h/w interrupt */ 425 407 bnxt_qplib_ring_nq_db(&nq->nq_db.dbinfo, nq->res->cctx, false); 426 408 /* Sync with last running IRQ handler */ 427 409 synchronize_irq(nq->msix_vec); 428 - if (kill) 429 - tasklet_kill(&nq->nq_tasklet); 430 - 431 410 irq_set_affinity_hint(nq->msix_vec, NULL); 432 411 free_irq(nq->msix_vec, nq); 433 412 kfree(nq->name); 434 413 nq->name = NULL; 435 - nq->requested = false; 414 + 415 + if (kill) 416 + tasklet_kill(&nq->nq_tasklet); 417 + tasklet_disable(&nq->nq_tasklet); 436 418 } 437 419 438 420 void bnxt_qplib_disable_nq(struct bnxt_qplib_nq *nq)
+1
drivers/infiniband/hw/bnxt_re/qplib_fp.h
··· 553 553 struct bnxt_qplib_cqe *cqe, 554 554 int num_cqes); 555 555 void bnxt_qplib_flush_cqn_wq(struct bnxt_qplib_qp *qp); 556 + void bnxt_re_synchronize_nq(struct bnxt_qplib_nq *nq); 556 557 557 558 static inline void *bnxt_qplib_get_swqe(struct bnxt_qplib_q *que, u32 *swq_idx) 558 559 {
+4 -5
drivers/infiniband/hw/bnxt_re/qplib_rcfw.c
··· 989 989 if (!creq->requested) 990 990 return; 991 991 992 - tasklet_disable(&creq->creq_tasklet); 992 + creq->requested = false; 993 993 /* Mask h/w interrupts */ 994 994 bnxt_qplib_ring_nq_db(&creq->creq_db.dbinfo, rcfw->res->cctx, false); 995 995 /* Sync with last running IRQ-handler */ 996 996 synchronize_irq(creq->msix_vec); 997 - if (kill) 998 - tasklet_kill(&creq->creq_tasklet); 999 - 1000 997 free_irq(creq->msix_vec, rcfw); 1001 998 kfree(creq->irq_name); 1002 999 creq->irq_name = NULL; 1003 - creq->requested = false; 1004 1000 atomic_set(&rcfw->rcfw_intr_enabled, 0); 1001 + if (kill) 1002 + tasklet_kill(&creq->creq_tasklet); 1003 + tasklet_disable(&creq->creq_tasklet); 1005 1004 } 1006 1005 1007 1006 void bnxt_qplib_disable_rcfw_channel(struct bnxt_qplib_rcfw *rcfw)
+19 -12
drivers/infiniband/hw/irdma/ctrl.c
··· 2712 2712 */ 2713 2713 void irdma_check_cqp_progress(struct irdma_cqp_timeout *timeout, struct irdma_sc_dev *dev) 2714 2714 { 2715 - if (timeout->compl_cqp_cmds != dev->cqp_cmd_stats[IRDMA_OP_CMPL_CMDS]) { 2716 - timeout->compl_cqp_cmds = dev->cqp_cmd_stats[IRDMA_OP_CMPL_CMDS]; 2715 + u64 completed_ops = atomic64_read(&dev->cqp->completed_ops); 2716 + 2717 + if (timeout->compl_cqp_cmds != completed_ops) { 2718 + timeout->compl_cqp_cmds = completed_ops; 2717 2719 timeout->count = 0; 2718 - } else { 2719 - if (dev->cqp_cmd_stats[IRDMA_OP_REQ_CMDS] != 2720 - timeout->compl_cqp_cmds) 2721 - timeout->count++; 2720 + } else if (timeout->compl_cqp_cmds != dev->cqp->requested_ops) { 2721 + timeout->count++; 2722 2722 } 2723 2723 } 2724 2724 ··· 2761 2761 if (newtail != tail) { 2762 2762 /* SUCCESS */ 2763 2763 IRDMA_RING_MOVE_TAIL(cqp->sq_ring); 2764 - cqp->dev->cqp_cmd_stats[IRDMA_OP_CMPL_CMDS]++; 2764 + atomic64_inc(&cqp->completed_ops); 2765 2765 return 0; 2766 2766 } 2767 2767 udelay(cqp->dev->hw_attrs.max_sleep_count); ··· 3121 3121 info->dev->cqp = cqp; 3122 3122 3123 3123 IRDMA_RING_INIT(cqp->sq_ring, cqp->sq_size); 3124 - cqp->dev->cqp_cmd_stats[IRDMA_OP_REQ_CMDS] = 0; 3125 - cqp->dev->cqp_cmd_stats[IRDMA_OP_CMPL_CMDS] = 0; 3124 + cqp->requested_ops = 0; 3125 + atomic64_set(&cqp->completed_ops, 0); 3126 3126 /* for the cqp commands backlog. */ 3127 3127 INIT_LIST_HEAD(&cqp->dev->cqp_cmd_head); 3128 3128 ··· 3274 3274 if (ret_code) 3275 3275 return NULL; 3276 3276 3277 - cqp->dev->cqp_cmd_stats[IRDMA_OP_REQ_CMDS]++; 3277 + cqp->requested_ops++; 3278 3278 if (!*wqe_idx) 3279 3279 cqp->polarity = !cqp->polarity; 3280 3280 wqe = cqp->sq_base[*wqe_idx].elem; ··· 3363 3363 if (polarity != ccq->cq_uk.polarity) 3364 3364 return -ENOENT; 3365 3365 3366 + /* Ensure CEQE contents are read after valid bit is checked */ 3367 + dma_rmb(); 3368 + 3366 3369 get_64bit_val(cqe, 8, &qp_ctx); 3367 3370 cqp = (struct irdma_sc_cqp *)(unsigned long)qp_ctx; 3368 3371 info->error = (bool)FIELD_GET(IRDMA_CQ_ERROR, temp); ··· 3400 3397 dma_wmb(); /* make sure shadow area is updated before moving tail */ 3401 3398 3402 3399 IRDMA_RING_MOVE_TAIL(cqp->sq_ring); 3403 - ccq->dev->cqp_cmd_stats[IRDMA_OP_CMPL_CMDS]++; 3400 + atomic64_inc(&cqp->completed_ops); 3404 3401 3405 3402 return ret_code; 3406 3403 } ··· 4012 4009 u8 polarity; 4013 4010 4014 4011 aeqe = IRDMA_GET_CURRENT_AEQ_ELEM(aeq); 4015 - get_64bit_val(aeqe, 0, &compl_ctx); 4016 4012 get_64bit_val(aeqe, 8, &temp); 4017 4013 polarity = (u8)FIELD_GET(IRDMA_AEQE_VALID, temp); 4018 4014 4019 4015 if (aeq->polarity != polarity) 4020 4016 return -ENOENT; 4017 + 4018 + /* Ensure AEQE contents are read after valid bit is checked */ 4019 + dma_rmb(); 4020 + 4021 + get_64bit_val(aeqe, 0, &compl_ctx); 4021 4022 4022 4023 print_hex_dump_debug("WQE: AEQ_ENTRY WQE", DUMP_PREFIX_OFFSET, 16, 8, 4023 4024 aeqe, 16, false);
+22 -24
drivers/infiniband/hw/irdma/defs.h
··· 191 191 IRDMA_OP_MANAGE_VF_PBLE_BP = 25, 192 192 IRDMA_OP_QUERY_FPM_VAL = 26, 193 193 IRDMA_OP_COMMIT_FPM_VAL = 27, 194 - IRDMA_OP_REQ_CMDS = 28, 195 - IRDMA_OP_CMPL_CMDS = 29, 196 - IRDMA_OP_AH_CREATE = 30, 197 - IRDMA_OP_AH_MODIFY = 31, 198 - IRDMA_OP_AH_DESTROY = 32, 199 - IRDMA_OP_MC_CREATE = 33, 200 - IRDMA_OP_MC_DESTROY = 34, 201 - IRDMA_OP_MC_MODIFY = 35, 202 - IRDMA_OP_STATS_ALLOCATE = 36, 203 - IRDMA_OP_STATS_FREE = 37, 204 - IRDMA_OP_STATS_GATHER = 38, 205 - IRDMA_OP_WS_ADD_NODE = 39, 206 - IRDMA_OP_WS_MODIFY_NODE = 40, 207 - IRDMA_OP_WS_DELETE_NODE = 41, 208 - IRDMA_OP_WS_FAILOVER_START = 42, 209 - IRDMA_OP_WS_FAILOVER_COMPLETE = 43, 210 - IRDMA_OP_SET_UP_MAP = 44, 211 - IRDMA_OP_GEN_AE = 45, 212 - IRDMA_OP_QUERY_RDMA_FEATURES = 46, 213 - IRDMA_OP_ALLOC_LOCAL_MAC_ENTRY = 47, 214 - IRDMA_OP_ADD_LOCAL_MAC_ENTRY = 48, 215 - IRDMA_OP_DELETE_LOCAL_MAC_ENTRY = 49, 216 - IRDMA_OP_CQ_MODIFY = 50, 194 + IRDMA_OP_AH_CREATE = 28, 195 + IRDMA_OP_AH_MODIFY = 29, 196 + IRDMA_OP_AH_DESTROY = 30, 197 + IRDMA_OP_MC_CREATE = 31, 198 + IRDMA_OP_MC_DESTROY = 32, 199 + IRDMA_OP_MC_MODIFY = 33, 200 + IRDMA_OP_STATS_ALLOCATE = 34, 201 + IRDMA_OP_STATS_FREE = 35, 202 + IRDMA_OP_STATS_GATHER = 36, 203 + IRDMA_OP_WS_ADD_NODE = 37, 204 + IRDMA_OP_WS_MODIFY_NODE = 38, 205 + IRDMA_OP_WS_DELETE_NODE = 39, 206 + IRDMA_OP_WS_FAILOVER_START = 40, 207 + IRDMA_OP_WS_FAILOVER_COMPLETE = 41, 208 + IRDMA_OP_SET_UP_MAP = 42, 209 + IRDMA_OP_GEN_AE = 43, 210 + IRDMA_OP_QUERY_RDMA_FEATURES = 44, 211 + IRDMA_OP_ALLOC_LOCAL_MAC_ENTRY = 45, 212 + IRDMA_OP_ADD_LOCAL_MAC_ENTRY = 46, 213 + IRDMA_OP_DELETE_LOCAL_MAC_ENTRY = 47, 214 + IRDMA_OP_CQ_MODIFY = 48, 217 215 218 216 /* Must be last entry*/ 219 - IRDMA_MAX_CQP_OPS = 51, 217 + IRDMA_MAX_CQP_OPS = 49, 220 218 }; 221 219 222 220 /* CQP SQ WQES */
+2 -1
drivers/infiniband/hw/irdma/hw.c
··· 191 191 case IRDMA_AE_AMP_MWBIND_INVALID_RIGHTS: 192 192 case IRDMA_AE_AMP_MWBIND_BIND_DISABLED: 193 193 case IRDMA_AE_AMP_MWBIND_INVALID_BOUNDS: 194 + case IRDMA_AE_AMP_MWBIND_VALID_STAG: 194 195 qp->flush_code = FLUSH_MW_BIND_ERR; 195 196 qp->event_type = IRDMA_QP_EVENT_ACCESS_ERR; 196 197 break; ··· 2076 2075 cqp_request->compl_info.error = info.error; 2077 2076 2078 2077 if (cqp_request->waiting) { 2079 - cqp_request->request_done = true; 2078 + WRITE_ONCE(cqp_request->request_done, true); 2080 2079 wake_up(&cqp_request->waitq); 2081 2080 irdma_put_cqp_request(&rf->cqp, cqp_request); 2082 2081 } else {
+1 -1
drivers/infiniband/hw/irdma/main.h
··· 161 161 void (*callback_fcn)(struct irdma_cqp_request *cqp_request); 162 162 void *param; 163 163 struct irdma_cqp_compl_info compl_info; 164 + bool request_done; /* READ/WRITE_ONCE macros operate on it */ 164 165 bool waiting:1; 165 - bool request_done:1; 166 166 bool dynamic:1; 167 167 }; 168 168
+6
drivers/infiniband/hw/irdma/puda.c
··· 230 230 if (valid_bit != cq_uk->polarity) 231 231 return -ENOENT; 232 232 233 + /* Ensure CQE contents are read after valid bit is checked */ 234 + dma_rmb(); 235 + 233 236 if (cq->dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) 234 237 ext_valid = (bool)FIELD_GET(IRDMA_CQ_EXTCQE, qword3); 235 238 ··· 245 242 polarity ^= 1; 246 243 if (polarity != cq_uk->polarity) 247 244 return -ENOENT; 245 + 246 + /* Ensure ext CQE contents are read after ext valid bit is checked */ 247 + dma_rmb(); 248 248 249 249 IRDMA_RING_MOVE_HEAD_NOCHECK(cq_uk->cq_ring); 250 250 if (!IRDMA_RING_CURRENT_HEAD(cq_uk->cq_ring))
+2
drivers/infiniband/hw/irdma/type.h
··· 365 365 struct irdma_dcqcn_cc_params dcqcn_params; 366 366 __le64 *host_ctx; 367 367 u64 *scratch_array; 368 + u64 requested_ops; 369 + atomic64_t completed_ops; 368 370 u32 cqp_id; 369 371 u32 sq_size; 370 372 u32 hw_sq_size;
+4 -1
drivers/infiniband/hw/irdma/uk.c
··· 1161 1161 } 1162 1162 wqe_idx = (u32)FIELD_GET(IRDMA_CQ_WQEIDX, qword3); 1163 1163 info->qp_handle = (irdma_qp_handle)(unsigned long)qp; 1164 - info->op_type = (u8)FIELD_GET(IRDMA_CQ_SQ, qword3); 1164 + info->op_type = (u8)FIELD_GET(IRDMACQ_OP, qword3); 1165 1165 1166 1166 if (info->q_type == IRDMA_CQE_QTYPE_RQ) { 1167 1167 u32 array_idx; ··· 1526 1526 1527 1527 if (polarity != temp) 1528 1528 break; 1529 + 1530 + /* Ensure CQE contents are read after valid bit is checked */ 1531 + dma_rmb(); 1529 1532 1530 1533 get_64bit_val(cqe, 8, &comp_ctx); 1531 1534 if ((void *)(unsigned long)comp_ctx == q)
+4 -4
drivers/infiniband/hw/irdma/utils.c
··· 481 481 if (cqp_request->dynamic) { 482 482 kfree(cqp_request); 483 483 } else { 484 - cqp_request->request_done = false; 484 + WRITE_ONCE(cqp_request->request_done, false); 485 485 cqp_request->callback_fcn = NULL; 486 486 cqp_request->waiting = false; 487 487 ··· 515 515 { 516 516 if (cqp_request->waiting) { 517 517 cqp_request->compl_info.error = true; 518 - cqp_request->request_done = true; 518 + WRITE_ONCE(cqp_request->request_done, true); 519 519 wake_up(&cqp_request->waitq); 520 520 } 521 521 wait_event_timeout(cqp->remove_wq, ··· 567 567 bool cqp_error = false; 568 568 int err_code = 0; 569 569 570 - cqp_timeout.compl_cqp_cmds = rf->sc_dev.cqp_cmd_stats[IRDMA_OP_CMPL_CMDS]; 570 + cqp_timeout.compl_cqp_cmds = atomic64_read(&rf->sc_dev.cqp->completed_ops); 571 571 do { 572 572 irdma_cqp_ce_handler(rf, &rf->ccq.sc_cq); 573 573 if (wait_event_timeout(cqp_request->waitq, 574 - cqp_request->request_done, 574 + READ_ONCE(cqp_request->request_done), 575 575 msecs_to_jiffies(CQP_COMPL_WAIT_TIME_MS))) 576 576 break; 577 577
+9 -9
drivers/infiniband/hw/mlx4/qp.c
··· 565 565 return (-EOPNOTSUPP); 566 566 } 567 567 568 - if (ucmd->rx_hash_fields_mask & ~(MLX4_IB_RX_HASH_SRC_IPV4 | 569 - MLX4_IB_RX_HASH_DST_IPV4 | 570 - MLX4_IB_RX_HASH_SRC_IPV6 | 571 - MLX4_IB_RX_HASH_DST_IPV6 | 572 - MLX4_IB_RX_HASH_SRC_PORT_TCP | 573 - MLX4_IB_RX_HASH_DST_PORT_TCP | 574 - MLX4_IB_RX_HASH_SRC_PORT_UDP | 575 - MLX4_IB_RX_HASH_DST_PORT_UDP | 576 - MLX4_IB_RX_HASH_INNER)) { 568 + if (ucmd->rx_hash_fields_mask & ~(u64)(MLX4_IB_RX_HASH_SRC_IPV4 | 569 + MLX4_IB_RX_HASH_DST_IPV4 | 570 + MLX4_IB_RX_HASH_SRC_IPV6 | 571 + MLX4_IB_RX_HASH_DST_IPV6 | 572 + MLX4_IB_RX_HASH_SRC_PORT_TCP | 573 + MLX4_IB_RX_HASH_DST_PORT_TCP | 574 + MLX4_IB_RX_HASH_SRC_PORT_UDP | 575 + MLX4_IB_RX_HASH_DST_PORT_UDP | 576 + MLX4_IB_RX_HASH_INNER)) { 577 577 pr_debug("RX Hash fields_mask has unsupported mask (0x%llx)\n", 578 578 ucmd->rx_hash_fields_mask); 579 579 return (-EOPNOTSUPP);
+1 -1
drivers/infiniband/hw/mthca/mthca_qp.c
··· 1393 1393 if (mthca_array_get(&dev->qp_table.qp, mqpn)) 1394 1394 err = -EBUSY; 1395 1395 else 1396 - mthca_array_set(&dev->qp_table.qp, mqpn, qp->sqp); 1396 + mthca_array_set(&dev->qp_table.qp, mqpn, qp); 1397 1397 spin_unlock_irq(&dev->qp_table.lock); 1398 1398 1399 1399 if (err)
+2 -1
drivers/infiniband/sw/rxe/rxe_mw.c
··· 199 199 200 200 if (access & ~RXE_ACCESS_SUPPORTED_MW) { 201 201 rxe_err_mw(mw, "access %#x not supported", access); 202 - return -EOPNOTSUPP; 202 + ret = -EOPNOTSUPP; 203 + goto err_drop_mr; 203 204 } 204 205 205 206 spin_lock_bh(&mw->lock);
+3 -9
drivers/iommu/iommufd/device.c
··· 109 109 */ 110 110 void iommufd_device_unbind(struct iommufd_device *idev) 111 111 { 112 - bool was_destroyed; 113 - 114 - was_destroyed = iommufd_object_destroy_user(idev->ictx, &idev->obj); 115 - WARN_ON(!was_destroyed); 112 + iommufd_object_destroy_user(idev->ictx, &idev->obj); 116 113 } 117 114 EXPORT_SYMBOL_NS_GPL(iommufd_device_unbind, IOMMUFD); 118 115 ··· 379 382 mutex_unlock(&hwpt->devices_lock); 380 383 381 384 if (hwpt->auto_domain) 382 - iommufd_object_destroy_user(idev->ictx, &hwpt->obj); 385 + iommufd_object_deref_user(idev->ictx, &hwpt->obj); 383 386 else 384 387 refcount_dec(&hwpt->obj.users); 385 388 ··· 453 456 */ 454 457 void iommufd_access_destroy(struct iommufd_access *access) 455 458 { 456 - bool was_destroyed; 457 - 458 - was_destroyed = iommufd_object_destroy_user(access->ictx, &access->obj); 459 - WARN_ON(!was_destroyed); 459 + iommufd_object_destroy_user(access->ictx, &access->obj); 460 460 } 461 461 EXPORT_SYMBOL_NS_GPL(iommufd_access_destroy, IOMMUFD); 462 462
+13 -2
drivers/iommu/iommufd/iommufd_private.h
··· 176 176 struct iommufd_object *obj); 177 177 void iommufd_object_finalize(struct iommufd_ctx *ictx, 178 178 struct iommufd_object *obj); 179 - bool iommufd_object_destroy_user(struct iommufd_ctx *ictx, 180 - struct iommufd_object *obj); 179 + void __iommufd_object_destroy_user(struct iommufd_ctx *ictx, 180 + struct iommufd_object *obj, bool allow_fail); 181 + static inline void iommufd_object_destroy_user(struct iommufd_ctx *ictx, 182 + struct iommufd_object *obj) 183 + { 184 + __iommufd_object_destroy_user(ictx, obj, false); 185 + } 186 + static inline void iommufd_object_deref_user(struct iommufd_ctx *ictx, 187 + struct iommufd_object *obj) 188 + { 189 + __iommufd_object_destroy_user(ictx, obj, true); 190 + } 191 + 181 192 struct iommufd_object *_iommufd_object_alloc(struct iommufd_ctx *ictx, 182 193 size_t size, 183 194 enum iommufd_object_type type);
+59 -19
drivers/iommu/iommufd/main.c
··· 117 117 } 118 118 119 119 /* 120 + * Remove the given object id from the xarray if the only reference to the 121 + * object is held by the xarray. The caller must call ops destroy(). 122 + */ 123 + static struct iommufd_object *iommufd_object_remove(struct iommufd_ctx *ictx, 124 + u32 id, bool extra_put) 125 + { 126 + struct iommufd_object *obj; 127 + XA_STATE(xas, &ictx->objects, id); 128 + 129 + xa_lock(&ictx->objects); 130 + obj = xas_load(&xas); 131 + if (xa_is_zero(obj) || !obj) { 132 + obj = ERR_PTR(-ENOENT); 133 + goto out_xa; 134 + } 135 + 136 + /* 137 + * If the caller is holding a ref on obj we put it here under the 138 + * spinlock. 139 + */ 140 + if (extra_put) 141 + refcount_dec(&obj->users); 142 + 143 + if (!refcount_dec_if_one(&obj->users)) { 144 + obj = ERR_PTR(-EBUSY); 145 + goto out_xa; 146 + } 147 + 148 + xas_store(&xas, NULL); 149 + if (ictx->vfio_ioas == container_of(obj, struct iommufd_ioas, obj)) 150 + ictx->vfio_ioas = NULL; 151 + 152 + out_xa: 153 + xa_unlock(&ictx->objects); 154 + 155 + /* The returned object reference count is zero */ 156 + return obj; 157 + } 158 + 159 + /* 120 160 * The caller holds a users refcount and wants to destroy the object. Returns 121 161 * true if the object was destroyed. In all cases the caller no longer has a 122 162 * reference on obj. 123 163 */ 124 - bool iommufd_object_destroy_user(struct iommufd_ctx *ictx, 125 - struct iommufd_object *obj) 164 + void __iommufd_object_destroy_user(struct iommufd_ctx *ictx, 165 + struct iommufd_object *obj, bool allow_fail) 126 166 { 167 + struct iommufd_object *ret; 168 + 127 169 /* 128 170 * The purpose of the destroy_rwsem is to ensure deterministic 129 171 * destruction of objects used by external drivers and destroyed by this ··· 173 131 * side of this, such as during ioctl execution. 174 132 */ 175 133 down_write(&obj->destroy_rwsem); 176 - xa_lock(&ictx->objects); 177 - refcount_dec(&obj->users); 178 - if (!refcount_dec_if_one(&obj->users)) { 179 - xa_unlock(&ictx->objects); 180 - up_write(&obj->destroy_rwsem); 181 - return false; 182 - } 183 - __xa_erase(&ictx->objects, obj->id); 184 - if (ictx->vfio_ioas && &ictx->vfio_ioas->obj == obj) 185 - ictx->vfio_ioas = NULL; 186 - xa_unlock(&ictx->objects); 134 + ret = iommufd_object_remove(ictx, obj->id, true); 187 135 up_write(&obj->destroy_rwsem); 136 + 137 + if (allow_fail && IS_ERR(ret)) 138 + return; 139 + 140 + /* 141 + * If there is a bug and we couldn't destroy the object then we did put 142 + * back the caller's refcount and will eventually try to free it again 143 + * during close. 144 + */ 145 + if (WARN_ON(IS_ERR(ret))) 146 + return; 188 147 189 148 iommufd_object_ops[obj->type].destroy(obj); 190 149 kfree(obj); 191 - return true; 192 150 } 193 151 194 152 static int iommufd_destroy(struct iommufd_ucmd *ucmd) ··· 196 154 struct iommu_destroy *cmd = ucmd->cmd; 197 155 struct iommufd_object *obj; 198 156 199 - obj = iommufd_get_object(ucmd->ictx, cmd->id, IOMMUFD_OBJ_ANY); 157 + obj = iommufd_object_remove(ucmd->ictx, cmd->id, false); 200 158 if (IS_ERR(obj)) 201 159 return PTR_ERR(obj); 202 - iommufd_ref_to_users(obj); 203 - /* See iommufd_ref_to_users() */ 204 - if (!iommufd_object_destroy_user(ucmd->ictx, obj)) 205 - return -EBUSY; 160 + iommufd_object_ops[obj->type].destroy(obj); 161 + kfree(obj); 206 162 return 0; 207 163 } 208 164
+1 -1
drivers/iommu/iommufd/pages.c
··· 297 297 batch->pfns[0] = batch->pfns[batch->end - 1] + 298 298 (batch->npfns[batch->end - 1] - keep_pfns); 299 299 batch->npfns[0] = keep_pfns; 300 - batch->end = 0; 300 + batch->end = 1; 301 301 } 302 302 303 303 static void batch_skip_carry(struct pfn_batch *batch, unsigned int skip_pfns)
+5 -9
drivers/irqchip/irq-bcm6345-l1.c
··· 82 82 }; 83 83 84 84 struct bcm6345_l1_cpu { 85 + struct bcm6345_l1_chip *intc; 85 86 void __iomem *map_base; 86 87 unsigned int parent_irq; 87 88 u32 enable_cache[]; ··· 116 115 117 116 static void bcm6345_l1_irq_handle(struct irq_desc *desc) 118 117 { 119 - struct bcm6345_l1_chip *intc = irq_desc_get_handler_data(desc); 120 - struct bcm6345_l1_cpu *cpu; 118 + struct bcm6345_l1_cpu *cpu = irq_desc_get_handler_data(desc); 119 + struct bcm6345_l1_chip *intc = cpu->intc; 121 120 struct irq_chip *chip = irq_desc_get_chip(desc); 122 121 unsigned int idx; 123 - 124 - #ifdef CONFIG_SMP 125 - cpu = intc->cpus[cpu_logical_map(smp_processor_id())]; 126 - #else 127 - cpu = intc->cpus[0]; 128 - #endif 129 122 130 123 chained_irq_enter(chip, desc); 131 124 ··· 248 253 if (!cpu) 249 254 return -ENOMEM; 250 255 256 + cpu->intc = intc; 251 257 cpu->map_base = ioremap(res.start, sz); 252 258 if (!cpu->map_base) 253 259 return -ENOMEM; ··· 267 271 return -EINVAL; 268 272 } 269 273 irq_set_chained_handler_and_data(cpu->parent_irq, 270 - bcm6345_l1_irq_handle, intc); 274 + bcm6345_l1_irq_handle, cpu); 271 275 272 276 return 0; 273 277 }
+48 -30
drivers/irqchip/irq-gic-v3-its.c
··· 273 273 raw_spin_unlock_irqrestore(&vpe->vpe_lock, flags); 274 274 } 275 275 276 + static struct irq_chip its_vpe_irq_chip; 277 + 276 278 static int irq_to_cpuid_lock(struct irq_data *d, unsigned long *flags) 277 279 { 278 - struct its_vlpi_map *map = get_vlpi_map(d); 280 + struct its_vpe *vpe = NULL; 279 281 int cpu; 280 282 281 - if (map) { 282 - cpu = vpe_to_cpuid_lock(map->vpe, flags); 283 + if (d->chip == &its_vpe_irq_chip) { 284 + vpe = irq_data_get_irq_chip_data(d); 285 + } else { 286 + struct its_vlpi_map *map = get_vlpi_map(d); 287 + if (map) 288 + vpe = map->vpe; 289 + } 290 + 291 + if (vpe) { 292 + cpu = vpe_to_cpuid_lock(vpe, flags); 283 293 } else { 284 294 /* Physical LPIs are already locked via the irq_desc lock */ 285 295 struct its_device *its_dev = irq_data_get_irq_chip_data(d); ··· 303 293 304 294 static void irq_to_cpuid_unlock(struct irq_data *d, unsigned long flags) 305 295 { 306 - struct its_vlpi_map *map = get_vlpi_map(d); 296 + struct its_vpe *vpe = NULL; 307 297 308 - if (map) 309 - vpe_to_cpuid_unlock(map->vpe, flags); 298 + if (d->chip == &its_vpe_irq_chip) { 299 + vpe = irq_data_get_irq_chip_data(d); 300 + } else { 301 + struct its_vlpi_map *map = get_vlpi_map(d); 302 + if (map) 303 + vpe = map->vpe; 304 + } 305 + 306 + if (vpe) 307 + vpe_to_cpuid_unlock(vpe, flags); 310 308 } 311 309 312 310 static struct its_collection *valid_col(struct its_collection *col) ··· 1451 1433 cpu_relax(); 1452 1434 } 1453 1435 1436 + static void __direct_lpi_inv(struct irq_data *d, u64 val) 1437 + { 1438 + void __iomem *rdbase; 1439 + unsigned long flags; 1440 + int cpu; 1441 + 1442 + /* Target the redistributor this LPI is currently routed to */ 1443 + cpu = irq_to_cpuid_lock(d, &flags); 1444 + raw_spin_lock(&gic_data_rdist_cpu(cpu)->rd_lock); 1445 + 1446 + rdbase = per_cpu_ptr(gic_rdists->rdist, cpu)->rd_base; 1447 + gic_write_lpir(val, rdbase + GICR_INVLPIR); 1448 + wait_for_syncr(rdbase); 1449 + 1450 + raw_spin_unlock(&gic_data_rdist_cpu(cpu)->rd_lock); 1451 + irq_to_cpuid_unlock(d, flags); 1452 + } 1453 + 1454 1454 static void direct_lpi_inv(struct irq_data *d) 1455 1455 { 1456 1456 struct its_vlpi_map *map = get_vlpi_map(d); 1457 - void __iomem *rdbase; 1458 - unsigned long flags; 1459 1457 u64 val; 1460 - int cpu; 1461 1458 1462 1459 if (map) { 1463 1460 struct its_device *its_dev = irq_data_get_irq_chip_data(d); ··· 1486 1453 val = d->hwirq; 1487 1454 } 1488 1455 1489 - /* Target the redistributor this LPI is currently routed to */ 1490 - cpu = irq_to_cpuid_lock(d, &flags); 1491 - raw_spin_lock(&gic_data_rdist_cpu(cpu)->rd_lock); 1492 - rdbase = per_cpu_ptr(gic_rdists->rdist, cpu)->rd_base; 1493 - gic_write_lpir(val, rdbase + GICR_INVLPIR); 1494 - 1495 - wait_for_syncr(rdbase); 1496 - raw_spin_unlock(&gic_data_rdist_cpu(cpu)->rd_lock); 1497 - irq_to_cpuid_unlock(d, flags); 1456 + __direct_lpi_inv(d, val); 1498 1457 } 1499 1458 1500 1459 static void lpi_update_config(struct irq_data *d, u8 clr, u8 set) ··· 3978 3953 { 3979 3954 struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 3980 3955 3981 - if (gic_rdists->has_direct_lpi) { 3982 - void __iomem *rdbase; 3983 - 3984 - /* Target the redistributor this VPE is currently known on */ 3985 - raw_spin_lock(&gic_data_rdist_cpu(vpe->col_idx)->rd_lock); 3986 - rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 3987 - gic_write_lpir(d->parent_data->hwirq, rdbase + GICR_INVLPIR); 3988 - wait_for_syncr(rdbase); 3989 - raw_spin_unlock(&gic_data_rdist_cpu(vpe->col_idx)->rd_lock); 3990 - } else { 3956 + if (gic_rdists->has_direct_lpi) 3957 + __direct_lpi_inv(d, d->parent_data->hwirq); 3958 + else 3991 3959 its_vpe_send_cmd(vpe, its_send_inv); 3992 - } 3993 3960 } 3994 3961 3995 3962 static void its_vpe_mask_irq(struct irq_data *d) ··· 4744 4727 { 4745 4728 struct its_node *its = data; 4746 4729 4747 - if (!of_machine_is_compatible("rockchip,rk3588")) 4730 + if (!of_machine_is_compatible("rockchip,rk3588") && 4731 + !of_machine_is_compatible("rockchip,rk3588s")) 4748 4732 return false; 4749 4733 4750 4734 its->flags |= ITS_FLAGS_FORCE_NON_SHAREABLE;
+61 -1
drivers/irqchip/irq-gic-v3.c
··· 69 69 static void __iomem *t241_dist_base_alias[T241_CHIPS_MAX] __read_mostly; 70 70 static DEFINE_STATIC_KEY_FALSE(gic_nvidia_t241_erratum); 71 71 72 + static DEFINE_STATIC_KEY_FALSE(gic_arm64_2941627_erratum); 73 + 72 74 static struct gic_chip_data gic_data __read_mostly; 73 75 static DEFINE_STATIC_KEY_TRUE(supports_deactivate_key); 74 76 ··· 594 592 gic_irq_set_prio(d, GICD_INT_DEF_PRI); 595 593 } 596 594 595 + static bool gic_arm64_erratum_2941627_needed(struct irq_data *d) 596 + { 597 + enum gic_intid_range range; 598 + 599 + if (!static_branch_unlikely(&gic_arm64_2941627_erratum)) 600 + return false; 601 + 602 + range = get_intid_range(d); 603 + 604 + /* 605 + * The workaround is needed if the IRQ is an SPI and 606 + * the target cpu is different from the one we are 607 + * executing on. 608 + */ 609 + return (range == SPI_RANGE || range == ESPI_RANGE) && 610 + !cpumask_test_cpu(raw_smp_processor_id(), 611 + irq_data_get_effective_affinity_mask(d)); 612 + } 613 + 597 614 static void gic_eoi_irq(struct irq_data *d) 598 615 { 599 616 write_gicreg(gic_irq(d), ICC_EOIR1_EL1); 600 617 isb(); 618 + 619 + if (gic_arm64_erratum_2941627_needed(d)) { 620 + /* 621 + * Make sure the GIC stream deactivate packet 622 + * issued by ICC_EOIR1_EL1 has completed before 623 + * deactivating through GICD_IACTIVER. 624 + */ 625 + dsb(sy); 626 + gic_poke_irq(d, GICD_ICACTIVER); 627 + } 601 628 } 602 629 603 630 static void gic_eoimode1_eoi_irq(struct irq_data *d) ··· 637 606 */ 638 607 if (gic_irq(d) >= 8192 || irqd_is_forwarded_to_vcpu(d)) 639 608 return; 640 - gic_write_dir(gic_irq(d)); 609 + 610 + if (!gic_arm64_erratum_2941627_needed(d)) 611 + gic_write_dir(gic_irq(d)); 612 + else 613 + gic_poke_irq(d, GICD_ICACTIVER); 641 614 } 642 615 643 616 static int gic_set_type(struct irq_data *d, unsigned int type) ··· 1851 1816 return true; 1852 1817 } 1853 1818 1819 + static bool gic_enable_quirk_arm64_2941627(void *data) 1820 + { 1821 + static_branch_enable(&gic_arm64_2941627_erratum); 1822 + return true; 1823 + } 1824 + 1854 1825 static const struct gic_quirk gic_quirks[] = { 1855 1826 { 1856 1827 .desc = "GICv3: Qualcomm MSM8996 broken firmware", ··· 1903 1862 .iidr = 0x0402043b, 1904 1863 .mask = 0xffffffff, 1905 1864 .init = gic_enable_quirk_nvidia_t241, 1865 + }, 1866 + { 1867 + /* 1868 + * GIC-700: 2941627 workaround - IP variant [0,1] 1869 + * 1870 + */ 1871 + .desc = "GICv3: ARM64 erratum 2941627", 1872 + .iidr = 0x0400043b, 1873 + .mask = 0xff0e0fff, 1874 + .init = gic_enable_quirk_arm64_2941627, 1875 + }, 1876 + { 1877 + /* 1878 + * GIC-700: 2941627 workaround - IP variant [2] 1879 + */ 1880 + .desc = "GICv3: ARM64 erratum 2941627", 1881 + .iidr = 0x0402043b, 1882 + .mask = 0xff0f0fff, 1883 + .init = gic_enable_quirk_arm64_2941627, 1906 1884 }, 1907 1885 { 1908 1886 }
+5 -5
drivers/isdn/hardware/mISDN/hfcpci.c
··· 839 839 *z1t = cpu_to_le16(new_z1); /* now send data */ 840 840 if (bch->tx_idx < bch->tx_skb->len) 841 841 return; 842 - dev_kfree_skb(bch->tx_skb); 842 + dev_kfree_skb_any(bch->tx_skb); 843 843 if (get_next_bframe(bch)) 844 844 goto next_t_frame; 845 845 return; ··· 895 895 } 896 896 bz->za[new_f1].z1 = cpu_to_le16(new_z1); /* for next buffer */ 897 897 bz->f1 = new_f1; /* next frame */ 898 - dev_kfree_skb(bch->tx_skb); 898 + dev_kfree_skb_any(bch->tx_skb); 899 899 get_next_bframe(bch); 900 900 } 901 901 ··· 1119 1119 if (bch->tx_skb && bch->tx_idx < bch->tx_skb->len) 1120 1120 hfcpci_fill_fifo(bch); 1121 1121 else { 1122 - dev_kfree_skb(bch->tx_skb); 1122 + dev_kfree_skb_any(bch->tx_skb); 1123 1123 if (get_next_bframe(bch)) 1124 1124 hfcpci_fill_fifo(bch); 1125 1125 } ··· 2277 2277 return 0; 2278 2278 2279 2279 if (hc->hw.int_m2 & HFCPCI_IRQ_ENABLE) { 2280 - spin_lock(&hc->lock); 2280 + spin_lock_irq(&hc->lock); 2281 2281 bch = Sel_BCS(hc, hc->hw.bswapped ? 2 : 1); 2282 2282 if (bch && bch->state == ISDN_P_B_RAW) { /* B1 rx&tx */ 2283 2283 main_rec_hfcpci(bch); ··· 2288 2288 main_rec_hfcpci(bch); 2289 2289 tx_birq(bch); 2290 2290 } 2291 - spin_unlock(&hc->lock); 2291 + spin_unlock_irq(&hc->lock); 2292 2292 } 2293 2293 return 0; 2294 2294 }
+18 -10
drivers/md/dm-cache-policy-smq.c
··· 857 857 858 858 struct background_tracker *bg_work; 859 859 860 - bool migrations_allowed; 860 + bool migrations_allowed:1; 861 + 862 + /* 863 + * If this is set the policy will try and clean the whole cache 864 + * even if the device is not idle. 865 + */ 866 + bool cleaner:1; 861 867 }; 862 868 863 869 /*----------------------------------------------------------------*/ ··· 1144 1138 * Cache entries may not be populated. So we cannot rely on the 1145 1139 * size of the clean queue. 1146 1140 */ 1147 - if (idle) { 1141 + if (idle || mq->cleaner) { 1148 1142 /* 1149 1143 * We'd like to clean everything. 1150 1144 */ ··· 1728 1722 *hotspot_block_size /= 2u; 1729 1723 } 1730 1724 1731 - static struct dm_cache_policy *__smq_create(dm_cblock_t cache_size, 1732 - sector_t origin_size, 1733 - sector_t cache_block_size, 1734 - bool mimic_mq, 1735 - bool migrations_allowed) 1725 + static struct dm_cache_policy * 1726 + __smq_create(dm_cblock_t cache_size, sector_t origin_size, sector_t cache_block_size, 1727 + bool mimic_mq, bool migrations_allowed, bool cleaner) 1736 1728 { 1737 1729 unsigned int i; 1738 1730 unsigned int nr_sentinels_per_queue = 2u * NR_CACHE_LEVELS; ··· 1817 1813 goto bad_btracker; 1818 1814 1819 1815 mq->migrations_allowed = migrations_allowed; 1816 + mq->cleaner = cleaner; 1820 1817 1821 1818 return &mq->policy; 1822 1819 ··· 1841 1836 sector_t origin_size, 1842 1837 sector_t cache_block_size) 1843 1838 { 1844 - return __smq_create(cache_size, origin_size, cache_block_size, false, true); 1839 + return __smq_create(cache_size, origin_size, cache_block_size, 1840 + false, true, false); 1845 1841 } 1846 1842 1847 1843 static struct dm_cache_policy *mq_create(dm_cblock_t cache_size, 1848 1844 sector_t origin_size, 1849 1845 sector_t cache_block_size) 1850 1846 { 1851 - return __smq_create(cache_size, origin_size, cache_block_size, true, true); 1847 + return __smq_create(cache_size, origin_size, cache_block_size, 1848 + true, true, false); 1852 1849 } 1853 1850 1854 1851 static struct dm_cache_policy *cleaner_create(dm_cblock_t cache_size, 1855 1852 sector_t origin_size, 1856 1853 sector_t cache_block_size) 1857 1854 { 1858 - return __smq_create(cache_size, origin_size, cache_block_size, false, false); 1855 + return __smq_create(cache_size, origin_size, cache_block_size, 1856 + false, false, true); 1859 1857 } 1860 1858 1861 1859 /*----------------------------------------------------------------*/
+1
drivers/md/dm-integrity.c
··· 2676 2676 recalc_tags = kvmalloc(recalc_tags_size, GFP_NOIO); 2677 2677 if (!recalc_tags) { 2678 2678 vfree(recalc_buffer); 2679 + recalc_buffer = NULL; 2679 2680 goto oom; 2680 2681 } 2681 2682
+9 -11
drivers/md/dm-raid.c
··· 3251 3251 r = md_start(&rs->md); 3252 3252 if (r) { 3253 3253 ti->error = "Failed to start raid array"; 3254 - mddev_unlock(&rs->md); 3255 - goto bad_md_start; 3254 + goto bad_unlock; 3256 3255 } 3257 3256 3258 3257 /* If raid4/5/6 journal mode explicitly requested (only possible with journal dev) -> set it */ ··· 3259 3260 r = r5c_journal_mode_set(&rs->md, rs->journal_dev.mode); 3260 3261 if (r) { 3261 3262 ti->error = "Failed to set raid4/5/6 journal mode"; 3262 - mddev_unlock(&rs->md); 3263 - goto bad_journal_mode_set; 3263 + goto bad_unlock; 3264 3264 } 3265 3265 } 3266 3266 ··· 3270 3272 if (rs_is_raid456(rs)) { 3271 3273 r = rs_set_raid456_stripe_cache(rs); 3272 3274 if (r) 3273 - goto bad_stripe_cache; 3275 + goto bad_unlock; 3274 3276 } 3275 3277 3276 3278 /* Now do an early reshape check */ 3277 3279 if (test_bit(RT_FLAG_RESHAPE_RS, &rs->runtime_flags)) { 3278 3280 r = rs_check_reshape(rs); 3279 3281 if (r) 3280 - goto bad_check_reshape; 3282 + goto bad_unlock; 3281 3283 3282 3284 /* Restore new, ctr requested layout to perform check */ 3283 3285 rs_config_restore(rs, &rs_layout); ··· 3286 3288 r = rs->md.pers->check_reshape(&rs->md); 3287 3289 if (r) { 3288 3290 ti->error = "Reshape check failed"; 3289 - goto bad_check_reshape; 3291 + goto bad_unlock; 3290 3292 } 3291 3293 } 3292 3294 } ··· 3297 3299 mddev_unlock(&rs->md); 3298 3300 return 0; 3299 3301 3300 - bad_md_start: 3301 - bad_journal_mode_set: 3302 - bad_stripe_cache: 3303 - bad_check_reshape: 3302 + bad_unlock: 3304 3303 md_stop(&rs->md); 3304 + mddev_unlock(&rs->md); 3305 3305 bad: 3306 3306 raid_set_free(rs); 3307 3307 ··· 3310 3314 { 3311 3315 struct raid_set *rs = ti->private; 3312 3316 3317 + mddev_lock_nointr(&rs->md); 3313 3318 md_stop(&rs->md); 3319 + mddev_unlock(&rs->md); 3314 3320 raid_set_free(rs); 3315 3321 } 3316 3322
+2
drivers/md/md.c
··· 6247 6247 6248 6248 void md_stop(struct mddev *mddev) 6249 6249 { 6250 + lockdep_assert_held(&mddev->reconfig_mutex); 6251 + 6250 6252 /* stop the array and free an attached data structures. 6251 6253 * This is called from dm-raid 6252 6254 */
+37
drivers/memory/tegra/mc.c
··· 755 755 [6] = "SMMU translation error", 756 756 }; 757 757 758 + struct icc_node *tegra_mc_icc_xlate(struct of_phandle_args *spec, void *data) 759 + { 760 + struct tegra_mc *mc = icc_provider_to_tegra_mc(data); 761 + struct icc_node *node; 762 + 763 + list_for_each_entry(node, &mc->provider.nodes, node_list) { 764 + if (node->id == spec->args[0]) 765 + return node; 766 + } 767 + 768 + /* 769 + * If a client driver calls devm_of_icc_get() before the MC driver 770 + * is probed, then return EPROBE_DEFER to the client driver. 771 + */ 772 + return ERR_PTR(-EPROBE_DEFER); 773 + } 774 + 775 + static int tegra_mc_icc_get(struct icc_node *node, u32 *average, u32 *peak) 776 + { 777 + *average = 0; 778 + *peak = 0; 779 + 780 + return 0; 781 + } 782 + 783 + static int tegra_mc_icc_set(struct icc_node *src, struct icc_node *dst) 784 + { 785 + return 0; 786 + } 787 + 788 + const struct tegra_mc_icc_ops tegra_mc_icc_ops = { 789 + .xlate = tegra_mc_icc_xlate, 790 + .aggregate = icc_std_aggregate, 791 + .get_bw = tegra_mc_icc_get, 792 + .set = tegra_mc_icc_set, 793 + }; 794 + 758 795 /* 759 796 * Memory Controller (MC) has few Memory Clients that are issuing memory 760 797 * bandwidth allocation requests to the MC interconnect provider. The MC
+1
drivers/memory/tegra/tegra194.c
··· 1355 1355 MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM, 1356 1356 .has_addr_hi_reg = true, 1357 1357 .ops = &tegra186_mc_ops, 1358 + .icc_ops = &tegra_mc_icc_ops, 1358 1359 .ch_intmask = 0x00000f00, 1359 1360 .global_intstatus_channel_shift = 8, 1360 1361 };
+3 -24
drivers/memory/tegra/tegra234.c
··· 827 827 return 0; 828 828 829 829 if (!mc->bwmgr_mrq_supported) 830 - return -EINVAL; 830 + return 0; 831 831 832 832 if (!mc->bpmp) { 833 833 dev_err(mc->dev, "BPMP reference NULL\n"); ··· 874 874 struct tegra_mc *mc = icc_provider_to_tegra_mc(p); 875 875 876 876 if (!mc->bwmgr_mrq_supported) 877 - return -EINVAL; 877 + return 0; 878 878 879 879 if (node->id == TEGRA_ICC_MC_CPU_CLUSTER0 || 880 880 node->id == TEGRA_ICC_MC_CPU_CLUSTER1 || ··· 889 889 return 0; 890 890 } 891 891 892 - static struct icc_node* 893 - tegra234_mc_of_icc_xlate(struct of_phandle_args *spec, void *data) 894 - { 895 - struct tegra_mc *mc = icc_provider_to_tegra_mc(data); 896 - unsigned int cl_id = spec->args[0]; 897 - struct icc_node *node; 898 - 899 - list_for_each_entry(node, &mc->provider.nodes, node_list) { 900 - if (node->id != cl_id) 901 - continue; 902 - 903 - return node; 904 - } 905 - 906 - /* 907 - * If a client driver calls devm_of_icc_get() before the MC driver 908 - * is probed, then return EPROBE_DEFER to the client driver. 909 - */ 910 - return ERR_PTR(-EPROBE_DEFER); 911 - } 912 - 913 892 static int tegra234_mc_icc_get_init_bw(struct icc_node *node, u32 *avg, u32 *peak) 914 893 { 915 894 *avg = 0; ··· 898 919 } 899 920 900 921 static const struct tegra_mc_icc_ops tegra234_mc_icc_ops = { 901 - .xlate = tegra234_mc_of_icc_xlate, 922 + .xlate = tegra_mc_icc_xlate, 902 923 .aggregate = tegra234_mc_icc_aggregate, 903 924 .get_bw = tegra234_mc_icc_get_init_bw, 904 925 .set = tegra234_mc_icc_set,
+1 -1
drivers/misc/sram.c
··· 236 236 } 237 237 if (!label) 238 238 block->label = devm_kasprintf(sram->dev, GFP_KERNEL, 239 - "%s", dev_name(sram->dev)); 239 + "%s", of_node_full_name(child)); 240 240 else 241 241 block->label = devm_kstrdup(sram->dev, 242 242 label, GFP_KERNEL);
+6 -2
drivers/net/dsa/bcm_sf2.c
··· 1436 1436 if (IS_ERR(priv->clk)) 1437 1437 return PTR_ERR(priv->clk); 1438 1438 1439 - clk_prepare_enable(priv->clk); 1439 + ret = clk_prepare_enable(priv->clk); 1440 + if (ret) 1441 + return ret; 1440 1442 1441 1443 priv->clk_mdiv = devm_clk_get_optional(&pdev->dev, "sw_switch_mdiv"); 1442 1444 if (IS_ERR(priv->clk_mdiv)) { ··· 1446 1444 goto out_clk; 1447 1445 } 1448 1446 1449 - clk_prepare_enable(priv->clk_mdiv); 1447 + ret = clk_prepare_enable(priv->clk_mdiv); 1448 + if (ret) 1449 + goto out_clk; 1450 1450 1451 1451 ret = bcm_sf2_sw_rst(priv); 1452 1452 if (ret) {
+15 -20
drivers/net/dsa/microchip/ksz_common.c
··· 635 635 regmap_reg_range(0x1030, 0x1030), 636 636 regmap_reg_range(0x1100, 0x1115), 637 637 regmap_reg_range(0x111a, 0x111f), 638 - regmap_reg_range(0x1122, 0x1127), 639 - regmap_reg_range(0x112a, 0x112b), 640 - regmap_reg_range(0x1136, 0x1139), 641 - regmap_reg_range(0x113e, 0x113f), 638 + regmap_reg_range(0x1120, 0x112b), 639 + regmap_reg_range(0x1134, 0x113b), 640 + regmap_reg_range(0x113c, 0x113f), 642 641 regmap_reg_range(0x1400, 0x1401), 643 642 regmap_reg_range(0x1403, 0x1403), 644 643 regmap_reg_range(0x1410, 0x1417), ··· 668 669 regmap_reg_range(0x2030, 0x2030), 669 670 regmap_reg_range(0x2100, 0x2115), 670 671 regmap_reg_range(0x211a, 0x211f), 671 - regmap_reg_range(0x2122, 0x2127), 672 - regmap_reg_range(0x212a, 0x212b), 673 - regmap_reg_range(0x2136, 0x2139), 674 - regmap_reg_range(0x213e, 0x213f), 672 + regmap_reg_range(0x2120, 0x212b), 673 + regmap_reg_range(0x2134, 0x213b), 674 + regmap_reg_range(0x213c, 0x213f), 675 675 regmap_reg_range(0x2400, 0x2401), 676 676 regmap_reg_range(0x2403, 0x2403), 677 677 regmap_reg_range(0x2410, 0x2417), ··· 701 703 regmap_reg_range(0x3030, 0x3030), 702 704 regmap_reg_range(0x3100, 0x3115), 703 705 regmap_reg_range(0x311a, 0x311f), 704 - regmap_reg_range(0x3122, 0x3127), 705 - regmap_reg_range(0x312a, 0x312b), 706 - regmap_reg_range(0x3136, 0x3139), 707 - regmap_reg_range(0x313e, 0x313f), 706 + regmap_reg_range(0x3120, 0x312b), 707 + regmap_reg_range(0x3134, 0x313b), 708 + regmap_reg_range(0x313c, 0x313f), 708 709 regmap_reg_range(0x3400, 0x3401), 709 710 regmap_reg_range(0x3403, 0x3403), 710 711 regmap_reg_range(0x3410, 0x3417), ··· 734 737 regmap_reg_range(0x4030, 0x4030), 735 738 regmap_reg_range(0x4100, 0x4115), 736 739 regmap_reg_range(0x411a, 0x411f), 737 - regmap_reg_range(0x4122, 0x4127), 738 - regmap_reg_range(0x412a, 0x412b), 739 - regmap_reg_range(0x4136, 0x4139), 740 - regmap_reg_range(0x413e, 0x413f), 740 + regmap_reg_range(0x4120, 0x412b), 741 + regmap_reg_range(0x4134, 0x413b), 742 + regmap_reg_range(0x413c, 0x413f), 741 743 regmap_reg_range(0x4400, 0x4401), 742 744 regmap_reg_range(0x4403, 0x4403), 743 745 regmap_reg_range(0x4410, 0x4417), ··· 767 771 regmap_reg_range(0x5030, 0x5030), 768 772 regmap_reg_range(0x5100, 0x5115), 769 773 regmap_reg_range(0x511a, 0x511f), 770 - regmap_reg_range(0x5122, 0x5127), 771 - regmap_reg_range(0x512a, 0x512b), 772 - regmap_reg_range(0x5136, 0x5139), 773 - regmap_reg_range(0x513e, 0x513f), 774 + regmap_reg_range(0x5120, 0x512b), 775 + regmap_reg_range(0x5134, 0x513b), 776 + regmap_reg_range(0x513c, 0x513f), 774 777 regmap_reg_range(0x5400, 0x5401), 775 778 regmap_reg_range(0x5403, 0x5403), 776 779 regmap_reg_range(0x5410, 0x5417),
+51 -34
drivers/net/ethernet/broadcom/bnxt/bnxt.c
··· 687 687 return NETDEV_TX_OK; 688 688 } 689 689 690 - static void bnxt_tx_int(struct bnxt *bp, struct bnxt_napi *bnapi, int nr_pkts) 690 + static void bnxt_tx_int(struct bnxt *bp, struct bnxt_napi *bnapi, int budget) 691 691 { 692 692 struct bnxt_tx_ring_info *txr = bnapi->tx_ring; 693 693 struct netdev_queue *txq = netdev_get_tx_queue(bp->dev, txr->txq_index); 694 694 u16 cons = txr->tx_cons; 695 695 struct pci_dev *pdev = bp->pdev; 696 + int nr_pkts = bnapi->tx_pkts; 696 697 int i; 697 698 unsigned int tx_bytes = 0; 698 699 ··· 748 747 dev_consume_skb_any(skb); 749 748 } 750 749 750 + bnapi->tx_pkts = 0; 751 751 WRITE_ONCE(txr->tx_cons, cons); 752 752 753 753 __netif_txq_completed_wake(txq, nr_pkts, tx_bytes, ··· 758 756 759 757 static struct page *__bnxt_alloc_rx_page(struct bnxt *bp, dma_addr_t *mapping, 760 758 struct bnxt_rx_ring_info *rxr, 759 + unsigned int *offset, 761 760 gfp_t gfp) 762 761 { 763 762 struct device *dev = &bp->pdev->dev; 764 763 struct page *page; 765 764 766 - page = page_pool_dev_alloc_pages(rxr->page_pool); 765 + if (PAGE_SIZE > BNXT_RX_PAGE_SIZE) { 766 + page = page_pool_dev_alloc_frag(rxr->page_pool, offset, 767 + BNXT_RX_PAGE_SIZE); 768 + } else { 769 + page = page_pool_dev_alloc_pages(rxr->page_pool); 770 + *offset = 0; 771 + } 767 772 if (!page) 768 773 return NULL; 769 774 770 - *mapping = dma_map_page_attrs(dev, page, 0, PAGE_SIZE, bp->rx_dir, 771 - DMA_ATTR_WEAK_ORDERING); 775 + *mapping = dma_map_page_attrs(dev, page, *offset, BNXT_RX_PAGE_SIZE, 776 + bp->rx_dir, DMA_ATTR_WEAK_ORDERING); 772 777 if (dma_mapping_error(dev, *mapping)) { 773 778 page_pool_recycle_direct(rxr->page_pool, page); 774 779 return NULL; ··· 815 806 dma_addr_t mapping; 816 807 817 808 if (BNXT_RX_PAGE_MODE(bp)) { 809 + unsigned int offset; 818 810 struct page *page = 819 - __bnxt_alloc_rx_page(bp, &mapping, rxr, gfp); 811 + __bnxt_alloc_rx_page(bp, &mapping, rxr, &offset, gfp); 820 812 821 813 if (!page) 822 814 return -ENOMEM; 823 815 824 816 mapping += bp->rx_dma_offset; 825 817 rx_buf->data = page; 826 - rx_buf->data_ptr = page_address(page) + bp->rx_offset; 818 + rx_buf->data_ptr = page_address(page) + offset + bp->rx_offset; 827 819 } else { 828 820 u8 *data = __bnxt_alloc_rx_frag(bp, &mapping, gfp); 829 821 ··· 884 874 unsigned int offset = 0; 885 875 886 876 if (BNXT_RX_PAGE_MODE(bp)) { 887 - page = __bnxt_alloc_rx_page(bp, &mapping, rxr, gfp); 877 + page = __bnxt_alloc_rx_page(bp, &mapping, rxr, &offset, gfp); 888 878 889 879 if (!page) 890 880 return -ENOMEM; ··· 1031 1021 return NULL; 1032 1022 } 1033 1023 dma_addr -= bp->rx_dma_offset; 1034 - dma_unmap_page_attrs(&bp->pdev->dev, dma_addr, PAGE_SIZE, bp->rx_dir, 1035 - DMA_ATTR_WEAK_ORDERING); 1036 - skb = build_skb(page_address(page), PAGE_SIZE); 1024 + dma_unmap_page_attrs(&bp->pdev->dev, dma_addr, BNXT_RX_PAGE_SIZE, 1025 + bp->rx_dir, DMA_ATTR_WEAK_ORDERING); 1026 + skb = build_skb(data_ptr - bp->rx_offset, BNXT_RX_PAGE_SIZE); 1037 1027 if (!skb) { 1038 1028 page_pool_recycle_direct(rxr->page_pool, page); 1039 1029 return NULL; 1040 1030 } 1041 1031 skb_mark_for_recycle(skb); 1042 - skb_reserve(skb, bp->rx_dma_offset); 1032 + skb_reserve(skb, bp->rx_offset); 1043 1033 __skb_put(skb, len); 1044 1034 1045 1035 return skb; ··· 1065 1055 return NULL; 1066 1056 } 1067 1057 dma_addr -= bp->rx_dma_offset; 1068 - dma_unmap_page_attrs(&bp->pdev->dev, dma_addr, PAGE_SIZE, bp->rx_dir, 1069 - DMA_ATTR_WEAK_ORDERING); 1058 + dma_unmap_page_attrs(&bp->pdev->dev, dma_addr, BNXT_RX_PAGE_SIZE, 1059 + bp->rx_dir, DMA_ATTR_WEAK_ORDERING); 1070 1060 1071 1061 if (unlikely(!payload)) 1072 1062 payload = eth_get_headlen(bp->dev, data_ptr, len); ··· 1079 1069 1080 1070 skb_mark_for_recycle(skb); 1081 1071 off = (void *)data_ptr - page_address(page); 1082 - skb_add_rx_frag(skb, 0, page, off, len, PAGE_SIZE); 1072 + skb_add_rx_frag(skb, 0, page, off, len, BNXT_RX_PAGE_SIZE); 1083 1073 memcpy(skb->data - NET_IP_ALIGN, data_ptr - NET_IP_ALIGN, 1084 1074 payload + NET_IP_ALIGN); 1085 1075 ··· 1210 1200 1211 1201 skb->data_len += total_frag_len; 1212 1202 skb->len += total_frag_len; 1213 - skb->truesize += PAGE_SIZE * agg_bufs; 1203 + skb->truesize += BNXT_RX_PAGE_SIZE * agg_bufs; 1214 1204 return skb; 1215 1205 } 1216 1206 ··· 2605 2595 return rx_pkts; 2606 2596 } 2607 2597 2608 - static void __bnxt_poll_work_done(struct bnxt *bp, struct bnxt_napi *bnapi) 2598 + static void __bnxt_poll_work_done(struct bnxt *bp, struct bnxt_napi *bnapi, 2599 + int budget) 2609 2600 { 2610 - if (bnapi->tx_pkts && !bnapi->tx_fault) { 2611 - bnapi->tx_int(bp, bnapi, bnapi->tx_pkts); 2612 - bnapi->tx_pkts = 0; 2613 - } 2601 + if (bnapi->tx_pkts && !bnapi->tx_fault) 2602 + bnapi->tx_int(bp, bnapi, budget); 2614 2603 2615 2604 if ((bnapi->events & BNXT_RX_EVENT) && !(bnapi->in_reset)) { 2616 2605 struct bnxt_rx_ring_info *rxr = bnapi->rx_ring; ··· 2638 2629 */ 2639 2630 bnxt_db_cq(bp, &cpr->cp_db, cpr->cp_raw_cons); 2640 2631 2641 - __bnxt_poll_work_done(bp, bnapi); 2632 + __bnxt_poll_work_done(bp, bnapi, budget); 2642 2633 return rx_pkts; 2643 2634 } 2644 2635 ··· 2769 2760 } 2770 2761 2771 2762 static void __bnxt_poll_cqs_done(struct bnxt *bp, struct bnxt_napi *bnapi, 2772 - u64 dbr_type) 2763 + u64 dbr_type, int budget) 2773 2764 { 2774 2765 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; 2775 2766 int i; ··· 2785 2776 cpr2->had_work_done = 0; 2786 2777 } 2787 2778 } 2788 - __bnxt_poll_work_done(bp, bnapi); 2779 + __bnxt_poll_work_done(bp, bnapi, budget); 2789 2780 } 2790 2781 2791 2782 static int bnxt_poll_p5(struct napi_struct *napi, int budget) ··· 2815 2806 if (cpr->has_more_work) 2816 2807 break; 2817 2808 2818 - __bnxt_poll_cqs_done(bp, bnapi, DBR_TYPE_CQ_ARMALL); 2809 + __bnxt_poll_cqs_done(bp, bnapi, DBR_TYPE_CQ_ARMALL, 2810 + budget); 2819 2811 cpr->cp_raw_cons = raw_cons; 2820 2812 if (napi_complete_done(napi, work_done)) 2821 2813 BNXT_DB_NQ_ARM_P5(&cpr->cp_db, ··· 2846 2836 } 2847 2837 raw_cons = NEXT_RAW_CMP(raw_cons); 2848 2838 } 2849 - __bnxt_poll_cqs_done(bp, bnapi, DBR_TYPE_CQ); 2839 + __bnxt_poll_cqs_done(bp, bnapi, DBR_TYPE_CQ, budget); 2850 2840 if (raw_cons != cpr->cp_raw_cons) { 2851 2841 cpr->cp_raw_cons = raw_cons; 2852 2842 BNXT_DB_NQ_P5(&cpr->cp_db, raw_cons); ··· 2979 2969 rx_buf->data = NULL; 2980 2970 if (BNXT_RX_PAGE_MODE(bp)) { 2981 2971 mapping -= bp->rx_dma_offset; 2982 - dma_unmap_page_attrs(&pdev->dev, mapping, PAGE_SIZE, 2983 - bp->rx_dir, 2972 + dma_unmap_page_attrs(&pdev->dev, mapping, 2973 + BNXT_RX_PAGE_SIZE, bp->rx_dir, 2984 2974 DMA_ATTR_WEAK_ORDERING); 2985 2975 page_pool_recycle_direct(rxr->page_pool, data); 2986 2976 } else { ··· 3249 3239 pp.napi = &rxr->bnapi->napi; 3250 3240 pp.dev = &bp->pdev->dev; 3251 3241 pp.dma_dir = DMA_BIDIRECTIONAL; 3242 + if (PAGE_SIZE > BNXT_RX_PAGE_SIZE) 3243 + pp.flags |= PP_FLAG_PAGE_FRAG; 3252 3244 3253 3245 rxr->page_pool = page_pool_create(&pp); 3254 3246 if (IS_ERR(rxr->page_pool)) { ··· 4027 4015 */ 4028 4016 int bnxt_set_rx_skb_mode(struct bnxt *bp, bool page_mode) 4029 4017 { 4018 + struct net_device *dev = bp->dev; 4019 + 4030 4020 if (page_mode) { 4031 4021 bp->flags &= ~BNXT_FLAG_AGG_RINGS; 4032 4022 bp->flags |= BNXT_FLAG_RX_PAGE_MODE; 4033 4023 4034 - if (bp->dev->mtu > BNXT_MAX_PAGE_MODE_MTU) { 4024 + if (bp->xdp_prog->aux->xdp_has_frags) 4025 + dev->max_mtu = min_t(u16, bp->max_mtu, BNXT_MAX_MTU); 4026 + else 4027 + dev->max_mtu = 4028 + min_t(u16, bp->max_mtu, BNXT_MAX_PAGE_MODE_MTU); 4029 + if (dev->mtu > BNXT_MAX_PAGE_MODE_MTU) { 4035 4030 bp->flags |= BNXT_FLAG_JUMBO; 4036 4031 bp->rx_skb_func = bnxt_rx_multi_page_skb; 4037 - bp->dev->max_mtu = 4038 - min_t(u16, bp->max_mtu, BNXT_MAX_MTU); 4039 4032 } else { 4040 4033 bp->flags |= BNXT_FLAG_NO_AGG_RINGS; 4041 4034 bp->rx_skb_func = bnxt_rx_page_skb; 4042 - bp->dev->max_mtu = 4043 - min_t(u16, bp->max_mtu, BNXT_MAX_PAGE_MODE_MTU); 4044 4035 } 4045 4036 bp->rx_dir = DMA_BIDIRECTIONAL; 4046 4037 /* Disable LRO or GRO_HW */ 4047 - netdev_update_features(bp->dev); 4038 + netdev_update_features(dev); 4048 4039 } else { 4049 - bp->dev->max_mtu = bp->max_mtu; 4040 + dev->max_mtu = bp->max_mtu; 4050 4041 bp->flags &= ~BNXT_FLAG_RX_PAGE_MODE; 4051 4042 bp->rx_dir = DMA_FROM_DEVICE; 4052 4043 bp->rx_skb_func = bnxt_rx_skb; ··· 9471 9456 if (bnapi->in_reset) 9472 9457 cpr->sw_stats.rx.rx_resets++; 9473 9458 bnapi->in_reset = false; 9459 + 9460 + bnapi->tx_pkts = 0; 9474 9461 9475 9462 if (bnapi->rx_ring) { 9476 9463 INIT_WORK(&cpr->dim.work, bnxt_dim_work);
+1 -1
drivers/net/ethernet/broadcom/bnxt/bnxt.h
··· 1005 1005 struct bnxt_tx_ring_info *tx_ring; 1006 1006 1007 1007 void (*tx_int)(struct bnxt *, struct bnxt_napi *, 1008 - int); 1008 + int budget); 1009 1009 int tx_pkts; 1010 1010 u8 events; 1011 1011 u8 tx_fault:1;
+10 -4
drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.c
··· 125 125 dma_unmap_len_set(tx_buf, len, 0); 126 126 } 127 127 128 - void bnxt_tx_int_xdp(struct bnxt *bp, struct bnxt_napi *bnapi, int nr_pkts) 128 + void bnxt_tx_int_xdp(struct bnxt *bp, struct bnxt_napi *bnapi, int budget) 129 129 { 130 130 struct bnxt_tx_ring_info *txr = bnapi->tx_ring; 131 131 struct bnxt_rx_ring_info *rxr = bnapi->rx_ring; 132 132 bool rx_doorbell_needed = false; 133 + int nr_pkts = bnapi->tx_pkts; 133 134 struct bnxt_sw_tx_bd *tx_buf; 134 135 u16 tx_cons = txr->tx_cons; 135 136 u16 last_tx_cons = tx_cons; 136 137 int i, j, frags; 138 + 139 + if (!budget) 140 + return; 137 141 138 142 for (i = 0; i < nr_pkts; i++) { 139 143 tx_buf = &txr->tx_buf_ring[tx_cons]; ··· 169 165 } 170 166 tx_cons = NEXT_TX(tx_cons); 171 167 } 168 + 169 + bnapi->tx_pkts = 0; 172 170 WRITE_ONCE(txr->tx_cons, tx_cons); 173 171 if (rx_doorbell_needed) { 174 172 tx_buf = &txr->tx_buf_ring[last_tx_cons]; ··· 190 184 u16 cons, u8 *data_ptr, unsigned int len, 191 185 struct xdp_buff *xdp) 192 186 { 187 + u32 buflen = BNXT_RX_PAGE_SIZE; 193 188 struct bnxt_sw_rx_bd *rx_buf; 194 - u32 buflen = PAGE_SIZE; 195 189 struct pci_dev *pdev; 196 190 dma_addr_t mapping; 197 191 u32 offset; ··· 307 301 rx_buf = &rxr->rx_buf_ring[cons]; 308 302 mapping = rx_buf->mapping - bp->rx_dma_offset; 309 303 dma_unmap_page_attrs(&pdev->dev, mapping, 310 - PAGE_SIZE, bp->rx_dir, 304 + BNXT_RX_PAGE_SIZE, bp->rx_dir, 311 305 DMA_ATTR_WEAK_ORDERING); 312 306 313 307 /* if we are unable to allocate a new buffer, abort and reuse */ ··· 490 484 } 491 485 xdp_update_skb_shared_info(skb, num_frags, 492 486 sinfo->xdp_frags_size, 493 - PAGE_SIZE * sinfo->nr_frags, 487 + BNXT_RX_PAGE_SIZE * sinfo->nr_frags, 494 488 xdp_buff_is_frag_pfmemalloc(xdp)); 495 489 return skb; 496 490 }
+1 -1
drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.h
··· 16 16 struct bnxt_tx_ring_info *txr, 17 17 dma_addr_t mapping, u32 len, 18 18 struct xdp_buff *xdp); 19 - void bnxt_tx_int_xdp(struct bnxt *bp, struct bnxt_napi *bnapi, int nr_pkts); 19 + void bnxt_tx_int_xdp(struct bnxt *bp, struct bnxt_napi *bnapi, int budget); 20 20 bool bnxt_rx_xdp(struct bnxt *bp, struct bnxt_rx_ring_info *rxr, u16 cons, 21 21 struct xdp_buff xdp, struct page *page, u8 **data_ptr, 22 22 unsigned int *len, u8 *event);
+18
drivers/net/ethernet/intel/ice/ice_main.c
··· 8842 8842 { 8843 8843 struct ice_netdev_priv *np = netdev_priv(netdev); 8844 8844 struct ice_pf *pf = np->vsi->back; 8845 + bool locked = false; 8845 8846 int err; 8846 8847 8847 8848 switch (type) { ··· 8852 8851 ice_setup_tc_block_cb, 8853 8852 np, np, true); 8854 8853 case TC_SETUP_QDISC_MQPRIO: 8854 + if (pf->adev) { 8855 + mutex_lock(&pf->adev_mutex); 8856 + device_lock(&pf->adev->dev); 8857 + locked = true; 8858 + if (pf->adev->dev.driver) { 8859 + netdev_err(netdev, "Cannot change qdisc when RDMA is active\n"); 8860 + err = -EBUSY; 8861 + goto adev_unlock; 8862 + } 8863 + } 8864 + 8855 8865 /* setup traffic classifier for receive side */ 8856 8866 mutex_lock(&pf->tc_mutex); 8857 8867 err = ice_setup_tc_mqprio_qdisc(netdev, type_data); 8858 8868 mutex_unlock(&pf->tc_mutex); 8869 + 8870 + adev_unlock: 8871 + if (locked) { 8872 + device_unlock(&pf->adev->dev); 8873 + mutex_unlock(&pf->adev_mutex); 8874 + } 8859 8875 return err; 8860 8876 default: 8861 8877 return -EOPNOTSUPP;
+1 -2
drivers/net/ethernet/korina.c
··· 1302 1302 else if (of_get_ethdev_address(pdev->dev.of_node, dev) < 0) 1303 1303 eth_hw_addr_random(dev); 1304 1304 1305 - clk = devm_clk_get_optional(&pdev->dev, "mdioclk"); 1305 + clk = devm_clk_get_optional_enabled(&pdev->dev, "mdioclk"); 1306 1306 if (IS_ERR(clk)) 1307 1307 return PTR_ERR(clk); 1308 1308 if (clk) { 1309 - clk_prepare_enable(clk); 1310 1309 lp->mii_clock_freq = clk_get_rate(clk); 1311 1310 } else { 1312 1311 lp->mii_clock_freq = 200000000; /* max possible input clk */
+3
drivers/net/ethernet/marvell/octeon_ep/octep_ctrl_mbox.c
··· 98 98 writeq(OCTEP_CTRL_MBOX_STATUS_INIT, 99 99 OCTEP_CTRL_MBOX_INFO_HOST_STATUS(mbox->barmem)); 100 100 101 + mutex_init(&mbox->h2fq_lock); 102 + mutex_init(&mbox->f2hq_lock); 103 + 101 104 mbox->h2fq.sz = readl(OCTEP_CTRL_MBOX_H2FQ_SZ(mbox->barmem)); 102 105 mbox->h2fq.hw_prod = OCTEP_CTRL_MBOX_H2FQ_PROD(mbox->barmem); 103 106 mbox->h2fq.hw_cons = OCTEP_CTRL_MBOX_H2FQ_CONS(mbox->barmem);
+2 -1
drivers/net/ethernet/marvell/prestera/prestera_pci.c
··· 727 727 728 728 err = request_firmware_direct(&fw->bin, fw_path, fw->dev.dev); 729 729 if (err) { 730 - if (ver_maj == PRESTERA_SUPP_FW_MAJ_VER) { 730 + if (ver_maj != PRESTERA_PREV_FW_MAJ_VER || 731 + ver_min != PRESTERA_PREV_FW_MIN_VER) { 731 732 ver_maj = PRESTERA_PREV_FW_MAJ_VER; 732 733 ver_min = PRESTERA_PREV_FW_MIN_VER; 733 734
-3
drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_encap.c
··· 1030 1030 int out_index; 1031 1031 int err = 0; 1032 1032 1033 - if (!mlx5e_is_eswitch_flow(flow)) 1034 - return 0; 1035 - 1036 1033 parse_attr = attr->parse_attr; 1037 1034 esw_attr = attr->esw_attr; 1038 1035 *vf_tun = false;
+4 -1
drivers/net/ethernet/mellanox/mlx5/core/en/xsk/rx.c
··· 323 323 net_prefetch(mxbuf->xdp.data); 324 324 325 325 prog = rcu_dereference(rq->xdp_prog); 326 - if (likely(prog && mlx5e_xdp_handle(rq, prog, mxbuf))) 326 + if (likely(prog && mlx5e_xdp_handle(rq, prog, mxbuf))) { 327 + if (likely(__test_and_clear_bit(MLX5E_RQ_FLAG_XDP_XMIT, rq->flags))) 328 + wi->flags |= BIT(MLX5E_WQE_FRAG_SKIP_RELEASE); 327 329 return NULL; /* page/packet was consumed by XDP */ 330 + } 328 331 329 332 /* XDP_PASS: copy the data from the UMEM to a new SKB. The frame reuse 330 333 * will be handled by mlx5e_free_rx_wqe.
+2 -2
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c
··· 949 949 } 950 950 951 951 if (upspec->sport) { 952 - MLX5_SET(fte_match_set_lyr_2_4, spec->match_criteria, udp_dport, 952 + MLX5_SET(fte_match_set_lyr_2_4, spec->match_criteria, udp_sport, 953 953 upspec->sport_mask); 954 - MLX5_SET(fte_match_set_lyr_2_4, spec->match_value, udp_dport, upspec->sport); 954 + MLX5_SET(fte_match_set_lyr_2_4, spec->match_value, udp_sport, upspec->sport); 955 955 } 956 956 } 957 957
+3 -1
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c
··· 59 59 60 60 trailer_len = alen + plen + 2; 61 61 62 - pskb_trim(skb, skb->len - trailer_len); 62 + ret = pskb_trim(skb, skb->len - trailer_len); 63 + if (unlikely(ret)) 64 + return ret; 63 65 if (skb->protocol == htons(ETH_P_IP)) { 64 66 ipv4hdr->tot_len = htons(ntohs(ipv4hdr->tot_len) - trailer_len); 65 67 ip_send_check(ipv4hdr);
-8
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.c
··· 188 188 189 189 int mlx5e_ktls_init(struct mlx5e_priv *priv) 190 190 { 191 - struct mlx5_crypto_dek_pool *dek_pool; 192 191 struct mlx5e_tls *tls; 193 192 194 193 if (!mlx5e_is_ktls_device(priv->mdev)) ··· 198 199 return -ENOMEM; 199 200 tls->mdev = priv->mdev; 200 201 201 - dek_pool = mlx5_crypto_dek_pool_create(priv->mdev, MLX5_ACCEL_OBJ_TLS_KEY); 202 - if (IS_ERR(dek_pool)) { 203 - kfree(tls); 204 - return PTR_ERR(dek_pool); 205 - } 206 - tls->dek_pool = dek_pool; 207 202 priv->tls = tls; 208 203 209 204 mlx5e_tls_debugfs_init(tls, priv->dfs_root); ··· 215 222 debugfs_remove_recursive(tls->debugfs.dfs); 216 223 tls->debugfs.dfs = NULL; 217 224 218 - mlx5_crypto_dek_pool_destroy(tls->dek_pool); 219 225 kfree(priv->tls); 220 226 priv->tls = NULL; 221 227 }
+26 -3
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c
··· 908 908 909 909 int mlx5e_ktls_init_tx(struct mlx5e_priv *priv) 910 910 { 911 + struct mlx5_crypto_dek_pool *dek_pool; 911 912 struct mlx5e_tls *tls = priv->tls; 913 + int err; 914 + 915 + if (!mlx5e_is_ktls_device(priv->mdev)) 916 + return 0; 917 + 918 + /* DEK pool could be used by either or both of TX and RX. But we have to 919 + * put the creation here to avoid syndrome when doing devlink reload. 920 + */ 921 + dek_pool = mlx5_crypto_dek_pool_create(priv->mdev, MLX5_ACCEL_OBJ_TLS_KEY); 922 + if (IS_ERR(dek_pool)) 923 + return PTR_ERR(dek_pool); 924 + tls->dek_pool = dek_pool; 912 925 913 926 if (!mlx5e_is_ktls_tx(priv->mdev)) 914 927 return 0; 915 928 916 929 priv->tls->tx_pool = mlx5e_tls_tx_pool_init(priv->mdev, &priv->tls->sw_stats); 917 - if (!priv->tls->tx_pool) 918 - return -ENOMEM; 930 + if (!priv->tls->tx_pool) { 931 + err = -ENOMEM; 932 + goto err_tx_pool_init; 933 + } 919 934 920 935 mlx5e_tls_tx_debugfs_init(tls, tls->debugfs.dfs); 921 936 922 937 return 0; 938 + 939 + err_tx_pool_init: 940 + mlx5_crypto_dek_pool_destroy(dek_pool); 941 + return err; 923 942 } 924 943 925 944 void mlx5e_ktls_cleanup_tx(struct mlx5e_priv *priv) 926 945 { 927 946 if (!mlx5e_is_ktls_tx(priv->mdev)) 928 - return; 947 + goto dek_pool_destroy; 929 948 930 949 debugfs_remove_recursive(priv->tls->debugfs.dfs_tx); 931 950 priv->tls->debugfs.dfs_tx = NULL; 932 951 933 952 mlx5e_tls_tx_pool_cleanup(priv->tls->tx_pool); 934 953 priv->tls->tx_pool = NULL; 954 + 955 + dek_pool_destroy: 956 + if (mlx5e_is_ktls_device(priv->mdev)) 957 + mlx5_crypto_dek_pool_destroy(priv->tls->dek_pool); 935 958 }
+1
drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec_fs.c
··· 161 161 162 162 if (!in) { 163 163 kfree(ft->g); 164 + ft->g = NULL; 164 165 return -ENOMEM; 165 166 } 166 167
+10
drivers/net/ethernet/mellanox/mlx5/core/en_arfs.c
··· 135 135 136 136 int mlx5e_arfs_disable(struct mlx5e_flow_steering *fs) 137 137 { 138 + /* Moving to switchdev mode, fs->arfs is freed by mlx5e_nic_profile 139 + * cleanup_rx callback and it is not recreated when 140 + * mlx5e_uplink_rep_profile is loaded as mlx5e_create_flow_steering() 141 + * is not called by the uplink_rep profile init_rx callback. Thus, if 142 + * ntuple is set, moving to switchdev flow will enter this function 143 + * with fs->arfs nullified. 144 + */ 145 + if (!mlx5e_fs_get_arfs(fs)) 146 + return 0; 147 + 138 148 arfs_del_rules(fs); 139 149 140 150 return arfs_disable(fs);
+21 -8
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
··· 1036 1036 return err; 1037 1037 } 1038 1038 1039 - static int mlx5e_rq_to_ready(struct mlx5e_rq *rq, int curr_state) 1039 + static void mlx5e_flush_rq_cq(struct mlx5e_rq *rq) 1040 + { 1041 + struct mlx5_cqwq *cqwq = &rq->cq.wq; 1042 + struct mlx5_cqe64 *cqe; 1043 + 1044 + if (test_bit(MLX5E_RQ_STATE_MINI_CQE_ENHANCED, &rq->state)) { 1045 + while ((cqe = mlx5_cqwq_get_cqe_enahnced_comp(cqwq))) 1046 + mlx5_cqwq_pop(cqwq); 1047 + } else { 1048 + while ((cqe = mlx5_cqwq_get_cqe(cqwq))) 1049 + mlx5_cqwq_pop(cqwq); 1050 + } 1051 + 1052 + mlx5_cqwq_update_db_record(cqwq); 1053 + } 1054 + 1055 + int mlx5e_flush_rq(struct mlx5e_rq *rq, int curr_state) 1040 1056 { 1041 1057 struct net_device *dev = rq->netdev; 1042 1058 int err; ··· 1062 1046 netdev_err(dev, "Failed to move rq 0x%x to reset\n", rq->rqn); 1063 1047 return err; 1064 1048 } 1049 + 1050 + mlx5e_free_rx_descs(rq); 1051 + mlx5e_flush_rq_cq(rq); 1052 + 1065 1053 err = mlx5e_modify_rq_state(rq, MLX5_RQC_STATE_RST, MLX5_RQC_STATE_RDY); 1066 1054 if (err) { 1067 1055 netdev_err(dev, "Failed to move rq 0x%x to ready\n", rq->rqn); ··· 1073 1053 } 1074 1054 1075 1055 return 0; 1076 - } 1077 - 1078 - int mlx5e_flush_rq(struct mlx5e_rq *rq, int curr_state) 1079 - { 1080 - mlx5e_free_rx_descs(rq); 1081 - 1082 - return mlx5e_rq_to_ready(rq, curr_state); 1083 1056 } 1084 1057 1085 1058 static int mlx5e_modify_rq_vsd(struct mlx5e_rq *rq, bool vsd)
+9 -11
drivers/net/ethernet/mellanox/mlx5/core/en_rep.c
··· 1009 1009 err = mlx5e_open_drop_rq(priv, &priv->drop_rq); 1010 1010 if (err) { 1011 1011 mlx5_core_err(mdev, "open drop rq failed, %d\n", err); 1012 - return err; 1012 + goto err_rx_res_free; 1013 1013 } 1014 1014 1015 1015 err = mlx5e_rx_res_init(priv->rx_res, priv->mdev, 0, ··· 1043 1043 mlx5e_rx_res_destroy(priv->rx_res); 1044 1044 err_close_drop_rq: 1045 1045 mlx5e_close_drop_rq(&priv->drop_rq); 1046 + err_rx_res_free: 1046 1047 mlx5e_rx_res_free(priv->rx_res); 1047 1048 priv->rx_res = NULL; 1048 1049 err_free_fs: ··· 1157 1156 return err; 1158 1157 } 1159 1158 1159 + err = mlx5e_rep_neigh_init(rpriv); 1160 + if (err) 1161 + goto err_neigh_init; 1162 + 1160 1163 if (rpriv->rep->vport == MLX5_VPORT_UPLINK) { 1161 1164 err = mlx5e_init_uplink_rep_tx(rpriv); 1162 1165 if (err) ··· 1177 1172 if (rpriv->rep->vport == MLX5_VPORT_UPLINK) 1178 1173 mlx5e_cleanup_uplink_rep_tx(rpriv); 1179 1174 err_init_tx: 1175 + mlx5e_rep_neigh_cleanup(rpriv); 1176 + err_neigh_init: 1180 1177 mlx5e_destroy_tises(priv); 1181 1178 return err; 1182 1179 } ··· 1192 1185 if (rpriv->rep->vport == MLX5_VPORT_UPLINK) 1193 1186 mlx5e_cleanup_uplink_rep_tx(rpriv); 1194 1187 1188 + mlx5e_rep_neigh_cleanup(rpriv); 1195 1189 mlx5e_destroy_tises(priv); 1196 1190 } 1197 1191 1198 1192 static void mlx5e_rep_enable(struct mlx5e_priv *priv) 1199 1193 { 1200 - struct mlx5e_rep_priv *rpriv = priv->ppriv; 1201 - 1202 1194 mlx5e_set_netdev_mtu_boundaries(priv); 1203 - mlx5e_rep_neigh_init(rpriv); 1204 1195 } 1205 1196 1206 1197 static void mlx5e_rep_disable(struct mlx5e_priv *priv) 1207 1198 { 1208 - struct mlx5e_rep_priv *rpriv = priv->ppriv; 1209 - 1210 - mlx5e_rep_neigh_cleanup(rpriv); 1211 1199 } 1212 1200 1213 1201 static int mlx5e_update_rep_rx(struct mlx5e_priv *priv) ··· 1252 1250 1253 1251 static void mlx5e_uplink_rep_enable(struct mlx5e_priv *priv) 1254 1252 { 1255 - struct mlx5e_rep_priv *rpriv = priv->ppriv; 1256 1253 struct net_device *netdev = priv->netdev; 1257 1254 struct mlx5_core_dev *mdev = priv->mdev; 1258 1255 u16 max_mtu; ··· 1273 1272 mlx5_notifier_register(mdev, &priv->events_nb); 1274 1273 mlx5e_dcbnl_initialize(priv); 1275 1274 mlx5e_dcbnl_init_app(priv); 1276 - mlx5e_rep_neigh_init(rpriv); 1277 1275 mlx5e_rep_bridge_init(priv); 1278 1276 1279 1277 netdev->wanted_features |= NETIF_F_HW_TC; ··· 1287 1287 1288 1288 static void mlx5e_uplink_rep_disable(struct mlx5e_priv *priv) 1289 1289 { 1290 - struct mlx5e_rep_priv *rpriv = priv->ppriv; 1291 1290 struct mlx5_core_dev *mdev = priv->mdev; 1292 1291 1293 1292 rtnl_lock(); ··· 1296 1297 rtnl_unlock(); 1297 1298 1298 1299 mlx5e_rep_bridge_cleanup(priv); 1299 - mlx5e_rep_neigh_cleanup(rpriv); 1300 1300 mlx5e_dcbnl_delete_app(priv); 1301 1301 mlx5_notifier_unregister(mdev, &priv->events_nb); 1302 1302 mlx5e_rep_tc_disable(priv);
+18 -3
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
··· 1722 1722 return 0; 1723 1723 } 1724 1724 1725 + static bool 1726 + has_encap_dests(struct mlx5_flow_attr *attr) 1727 + { 1728 + struct mlx5_esw_flow_attr *esw_attr = attr->esw_attr; 1729 + int out_index; 1730 + 1731 + for (out_index = 0; out_index < MLX5_MAX_FLOW_FWD_VPORTS; out_index++) 1732 + if (esw_attr->dests[out_index].flags & MLX5_ESW_DEST_ENCAP) 1733 + return true; 1734 + 1735 + return false; 1736 + } 1737 + 1725 1738 static int 1726 1739 post_process_attr(struct mlx5e_tc_flow *flow, 1727 1740 struct mlx5_flow_attr *attr, ··· 1747 1734 if (err) 1748 1735 goto err_out; 1749 1736 1750 - err = mlx5e_tc_tun_encap_dests_set(flow->priv, flow, attr, extack, &vf_tun); 1751 - if (err) 1752 - goto err_out; 1737 + if (mlx5e_is_eswitch_flow(flow) && has_encap_dests(attr)) { 1738 + err = mlx5e_tc_tun_encap_dests_set(flow->priv, flow, attr, extack, &vf_tun); 1739 + if (err) 1740 + goto err_out; 1741 + } 1753 1742 1754 1743 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) { 1755 1744 err = mlx5e_tc_attach_mod_hdr(flow->priv, flow, attr);
+1 -1
drivers/net/ethernet/mellanox/mlx5/core/esw/bridge_debugfs.c
··· 64 64 65 65 bridge->debugfs_dir = debugfs_create_dir(br_netdev->name, 66 66 bridge->br_offloads->debugfs_root); 67 - debugfs_create_file("fdb", 0444, bridge->debugfs_dir, bridge, 67 + debugfs_create_file("fdb", 0400, bridge->debugfs_dir, bridge, 68 68 &mlx5_esw_bridge_debugfs_fops); 69 69 } 70 70
+8 -9
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
··· 1518 1518 1519 1519 esw_init_chains_offload_flags(esw, &attr.flags); 1520 1520 attr.ns = MLX5_FLOW_NAMESPACE_FDB; 1521 - attr.fs_base_prio = FDB_TC_OFFLOAD; 1522 1521 attr.max_grp_num = esw->params.large_group_num; 1523 1522 attr.default_ft = miss_fdb; 1524 1523 attr.mapping = esw->offloads.reg_c0_obj_pool; ··· 2860 2861 struct mlx5_eswitch *peer_esw, 2861 2862 bool pair) 2862 2863 { 2863 - u8 peer_idx = mlx5_get_dev_index(peer_esw->dev); 2864 + u16 peer_vhca_id = MLX5_CAP_GEN(peer_esw->dev, vhca_id); 2865 + u16 vhca_id = MLX5_CAP_GEN(esw->dev, vhca_id); 2864 2866 struct mlx5_flow_root_namespace *peer_ns; 2865 - u8 idx = mlx5_get_dev_index(esw->dev); 2866 2867 struct mlx5_flow_root_namespace *ns; 2867 2868 int err; 2868 2869 ··· 2870 2871 ns = esw->dev->priv.steering->fdb_root_ns; 2871 2872 2872 2873 if (pair) { 2873 - err = mlx5_flow_namespace_set_peer(ns, peer_ns, peer_idx); 2874 + err = mlx5_flow_namespace_set_peer(ns, peer_ns, peer_vhca_id); 2874 2875 if (err) 2875 2876 return err; 2876 2877 2877 - err = mlx5_flow_namespace_set_peer(peer_ns, ns, idx); 2878 + err = mlx5_flow_namespace_set_peer(peer_ns, ns, vhca_id); 2878 2879 if (err) { 2879 - mlx5_flow_namespace_set_peer(ns, NULL, peer_idx); 2880 + mlx5_flow_namespace_set_peer(ns, NULL, peer_vhca_id); 2880 2881 return err; 2881 2882 } 2882 2883 } else { 2883 - mlx5_flow_namespace_set_peer(ns, NULL, peer_idx); 2884 - mlx5_flow_namespace_set_peer(peer_ns, NULL, idx); 2884 + mlx5_flow_namespace_set_peer(ns, NULL, peer_vhca_id); 2885 + mlx5_flow_namespace_set_peer(peer_ns, NULL, vhca_id); 2885 2886 } 2886 2887 2887 2888 return 0; ··· 4344 4345 } 4345 4346 4346 4347 hca_caps = MLX5_ADDR_OF(query_hca_cap_out, query_ctx, capability); 4347 - MLX5_SET(cmd_hca_cap_2, hca_caps, migratable, 1); 4348 + MLX5_SET(cmd_hca_cap_2, hca_caps, migratable, enable); 4348 4349 4349 4350 err = mlx5_vport_set_other_func_cap(esw->dev, hca_caps, vport->vport, 4350 4351 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE2);
+1 -1
drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c
··· 140 140 141 141 static int mlx5_cmd_stub_set_peer(struct mlx5_flow_root_namespace *ns, 142 142 struct mlx5_flow_root_namespace *peer_ns, 143 - u8 peer_idx) 143 + u16 peer_vhca_id) 144 144 { 145 145 return 0; 146 146 }
+1 -1
drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.h
··· 94 94 95 95 int (*set_peer)(struct mlx5_flow_root_namespace *ns, 96 96 struct mlx5_flow_root_namespace *peer_ns, 97 - u8 peer_idx); 97 + u16 peer_vhca_id); 98 98 99 99 int (*create_ns)(struct mlx5_flow_root_namespace *ns); 100 100 int (*destroy_ns)(struct mlx5_flow_root_namespace *ns);
+86 -23
drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
··· 889 889 struct fs_node *iter = list_entry(start, struct fs_node, list); 890 890 struct mlx5_flow_table *ft = NULL; 891 891 892 - if (!root || root->type == FS_TYPE_PRIO_CHAINS) 892 + if (!root) 893 893 return NULL; 894 894 895 895 list_for_each_advance_continue(iter, &root->children, reverse) { ··· 905 905 return ft; 906 906 } 907 907 908 - /* If reverse is false then return the first flow table in next priority of 909 - * prio in the tree, else return the last flow table in the previous priority 910 - * of prio in the tree. 911 - */ 912 - static struct mlx5_flow_table *find_closest_ft(struct fs_prio *prio, bool reverse) 908 + static struct fs_node *find_prio_chains_parent(struct fs_node *parent, 909 + struct fs_node **child) 913 910 { 911 + struct fs_node *node = NULL; 912 + 913 + while (parent && parent->type != FS_TYPE_PRIO_CHAINS) { 914 + node = parent; 915 + parent = parent->parent; 916 + } 917 + 918 + if (child) 919 + *child = node; 920 + 921 + return parent; 922 + } 923 + 924 + /* If reverse is false then return the first flow table next to the passed node 925 + * in the tree, else return the last flow table before the node in the tree. 926 + * If skip is true, skip the flow tables in the same prio_chains prio. 927 + */ 928 + static struct mlx5_flow_table *find_closest_ft(struct fs_node *node, bool reverse, 929 + bool skip) 930 + { 931 + struct fs_node *prio_chains_parent = NULL; 914 932 struct mlx5_flow_table *ft = NULL; 915 933 struct fs_node *curr_node; 916 934 struct fs_node *parent; 917 935 918 - parent = prio->node.parent; 919 - curr_node = &prio->node; 936 + if (skip) 937 + prio_chains_parent = find_prio_chains_parent(node, NULL); 938 + parent = node->parent; 939 + curr_node = node; 920 940 while (!ft && parent) { 921 - ft = find_closest_ft_recursive(parent, &curr_node->list, reverse); 941 + if (parent != prio_chains_parent) 942 + ft = find_closest_ft_recursive(parent, &curr_node->list, 943 + reverse); 922 944 curr_node = parent; 923 945 parent = curr_node->parent; 924 946 } ··· 948 926 } 949 927 950 928 /* Assuming all the tree is locked by mutex chain lock */ 951 - static struct mlx5_flow_table *find_next_chained_ft(struct fs_prio *prio) 929 + static struct mlx5_flow_table *find_next_chained_ft(struct fs_node *node) 952 930 { 953 - return find_closest_ft(prio, false); 931 + return find_closest_ft(node, false, true); 954 932 } 955 933 956 934 /* Assuming all the tree is locked by mutex chain lock */ 957 - static struct mlx5_flow_table *find_prev_chained_ft(struct fs_prio *prio) 935 + static struct mlx5_flow_table *find_prev_chained_ft(struct fs_node *node) 958 936 { 959 - return find_closest_ft(prio, true); 937 + return find_closest_ft(node, true, true); 960 938 } 961 939 962 940 static struct mlx5_flow_table *find_next_fwd_ft(struct mlx5_flow_table *ft, ··· 968 946 next_ns = flow_act->action & MLX5_FLOW_CONTEXT_ACTION_FWD_NEXT_NS; 969 947 fs_get_obj(prio, next_ns ? ft->ns->node.parent : ft->node.parent); 970 948 971 - return find_next_chained_ft(prio); 949 + return find_next_chained_ft(&prio->node); 972 950 } 973 951 974 952 static int connect_fts_in_prio(struct mlx5_core_dev *dev, ··· 992 970 return 0; 993 971 } 994 972 973 + static struct mlx5_flow_table *find_closet_ft_prio_chains(struct fs_node *node, 974 + struct fs_node *parent, 975 + struct fs_node **child, 976 + bool reverse) 977 + { 978 + struct mlx5_flow_table *ft; 979 + 980 + ft = find_closest_ft(node, reverse, false); 981 + 982 + if (ft && parent == find_prio_chains_parent(&ft->node, child)) 983 + return ft; 984 + 985 + return NULL; 986 + } 987 + 995 988 /* Connect flow tables from previous priority of prio to ft */ 996 989 static int connect_prev_fts(struct mlx5_core_dev *dev, 997 990 struct mlx5_flow_table *ft, 998 991 struct fs_prio *prio) 999 992 { 993 + struct fs_node *prio_parent, *parent = NULL, *child, *node; 1000 994 struct mlx5_flow_table *prev_ft; 995 + int err = 0; 1001 996 1002 - prev_ft = find_prev_chained_ft(prio); 1003 - if (prev_ft) { 997 + prio_parent = find_prio_chains_parent(&prio->node, &child); 998 + 999 + /* return directly if not under the first sub ns of prio_chains prio */ 1000 + if (prio_parent && !list_is_first(&child->list, &prio_parent->children)) 1001 + return 0; 1002 + 1003 + prev_ft = find_prev_chained_ft(&prio->node); 1004 + while (prev_ft) { 1004 1005 struct fs_prio *prev_prio; 1005 1006 1006 1007 fs_get_obj(prev_prio, prev_ft->node.parent); 1007 - return connect_fts_in_prio(dev, prev_prio, ft); 1008 + err = connect_fts_in_prio(dev, prev_prio, ft); 1009 + if (err) 1010 + break; 1011 + 1012 + if (!parent) { 1013 + parent = find_prio_chains_parent(&prev_prio->node, &child); 1014 + if (!parent) 1015 + break; 1016 + } 1017 + 1018 + node = child; 1019 + prev_ft = find_closet_ft_prio_chains(node, parent, &child, true); 1008 1020 } 1009 - return 0; 1021 + return err; 1010 1022 } 1011 1023 1012 1024 static int update_root_ft_create(struct mlx5_flow_table *ft, struct fs_prio ··· 1179 1123 if (err) 1180 1124 return err; 1181 1125 1182 - next_ft = first_ft ? first_ft : find_next_chained_ft(prio); 1126 + next_ft = first_ft ? first_ft : find_next_chained_ft(&prio->node); 1183 1127 err = connect_fwd_rules(dev, ft, next_ft); 1184 1128 if (err) 1185 1129 return err; ··· 1254 1198 1255 1199 tree_init_node(&ft->node, del_hw_flow_table, del_sw_flow_table); 1256 1200 next_ft = unmanaged ? ft_attr->next_ft : 1257 - find_next_chained_ft(fs_prio); 1201 + find_next_chained_ft(&fs_prio->node); 1258 1202 ft->def_miss_action = ns->def_miss_action; 1259 1203 ft->ns = ns; 1260 1204 err = root->cmds->create_flow_table(root, ft, ft_attr, next_ft); ··· 2251 2195 /* Assuming prio->node.children(flow tables) is sorted by level */ 2252 2196 static struct mlx5_flow_table *find_next_ft(struct mlx5_flow_table *ft) 2253 2197 { 2198 + struct fs_node *prio_parent, *child; 2254 2199 struct fs_prio *prio; 2255 2200 2256 2201 fs_get_obj(prio, ft->node.parent); 2257 2202 2258 2203 if (!list_is_last(&ft->node.list, &prio->node.children)) 2259 2204 return list_next_entry(ft, node.list); 2260 - return find_next_chained_ft(prio); 2205 + 2206 + prio_parent = find_prio_chains_parent(&prio->node, &child); 2207 + 2208 + if (prio_parent && list_is_first(&child->list, &prio_parent->children)) 2209 + return find_closest_ft(&prio->node, false, false); 2210 + 2211 + return find_next_chained_ft(&prio->node); 2261 2212 } 2262 2213 2263 2214 static int update_root_ft_destroy(struct mlx5_flow_table *ft) ··· 3696 3633 3697 3634 int mlx5_flow_namespace_set_peer(struct mlx5_flow_root_namespace *ns, 3698 3635 struct mlx5_flow_root_namespace *peer_ns, 3699 - u8 peer_idx) 3636 + u16 peer_vhca_id) 3700 3637 { 3701 3638 if (peer_ns && ns->mode != peer_ns->mode) { 3702 3639 mlx5_core_err(ns->dev, ··· 3704 3641 return -EINVAL; 3705 3642 } 3706 3643 3707 - return ns->cmds->set_peer(ns, peer_ns, peer_idx); 3644 + return ns->cmds->set_peer(ns, peer_ns, peer_vhca_id); 3708 3645 } 3709 3646 3710 3647 /* This function should be called only at init stage of the namespace.
+1 -1
drivers/net/ethernet/mellanox/mlx5/core/fs_core.h
··· 303 303 304 304 int mlx5_flow_namespace_set_peer(struct mlx5_flow_root_namespace *ns, 305 305 struct mlx5_flow_root_namespace *peer_ns, 306 - u8 peer_idx); 306 + u16 peer_vhca_id); 307 307 308 308 int mlx5_flow_namespace_set_mode(struct mlx5_flow_namespace *ns, 309 309 enum mlx5_flow_steering_mode mode);
+1 -1
drivers/net/ethernet/mellanox/mlx5/core/lib/fs_chains.c
··· 178 178 if (!mlx5_chains_ignore_flow_level_supported(chains) || 179 179 (chain == 0 && prio == 1 && level == 0)) { 180 180 ft_attr.level = chains->fs_base_level; 181 - ft_attr.prio = chains->fs_base_prio; 181 + ft_attr.prio = chains->fs_base_prio + prio - 1; 182 182 ns = (chains->ns == MLX5_FLOW_NAMESPACE_FDB) ? 183 183 mlx5_get_fdb_sub_ns(chains->dev, chain) : 184 184 mlx5_get_flow_namespace(chains->dev, chains->ns);
+1
drivers/net/ethernet/mellanox/mlx5/core/main.c
··· 1506 1506 if (!test_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state)) { 1507 1507 mlx5_core_warn(dev, "%s: interface is down, NOP\n", 1508 1508 __func__); 1509 + mlx5_devlink_params_unregister(priv_to_devlink(dev)); 1509 1510 mlx5_cleanup_once(dev); 1510 1511 goto out; 1511 1512 }
+1 -1
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_action.c
··· 2079 2079 2080 2080 peer_vport = vhca_id_valid && mlx5_core_is_pf(dmn->mdev) && 2081 2081 (vhca_id != dmn->info.caps.gvmi); 2082 - vport_dmn = peer_vport ? dmn->peer_dmn[vhca_id] : dmn; 2082 + vport_dmn = peer_vport ? xa_load(&dmn->peer_dmn_xa, vhca_id) : dmn; 2083 2083 if (!vport_dmn) { 2084 2084 mlx5dr_dbg(dmn, "No peer vport domain for given vhca_id\n"); 2085 2085 return NULL;
+3 -2
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_cmd.c
··· 564 564 565 565 err = mlx5_cmd_exec(mdev, in, inlen, out, sizeof(out)); 566 566 if (err) 567 - return err; 567 + goto err_free_in; 568 568 569 569 *reformat_id = MLX5_GET(alloc_packet_reformat_context_out, out, packet_reformat_id); 570 - kvfree(in); 571 570 571 + err_free_in: 572 + kvfree(in); 572 573 return err; 573 574 } 574 575
+13 -6
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_domain.c
··· 475 475 mutex_init(&dmn->info.rx.mutex); 476 476 mutex_init(&dmn->info.tx.mutex); 477 477 xa_init(&dmn->definers_xa); 478 + xa_init(&dmn->peer_dmn_xa); 478 479 479 480 if (dr_domain_caps_init(mdev, dmn)) { 480 481 mlx5dr_err(dmn, "Failed init domain, no caps\n"); ··· 508 507 uninit_caps: 509 508 dr_domain_caps_uninit(dmn); 510 509 def_xa_destroy: 510 + xa_destroy(&dmn->peer_dmn_xa); 511 511 xa_destroy(&dmn->definers_xa); 512 512 kfree(dmn); 513 513 return NULL; ··· 549 547 dr_domain_uninit_csum_recalc_fts(dmn); 550 548 dr_domain_uninit_resources(dmn); 551 549 dr_domain_caps_uninit(dmn); 550 + xa_destroy(&dmn->peer_dmn_xa); 552 551 xa_destroy(&dmn->definers_xa); 553 552 mutex_destroy(&dmn->info.tx.mutex); 554 553 mutex_destroy(&dmn->info.rx.mutex); ··· 559 556 560 557 void mlx5dr_domain_set_peer(struct mlx5dr_domain *dmn, 561 558 struct mlx5dr_domain *peer_dmn, 562 - u8 peer_idx) 559 + u16 peer_vhca_id) 563 560 { 561 + struct mlx5dr_domain *peer; 562 + 564 563 mlx5dr_domain_lock(dmn); 565 564 566 - if (dmn->peer_dmn[peer_idx]) 567 - refcount_dec(&dmn->peer_dmn[peer_idx]->refcount); 565 + peer = xa_load(&dmn->peer_dmn_xa, peer_vhca_id); 566 + if (peer) 567 + refcount_dec(&peer->refcount); 568 568 569 - dmn->peer_dmn[peer_idx] = peer_dmn; 569 + WARN_ON(xa_err(xa_store(&dmn->peer_dmn_xa, peer_vhca_id, peer_dmn, GFP_KERNEL))); 570 570 571 - if (dmn->peer_dmn[peer_idx]) 572 - refcount_inc(&dmn->peer_dmn[peer_idx]->refcount); 571 + peer = xa_load(&dmn->peer_dmn_xa, peer_vhca_id); 572 + if (peer) 573 + refcount_inc(&peer->refcount); 573 574 574 575 mlx5dr_domain_unlock(dmn); 575 576 }
+4 -3
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v0.c
··· 1652 1652 struct mlx5dr_domain *dmn = sb->dmn; 1653 1653 struct mlx5dr_domain *vport_dmn; 1654 1654 u8 *bit_mask = sb->bit_mask; 1655 + struct mlx5dr_domain *peer; 1655 1656 bool source_gvmi_set; 1656 1657 1657 1658 DR_STE_SET_TAG(src_gvmi_qp, tag, source_qp, misc, source_sqn); 1658 1659 1659 1660 if (sb->vhca_id_valid) { 1661 + peer = xa_load(&dmn->peer_dmn_xa, id); 1660 1662 /* Find port GVMI based on the eswitch_owner_vhca_id */ 1661 1663 if (id == dmn->info.caps.gvmi) 1662 1664 vport_dmn = dmn; 1663 - else if (id < MLX5_MAX_PORTS && dmn->peer_dmn[id] && 1664 - (id == dmn->peer_dmn[id]->info.caps.gvmi)) 1665 - vport_dmn = dmn->peer_dmn[id]; 1665 + else if (peer && (id == peer->info.caps.gvmi)) 1666 + vport_dmn = peer; 1666 1667 else 1667 1668 return -EINVAL; 1668 1669
+4 -3
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v1.c
··· 1984 1984 struct mlx5dr_domain *dmn = sb->dmn; 1985 1985 struct mlx5dr_domain *vport_dmn; 1986 1986 u8 *bit_mask = sb->bit_mask; 1987 + struct mlx5dr_domain *peer; 1987 1988 1988 1989 DR_STE_SET_TAG(src_gvmi_qp_v1, tag, source_qp, misc, source_sqn); 1989 1990 1990 1991 if (sb->vhca_id_valid) { 1992 + peer = xa_load(&dmn->peer_dmn_xa, id); 1991 1993 /* Find port GVMI based on the eswitch_owner_vhca_id */ 1992 1994 if (id == dmn->info.caps.gvmi) 1993 1995 vport_dmn = dmn; 1994 - else if (id < MLX5_MAX_PORTS && dmn->peer_dmn[id] && 1995 - (id == dmn->peer_dmn[id]->info.caps.gvmi)) 1996 - vport_dmn = dmn->peer_dmn[id]; 1996 + else if (peer && (id == peer->info.caps.gvmi)) 1997 + vport_dmn = peer; 1997 1998 else 1998 1999 return -EINVAL; 1999 2000
+1 -1
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h
··· 935 935 }; 936 936 937 937 struct mlx5dr_domain { 938 - struct mlx5dr_domain *peer_dmn[MLX5_MAX_PORTS]; 939 938 struct mlx5_core_dev *mdev; 940 939 u32 pdn; 941 940 struct mlx5_uars_page *uar; ··· 955 956 struct list_head dbg_tbl_list; 956 957 struct mlx5dr_dbg_dump_info dump_info; 957 958 struct xarray definers_xa; 959 + struct xarray peer_dmn_xa; 958 960 /* memory management statistics */ 959 961 u32 num_buddies[DR_ICM_TYPE_MAX]; 960 962 };
+2 -2
drivers/net/ethernet/mellanox/mlx5/core/steering/fs_dr.c
··· 781 781 782 782 static int mlx5_cmd_dr_set_peer(struct mlx5_flow_root_namespace *ns, 783 783 struct mlx5_flow_root_namespace *peer_ns, 784 - u8 peer_idx) 784 + u16 peer_vhca_id) 785 785 { 786 786 struct mlx5dr_domain *peer_domain = NULL; 787 787 788 788 if (peer_ns) 789 789 peer_domain = peer_ns->fs_dr_domain.dr_domain; 790 790 mlx5dr_domain_set_peer(ns->fs_dr_domain.dr_domain, 791 - peer_domain, peer_idx); 791 + peer_domain, peer_vhca_id); 792 792 return 0; 793 793 } 794 794
+1 -1
drivers/net/ethernet/mellanox/mlx5/core/steering/mlx5dr.h
··· 49 49 50 50 void mlx5dr_domain_set_peer(struct mlx5dr_domain *dmn, 51 51 struct mlx5dr_domain *peer_dmn, 52 - u8 peer_idx); 52 + u16 peer_vhca_id); 53 53 54 54 struct mlx5dr_table * 55 55 mlx5dr_table_create(struct mlx5dr_domain *domain, u32 level, u32 flags,
+16
drivers/net/ethernet/qlogic/qed/qed_dev_api.h
··· 194 194 struct qed_ptt *qed_ptt_acquire(struct qed_hwfn *p_hwfn); 195 195 196 196 /** 197 + * qed_ptt_acquire_context(): Allocate a PTT window honoring the context 198 + * atomicy. 199 + * 200 + * @p_hwfn: HW device data. 201 + * @is_atomic: Hint from the caller - if the func can sleep or not. 202 + * 203 + * Context: The function should not sleep in case is_atomic == true. 204 + * Return: struct qed_ptt. 205 + * 206 + * Should be called at the entry point to the driver 207 + * (at the beginning of an exported function). 208 + */ 209 + struct qed_ptt *qed_ptt_acquire_context(struct qed_hwfn *p_hwfn, 210 + bool is_atomic); 211 + 212 + /** 197 213 * qed_ptt_release(): Release PTT Window. 198 214 * 199 215 * @p_hwfn: HW device data.
+14 -5
drivers/net/ethernet/qlogic/qed/qed_fcoe.c
··· 693 693 } 694 694 695 695 static int qed_fcoe_get_stats(struct qed_hwfn *p_hwfn, 696 - struct qed_fcoe_stats *p_stats) 696 + struct qed_fcoe_stats *p_stats, 697 + bool is_atomic) 697 698 { 698 699 struct qed_ptt *p_ptt; 699 700 700 701 memset(p_stats, 0, sizeof(*p_stats)); 701 702 702 - p_ptt = qed_ptt_acquire(p_hwfn); 703 + p_ptt = qed_ptt_acquire_context(p_hwfn, is_atomic); 703 704 704 705 if (!p_ptt) { 705 706 DP_ERR(p_hwfn, "Failed to acquire ptt\n"); ··· 974 973 QED_SPQ_MODE_EBLOCK, NULL); 975 974 } 976 975 976 + static int qed_fcoe_stats_context(struct qed_dev *cdev, 977 + struct qed_fcoe_stats *stats, 978 + bool is_atomic) 979 + { 980 + return qed_fcoe_get_stats(QED_AFFIN_HWFN(cdev), stats, is_atomic); 981 + } 982 + 977 983 static int qed_fcoe_stats(struct qed_dev *cdev, struct qed_fcoe_stats *stats) 978 984 { 979 - return qed_fcoe_get_stats(QED_AFFIN_HWFN(cdev), stats); 985 + return qed_fcoe_stats_context(cdev, stats, false); 980 986 } 981 987 982 988 void qed_get_protocol_stats_fcoe(struct qed_dev *cdev, 983 - struct qed_mcp_fcoe_stats *stats) 989 + struct qed_mcp_fcoe_stats *stats, 990 + bool is_atomic) 984 991 { 985 992 struct qed_fcoe_stats proto_stats; 986 993 987 994 /* Retrieve FW statistics */ 988 995 memset(&proto_stats, 0, sizeof(proto_stats)); 989 - if (qed_fcoe_stats(cdev, &proto_stats)) { 996 + if (qed_fcoe_stats_context(cdev, &proto_stats, is_atomic)) { 990 997 DP_VERBOSE(cdev, QED_MSG_STORAGE, 991 998 "Failed to collect FCoE statistics\n"); 992 999 return;
+15 -2
drivers/net/ethernet/qlogic/qed/qed_fcoe.h
··· 28 28 void qed_fcoe_setup(struct qed_hwfn *p_hwfn); 29 29 30 30 void qed_fcoe_free(struct qed_hwfn *p_hwfn); 31 + /** 32 + * qed_get_protocol_stats_fcoe(): Fills provided statistics 33 + * struct with statistics. 34 + * 35 + * @cdev: Qed dev pointer. 36 + * @stats: Points to struct that will be filled with statistics. 37 + * @is_atomic: Hint from the caller - if the func can sleep or not. 38 + * 39 + * Context: The function should not sleep in case is_atomic == true. 40 + * Return: Void. 41 + */ 31 42 void qed_get_protocol_stats_fcoe(struct qed_dev *cdev, 32 - struct qed_mcp_fcoe_stats *stats); 43 + struct qed_mcp_fcoe_stats *stats, 44 + bool is_atomic); 33 45 #else /* CONFIG_QED_FCOE */ 34 46 static inline int qed_fcoe_alloc(struct qed_hwfn *p_hwfn) 35 47 { ··· 52 40 static inline void qed_fcoe_free(struct qed_hwfn *p_hwfn) {} 53 41 54 42 static inline void qed_get_protocol_stats_fcoe(struct qed_dev *cdev, 55 - struct qed_mcp_fcoe_stats *stats) 43 + struct qed_mcp_fcoe_stats *stats, 44 + bool is_atomic) 56 45 { 57 46 } 58 47 #endif /* CONFIG_QED_FCOE */
+22 -4
drivers/net/ethernet/qlogic/qed/qed_hw.c
··· 23 23 #include "qed_reg_addr.h" 24 24 #include "qed_sriov.h" 25 25 26 - #define QED_BAR_ACQUIRE_TIMEOUT 1000 26 + #define QED_BAR_ACQUIRE_TIMEOUT_USLEEP_CNT 1000 27 + #define QED_BAR_ACQUIRE_TIMEOUT_USLEEP 1000 28 + #define QED_BAR_ACQUIRE_TIMEOUT_UDELAY_CNT 100000 29 + #define QED_BAR_ACQUIRE_TIMEOUT_UDELAY 10 27 30 28 31 /* Invalid values */ 29 32 #define QED_BAR_INVALID_OFFSET (cpu_to_le32(-1)) ··· 88 85 89 86 struct qed_ptt *qed_ptt_acquire(struct qed_hwfn *p_hwfn) 90 87 { 88 + return qed_ptt_acquire_context(p_hwfn, false); 89 + } 90 + 91 + struct qed_ptt *qed_ptt_acquire_context(struct qed_hwfn *p_hwfn, bool is_atomic) 92 + { 91 93 struct qed_ptt *p_ptt; 92 - unsigned int i; 94 + unsigned int i, count; 95 + 96 + if (is_atomic) 97 + count = QED_BAR_ACQUIRE_TIMEOUT_UDELAY_CNT; 98 + else 99 + count = QED_BAR_ACQUIRE_TIMEOUT_USLEEP_CNT; 93 100 94 101 /* Take the free PTT from the list */ 95 - for (i = 0; i < QED_BAR_ACQUIRE_TIMEOUT; i++) { 102 + for (i = 0; i < count; i++) { 96 103 spin_lock_bh(&p_hwfn->p_ptt_pool->lock); 97 104 98 105 if (!list_empty(&p_hwfn->p_ptt_pool->free_list)) { ··· 118 105 } 119 106 120 107 spin_unlock_bh(&p_hwfn->p_ptt_pool->lock); 121 - usleep_range(1000, 2000); 108 + 109 + if (is_atomic) 110 + udelay(QED_BAR_ACQUIRE_TIMEOUT_UDELAY); 111 + else 112 + usleep_range(QED_BAR_ACQUIRE_TIMEOUT_USLEEP, 113 + QED_BAR_ACQUIRE_TIMEOUT_USLEEP * 2); 122 114 } 123 115 124 116 DP_NOTICE(p_hwfn, "PTT acquire timeout - failed to allocate PTT\n");
+14 -5
drivers/net/ethernet/qlogic/qed/qed_iscsi.c
··· 999 999 } 1000 1000 1001 1001 static int qed_iscsi_get_stats(struct qed_hwfn *p_hwfn, 1002 - struct qed_iscsi_stats *stats) 1002 + struct qed_iscsi_stats *stats, 1003 + bool is_atomic) 1003 1004 { 1004 1005 struct qed_ptt *p_ptt; 1005 1006 1006 1007 memset(stats, 0, sizeof(*stats)); 1007 1008 1008 - p_ptt = qed_ptt_acquire(p_hwfn); 1009 + p_ptt = qed_ptt_acquire_context(p_hwfn, is_atomic); 1009 1010 if (!p_ptt) { 1010 1011 DP_ERR(p_hwfn, "Failed to acquire ptt\n"); 1011 1012 return -EAGAIN; ··· 1337 1336 QED_SPQ_MODE_EBLOCK, NULL); 1338 1337 } 1339 1338 1339 + static int qed_iscsi_stats_context(struct qed_dev *cdev, 1340 + struct qed_iscsi_stats *stats, 1341 + bool is_atomic) 1342 + { 1343 + return qed_iscsi_get_stats(QED_AFFIN_HWFN(cdev), stats, is_atomic); 1344 + } 1345 + 1340 1346 static int qed_iscsi_stats(struct qed_dev *cdev, struct qed_iscsi_stats *stats) 1341 1347 { 1342 - return qed_iscsi_get_stats(QED_AFFIN_HWFN(cdev), stats); 1348 + return qed_iscsi_stats_context(cdev, stats, false); 1343 1349 } 1344 1350 1345 1351 static int qed_iscsi_change_mac(struct qed_dev *cdev, ··· 1366 1358 } 1367 1359 1368 1360 void qed_get_protocol_stats_iscsi(struct qed_dev *cdev, 1369 - struct qed_mcp_iscsi_stats *stats) 1361 + struct qed_mcp_iscsi_stats *stats, 1362 + bool is_atomic) 1370 1363 { 1371 1364 struct qed_iscsi_stats proto_stats; 1372 1365 1373 1366 /* Retrieve FW statistics */ 1374 1367 memset(&proto_stats, 0, sizeof(proto_stats)); 1375 - if (qed_iscsi_stats(cdev, &proto_stats)) { 1368 + if (qed_iscsi_stats_context(cdev, &proto_stats, is_atomic)) { 1376 1369 DP_VERBOSE(cdev, QED_MSG_STORAGE, 1377 1370 "Failed to collect ISCSI statistics\n"); 1378 1371 return;
+6 -2
drivers/net/ethernet/qlogic/qed/qed_iscsi.h
··· 39 39 * 40 40 * @cdev: Qed dev pointer. 41 41 * @stats: Points to struct that will be filled with statistics. 42 + * @is_atomic: Hint from the caller - if the func can sleep or not. 42 43 * 44 + * Context: The function should not sleep in case is_atomic == true. 43 45 * Return: Void. 44 46 */ 45 47 void qed_get_protocol_stats_iscsi(struct qed_dev *cdev, 46 - struct qed_mcp_iscsi_stats *stats); 48 + struct qed_mcp_iscsi_stats *stats, 49 + bool is_atomic); 47 50 #else /* IS_ENABLED(CONFIG_QED_ISCSI) */ 48 51 static inline int qed_iscsi_alloc(struct qed_hwfn *p_hwfn) 49 52 { ··· 59 56 60 57 static inline void 61 58 qed_get_protocol_stats_iscsi(struct qed_dev *cdev, 62 - struct qed_mcp_iscsi_stats *stats) {} 59 + struct qed_mcp_iscsi_stats *stats, 60 + bool is_atomic) {} 63 61 #endif /* IS_ENABLED(CONFIG_QED_ISCSI) */ 64 62 65 63 #endif
+14 -5
drivers/net/ethernet/qlogic/qed/qed_l2.c
··· 1863 1863 } 1864 1864 1865 1865 static void _qed_get_vport_stats(struct qed_dev *cdev, 1866 - struct qed_eth_stats *stats) 1866 + struct qed_eth_stats *stats, 1867 + bool is_atomic) 1867 1868 { 1868 1869 u8 fw_vport = 0; 1869 1870 int i; ··· 1873 1872 1874 1873 for_each_hwfn(cdev, i) { 1875 1874 struct qed_hwfn *p_hwfn = &cdev->hwfns[i]; 1876 - struct qed_ptt *p_ptt = IS_PF(cdev) ? qed_ptt_acquire(p_hwfn) 1877 - : NULL; 1875 + struct qed_ptt *p_ptt; 1878 1876 bool b_get_port_stats; 1879 1877 1878 + p_ptt = IS_PF(cdev) ? qed_ptt_acquire_context(p_hwfn, is_atomic) 1879 + : NULL; 1880 1880 if (IS_PF(cdev)) { 1881 1881 /* The main vport index is relative first */ 1882 1882 if (qed_fw_vport(p_hwfn, 0, &fw_vport)) { ··· 1903 1901 1904 1902 void qed_get_vport_stats(struct qed_dev *cdev, struct qed_eth_stats *stats) 1905 1903 { 1904 + qed_get_vport_stats_context(cdev, stats, false); 1905 + } 1906 + 1907 + void qed_get_vport_stats_context(struct qed_dev *cdev, 1908 + struct qed_eth_stats *stats, 1909 + bool is_atomic) 1910 + { 1906 1911 u32 i; 1907 1912 1908 1913 if (!cdev || cdev->recov_in_prog) { ··· 1917 1908 return; 1918 1909 } 1919 1910 1920 - _qed_get_vport_stats(cdev, stats); 1911 + _qed_get_vport_stats(cdev, stats, is_atomic); 1921 1912 1922 1913 if (!cdev->reset_stats) 1923 1914 return; ··· 1969 1960 if (!cdev->reset_stats) { 1970 1961 DP_INFO(cdev, "Reset stats not allocated\n"); 1971 1962 } else { 1972 - _qed_get_vport_stats(cdev, cdev->reset_stats); 1963 + _qed_get_vport_stats(cdev, cdev->reset_stats, false); 1973 1964 cdev->reset_stats->common.link_change_count = 0; 1974 1965 } 1975 1966 }
+24
drivers/net/ethernet/qlogic/qed/qed_l2.h
··· 249 249 enum spq_mode comp_mode, 250 250 struct qed_spq_comp_cb *p_comp_data); 251 251 252 + /** 253 + * qed_get_vport_stats(): Fills provided statistics 254 + * struct with statistics. 255 + * 256 + * @cdev: Qed dev pointer. 257 + * @stats: Points to struct that will be filled with statistics. 258 + * 259 + * Return: Void. 260 + */ 252 261 void qed_get_vport_stats(struct qed_dev *cdev, struct qed_eth_stats *stats); 262 + 263 + /** 264 + * qed_get_vport_stats_context(): Fills provided statistics 265 + * struct with statistics. 266 + * 267 + * @cdev: Qed dev pointer. 268 + * @stats: Points to struct that will be filled with statistics. 269 + * @is_atomic: Hint from the caller - if the func can sleep or not. 270 + * 271 + * Context: The function should not sleep in case is_atomic == true. 272 + * Return: Void. 273 + */ 274 + void qed_get_vport_stats_context(struct qed_dev *cdev, 275 + struct qed_eth_stats *stats, 276 + bool is_atomic); 253 277 254 278 void qed_reset_vport_stats(struct qed_dev *cdev); 255 279
+3 -3
drivers/net/ethernet/qlogic/qed/qed_main.c
··· 3092 3092 3093 3093 switch (type) { 3094 3094 case QED_MCP_LAN_STATS: 3095 - qed_get_vport_stats(cdev, &eth_stats); 3095 + qed_get_vport_stats_context(cdev, &eth_stats, true); 3096 3096 stats->lan_stats.ucast_rx_pkts = 3097 3097 eth_stats.common.rx_ucast_pkts; 3098 3098 stats->lan_stats.ucast_tx_pkts = ··· 3100 3100 stats->lan_stats.fcs_err = -1; 3101 3101 break; 3102 3102 case QED_MCP_FCOE_STATS: 3103 - qed_get_protocol_stats_fcoe(cdev, &stats->fcoe_stats); 3103 + qed_get_protocol_stats_fcoe(cdev, &stats->fcoe_stats, true); 3104 3104 break; 3105 3105 case QED_MCP_ISCSI_STATS: 3106 - qed_get_protocol_stats_iscsi(cdev, &stats->iscsi_stats); 3106 + qed_get_protocol_stats_iscsi(cdev, &stats->iscsi_stats, true); 3107 3107 break; 3108 3108 default: 3109 3109 DP_VERBOSE(cdev, QED_MSG_SP,
+13 -10
drivers/net/ethernet/sfc/falcon/selftest.c
··· 40 40 */ 41 41 struct ef4_loopback_payload { 42 42 char pad[2]; /* Ensures ip is 4-byte aligned */ 43 - struct ethhdr header; 44 - struct iphdr ip; 45 - struct udphdr udp; 46 - __be16 iteration; 47 - char msg[64]; 43 + struct_group_attr(packet, __packed, 44 + struct ethhdr header; 45 + struct iphdr ip; 46 + struct udphdr udp; 47 + __be16 iteration; 48 + char msg[64]; 49 + ); 48 50 } __packed __aligned(4); 49 - #define EF4_LOOPBACK_PAYLOAD_LEN (sizeof(struct ef4_loopback_payload) - \ 50 - offsetof(struct ef4_loopback_payload, \ 51 - header)) 51 + #define EF4_LOOPBACK_PAYLOAD_LEN \ 52 + sizeof_field(struct ef4_loopback_payload, packet) 52 53 53 54 /* Loopback test source MAC address */ 54 55 static const u8 payload_source[ETH_ALEN] __aligned(2) = { ··· 300 299 301 300 payload = &state->payload; 302 301 303 - memcpy(&received.header, buf_ptr, 302 + memcpy(&received.packet, buf_ptr, 304 303 min_t(int, pkt_len, EF4_LOOPBACK_PAYLOAD_LEN)); 305 304 received.ip.saddr = payload->ip.saddr; 306 305 if (state->offload_csum) ··· 371 370 buf_ptr, pkt_len, 0); 372 371 netif_err(efx, drv, efx->net_dev, "expected packet:\n"); 373 372 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 0x10, 1, 374 - &state->payload.header, EF4_LOOPBACK_PAYLOAD_LEN, 373 + &state->payload.packet, EF4_LOOPBACK_PAYLOAD_LEN, 375 374 0); 376 375 } 377 376 #endif ··· 441 440 payload->ip.saddr = htonl(INADDR_LOOPBACK | (i << 2)); 442 441 /* Strip off the leading padding */ 443 442 skb_pull(skb, offsetof(struct ef4_loopback_payload, header)); 443 + /* Strip off the trailing padding */ 444 + skb_trim(skb, EF4_LOOPBACK_PAYLOAD_LEN); 444 445 445 446 /* Ensure everything we've written is visible to the 446 447 * interrupt handler. */
+13 -10
drivers/net/ethernet/sfc/selftest.c
··· 42 42 */ 43 43 struct efx_loopback_payload { 44 44 char pad[2]; /* Ensures ip is 4-byte aligned */ 45 - struct ethhdr header; 46 - struct iphdr ip; 47 - struct udphdr udp; 48 - __be16 iteration; 49 - char msg[64]; 45 + struct_group_attr(packet, __packed, 46 + struct ethhdr header; 47 + struct iphdr ip; 48 + struct udphdr udp; 49 + __be16 iteration; 50 + char msg[64]; 51 + ); 50 52 } __packed __aligned(4); 51 - #define EFX_LOOPBACK_PAYLOAD_LEN (sizeof(struct efx_loopback_payload) - \ 52 - offsetof(struct efx_loopback_payload, \ 53 - header)) 53 + #define EFX_LOOPBACK_PAYLOAD_LEN \ 54 + sizeof_field(struct efx_loopback_payload, packet) 54 55 55 56 /* Loopback test source MAC address */ 56 57 static const u8 payload_source[ETH_ALEN] __aligned(2) = { ··· 297 296 298 297 payload = &state->payload; 299 298 300 - memcpy(&received.header, buf_ptr, 299 + memcpy(&received.packet, buf_ptr, 301 300 min_t(int, pkt_len, EFX_LOOPBACK_PAYLOAD_LEN)); 302 301 received.ip.saddr = payload->ip.saddr; 303 302 if (state->offload_csum) ··· 368 367 buf_ptr, pkt_len, 0); 369 368 netif_err(efx, drv, efx->net_dev, "expected packet:\n"); 370 369 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 0x10, 1, 371 - &state->payload.header, EFX_LOOPBACK_PAYLOAD_LEN, 370 + &state->payload.packet, EFX_LOOPBACK_PAYLOAD_LEN, 372 371 0); 373 372 } 374 373 #endif ··· 438 437 payload->ip.saddr = htonl(INADDR_LOOPBACK | (i << 2)); 439 438 /* Strip off the leading padding */ 440 439 skb_pull(skb, offsetof(struct efx_loopback_payload, header)); 440 + /* Strip off the trailing padding */ 441 + skb_trim(skb, EFX_LOOPBACK_PAYLOAD_LEN); 441 442 442 443 /* Ensure everything we've written is visible to the 443 444 * interrupt handler. */
+13 -10
drivers/net/ethernet/sfc/siena/selftest.c
··· 43 43 */ 44 44 struct efx_loopback_payload { 45 45 char pad[2]; /* Ensures ip is 4-byte aligned */ 46 - struct ethhdr header; 47 - struct iphdr ip; 48 - struct udphdr udp; 49 - __be16 iteration; 50 - char msg[64]; 46 + struct_group_attr(packet, __packed, 47 + struct ethhdr header; 48 + struct iphdr ip; 49 + struct udphdr udp; 50 + __be16 iteration; 51 + char msg[64]; 52 + ); 51 53 } __packed __aligned(4); 52 - #define EFX_LOOPBACK_PAYLOAD_LEN (sizeof(struct efx_loopback_payload) - \ 53 - offsetof(struct efx_loopback_payload, \ 54 - header)) 54 + #define EFX_LOOPBACK_PAYLOAD_LEN \ 55 + sizeof_field(struct efx_loopback_payload, packet) 55 56 56 57 /* Loopback test source MAC address */ 57 58 static const u8 payload_source[ETH_ALEN] __aligned(2) = { ··· 298 297 299 298 payload = &state->payload; 300 299 301 - memcpy(&received.header, buf_ptr, 300 + memcpy(&received.packet, buf_ptr, 302 301 min_t(int, pkt_len, EFX_LOOPBACK_PAYLOAD_LEN)); 303 302 received.ip.saddr = payload->ip.saddr; 304 303 if (state->offload_csum) ··· 369 368 buf_ptr, pkt_len, 0); 370 369 netif_err(efx, drv, efx->net_dev, "expected packet:\n"); 371 370 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 0x10, 1, 372 - &state->payload.header, EFX_LOOPBACK_PAYLOAD_LEN, 371 + &state->payload.packet, EFX_LOOPBACK_PAYLOAD_LEN, 373 372 0); 374 373 } 375 374 #endif ··· 439 438 payload->ip.saddr = htonl(INADDR_LOOPBACK | (i << 2)); 440 439 /* Strip off the leading padding */ 441 440 skb_pull(skb, offsetof(struct efx_loopback_payload, header)); 441 + /* Strip off the trailing padding */ 442 + skb_trim(skb, EFX_LOOPBACK_PAYLOAD_LEN); 442 443 443 444 /* Ensure everything we've written is visible to the 444 445 * interrupt handler. */
+11
drivers/net/ethernet/socionext/netsec.c
··· 1851 1851 return err; 1852 1852 } 1853 1853 1854 + /* 1855 + * SynQuacer is physically configured with TX and RX delays 1856 + * but the standard firmware claimed otherwise for a long 1857 + * time, ignore it. 1858 + */ 1859 + if (of_machine_is_compatible("socionext,developer-box") && 1860 + priv->phy_interface != PHY_INTERFACE_MODE_RGMII_ID) { 1861 + dev_warn(&pdev->dev, "Outdated firmware reports incorrect PHY mode, overriding\n"); 1862 + priv->phy_interface = PHY_INTERFACE_MODE_RGMII_ID; 1863 + } 1864 + 1854 1865 priv->phy_np = of_parse_phandle(pdev->dev.of_node, "phy-handle", 0); 1855 1866 if (!priv->phy_np) { 1856 1867 dev_err(&pdev->dev, "missing required property 'phy-handle'\n");
+2 -1
drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c
··· 234 234 res.addr = mgbe->regs; 235 235 res.irq = irq; 236 236 237 - mgbe->clks = devm_kzalloc(&pdev->dev, sizeof(*mgbe->clks), GFP_KERNEL); 237 + mgbe->clks = devm_kcalloc(&pdev->dev, ARRAY_SIZE(mgbe_clks), 238 + sizeof(*mgbe->clks), GFP_KERNEL); 238 239 if (!mgbe->clks) 239 240 return -ENOMEM; 240 241
+8 -4
drivers/net/ethernet/xilinx/ll_temac_main.c
··· 1565 1565 } 1566 1566 1567 1567 /* Error handle returned DMA RX and TX interrupts */ 1568 - if (lp->rx_irq < 0) 1569 - return dev_err_probe(&pdev->dev, lp->rx_irq, 1568 + if (lp->rx_irq <= 0) { 1569 + rc = lp->rx_irq ?: -EINVAL; 1570 + return dev_err_probe(&pdev->dev, rc, 1570 1571 "could not get DMA RX irq\n"); 1571 - if (lp->tx_irq < 0) 1572 - return dev_err_probe(&pdev->dev, lp->tx_irq, 1572 + } 1573 + if (lp->tx_irq <= 0) { 1574 + rc = lp->tx_irq ?: -EINVAL; 1575 + return dev_err_probe(&pdev->dev, rc, 1573 1576 "could not get DMA TX irq\n"); 1577 + } 1574 1578 1575 1579 if (temac_np) { 1576 1580 /* Retrieve the MAC address */
+1 -1
drivers/net/tap.c
··· 534 534 q->sock.state = SS_CONNECTED; 535 535 q->sock.file = file; 536 536 q->sock.ops = &tap_socket_ops; 537 - sock_init_data_uid(&q->sock, &q->sk, inode->i_uid); 537 + sock_init_data_uid(&q->sock, &q->sk, current_fsuid()); 538 538 q->sk.sk_write_space = tap_sock_write_space; 539 539 q->sk.sk_destruct = tap_sock_destruct; 540 540 q->flags = IFF_VNET_HDR | IFF_NO_PI | IFF_TAP;
+1 -1
drivers/net/tun.c
··· 3471 3471 tfile->socket.file = file; 3472 3472 tfile->socket.ops = &tun_socket_ops; 3473 3473 3474 - sock_init_data_uid(&tfile->socket, &tfile->sk, inode->i_uid); 3474 + sock_init_data_uid(&tfile->socket, &tfile->sk, current_fsuid()); 3475 3475 3476 3476 tfile->sk.sk_write_space = tun_sock_write_space; 3477 3477 tfile->sk.sk_sndbuf = INT_MAX;
+21
drivers/net/usb/cdc_ether.c
··· 618 618 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO 619 619 | USB_DEVICE_ID_MATCH_DEVICE, 620 620 .idVendor = 0x04DD, 621 + .idProduct = 0x8005, /* A-300 */ 622 + ZAURUS_FAKE_INTERFACE, 623 + .driver_info = 0, 624 + }, { 625 + .match_flags = USB_DEVICE_ID_MATCH_INT_INFO 626 + | USB_DEVICE_ID_MATCH_DEVICE, 627 + .idVendor = 0x04DD, 621 628 .idProduct = 0x8006, /* B-500/SL-5600 */ 622 629 ZAURUS_MASTER_INTERFACE, 623 630 .driver_info = 0, ··· 632 625 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO 633 626 | USB_DEVICE_ID_MATCH_DEVICE, 634 627 .idVendor = 0x04DD, 628 + .idProduct = 0x8006, /* B-500/SL-5600 */ 629 + ZAURUS_FAKE_INTERFACE, 630 + .driver_info = 0, 631 + }, { 632 + .match_flags = USB_DEVICE_ID_MATCH_INT_INFO 633 + | USB_DEVICE_ID_MATCH_DEVICE, 634 + .idVendor = 0x04DD, 635 635 .idProduct = 0x8007, /* C-700 */ 636 636 ZAURUS_MASTER_INTERFACE, 637 637 .driver_info = 0, 638 + }, { 639 + .match_flags = USB_DEVICE_ID_MATCH_INT_INFO 640 + | USB_DEVICE_ID_MATCH_DEVICE, 641 + .idVendor = 0x04DD, 642 + .idProduct = 0x8007, /* C-700 */ 643 + ZAURUS_FAKE_INTERFACE, 644 + .driver_info = 0, 638 645 }, { 639 646 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO 640 647 | USB_DEVICE_ID_MATCH_DEVICE,
+2 -5
drivers/net/usb/lan78xx.c
··· 4224 4224 if (!dev) 4225 4225 return; 4226 4226 4227 - set_bit(EVENT_DEV_DISCONNECT, &dev->flags); 4228 - 4229 4227 netif_napi_del(&dev->napi); 4230 4228 4231 4229 udev = interface_to_usbdev(intf); ··· 4231 4233 4232 4234 unregister_netdev(net); 4233 4235 4236 + timer_shutdown_sync(&dev->stat_monitor); 4237 + set_bit(EVENT_DEV_DISCONNECT, &dev->flags); 4234 4238 cancel_delayed_work_sync(&dev->wq); 4235 4239 4236 4240 phydev = net->phydev; ··· 4246 4246 fixed_phy_unregister(phydev); 4247 4247 4248 4248 usb_scuttle_anchored_urbs(&dev->deferred); 4249 - 4250 - if (timer_pending(&dev->stat_monitor)) 4251 - del_timer_sync(&dev->stat_monitor); 4252 4249 4253 4250 lan78xx_unbind(dev, intf); 4254 4251
+1
drivers/net/usb/qmi_wwan.c
··· 1423 1423 {QMI_QUIRK_SET_DTR(0x2c7c, 0x0191, 4)}, /* Quectel EG91 */ 1424 1424 {QMI_QUIRK_SET_DTR(0x2c7c, 0x0195, 4)}, /* Quectel EG95 */ 1425 1425 {QMI_FIXED_INTF(0x2c7c, 0x0296, 4)}, /* Quectel BG96 */ 1426 + {QMI_QUIRK_SET_DTR(0x2c7c, 0x030e, 4)}, /* Quectel EM05GV2 */ 1426 1427 {QMI_QUIRK_SET_DTR(0x2cb7, 0x0104, 4)}, /* Fibocom NL678 series */ 1427 1428 {QMI_FIXED_INTF(0x0489, 0xe0b4, 0)}, /* Foxconn T77W968 LTE */ 1428 1429 {QMI_FIXED_INTF(0x0489, 0xe0b5, 0)}, /* Foxconn T77W968 LTE with eSIM support*/
+21
drivers/net/usb/zaurus.c
··· 289 289 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO 290 290 | USB_DEVICE_ID_MATCH_DEVICE, 291 291 .idVendor = 0x04DD, 292 + .idProduct = 0x8005, /* A-300 */ 293 + ZAURUS_FAKE_INTERFACE, 294 + .driver_info = (unsigned long)&bogus_mdlm_info, 295 + }, { 296 + .match_flags = USB_DEVICE_ID_MATCH_INT_INFO 297 + | USB_DEVICE_ID_MATCH_DEVICE, 298 + .idVendor = 0x04DD, 292 299 .idProduct = 0x8006, /* B-500/SL-5600 */ 293 300 ZAURUS_MASTER_INTERFACE, 294 301 .driver_info = ZAURUS_PXA_INFO, 302 + }, { 303 + .match_flags = USB_DEVICE_ID_MATCH_INT_INFO 304 + | USB_DEVICE_ID_MATCH_DEVICE, 305 + .idVendor = 0x04DD, 306 + .idProduct = 0x8006, /* B-500/SL-5600 */ 307 + ZAURUS_FAKE_INTERFACE, 308 + .driver_info = (unsigned long)&bogus_mdlm_info, 295 309 }, { 296 310 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO 297 311 | USB_DEVICE_ID_MATCH_DEVICE, ··· 313 299 .idProduct = 0x8007, /* C-700 */ 314 300 ZAURUS_MASTER_INTERFACE, 315 301 .driver_info = ZAURUS_PXA_INFO, 302 + }, { 303 + .match_flags = USB_DEVICE_ID_MATCH_INT_INFO 304 + | USB_DEVICE_ID_MATCH_DEVICE, 305 + .idVendor = 0x04DD, 306 + .idProduct = 0x8007, /* C-700 */ 307 + ZAURUS_FAKE_INTERFACE, 308 + .driver_info = (unsigned long)&bogus_mdlm_info, 316 309 }, { 317 310 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO 318 311 | USB_DEVICE_ID_MATCH_DEVICE,
-1
drivers/net/wireless/ath/ath11k/ahb.c
··· 376 376 struct ath11k_ext_irq_grp *irq_grp = &ab->ext_irq_grp[i]; 377 377 378 378 if (!irq_grp->napi_enabled) { 379 - dev_set_threaded(&irq_grp->napi_ndev, true); 380 379 napi_enable(&irq_grp->napi); 381 380 irq_grp->napi_enabled = true; 382 381 }
-1
drivers/net/wireless/ath/ath11k/pcic.c
··· 466 466 struct ath11k_ext_irq_grp *irq_grp = &ab->ext_irq_grp[i]; 467 467 468 468 if (!irq_grp->napi_enabled) { 469 - dev_set_threaded(&irq_grp->napi_ndev, true); 470 469 napi_enable(&irq_grp->napi); 471 470 irq_grp->napi_enabled = true; 472 471 }
-5
drivers/net/wireless/ath/ath6kl/Makefile
··· 36 36 ath6kl_core-y += core.o 37 37 ath6kl_core-y += recovery.o 38 38 39 - # FIXME: temporarily silence -Wdangling-pointer on non W=1+ builds 40 - ifndef KBUILD_EXTRA_WARN 41 - CFLAGS_htc_mbox.o += $(call cc-disable-warning, dangling-pointer) 42 - endif 43 - 44 39 ath6kl_core-$(CONFIG_NL80211_TESTMODE) += testmode.o 45 40 ath6kl_core-$(CONFIG_ATH6KL_TRACING) += trace.o 46 41
+6 -1
drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwil_types.h
··· 398 398 * fixed parameter portion is assumed, otherwise 399 399 * ssid in the fixed portion is ignored 400 400 */ 401 - __le16 channel_list[1]; /* list of chanspecs */ 401 + union { 402 + __le16 padding; /* Reserve space for at least 1 entry for abort 403 + * which uses an on stack brcmf_scan_params_le 404 + */ 405 + DECLARE_FLEX_ARRAY(__le16, channel_list); /* chanspecs */ 406 + }; 402 407 }; 403 408 404 409 struct brcmf_scan_params_v2_le {
+1 -1
drivers/net/wireless/legacy/rayctl.h
··· 577 577 struct tib_structure tib; 578 578 struct phy_header phy; 579 579 struct mac_header mac; 580 - UCHAR var[1]; 580 + UCHAR var[]; 581 581 }; 582 582 583 583 /****** ECF Receive Control Structure (RCS) Area at Shared RAM offset 0x0800 */
+3 -3
drivers/net/wireless/mediatek/mt76/mt7615/eeprom.c
··· 128 128 case MT_EE_5GHZ: 129 129 dev->mphy.cap.has_5ghz = true; 130 130 break; 131 - case MT_EE_2GHZ: 132 - dev->mphy.cap.has_2ghz = true; 133 - break; 134 131 case MT_EE_DBDC: 135 132 dev->dbdc_support = true; 136 133 fallthrough; 134 + case MT_EE_2GHZ: 135 + dev->mphy.cap.has_2ghz = true; 136 + break; 137 137 default: 138 138 dev->mphy.cap.has_2ghz = true; 139 139 dev->mphy.cap.has_5ghz = true;
+5 -5
drivers/regulator/mt6358-regulator.c
··· 661 661 /* Disable VCN33_WIFI */ 662 662 ret = regmap_update_bits(mt6397->regmap, MT6358_LDO_VCN33_CON0_1, BIT(0), 0); 663 663 if (ret) { 664 - dev_err(dev, "Failed to disable VCN33_BT\n"); 664 + dev_err(dev, "Failed to disable VCN33_WIFI\n"); 665 665 return ret; 666 666 } 667 667 ··· 676 676 const struct mt6358_regulator_info *mt6358_info; 677 677 int i, max_regulator, ret; 678 678 679 - ret = mt6358_sync_vcn33_setting(&pdev->dev); 680 - if (ret) 681 - return ret; 682 - 683 679 if (mt6397->chip_id == MT6366_CHIP_ID) { 684 680 max_regulator = MT6366_MAX_REGULATOR; 685 681 mt6358_info = mt6366_regulators; ··· 683 687 max_regulator = MT6358_MAX_REGULATOR; 684 688 mt6358_info = mt6358_regulators; 685 689 } 690 + 691 + ret = mt6358_sync_vcn33_setting(&pdev->dev); 692 + if (ret) 693 + return ret; 686 694 687 695 for (i = 0; i < max_regulator; i++) { 688 696 config.dev = &pdev->dev;
+49 -78
drivers/s390/block/dasd.c
··· 2943 2943 * Requeue a request back to the block request queue 2944 2944 * only works for block requests 2945 2945 */ 2946 - static int _dasd_requeue_request(struct dasd_ccw_req *cqr) 2946 + static void _dasd_requeue_request(struct dasd_ccw_req *cqr) 2947 2947 { 2948 - struct dasd_block *block = cqr->block; 2949 2948 struct request *req; 2950 2949 2951 - if (!block) 2952 - return -EINVAL; 2953 2950 /* 2954 2951 * If the request is an ERP request there is nothing to requeue. 2955 2952 * This will be done with the remaining original request. 2956 2953 */ 2957 2954 if (cqr->refers) 2958 - return 0; 2955 + return; 2959 2956 spin_lock_irq(&cqr->dq->lock); 2960 2957 req = (struct request *) cqr->callback_data; 2961 2958 blk_mq_requeue_request(req, true); 2962 2959 spin_unlock_irq(&cqr->dq->lock); 2963 2960 2964 - return 0; 2961 + return; 2965 2962 } 2966 2963 2967 - /* 2968 - * Go through all request on the dasd_block request queue, cancel them 2969 - * on the respective dasd_device, and return them to the generic 2970 - * block layer. 2971 - */ 2972 - static int dasd_flush_block_queue(struct dasd_block *block) 2964 + static int _dasd_requests_to_flushqueue(struct dasd_block *block, 2965 + struct list_head *flush_queue) 2973 2966 { 2974 2967 struct dasd_ccw_req *cqr, *n; 2975 - int rc, i; 2976 - struct list_head flush_queue; 2977 2968 unsigned long flags; 2969 + int rc, i; 2978 2970 2979 - INIT_LIST_HEAD(&flush_queue); 2980 - spin_lock_bh(&block->queue_lock); 2971 + spin_lock_irqsave(&block->queue_lock, flags); 2981 2972 rc = 0; 2982 2973 restart: 2983 2974 list_for_each_entry_safe(cqr, n, &block->ccw_queue, blocklist) { ··· 2983 2992 * is returned from the dasd_device layer. 2984 2993 */ 2985 2994 cqr->callback = _dasd_wake_block_flush_cb; 2986 - for (i = 0; cqr != NULL; cqr = cqr->refers, i++) 2987 - list_move_tail(&cqr->blocklist, &flush_queue); 2995 + for (i = 0; cqr; cqr = cqr->refers, i++) 2996 + list_move_tail(&cqr->blocklist, flush_queue); 2988 2997 if (i > 1) 2989 2998 /* moved more than one request - need to restart */ 2990 2999 goto restart; 2991 3000 } 2992 - spin_unlock_bh(&block->queue_lock); 3001 + spin_unlock_irqrestore(&block->queue_lock, flags); 3002 + 3003 + return rc; 3004 + } 3005 + 3006 + /* 3007 + * Go through all request on the dasd_block request queue, cancel them 3008 + * on the respective dasd_device, and return them to the generic 3009 + * block layer. 3010 + */ 3011 + static int dasd_flush_block_queue(struct dasd_block *block) 3012 + { 3013 + struct dasd_ccw_req *cqr, *n; 3014 + struct list_head flush_queue; 3015 + unsigned long flags; 3016 + int rc; 3017 + 3018 + INIT_LIST_HEAD(&flush_queue); 3019 + rc = _dasd_requests_to_flushqueue(block, &flush_queue); 3020 + 2993 3021 /* Now call the callback function of flushed requests */ 2994 3022 restart_cb: 2995 3023 list_for_each_entry_safe(cqr, n, &flush_queue, blocklist) { ··· 3891 3881 */ 3892 3882 int dasd_generic_requeue_all_requests(struct dasd_device *device) 3893 3883 { 3884 + struct dasd_block *block = device->block; 3894 3885 struct list_head requeue_queue; 3895 3886 struct dasd_ccw_req *cqr, *n; 3896 - struct dasd_ccw_req *refers; 3897 3887 int rc; 3898 3888 3889 + if (!block) 3890 + return 0; 3891 + 3899 3892 INIT_LIST_HEAD(&requeue_queue); 3900 - spin_lock_irq(get_ccwdev_lock(device->cdev)); 3901 - rc = 0; 3902 - list_for_each_entry_safe(cqr, n, &device->ccw_queue, devlist) { 3903 - /* Check status and move request to flush_queue */ 3904 - if (cqr->status == DASD_CQR_IN_IO) { 3905 - rc = device->discipline->term_IO(cqr); 3906 - if (rc) { 3907 - /* unable to terminate requeust */ 3908 - dev_err(&device->cdev->dev, 3909 - "Unable to terminate request %p " 3910 - "on suspend\n", cqr); 3911 - spin_unlock_irq(get_ccwdev_lock(device->cdev)); 3912 - dasd_put_device(device); 3913 - return rc; 3914 - } 3893 + rc = _dasd_requests_to_flushqueue(block, &requeue_queue); 3894 + 3895 + /* Now call the callback function of flushed requests */ 3896 + restart_cb: 3897 + list_for_each_entry_safe(cqr, n, &requeue_queue, blocklist) { 3898 + wait_event(dasd_flush_wq, (cqr->status < DASD_CQR_QUEUED)); 3899 + /* Process finished ERP request. */ 3900 + if (cqr->refers) { 3901 + spin_lock_bh(&block->queue_lock); 3902 + __dasd_process_erp(block->base, cqr); 3903 + spin_unlock_bh(&block->queue_lock); 3904 + /* restart list_for_xx loop since dasd_process_erp 3905 + * might remove multiple elements 3906 + */ 3907 + goto restart_cb; 3915 3908 } 3916 - list_move_tail(&cqr->devlist, &requeue_queue); 3917 - } 3918 - spin_unlock_irq(get_ccwdev_lock(device->cdev)); 3919 - 3920 - list_for_each_entry_safe(cqr, n, &requeue_queue, devlist) { 3921 - wait_event(dasd_flush_wq, 3922 - (cqr->status != DASD_CQR_CLEAR_PENDING)); 3923 - 3924 - /* 3925 - * requeue requests to blocklayer will only work 3926 - * for block device requests 3927 - */ 3928 - if (_dasd_requeue_request(cqr)) 3929 - continue; 3930 - 3931 - /* remove requests from device and block queue */ 3932 - list_del_init(&cqr->devlist); 3933 - while (cqr->refers != NULL) { 3934 - refers = cqr->refers; 3935 - /* remove the request from the block queue */ 3936 - list_del(&cqr->blocklist); 3937 - /* free the finished erp request */ 3938 - dasd_free_erp_request(cqr, cqr->memdev); 3939 - cqr = refers; 3940 - } 3941 - 3942 - /* 3943 - * _dasd_requeue_request already checked for a valid 3944 - * blockdevice, no need to check again 3945 - * all erp requests (cqr->refers) have a cqr->block 3946 - * pointer copy from the original cqr 3947 - */ 3909 + _dasd_requeue_request(cqr); 3948 3910 list_del_init(&cqr->blocklist); 3949 3911 cqr->block->base->discipline->free_cp( 3950 3912 cqr, (struct request *) cqr->callback_data); 3951 - } 3952 - 3953 - /* 3954 - * if requests remain then they are internal request 3955 - * and go back to the device queue 3956 - */ 3957 - if (!list_empty(&requeue_queue)) { 3958 - /* move freeze_queue to start of the ccw_queue */ 3959 - spin_lock_irq(get_ccwdev_lock(device->cdev)); 3960 - list_splice_tail(&requeue_queue, &device->ccw_queue); 3961 - spin_unlock_irq(get_ccwdev_lock(device->cdev)); 3962 3913 } 3963 3914 dasd_schedule_device_bh(device); 3964 3915 return rc;
+2 -2
drivers/s390/block/dasd_3990_erp.c
··· 1050 1050 dev_err(&device->cdev->dev, "An I/O request was rejected" 1051 1051 " because writing is inhibited\n"); 1052 1052 erp = dasd_3990_erp_cleanup(erp, DASD_CQR_FAILED); 1053 - } else if (sense[7] & SNS7_INVALID_ON_SEC) { 1053 + } else if (sense[7] == SNS7_INVALID_ON_SEC) { 1054 1054 dev_err(&device->cdev->dev, "An I/O request was rejected on a copy pair secondary device\n"); 1055 1055 /* suppress dump of sense data for this error */ 1056 1056 set_bit(DASD_CQR_SUPPRESS_CR, &erp->refers->flags); ··· 2441 2441 erp->block = cqr->block; 2442 2442 erp->magic = cqr->magic; 2443 2443 erp->expires = cqr->expires; 2444 - erp->retries = 256; 2444 + erp->retries = device->default_retries; 2445 2445 erp->buildclk = get_tod_clock(); 2446 2446 erp->status = DASD_CQR_FILLED; 2447 2447
+1
drivers/s390/block/dasd_ioctl.c
··· 131 131 spin_unlock_irqrestore(get_ccwdev_lock(base->cdev), flags); 132 132 133 133 dasd_schedule_block_bh(block); 134 + dasd_schedule_device_bh(base); 134 135 return 0; 135 136 } 136 137
-1
drivers/s390/net/qeth_core.h
··· 716 716 u16 chid; 717 717 u8 ids_valid:1; /* cssid,iid,chid */ 718 718 u8 dev_addr_is_registered:1; 719 - u8 open_when_online:1; 720 719 u8 promisc_mode:1; 721 720 u8 use_v1_blkt:1; 722 721 u8 is_vm_nic:1;
-2
drivers/s390/net/qeth_core_main.c
··· 5373 5373 qeth_clear_ipacmd_list(card); 5374 5374 5375 5375 rtnl_lock(); 5376 - card->info.open_when_online = card->dev->flags & IFF_UP; 5377 - dev_close(card->dev); 5378 5376 netif_device_detach(card->dev); 5379 5377 netif_carrier_off(card->dev); 5380 5378 rtnl_unlock();
+6 -3
drivers/s390/net/qeth_l2_main.c
··· 2388 2388 qeth_enable_hw_features(dev); 2389 2389 qeth_l2_enable_brport_features(card); 2390 2390 2391 - if (card->info.open_when_online) { 2392 - card->info.open_when_online = 0; 2393 - dev_open(dev, NULL); 2391 + if (netif_running(dev)) { 2392 + local_bh_disable(); 2393 + napi_schedule(&card->napi); 2394 + /* kick-start the NAPI softirq: */ 2395 + local_bh_enable(); 2396 + qeth_l2_set_rx_mode(dev); 2394 2397 } 2395 2398 rtnl_unlock(); 2396 2399 }
+5 -3
drivers/s390/net/qeth_l3_main.c
··· 2018 2018 netif_device_attach(dev); 2019 2019 qeth_enable_hw_features(dev); 2020 2020 2021 - if (card->info.open_when_online) { 2022 - card->info.open_when_online = 0; 2023 - dev_open(dev, NULL); 2021 + if (netif_running(dev)) { 2022 + local_bh_disable(); 2023 + napi_schedule(&card->napi); 2024 + /* kick-start the NAPI softirq: */ 2025 + local_bh_enable(); 2024 2026 } 2025 2027 rtnl_unlock(); 2026 2028 }
+1 -5
drivers/s390/scsi/zfcp_fc.c
··· 534 534 535 535 /* re-init to undo drop from zfcp_fc_adisc() */ 536 536 port->d_id = ntoh24(adisc_resp->adisc_port_id); 537 - /* port is good, unblock rport without going through erp */ 538 - zfcp_scsi_schedule_rport_register(port); 537 + /* port is still good, nothing to do */ 539 538 out: 540 539 atomic_andnot(ZFCP_STATUS_PORT_LINK_TEST, &port->status); 541 540 put_device(&port->dev); ··· 594 595 int retval; 595 596 596 597 set_worker_desc("zadisc%16llx", port->wwpn); /* < WORKER_DESC_LEN=24 */ 597 - get_device(&port->dev); 598 - port->rport_task = RPORT_DEL; 599 - zfcp_scsi_rport_work(&port->rport_work); 600 598 601 599 /* only issue one test command at one time per port */ 602 600 if (atomic_read(&port->status) & ZFCP_STATUS_PORT_LINK_TEST)
+2 -1
drivers/scsi/pm8001/pm8001_init.c
··· 1181 1181 pm80xx_set_thermal_config(pm8001_ha); 1182 1182 } 1183 1183 1184 - if (pm8001_init_sas_add(pm8001_ha)) 1184 + rc = pm8001_init_sas_add(pm8001_ha); 1185 + if (rc) 1185 1186 goto err_out_shost; 1186 1187 /* phy setting support for motherboard controller */ 1187 1188 rc = pm8001_configure_phy_settings(pm8001_ha);
+4
drivers/scsi/storvsc_drv.c
··· 366 366 #define STORVSC_FC_MAX_LUNS_PER_TARGET 255 367 367 #define STORVSC_FC_MAX_TARGETS 128 368 368 #define STORVSC_FC_MAX_CHANNELS 8 369 + #define STORVSC_FC_MAX_XFER_SIZE ((u32)(512 * 1024)) 369 370 370 371 #define STORVSC_IDE_MAX_LUNS_PER_TARGET 64 371 372 #define STORVSC_IDE_MAX_TARGETS 1 ··· 2007 2006 * protecting it from any weird value. 2008 2007 */ 2009 2008 max_xfer_bytes = round_down(stor_device->max_transfer_bytes, HV_HYP_PAGE_SIZE); 2009 + if (is_fc) 2010 + max_xfer_bytes = min(max_xfer_bytes, STORVSC_FC_MAX_XFER_SIZE); 2011 + 2010 2012 /* max_hw_sectors_kb */ 2011 2013 host->max_sectors = max_xfer_bytes >> 9; 2012 2014 /*
+1 -1
drivers/soc/imx/imx8mp-blk-ctrl.c
··· 164 164 clk_hsio_pll->hw.init = &init; 165 165 166 166 hw = &clk_hsio_pll->hw; 167 - ret = devm_clk_hw_register(bc->dev, hw); 167 + ret = devm_clk_hw_register(bc->bus_power_dev, hw); 168 168 if (ret) 169 169 return ret; 170 170
+49 -5
drivers/spi/spi-qcom-qspi.c
··· 69 69 WR_FIFO_OVERRUN) 70 70 #define QSPI_ALL_IRQS (QSPI_ERR_IRQS | RESP_FIFO_RDY | \ 71 71 WR_FIFO_EMPTY | WR_FIFO_FULL | \ 72 - TRANSACTION_DONE) 72 + TRANSACTION_DONE | DMA_CHAIN_DONE) 73 73 74 74 #define PIO_XFER_CTRL 0x0014 75 75 #define REQUEST_COUNT_MSK 0xffff ··· 308 308 dma_addr_t dma_cmd_desc; 309 309 310 310 /* allocate for dma cmd descriptor */ 311 - virt_cmd_desc = dma_pool_alloc(ctrl->dma_cmd_pool, GFP_KERNEL | __GFP_ZERO, &dma_cmd_desc); 312 - if (!virt_cmd_desc) 313 - return -ENOMEM; 311 + virt_cmd_desc = dma_pool_alloc(ctrl->dma_cmd_pool, GFP_ATOMIC | __GFP_ZERO, &dma_cmd_desc); 312 + if (!virt_cmd_desc) { 313 + dev_warn_once(ctrl->dev, "Couldn't find memory for descriptor\n"); 314 + return -EAGAIN; 315 + } 314 316 315 317 ctrl->virt_cmd_desc[ctrl->n_cmd_desc] = virt_cmd_desc; 316 318 ctrl->dma_cmd_desc[ctrl->n_cmd_desc] = dma_cmd_desc; ··· 357 355 358 356 for (i = 0; i < sgt->nents; i++) { 359 357 dma_ptr_sg = sg_dma_address(sgt->sgl + i); 358 + dma_len_sg = sg_dma_len(sgt->sgl + i); 360 359 if (!IS_ALIGNED(dma_ptr_sg, QSPI_ALIGN_REQ)) { 361 360 dev_warn_once(ctrl->dev, "dma_address not aligned to %d\n", QSPI_ALIGN_REQ); 361 + return -EAGAIN; 362 + } 363 + /* 364 + * When reading with DMA the controller writes to memory 1 word 365 + * at a time. If the length isn't a multiple of 4 bytes then 366 + * the controller can clobber the things later in memory. 367 + * Fallback to PIO to be safe. 368 + */ 369 + if (ctrl->xfer.dir == QSPI_READ && (dma_len_sg & 0x03)) { 370 + dev_warn_once(ctrl->dev, "fallback to PIO for read of size %#010x\n", 371 + dma_len_sg); 362 372 return -EAGAIN; 363 373 } 364 374 } ··· 455 441 456 442 ret = qcom_qspi_setup_dma_desc(ctrl, xfer); 457 443 if (ret != -EAGAIN) { 458 - if (!ret) 444 + if (!ret) { 445 + dma_wmb(); 459 446 qcom_qspi_dma_xfer(ctrl); 447 + } 460 448 goto exit; 461 449 } 462 450 dev_warn_once(ctrl->dev, "DMA failure, falling back to PIO\n"); ··· 619 603 int_status = readl(ctrl->base + MSTR_INT_STATUS); 620 604 writel(int_status, ctrl->base + MSTR_INT_STATUS); 621 605 606 + /* Ignore disabled interrupts */ 607 + int_status &= readl(ctrl->base + MSTR_INT_EN); 608 + 622 609 /* PIO mode handling */ 623 610 if (ctrl->xfer.dir == QSPI_WRITE) { 624 611 if (int_status & WR_FIFO_EMPTY) ··· 665 646 spin_unlock(&ctrl->lock); 666 647 return ret; 667 648 } 649 + 650 + static int qcom_qspi_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op) 651 + { 652 + /* 653 + * If qcom_qspi_can_dma() is going to return false we don't need to 654 + * adjust anything. 655 + */ 656 + if (op->data.nbytes <= QSPI_MAX_BYTES_FIFO) 657 + return 0; 658 + 659 + /* 660 + * When reading, the transfer needs to be a multiple of 4 bytes so 661 + * shrink the transfer if that's not true. The caller will then do a 662 + * second transfer to finish things up. 663 + */ 664 + if (op->data.dir == SPI_MEM_DATA_IN && (op->data.nbytes & 0x3)) 665 + op->data.nbytes &= ~0x3; 666 + 667 + return 0; 668 + } 669 + 670 + static const struct spi_controller_mem_ops qcom_qspi_mem_ops = { 671 + .adjust_op_size = qcom_qspi_adjust_op_size, 672 + }; 668 673 669 674 static int qcom_qspi_probe(struct platform_device *pdev) 670 675 { ··· 774 731 if (of_property_read_bool(pdev->dev.of_node, "iommus")) 775 732 master->can_dma = qcom_qspi_can_dma; 776 733 master->auto_runtime_pm = true; 734 + master->mem_ops = &qcom_qspi_mem_ops; 777 735 778 736 ret = devm_pm_opp_set_clkname(&pdev->dev, "core"); 779 737 if (ret)
+1 -1
drivers/staging/fbtft/fb_ili9341.c
··· 145 145 }, 146 146 }; 147 147 148 - FBTFT_REGISTER_DRIVER(DRVNAME, "ilitek,ili9341", &display); 148 + FBTFT_REGISTER_SPI_DRIVER(DRVNAME, "ilitek", "ili9341", &display); 149 149 150 150 MODULE_ALIAS("spi:" DRVNAME); 151 151 MODULE_ALIAS("platform:" DRVNAME);
+4 -2
drivers/staging/ks7010/ks_wlan_net.c
··· 1583 1583 commit |= SME_WEP_FLAG; 1584 1584 } 1585 1585 if (enc->key_len) { 1586 - memcpy(&key->key_val[0], &enc->key[0], enc->key_len); 1587 - key->key_len = enc->key_len; 1586 + int key_len = clamp_val(enc->key_len, 0, IW_ENCODING_TOKEN_MAX); 1587 + 1588 + memcpy(&key->key_val[0], &enc->key[0], key_len); 1589 + key->key_len = key_len; 1588 1590 commit |= (SME_WEP_VAL1 << index); 1589 1591 } 1590 1592 break;
+34 -9
drivers/staging/rtl8712/rtl871x_xmit.c
··· 21 21 #include "osdep_intf.h" 22 22 #include "usb_ops.h" 23 23 24 + #include <linux/usb.h> 24 25 #include <linux/ieee80211.h> 25 26 26 27 static const u8 P802_1H_OUI[P80211_OUI_LEN] = {0x00, 0x00, 0xf8}; ··· 56 55 sint i; 57 56 struct xmit_buf *pxmitbuf; 58 57 struct xmit_frame *pxframe; 58 + int j; 59 59 60 60 memset((unsigned char *)pxmitpriv, 0, sizeof(struct xmit_priv)); 61 61 spin_lock_init(&pxmitpriv->lock); ··· 119 117 _init_queue(&pxmitpriv->pending_xmitbuf_queue); 120 118 pxmitpriv->pallocated_xmitbuf = 121 119 kmalloc(NR_XMITBUFF * sizeof(struct xmit_buf) + 4, GFP_ATOMIC); 122 - if (!pxmitpriv->pallocated_xmitbuf) { 123 - kfree(pxmitpriv->pallocated_frame_buf); 124 - pxmitpriv->pallocated_frame_buf = NULL; 125 - return -ENOMEM; 126 - } 120 + if (!pxmitpriv->pallocated_xmitbuf) 121 + goto clean_up_frame_buf; 127 122 pxmitpriv->pxmitbuf = pxmitpriv->pallocated_xmitbuf + 4 - 128 123 ((addr_t)(pxmitpriv->pallocated_xmitbuf) & 3); 129 124 pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmitbuf; ··· 128 129 INIT_LIST_HEAD(&pxmitbuf->list); 129 130 pxmitbuf->pallocated_buf = 130 131 kmalloc(MAX_XMITBUF_SZ + XMITBUF_ALIGN_SZ, GFP_ATOMIC); 131 - if (!pxmitbuf->pallocated_buf) 132 - return -ENOMEM; 132 + if (!pxmitbuf->pallocated_buf) { 133 + j = 0; 134 + goto clean_up_alloc_buf; 135 + } 133 136 pxmitbuf->pbuf = pxmitbuf->pallocated_buf + XMITBUF_ALIGN_SZ - 134 137 ((addr_t) (pxmitbuf->pallocated_buf) & 135 138 (XMITBUF_ALIGN_SZ - 1)); 136 - if (r8712_xmit_resource_alloc(padapter, pxmitbuf)) 137 - return -ENOMEM; 139 + if (r8712_xmit_resource_alloc(padapter, pxmitbuf)) { 140 + j = 1; 141 + goto clean_up_alloc_buf; 142 + } 138 143 list_add_tail(&pxmitbuf->list, 139 144 &(pxmitpriv->free_xmitbuf_queue.queue)); 140 145 pxmitbuf++; ··· 149 146 init_hwxmits(pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry); 150 147 tasklet_setup(&pxmitpriv->xmit_tasklet, r8712_xmit_bh); 151 148 return 0; 149 + 150 + clean_up_alloc_buf: 151 + if (j) { 152 + /* failure happened in r8712_xmit_resource_alloc() 153 + * delete extra pxmitbuf->pallocated_buf 154 + */ 155 + kfree(pxmitbuf->pallocated_buf); 156 + } 157 + for (j = 0; j < i; j++) { 158 + int k; 159 + 160 + pxmitbuf--; /* reset pointer */ 161 + kfree(pxmitbuf->pallocated_buf); 162 + for (k = 0; k < 8; k++) /* delete xmit urb's */ 163 + usb_free_urb(pxmitbuf->pxmit_urb[k]); 164 + } 165 + kfree(pxmitpriv->pallocated_xmitbuf); 166 + pxmitpriv->pallocated_xmitbuf = NULL; 167 + clean_up_frame_buf: 168 + kfree(pxmitpriv->pallocated_frame_buf); 169 + pxmitpriv->pallocated_frame_buf = NULL; 170 + return -ENOMEM; 152 171 } 153 172 154 173 void _free_xmit_priv(struct xmit_priv *pxmitpriv)
+6
drivers/staging/rtl8712/xmit_linux.c
··· 112 112 for (i = 0; i < 8; i++) { 113 113 pxmitbuf->pxmit_urb[i] = usb_alloc_urb(0, GFP_KERNEL); 114 114 if (!pxmitbuf->pxmit_urb[i]) { 115 + int k; 116 + 117 + for (k = i - 1; k >= 0; k--) { 118 + /* handle allocation errors part way through loop */ 119 + usb_free_urb(pxmitbuf->pxmit_urb[k]); 120 + } 115 121 netdev_err(padapter->pnetdev, "pxmitbuf->pxmit_urb[i] == NULL\n"); 116 122 return -ENOMEM; 117 123 }
+2 -2
drivers/thermal/thermal_core.c
··· 1203 1203 struct thermal_zone_device * 1204 1204 thermal_zone_device_register_with_trips(const char *type, struct thermal_trip *trips, int num_trips, int mask, 1205 1205 void *devdata, struct thermal_zone_device_ops *ops, 1206 - struct thermal_zone_params *tzp, int passive_delay, 1206 + const struct thermal_zone_params *tzp, int passive_delay, 1207 1207 int polling_delay) 1208 1208 { 1209 1209 struct thermal_zone_device *tz; ··· 1371 1371 1372 1372 struct thermal_zone_device *thermal_zone_device_register(const char *type, int ntrips, int mask, 1373 1373 void *devdata, struct thermal_zone_device_ops *ops, 1374 - struct thermal_zone_params *tzp, int passive_delay, 1374 + const struct thermal_zone_params *tzp, int passive_delay, 1375 1375 int polling_delay) 1376 1376 { 1377 1377 return thermal_zone_device_register_with_trips(type, NULL, ntrips, mask,
+6 -21
drivers/thermal/thermal_of.c
··· 238 238 return 0; 239 239 } 240 240 241 - static struct thermal_zone_params *thermal_of_parameters_init(struct device_node *np) 241 + static void thermal_of_parameters_init(struct device_node *np, 242 + struct thermal_zone_params *tzp) 242 243 { 243 - struct thermal_zone_params *tzp; 244 244 int coef[2]; 245 245 int ncoef = ARRAY_SIZE(coef); 246 246 int prop, ret; 247 - 248 - tzp = kzalloc(sizeof(*tzp), GFP_KERNEL); 249 - if (!tzp) 250 - return ERR_PTR(-ENOMEM); 251 247 252 248 tzp->no_hwmon = true; 253 249 ··· 263 267 264 268 tzp->slope = coef[0]; 265 269 tzp->offset = coef[1]; 266 - 267 - return tzp; 268 270 } 269 271 270 272 static struct device_node *thermal_of_zone_get_by_name(struct thermal_zone_device *tz) ··· 436 442 static void thermal_of_zone_unregister(struct thermal_zone_device *tz) 437 443 { 438 444 struct thermal_trip *trips = tz->trips; 439 - struct thermal_zone_params *tzp = tz->tzp; 440 445 struct thermal_zone_device_ops *ops = tz->ops; 441 446 442 447 thermal_zone_device_disable(tz); 443 448 thermal_zone_device_unregister(tz); 444 449 kfree(trips); 445 - kfree(tzp); 446 450 kfree(ops); 447 451 } 448 452 ··· 469 477 { 470 478 struct thermal_zone_device *tz; 471 479 struct thermal_trip *trips; 472 - struct thermal_zone_params *tzp; 480 + struct thermal_zone_params tzp = {}; 473 481 struct thermal_zone_device_ops *of_ops; 474 482 struct device_node *np; 475 483 int delay, pdelay; ··· 501 509 goto out_kfree_trips; 502 510 } 503 511 504 - tzp = thermal_of_parameters_init(np); 505 - if (IS_ERR(tzp)) { 506 - ret = PTR_ERR(tzp); 507 - pr_err("Failed to initialize parameter from %pOFn: %d\n", np, ret); 508 - goto out_kfree_trips; 509 - } 512 + thermal_of_parameters_init(np, &tzp); 510 513 511 514 of_ops->bind = thermal_of_bind; 512 515 of_ops->unbind = thermal_of_unbind; ··· 509 522 mask = GENMASK_ULL((ntrips) - 1, 0); 510 523 511 524 tz = thermal_zone_device_register_with_trips(np->name, trips, ntrips, 512 - mask, data, of_ops, tzp, 525 + mask, data, of_ops, &tzp, 513 526 pdelay, delay); 514 527 if (IS_ERR(tz)) { 515 528 ret = PTR_ERR(tz); 516 529 pr_err("Failed to register thermal zone %pOFn: %d\n", np, ret); 517 - goto out_kfree_tzp; 530 + goto out_kfree_trips; 518 531 } 519 532 520 533 ret = thermal_zone_device_enable(tz); ··· 527 540 528 541 return tz; 529 542 530 - out_kfree_tzp: 531 - kfree(tzp); 532 543 out_kfree_trips: 533 544 kfree(trips); 534 545 out_kfree_of_ops:
+3 -1
drivers/tty/n_gsm.c
··· 3070 3070 gsm->has_devices = false; 3071 3071 } 3072 3072 for (i = NUM_DLCI - 1; i >= 0; i--) 3073 - if (gsm->dlci[i]) 3073 + if (gsm->dlci[i]) { 3074 3074 gsm_dlci_release(gsm->dlci[i]); 3075 + gsm->dlci[i] = NULL; 3076 + } 3075 3077 mutex_unlock(&gsm->mutex); 3076 3078 /* Now wipe the queues */ 3077 3079 tty_ldisc_flush(gsm->tty);
+4 -2
drivers/tty/serial/8250/8250_dwlib.c
··· 244 244 struct dw8250_port_data *pd = p->private_data; 245 245 struct dw8250_data *data = to_dw8250_data(pd); 246 246 struct uart_8250_port *up = up_to_u8250p(p); 247 - u32 reg; 247 + u32 reg, old_dlf; 248 248 249 249 pd->hw_rs485_support = dw8250_detect_rs485_hw(p); 250 250 if (pd->hw_rs485_support) { ··· 270 270 dev_dbg(p->dev, "Designware UART version %c.%c%c\n", 271 271 (reg >> 24) & 0xff, (reg >> 16) & 0xff, (reg >> 8) & 0xff); 272 272 273 + /* Preserve value written by firmware or bootloader */ 274 + old_dlf = dw8250_readl_ext(p, DW_UART_DLF); 273 275 dw8250_writel_ext(p, DW_UART_DLF, ~0U); 274 276 reg = dw8250_readl_ext(p, DW_UART_DLF); 275 - dw8250_writel_ext(p, DW_UART_DLF, 0); 277 + dw8250_writel_ext(p, DW_UART_DLF, old_dlf); 276 278 277 279 if (reg) { 278 280 pd->dlf_size = fls(reg);
-7
drivers/tty/serial/qcom_geni_serial.c
··· 1681 1681 if (ret) 1682 1682 return ret; 1683 1683 1684 - /* 1685 - * Set pm_runtime status as ACTIVE so that wakeup_irq gets 1686 - * enabled/disabled from dev_pm_arm_wake_irq during system 1687 - * suspend/resume respectively. 1688 - */ 1689 - pm_runtime_set_active(&pdev->dev); 1690 - 1691 1684 if (port->wakeup_irq > 0) { 1692 1685 device_init_wakeup(&pdev->dev, true); 1693 1686 ret = dev_pm_set_dedicated_wake_irq(&pdev->dev,
+1 -1
drivers/tty/serial/sh-sci.c
··· 590 590 dma_submit_error(s->cookie_tx)) { 591 591 if (s->cfg->regtype == SCIx_RZ_SCIFA_REGTYPE) 592 592 /* Switch irq from SCIF to DMA */ 593 - disable_irq(s->irqs[SCIx_TXI_IRQ]); 593 + disable_irq_nosync(s->irqs[SCIx_TXI_IRQ]); 594 594 595 595 s->cookie_tx = 0; 596 596 schedule_work(&s->work_tx);
+1 -1
drivers/tty/serial/sifive.c
··· 811 811 local_irq_restore(flags); 812 812 } 813 813 814 - static int __init sifive_serial_console_setup(struct console *co, char *options) 814 + static int sifive_serial_console_setup(struct console *co, char *options) 815 815 { 816 816 struct sifive_serial_port *ssp; 817 817 int baud = SIFIVE_DEFAULT_BAUD_RATE;
+1 -1
drivers/tty/serial/ucc_uart.c
··· 59 59 /* #define LOOPBACK */ 60 60 61 61 /* The major and minor device numbers are defined in 62 - * http://www.lanana.org/docs/device-list/devices-2.6+.txt. For the QE 62 + * Documentation/admin-guide/devices.txt. For the QE 63 63 * UART, we have major number 204 and minor numbers 46 - 49, which are the 64 64 * same as for the CPM2. This decision was made because no Freescale part 65 65 * has both a CPM and a QE.
+1 -1
drivers/tty/tty_io.c
··· 2285 2285 char ch, mbz = 0; 2286 2286 struct tty_ldisc *ld; 2287 2287 2288 - if (!tty_legacy_tiocsti) 2288 + if (!tty_legacy_tiocsti && !capable(CAP_SYS_ADMIN)) 2289 2289 return -EIO; 2290 2290 2291 2291 if ((current->signal->tty != tty) && !capable(CAP_SYS_ADMIN))
+3 -1
drivers/usb/cdns3/cdns3-gadget.c
··· 3015 3015 static int cdns3_gadget_check_config(struct usb_gadget *gadget) 3016 3016 { 3017 3017 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget); 3018 + struct cdns3_endpoint *priv_ep; 3018 3019 struct usb_ep *ep; 3019 3020 int n_in = 0; 3020 3021 int total; 3021 3022 3022 3023 list_for_each_entry(ep, &gadget->ep_list, ep_list) { 3023 - if (ep->claimed && (ep->address & USB_DIR_IN)) 3024 + priv_ep = ep_to_cdns3_ep(ep); 3025 + if ((priv_ep->flags & EP_CLAIMED) && (ep->address & USB_DIR_IN)) 3024 3026 n_in++; 3025 3027 } 3026 3028
+4
drivers/usb/core/quirks.c
··· 436 436 /* novation SoundControl XL */ 437 437 { USB_DEVICE(0x1235, 0x0061), .driver_info = USB_QUIRK_RESET_RESUME }, 438 438 439 + /* Focusrite Scarlett Solo USB */ 440 + { USB_DEVICE(0x1235, 0x8211), .driver_info = 441 + USB_QUIRK_DISCONNECT_SUSPEND }, 442 + 439 443 /* Huawei 4G LTE module */ 440 444 { USB_DEVICE(0x12d1, 0x15bb), .driver_info = 441 445 USB_QUIRK_DISCONNECT_SUSPEND },
+2 -18
drivers/usb/dwc3/core.c
··· 277 277 /* 278 278 * We're resetting only the device side because, if we're in host mode, 279 279 * XHCI driver will reset the host block. If dwc3 was configured for 280 - * host-only mode, then we can return early. 280 + * host-only mode or current role is host, then we can return early. 281 281 */ 282 - if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST) 282 + if (dwc->dr_mode == USB_DR_MODE_HOST || dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST) 283 283 return 0; 284 284 285 285 reg = dwc3_readl(dwc->regs, DWC3_DCTL); ··· 1207 1207 reg |= DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK; 1208 1208 1209 1209 dwc3_writel(dwc->regs, DWC3_GUCTL1, reg); 1210 - } 1211 - 1212 - if (dwc->dr_mode == USB_DR_MODE_HOST || 1213 - dwc->dr_mode == USB_DR_MODE_OTG) { 1214 - reg = dwc3_readl(dwc->regs, DWC3_GUCTL); 1215 - 1216 - /* 1217 - * Enable Auto retry Feature to make the controller operating in 1218 - * Host mode on seeing transaction errors(CRC errors or internal 1219 - * overrun scenerios) on IN transfers to reply to the device 1220 - * with a non-terminating retry ACK (i.e, an ACK transcation 1221 - * packet with Retry=1 & Nump != 0) 1222 - */ 1223 - reg |= DWC3_GUCTL_HSTINAUTORETRY; 1224 - 1225 - dwc3_writel(dwc->regs, DWC3_GUCTL, reg); 1226 1210 } 1227 1211 1228 1212 /*
-3
drivers/usb/dwc3/core.h
··· 256 256 #define DWC3_GCTL_GBLHIBERNATIONEN BIT(1) 257 257 #define DWC3_GCTL_DSBLCLKGTNG BIT(0) 258 258 259 - /* Global User Control Register */ 260 - #define DWC3_GUCTL_HSTINAUTORETRY BIT(14) 261 - 262 259 /* Global User Control 1 Register */ 263 260 #define DWC3_GUCTL1_DEV_DECOUPLE_L1L2_EVT BIT(31) 264 261 #define DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS BIT(28)
+4 -2
drivers/usb/dwc3/dwc3-pci.c
··· 233 233 234 234 /* 235 235 * A lot of BYT devices lack ACPI resource entries for 236 - * the GPIOs, add a fallback mapping to the reference 236 + * the GPIOs. If the ACPI entry for the GPIO controller 237 + * is present add a fallback mapping to the reference 237 238 * design GPIOs which all boards seem to use. 238 239 */ 239 - gpiod_add_lookup_table(&platform_bytcr_gpios); 240 + if (acpi_dev_present("INT33FC", NULL, -1)) 241 + gpiod_add_lookup_table(&platform_bytcr_gpios); 240 242 241 243 /* 242 244 * These GPIOs will turn on the USB2 PHY. Note that we have to
+4
drivers/usb/gadget/composite.c
··· 1125 1125 goto done; 1126 1126 1127 1127 status = bind(config); 1128 + 1129 + if (status == 0) 1130 + status = usb_gadget_check_config(cdev->gadget); 1131 + 1128 1132 if (status < 0) { 1129 1133 while (!list_empty(&config->functions)) { 1130 1134 struct usb_function *f;
+7 -5
drivers/usb/gadget/legacy/raw_gadget.c
··· 310 310 dev->eps_num = i; 311 311 spin_unlock_irqrestore(&dev->lock, flags); 312 312 313 + ret = raw_queue_event(dev, USB_RAW_EVENT_CONNECT, 0, NULL); 314 + if (ret < 0) { 315 + dev_err(&gadget->dev, "failed to queue event\n"); 316 + set_gadget_data(gadget, NULL); 317 + return ret; 318 + } 319 + 313 320 /* Matches kref_put() in gadget_unbind(). */ 314 321 kref_get(&dev->count); 315 - 316 - ret = raw_queue_event(dev, USB_RAW_EVENT_CONNECT, 0, NULL); 317 - if (ret < 0) 318 - dev_err(&gadget->dev, "failed to queue event\n"); 319 - 320 322 return ret; 321 323 } 322 324
-1
drivers/usb/gadget/udc/core.c
··· 878 878 */ 879 879 if (gadget->connected) 880 880 ret = usb_gadget_connect_locked(gadget); 881 - mutex_unlock(&gadget->udc->connect_lock); 882 881 883 882 unlock: 884 883 mutex_unlock(&gadget->udc->connect_lock);
+4 -4
drivers/usb/gadget/udc/tegra-xudc.c
··· 3718 3718 int err; 3719 3719 3720 3720 xudc->genpd_dev_device = dev_pm_domain_attach_by_name(dev, "dev"); 3721 - if (IS_ERR_OR_NULL(xudc->genpd_dev_device)) { 3722 - err = PTR_ERR(xudc->genpd_dev_device) ? : -ENODATA; 3721 + if (IS_ERR(xudc->genpd_dev_device)) { 3722 + err = PTR_ERR(xudc->genpd_dev_device); 3723 3723 dev_err(dev, "failed to get device power domain: %d\n", err); 3724 3724 return err; 3725 3725 } 3726 3726 3727 3727 xudc->genpd_dev_ss = dev_pm_domain_attach_by_name(dev, "ss"); 3728 - if (IS_ERR_OR_NULL(xudc->genpd_dev_ss)) { 3729 - err = PTR_ERR(xudc->genpd_dev_ss) ? : -ENODATA; 3728 + if (IS_ERR(xudc->genpd_dev_ss)) { 3729 + err = PTR_ERR(xudc->genpd_dev_ss); 3730 3730 dev_err(dev, "failed to get SuperSpeed power domain: %d\n", err); 3731 3731 return err; 3732 3732 }
+7 -1
drivers/usb/host/ohci-at91.c
··· 672 672 else 673 673 at91_start_clock(ohci_at91); 674 674 675 - ohci_resume(hcd, false); 675 + /* 676 + * According to the comment in ohci_hcd_at91_drv_suspend() 677 + * we need to do a reset if the 48Mhz clock was stopped, 678 + * that is, if ohci_at91->wakeup is clear. Tell ohci_resume() 679 + * to reset in this case by setting its "hibernated" flag. 680 + */ 681 + ohci_resume(hcd, !ohci_at91->wakeup); 676 682 677 683 return 0; 678 684 }
+1
drivers/usb/host/xhci-mtk.c
··· 586 586 } 587 587 588 588 device_init_wakeup(dev, true); 589 + dma_set_max_seg_size(dev, UINT_MAX); 589 590 590 591 xhci = hcd_to_xhci(hcd); 591 592 xhci->main_hcd = hcd;
+1 -3
drivers/usb/host/xhci-pci.c
··· 479 479 pdev->device == 0x3432) 480 480 xhci->quirks |= XHCI_BROKEN_STREAMS; 481 481 482 - if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483) { 482 + if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483) 483 483 xhci->quirks |= XHCI_LPM_SUPPORT; 484 - xhci->quirks |= XHCI_EP_CTX_BROKEN_DCS; 485 - } 486 484 487 485 if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA && 488 486 pdev->device == PCI_DEVICE_ID_ASMEDIA_1042_XHCI) {
+1 -24
drivers/usb/host/xhci-ring.c
··· 626 626 struct xhci_ring *ep_ring; 627 627 struct xhci_command *cmd; 628 628 struct xhci_segment *new_seg; 629 - struct xhci_segment *halted_seg = NULL; 630 629 union xhci_trb *new_deq; 631 630 int new_cycle; 632 - union xhci_trb *halted_trb; 633 - int index = 0; 634 631 dma_addr_t addr; 635 632 u64 hw_dequeue; 636 633 bool cycle_found = false; ··· 665 668 hw_dequeue = xhci_get_hw_deq(xhci, dev, ep_index, stream_id); 666 669 new_seg = ep_ring->deq_seg; 667 670 new_deq = ep_ring->dequeue; 668 - 669 - /* 670 - * Quirk: xHC write-back of the DCS field in the hardware dequeue 671 - * pointer is wrong - use the cycle state of the TRB pointed to by 672 - * the dequeue pointer. 673 - */ 674 - if (xhci->quirks & XHCI_EP_CTX_BROKEN_DCS && 675 - !(ep->ep_state & EP_HAS_STREAMS)) 676 - halted_seg = trb_in_td(xhci, td->start_seg, 677 - td->first_trb, td->last_trb, 678 - hw_dequeue & ~0xf, false); 679 - if (halted_seg) { 680 - index = ((dma_addr_t)(hw_dequeue & ~0xf) - halted_seg->dma) / 681 - sizeof(*halted_trb); 682 - halted_trb = &halted_seg->trbs[index]; 683 - new_cycle = halted_trb->generic.field[3] & 0x1; 684 - xhci_dbg(xhci, "Endpoint DCS = %d TRB index = %d cycle = %d\n", 685 - (u8)(hw_dequeue & 0x1), index, new_cycle); 686 - } else { 687 - new_cycle = hw_dequeue & 0x1; 688 - } 671 + new_cycle = hw_dequeue & 0x1; 689 672 690 673 /* 691 674 * We want to find the pointer, segment and cycle state of the new trb
+4 -4
drivers/usb/host/xhci-tegra.c
··· 1145 1145 int err; 1146 1146 1147 1147 tegra->genpd_dev_host = dev_pm_domain_attach_by_name(dev, "xusb_host"); 1148 - if (IS_ERR_OR_NULL(tegra->genpd_dev_host)) { 1149 - err = PTR_ERR(tegra->genpd_dev_host) ? : -ENODATA; 1148 + if (IS_ERR(tegra->genpd_dev_host)) { 1149 + err = PTR_ERR(tegra->genpd_dev_host); 1150 1150 dev_err(dev, "failed to get host pm-domain: %d\n", err); 1151 1151 return err; 1152 1152 } 1153 1153 1154 1154 tegra->genpd_dev_ss = dev_pm_domain_attach_by_name(dev, "xusb_ss"); 1155 - if (IS_ERR_OR_NULL(tegra->genpd_dev_ss)) { 1156 - err = PTR_ERR(tegra->genpd_dev_ss) ? : -ENODATA; 1155 + if (IS_ERR(tegra->genpd_dev_ss)) { 1156 + err = PTR_ERR(tegra->genpd_dev_ss); 1157 1157 dev_err(dev, "failed to get superspeed pm-domain: %d\n", err); 1158 1158 return err; 1159 1159 }
+4 -4
drivers/usb/misc/ehset.c
··· 77 77 switch (test_pid) { 78 78 case TEST_SE0_NAK_PID: 79 79 ret = ehset_prepare_port_for_testing(hub_udev, portnum); 80 - if (!ret) 80 + if (ret < 0) 81 81 break; 82 82 ret = usb_control_msg_send(hub_udev, 0, USB_REQ_SET_FEATURE, 83 83 USB_RT_PORT, USB_PORT_FEAT_TEST, ··· 86 86 break; 87 87 case TEST_J_PID: 88 88 ret = ehset_prepare_port_for_testing(hub_udev, portnum); 89 - if (!ret) 89 + if (ret < 0) 90 90 break; 91 91 ret = usb_control_msg_send(hub_udev, 0, USB_REQ_SET_FEATURE, 92 92 USB_RT_PORT, USB_PORT_FEAT_TEST, ··· 95 95 break; 96 96 case TEST_K_PID: 97 97 ret = ehset_prepare_port_for_testing(hub_udev, portnum); 98 - if (!ret) 98 + if (ret < 0) 99 99 break; 100 100 ret = usb_control_msg_send(hub_udev, 0, USB_REQ_SET_FEATURE, 101 101 USB_RT_PORT, USB_PORT_FEAT_TEST, ··· 104 104 break; 105 105 case TEST_PACKET_PID: 106 106 ret = ehset_prepare_port_for_testing(hub_udev, portnum); 107 - if (!ret) 107 + if (ret < 0) 108 108 break; 109 109 ret = usb_control_msg_send(hub_udev, 0, USB_REQ_SET_FEATURE, 110 110 USB_RT_PORT, USB_PORT_FEAT_TEST,
+6
drivers/usb/serial/option.c
··· 251 251 #define QUECTEL_PRODUCT_EM061K_LTA 0x0123 252 252 #define QUECTEL_PRODUCT_EM061K_LMS 0x0124 253 253 #define QUECTEL_PRODUCT_EC25 0x0125 254 + #define QUECTEL_PRODUCT_EM060K_128 0x0128 254 255 #define QUECTEL_PRODUCT_EG91 0x0191 255 256 #define QUECTEL_PRODUCT_EG95 0x0195 256 257 #define QUECTEL_PRODUCT_BG96 0x0296 ··· 269 268 #define QUECTEL_PRODUCT_RM520N 0x0801 270 269 #define QUECTEL_PRODUCT_EC200U 0x0901 271 270 #define QUECTEL_PRODUCT_EC200S_CN 0x6002 271 + #define QUECTEL_PRODUCT_EC200A 0x6005 272 272 #define QUECTEL_PRODUCT_EM061K_LWW 0x6008 273 273 #define QUECTEL_PRODUCT_EM061K_LCN 0x6009 274 274 #define QUECTEL_PRODUCT_EC200T 0x6026 ··· 1199 1197 { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EM060K, 0xff, 0x00, 0x40) }, 1200 1198 { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EM060K, 0xff, 0xff, 0x30) }, 1201 1199 { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EM060K, 0xff, 0xff, 0x40) }, 1200 + { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EM060K_128, 0xff, 0xff, 0x30) }, 1201 + { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EM060K_128, 0xff, 0x00, 0x40) }, 1202 + { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EM060K_128, 0xff, 0xff, 0x40) }, 1202 1203 { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EM061K_LCN, 0xff, 0xff, 0x30) }, 1203 1204 { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EM061K_LCN, 0xff, 0x00, 0x40) }, 1204 1205 { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EM061K_LCN, 0xff, 0xff, 0x40) }, ··· 1230 1225 { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_RM520N, 0xff, 0, 0) }, 1231 1226 { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, 0x0900, 0xff, 0, 0), /* RM500U-CN */ 1232 1227 .driver_info = ZLP }, 1228 + { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EC200A, 0xff, 0, 0) }, 1233 1229 { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EC200U, 0xff, 0, 0) }, 1234 1230 { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EC200S_CN, 0xff, 0, 0) }, 1235 1231 { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EC200T, 0xff, 0, 0) },
+40 -33
drivers/usb/serial/usb-serial-simple.c
··· 38 38 { USB_DEVICE(0x0a21, 0x8001) } /* MMT-7305WW */ 39 39 DEVICE(carelink, CARELINK_IDS); 40 40 41 - /* ZIO Motherboard USB driver */ 42 - #define ZIO_IDS() \ 43 - { USB_DEVICE(0x1CBE, 0x0103) } 44 - DEVICE(zio, ZIO_IDS); 45 - 46 - /* Funsoft Serial USB driver */ 47 - #define FUNSOFT_IDS() \ 48 - { USB_DEVICE(0x1404, 0xcddc) } 49 - DEVICE(funsoft, FUNSOFT_IDS); 50 - 51 41 /* Infineon Flashloader driver */ 52 42 #define FLASHLOADER_IDS() \ 53 43 { USB_DEVICE_INTERFACE_CLASS(0x058b, 0x0041, USB_CLASS_CDC_DATA) }, \ 54 44 { USB_DEVICE(0x8087, 0x0716) }, \ 55 45 { USB_DEVICE(0x8087, 0x0801) } 56 46 DEVICE(flashloader, FLASHLOADER_IDS); 47 + 48 + /* Funsoft Serial USB driver */ 49 + #define FUNSOFT_IDS() \ 50 + { USB_DEVICE(0x1404, 0xcddc) } 51 + DEVICE(funsoft, FUNSOFT_IDS); 57 52 58 53 /* Google Serial USB SubClass */ 59 54 #define GOOGLE_IDS() \ ··· 58 63 0x01) } 59 64 DEVICE(google, GOOGLE_IDS); 60 65 66 + /* HP4x (48/49) Generic Serial driver */ 67 + #define HP4X_IDS() \ 68 + { USB_DEVICE(0x03f0, 0x0121) } 69 + DEVICE(hp4x, HP4X_IDS); 70 + 71 + /* KAUFMANN RKS+CAN VCP */ 72 + #define KAUFMANN_IDS() \ 73 + { USB_DEVICE(0x16d0, 0x0870) } 74 + DEVICE(kaufmann, KAUFMANN_IDS); 75 + 61 76 /* Libtransistor USB console */ 62 77 #define LIBTRANSISTOR_IDS() \ 63 78 { USB_DEVICE(0x1209, 0x8b00) } 64 79 DEVICE(libtransistor, LIBTRANSISTOR_IDS); 65 - 66 - /* ViVOpay USB Serial Driver */ 67 - #define VIVOPAY_IDS() \ 68 - { USB_DEVICE(0x1d5f, 0x1004) } /* ViVOpay 8800 */ 69 - DEVICE(vivopay, VIVOPAY_IDS); 70 80 71 81 /* Motorola USB Phone driver */ 72 82 #define MOTO_IDS() \ ··· 101 101 { USB_DEVICE(0x09d7, 0x0100) } /* NovAtel FlexPack GPS */ 102 102 DEVICE_N(novatel_gps, NOVATEL_IDS, 3); 103 103 104 - /* HP4x (48/49) Generic Serial driver */ 105 - #define HP4X_IDS() \ 106 - { USB_DEVICE(0x03f0, 0x0121) } 107 - DEVICE(hp4x, HP4X_IDS); 104 + /* Siemens USB/MPI adapter */ 105 + #define SIEMENS_IDS() \ 106 + { USB_DEVICE(0x908, 0x0004) } 107 + DEVICE(siemens_mpi, SIEMENS_IDS); 108 108 109 109 /* Suunto ANT+ USB Driver */ 110 110 #define SUUNTO_IDS() \ ··· 112 112 { USB_DEVICE(0x0fcf, 0x1009) } /* Dynastream ANT USB-m Stick */ 113 113 DEVICE(suunto, SUUNTO_IDS); 114 114 115 - /* Siemens USB/MPI adapter */ 116 - #define SIEMENS_IDS() \ 117 - { USB_DEVICE(0x908, 0x0004) } 118 - DEVICE(siemens_mpi, SIEMENS_IDS); 115 + /* ViVOpay USB Serial Driver */ 116 + #define VIVOPAY_IDS() \ 117 + { USB_DEVICE(0x1d5f, 0x1004) } /* ViVOpay 8800 */ 118 + DEVICE(vivopay, VIVOPAY_IDS); 119 + 120 + /* ZIO Motherboard USB driver */ 121 + #define ZIO_IDS() \ 122 + { USB_DEVICE(0x1CBE, 0x0103) } 123 + DEVICE(zio, ZIO_IDS); 119 124 120 125 /* All of the above structures mushed into two lists */ 121 126 static struct usb_serial_driver * const serial_drivers[] = { 122 127 &carelink_device, 123 - &zio_device, 124 - &funsoft_device, 125 128 &flashloader_device, 129 + &funsoft_device, 126 130 &google_device, 131 + &hp4x_device, 132 + &kaufmann_device, 127 133 &libtransistor_device, 128 - &vivopay_device, 129 134 &moto_modem_device, 130 135 &motorola_tetra_device, 131 136 &nokia_device, 132 137 &novatel_gps_device, 133 - &hp4x_device, 134 - &suunto_device, 135 138 &siemens_mpi_device, 139 + &suunto_device, 140 + &vivopay_device, 141 + &zio_device, 136 142 NULL 137 143 }; 138 144 139 145 static const struct usb_device_id id_table[] = { 140 146 CARELINK_IDS(), 141 - ZIO_IDS(), 142 - FUNSOFT_IDS(), 143 147 FLASHLOADER_IDS(), 148 + FUNSOFT_IDS(), 144 149 GOOGLE_IDS(), 150 + HP4X_IDS(), 151 + KAUFMANN_IDS(), 145 152 LIBTRANSISTOR_IDS(), 146 - VIVOPAY_IDS(), 147 153 MOTO_IDS(), 148 154 MOTOROLA_TETRA_IDS(), 149 155 NOKIA_IDS(), 150 156 NOVATEL_IDS(), 151 - HP4X_IDS(), 152 - SUUNTO_IDS(), 153 157 SIEMENS_IDS(), 158 + SUUNTO_IDS(), 159 + VIVOPAY_IDS(), 160 + ZIO_IDS(), 154 161 { }, 155 162 }; 156 163 MODULE_DEVICE_TABLE(usb, id_table);
+8 -7
drivers/usb/typec/class.c
··· 1277 1277 { 1278 1278 struct typec_port *port = to_typec_port(dev); 1279 1279 struct usb_power_delivery **pds; 1280 - struct usb_power_delivery *pd; 1281 - int ret = 0; 1280 + int i, ret = 0; 1282 1281 1283 1282 if (!port->ops || !port->ops->pd_get) 1284 1283 return -EOPNOTSUPP; ··· 1286 1287 if (!pds) 1287 1288 return 0; 1288 1289 1289 - for (pd = pds[0]; pd; pd++) { 1290 - if (pd == port->pd) 1291 - ret += sysfs_emit(buf + ret, "[%s] ", dev_name(&pd->dev)); 1290 + for (i = 0; pds[i]; i++) { 1291 + if (pds[i] == port->pd) 1292 + ret += sysfs_emit_at(buf, ret, "[%s] ", dev_name(&pds[i]->dev)); 1292 1293 else 1293 - ret += sysfs_emit(buf + ret, "%s ", dev_name(&pd->dev)); 1294 + ret += sysfs_emit_at(buf, ret, "%s ", dev_name(&pds[i]->dev)); 1294 1295 } 1295 1296 1296 1297 buf[ret - 1] = '\n'; ··· 2287 2288 return ERR_PTR(ret); 2288 2289 } 2289 2290 2291 + port->pd = cap->pd; 2292 + 2290 2293 ret = device_add(&port->dev); 2291 2294 if (ret) { 2292 2295 dev_err(parent, "failed to register port (%d)\n", ret); ··· 2296 2295 return ERR_PTR(ret); 2297 2296 } 2298 2297 2299 - ret = typec_port_set_usb_power_delivery(port, cap->pd); 2298 + ret = usb_power_delivery_link_device(port->pd, &port->dev); 2300 2299 if (ret) { 2301 2300 dev_err(&port->dev, "failed to link pd\n"); 2302 2301 device_unregister(&port->dev);
+2 -2
drivers/usb/typec/tcpm/qcom/qcom_pmic_typec.c
··· 209 209 platform_set_drvdata(pdev, tcpm); 210 210 211 211 tcpm->tcpc.fwnode = device_get_named_child_node(tcpm->dev, "connector"); 212 - if (IS_ERR(tcpm->tcpc.fwnode)) 213 - return PTR_ERR(tcpm->tcpc.fwnode); 212 + if (!tcpm->tcpc.fwnode) 213 + return -EINVAL; 214 214 215 215 tcpm->tcpm_port = tcpm_register_port(tcpm->dev, &tcpm->tcpc); 216 216 if (IS_ERR(tcpm->tcpm_port)) {
+2 -2
drivers/usb/typec/ucsi/ucsi.c
··· 785 785 if (!con->partner) 786 786 return; 787 787 788 + typec_set_mode(con->port, TYPEC_STATE_SAFE); 789 + 788 790 ucsi_unregister_partner_pdos(con); 789 791 ucsi_unregister_altmodes(con, UCSI_RECIPIENT_SOP); 790 792 typec_unregister_partner(con->partner); ··· 827 825 UCSI_CONSTAT_PARTNER_FLAG_USB) 828 826 typec_set_mode(con->port, TYPEC_STATE_USB); 829 827 } 830 - } else { 831 - typec_set_mode(con->port, TYPEC_STATE_SAFE); 832 828 } 833 829 834 830 /* Only notify USB controller if partner supports USB data */
+5 -11
drivers/xen/events/events_base.c
··· 112 112 unsigned int irq_epoch; /* If eoi_cpu valid: irq_epoch of event */ 113 113 u64 eoi_time; /* Time in jiffies when to EOI. */ 114 114 raw_spinlock_t lock; 115 + bool is_static; /* Is event channel static */ 115 116 116 117 union { 117 118 unsigned short virq; ··· 816 815 irq_free_desc(irq); 817 816 } 818 817 819 - static void xen_evtchn_close(evtchn_port_t port) 820 - { 821 - struct evtchn_close close; 822 - 823 - close.port = port; 824 - if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0) 825 - BUG(); 826 - } 827 - 828 818 /* Not called for lateeoi events. */ 829 819 static void event_handler_exit(struct irq_info *info) 830 820 { ··· 974 982 unsigned int cpu = cpu_from_irq(irq); 975 983 struct xenbus_device *dev; 976 984 977 - xen_evtchn_close(evtchn); 985 + if (!info->is_static) 986 + xen_evtchn_close(evtchn); 978 987 979 988 switch (type_from_irq(irq)) { 980 989 case IRQT_VIRQ: ··· 1567 1574 } 1568 1575 EXPORT_SYMBOL_GPL(xen_set_irq_priority); 1569 1576 1570 - int evtchn_make_refcounted(evtchn_port_t evtchn) 1577 + int evtchn_make_refcounted(evtchn_port_t evtchn, bool is_static) 1571 1578 { 1572 1579 int irq = get_evtchn_to_irq(evtchn); 1573 1580 struct irq_info *info; ··· 1583 1590 WARN_ON(info->refcnt != -1); 1584 1591 1585 1592 info->refcnt = 1; 1593 + info->is_static = is_static; 1586 1594 1587 1595 return 0; 1588 1596 }
+26 -9
drivers/xen/evtchn.c
··· 366 366 return 0; 367 367 } 368 368 369 - static int evtchn_bind_to_user(struct per_user_data *u, evtchn_port_t port) 369 + static int evtchn_bind_to_user(struct per_user_data *u, evtchn_port_t port, 370 + bool is_static) 370 371 { 371 372 struct user_evtchn *evtchn; 372 - struct evtchn_close close; 373 373 int rc = 0; 374 374 375 375 /* ··· 402 402 if (rc < 0) 403 403 goto err; 404 404 405 - rc = evtchn_make_refcounted(port); 405 + rc = evtchn_make_refcounted(port, is_static); 406 406 return rc; 407 407 408 408 err: 409 409 /* bind failed, should close the port now */ 410 - close.port = port; 411 - if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0) 412 - BUG(); 410 + if (!is_static) 411 + xen_evtchn_close(port); 412 + 413 413 del_evtchn(u, evtchn); 414 414 return rc; 415 415 } ··· 456 456 if (rc != 0) 457 457 break; 458 458 459 - rc = evtchn_bind_to_user(u, bind_virq.port); 459 + rc = evtchn_bind_to_user(u, bind_virq.port, false); 460 460 if (rc == 0) 461 461 rc = bind_virq.port; 462 462 break; ··· 482 482 if (rc != 0) 483 483 break; 484 484 485 - rc = evtchn_bind_to_user(u, bind_interdomain.local_port); 485 + rc = evtchn_bind_to_user(u, bind_interdomain.local_port, false); 486 486 if (rc == 0) 487 487 rc = bind_interdomain.local_port; 488 488 break; ··· 507 507 if (rc != 0) 508 508 break; 509 509 510 - rc = evtchn_bind_to_user(u, alloc_unbound.port); 510 + rc = evtchn_bind_to_user(u, alloc_unbound.port, false); 511 511 if (rc == 0) 512 512 rc = alloc_unbound.port; 513 513 break; ··· 533 533 disable_irq(irq_from_evtchn(unbind.port)); 534 534 evtchn_unbind_from_user(u, evtchn); 535 535 rc = 0; 536 + break; 537 + } 538 + 539 + case IOCTL_EVTCHN_BIND_STATIC: { 540 + struct ioctl_evtchn_bind bind; 541 + struct user_evtchn *evtchn; 542 + 543 + rc = -EFAULT; 544 + if (copy_from_user(&bind, uarg, sizeof(bind))) 545 + break; 546 + 547 + rc = -EISCONN; 548 + evtchn = find_evtchn(u, bind.port); 549 + if (evtchn) 550 + break; 551 + 552 + rc = evtchn_bind_to_user(u, bind.port, true); 536 553 break; 537 554 } 538 555
+29 -11
drivers/xen/grant-table.c
··· 498 498 static void gnttab_handle_deferred(struct timer_list *); 499 499 static DEFINE_TIMER(deferred_timer, gnttab_handle_deferred); 500 500 501 + static atomic64_t deferred_count; 502 + static atomic64_t leaked_count; 503 + static unsigned int free_per_iteration = 10; 504 + module_param(free_per_iteration, uint, 0600); 505 + 501 506 static void gnttab_handle_deferred(struct timer_list *unused) 502 507 { 503 - unsigned int nr = 10; 508 + unsigned int nr = READ_ONCE(free_per_iteration); 509 + const bool ignore_limit = nr == 0; 504 510 struct deferred_entry *first = NULL; 505 511 unsigned long flags; 512 + size_t freed = 0; 506 513 507 514 spin_lock_irqsave(&gnttab_list_lock, flags); 508 - while (nr--) { 515 + while ((ignore_limit || nr--) && !list_empty(&deferred_list)) { 509 516 struct deferred_entry *entry 510 517 = list_first_entry(&deferred_list, 511 518 struct deferred_entry, list); ··· 522 515 list_del(&entry->list); 523 516 spin_unlock_irqrestore(&gnttab_list_lock, flags); 524 517 if (_gnttab_end_foreign_access_ref(entry->ref)) { 518 + uint64_t ret = atomic64_dec_return(&deferred_count); 519 + 525 520 put_free_entry(entry->ref); 526 - pr_debug("freeing g.e. %#x (pfn %#lx)\n", 527 - entry->ref, page_to_pfn(entry->page)); 521 + pr_debug("freeing g.e. %#x (pfn %#lx), %llu remaining\n", 522 + entry->ref, page_to_pfn(entry->page), 523 + (unsigned long long)ret); 528 524 put_page(entry->page); 525 + freed++; 529 526 kfree(entry); 530 527 entry = NULL; 531 528 } else { ··· 541 530 spin_lock_irqsave(&gnttab_list_lock, flags); 542 531 if (entry) 543 532 list_add_tail(&entry->list, &deferred_list); 544 - else if (list_empty(&deferred_list)) 545 - break; 546 533 } 547 - if (!list_empty(&deferred_list) && !timer_pending(&deferred_timer)) { 534 + if (list_empty(&deferred_list)) 535 + WARN_ON(atomic64_read(&deferred_count)); 536 + else if (!timer_pending(&deferred_timer)) { 548 537 deferred_timer.expires = jiffies + HZ; 549 538 add_timer(&deferred_timer); 550 539 } 551 540 spin_unlock_irqrestore(&gnttab_list_lock, flags); 541 + pr_debug("Freed %zu references", freed); 552 542 } 553 543 554 544 static void gnttab_add_deferred(grant_ref_t ref, struct page *page) 555 545 { 556 546 struct deferred_entry *entry; 557 547 gfp_t gfp = (in_atomic() || irqs_disabled()) ? GFP_ATOMIC : GFP_KERNEL; 558 - const char *what = KERN_WARNING "leaking"; 548 + uint64_t leaked, deferred; 559 549 560 550 entry = kmalloc(sizeof(*entry), gfp); 561 551 if (!page) { ··· 579 567 add_timer(&deferred_timer); 580 568 } 581 569 spin_unlock_irqrestore(&gnttab_list_lock, flags); 582 - what = KERN_DEBUG "deferring"; 570 + deferred = atomic64_inc_return(&deferred_count); 571 + leaked = atomic64_read(&leaked_count); 572 + pr_debug("deferring g.e. %#x (pfn %#lx) (total deferred %llu, total leaked %llu)\n", 573 + ref, page ? page_to_pfn(page) : -1, deferred, leaked); 574 + } else { 575 + deferred = atomic64_read(&deferred_count); 576 + leaked = atomic64_inc_return(&leaked_count); 577 + pr_warn("leaking g.e. %#x (pfn %#lx) (total deferred %llu, total leaked %llu)\n", 578 + ref, page ? page_to_pfn(page) : -1, deferred, leaked); 583 579 } 584 - printk("%s g.e. %#x (pfn %#lx)\n", 585 - what, ref, page ? page_to_pfn(page) : -1); 586 580 } 587 581 588 582 int gnttab_try_end_foreign_access(grant_ref_t ref)
+3
drivers/xen/xenbus/xenbus_probe.c
··· 811 811 812 812 static int __init xenbus_probe_initcall(void) 813 813 { 814 + if (!xen_domain()) 815 + return -ENODEV; 816 + 814 817 /* 815 818 * Probe XenBus here in the XS_PV case, and also XS_HVM unless we 816 819 * need to wait for the platform PCI device to come up or
+3 -3
fs/9p/fid.h
··· 46 46 * NOTE: these are set after open so only reflect 9p client not 47 47 * underlying file system on server. 48 48 */ 49 - static inline void v9fs_fid_add_modes(struct p9_fid *fid, int s_flags, 50 - int s_cache, unsigned int f_flags) 49 + static inline void v9fs_fid_add_modes(struct p9_fid *fid, unsigned int s_flags, 50 + unsigned int s_cache, unsigned int f_flags) 51 51 { 52 52 if (fid->qid.type != P9_QTFILE) 53 53 return; ··· 57 57 (s_flags & V9FS_DIRECT_IO) || (f_flags & O_DIRECT)) { 58 58 fid->mode |= P9L_DIRECT; /* no read or write cache */ 59 59 } else if ((!(s_cache & CACHE_WRITEBACK)) || 60 - (f_flags & O_DSYNC) | (s_flags & V9FS_SYNC)) { 60 + (f_flags & O_DSYNC) || (s_flags & V9FS_SYNC)) { 61 61 fid->mode |= P9L_NOWRITECACHE; 62 62 } 63 63 }
-2
fs/9p/v9fs.c
··· 545 545 p9_client_begin_disconnect(v9ses->clnt); 546 546 } 547 547 548 - extern int v9fs_error_init(void); 549 - 550 548 static struct kobject *v9fs_kobj; 551 549 552 550 #ifdef CONFIG_9P_FSCACHE
+1 -1
fs/9p/v9fs.h
··· 108 108 109 109 struct v9fs_session_info { 110 110 /* options */ 111 - unsigned char flags; 111 + unsigned int flags; 112 112 unsigned char nodev; 113 113 unsigned short debug; 114 114 unsigned int afid;
+3 -2
fs/9p/vfs_dir.c
··· 208 208 struct p9_fid *fid; 209 209 __le32 version; 210 210 loff_t i_size; 211 - int retval = 0; 211 + int retval = 0, put_err; 212 212 213 213 fid = filp->private_data; 214 214 p9_debug(P9_DEBUG_VFS, "inode: %p filp: %p fid: %d\n", ··· 221 221 spin_lock(&inode->i_lock); 222 222 hlist_del(&fid->ilist); 223 223 spin_unlock(&inode->i_lock); 224 - retval = p9_fid_put(fid); 224 + put_err = p9_fid_put(fid); 225 + retval = retval < 0 ? retval : put_err; 225 226 } 226 227 227 228 if ((filp->f_mode & FMODE_WRITE)) {
+1 -4
fs/9p/vfs_file.c
··· 505 505 p9_debug(P9_DEBUG_MMAP, "filp :%p\n", filp); 506 506 507 507 if (!(v9ses->cache & CACHE_WRITEBACK)) { 508 - p9_debug(P9_DEBUG_CACHE, "(no mmap mode)"); 509 - if (vma->vm_flags & VM_MAYSHARE) 510 - return -ENODEV; 511 - invalidate_inode_pages2(filp->f_mapping); 508 + p9_debug(P9_DEBUG_CACHE, "(read-only mmap mode)"); 512 509 return generic_file_readonly_mmap(filp, vma); 513 510 } 514 511
-6
fs/9p/vfs_inode.c
··· 163 163 { 164 164 int ret; 165 165 166 - ret = 0; 167 166 switch (uflags&3) { 168 167 default: 169 168 case O_RDONLY: ··· 602 603 603 604 p9_debug(P9_DEBUG_VFS, "name %pd\n", dentry); 604 605 605 - err = 0; 606 606 name = dentry->d_name.name; 607 607 dfid = v9fs_parent_fid(dentry); 608 608 if (IS_ERR(dfid)) { ··· 813 815 if (!(flags & O_CREAT) || d_really_is_positive(dentry)) 814 816 return finish_no_open(file, res); 815 817 816 - err = 0; 817 - 818 818 v9ses = v9fs_inode2v9ses(dir); 819 819 perm = unixmode2p9mode(v9ses, mode); 820 820 p9_omode = v9fs_uflags2omode(flags, v9fs_proto_dotu(v9ses)); ··· 908 912 return -EINVAL; 909 913 910 914 p9_debug(P9_DEBUG_VFS, "\n"); 911 - retval = 0; 912 915 old_inode = d_inode(old_dentry); 913 916 new_inode = d_inode(new_dentry); 914 917 v9ses = v9fs_inode2v9ses(old_inode); ··· 1061 1066 if (retval) 1062 1067 return retval; 1063 1068 1064 - retval = -EPERM; 1065 1069 v9ses = v9fs_dentry2v9ses(dentry); 1066 1070 if (iattr->ia_valid & ATTR_FILE) { 1067 1071 fid = iattr->ia_file->private_data;
-1
fs/9p/vfs_inode_dotl.c
··· 366 366 struct posix_acl *dacl = NULL, *pacl = NULL; 367 367 368 368 p9_debug(P9_DEBUG_VFS, "name %pd\n", dentry); 369 - err = 0; 370 369 v9ses = v9fs_inode2v9ses(dir); 371 370 372 371 omode |= S_IFDIR;
-12
fs/autofs/Kconfig
··· 1 1 # SPDX-License-Identifier: GPL-2.0-only 2 - config AUTOFS4_FS 3 - tristate "Old Kconfig name for Kernel automounter support" 4 - select AUTOFS_FS 5 - help 6 - This name exists for people to just automatically pick up the 7 - new name of the autofs Kconfig option. All it does is select 8 - the new option name. 9 - 10 - It will go away in a release or two as people have 11 - transitioned to just plain AUTOFS_FS. 12 - 13 2 config AUTOFS_FS 14 3 tristate "Kernel automounter support (supports v3, v4 and v5)" 15 - default n 16 4 help 17 5 The automounter is a tool to automatically mount remote file systems 18 6 on demand. This implementation is partially kernel-based to reduce
+1 -1
fs/ceph/metric.c
··· 216 216 struct ceph_mds_client *mdsc = 217 217 container_of(m, struct ceph_mds_client, metric); 218 218 219 - if (mdsc->stopping) 219 + if (mdsc->stopping || disable_send_metrics) 220 220 return; 221 221 222 222 if (!m->session || !check_session_state(m->session)) {
-2
fs/erofs/super.c
··· 889 889 { 890 890 struct erofs_sb_info *sbi; 891 891 892 - WARN_ON(sb->s_magic != EROFS_SUPER_MAGIC); 893 - 894 892 /* pseudo mount for anon inodes */ 895 893 if (sb->s_flags & SB_KERNMOUNT) { 896 894 kill_anon_super(sb);
+4 -3
fs/erofs/zdata.c
··· 1144 1144 struct z_erofs_bvec *bvec) 1145 1145 { 1146 1146 struct z_erofs_bvec_item *item; 1147 + unsigned int pgnr; 1147 1148 1148 - if (!((bvec->offset + be->pcl->pageofs_out) & ~PAGE_MASK)) { 1149 - unsigned int pgnr; 1150 - 1149 + if (!((bvec->offset + be->pcl->pageofs_out) & ~PAGE_MASK) && 1150 + (bvec->end == PAGE_SIZE || 1151 + bvec->offset + bvec->end == be->pcl->length)) { 1151 1152 pgnr = (bvec->offset + be->pcl->pageofs_out) >> PAGE_SHIFT; 1152 1153 DBG_BUGON(pgnr >= be->nr_pages); 1153 1154 if (!be->decompressed_pages[pgnr]) {
+3 -3
fs/exfat/balloc.c
··· 69 69 } 70 70 sbi->map_sectors = ((need_map_size - 1) >> 71 71 (sb->s_blocksize_bits)) + 1; 72 - sbi->vol_amap = kmalloc_array(sbi->map_sectors, 72 + sbi->vol_amap = kvmalloc_array(sbi->map_sectors, 73 73 sizeof(struct buffer_head *), GFP_KERNEL); 74 74 if (!sbi->vol_amap) 75 75 return -ENOMEM; ··· 84 84 while (j < i) 85 85 brelse(sbi->vol_amap[j++]); 86 86 87 - kfree(sbi->vol_amap); 87 + kvfree(sbi->vol_amap); 88 88 sbi->vol_amap = NULL; 89 89 return -EIO; 90 90 } ··· 138 138 for (i = 0; i < sbi->map_sectors; i++) 139 139 __brelse(sbi->vol_amap[i]); 140 140 141 - kfree(sbi->vol_amap); 141 + kvfree(sbi->vol_amap); 142 142 } 143 143 144 144 int exfat_set_bitmap(struct inode *inode, unsigned int clu, bool sync)
+19 -17
fs/exfat/dir.c
··· 34 34 { 35 35 int i, err; 36 36 struct exfat_entry_set_cache es; 37 + unsigned int uni_len = 0, len; 37 38 38 39 err = exfat_get_dentry_set(&es, sb, p_dir, entry, ES_ALL_ENTRIES); 39 40 if (err) ··· 53 52 if (exfat_get_entry_type(ep) != TYPE_EXTEND) 54 53 break; 55 54 56 - exfat_extract_uni_name(ep, uniname); 55 + len = exfat_extract_uni_name(ep, uniname); 56 + uni_len += len; 57 + if (len != EXFAT_FILE_NAME_LEN || uni_len >= MAX_NAME_LENGTH) 58 + break; 57 59 uniname += EXFAT_FILE_NAME_LEN; 58 60 } 59 61 ··· 218 214 exfat_init_namebuf(nb); 219 215 } 220 216 221 - /* skip iterating emit_dots when dir is empty */ 217 + /* 218 + * Before calling dir_emit*(), sbi->s_lock should be released 219 + * because page fault can occur in dir_emit*(). 220 + */ 222 221 #define ITER_POS_FILLED_DOTS (2) 223 222 static int exfat_iterate(struct file *file, struct dir_context *ctx) 224 223 { ··· 236 229 int err = 0, fake_offset = 0; 237 230 238 231 exfat_init_namebuf(nb); 239 - mutex_lock(&EXFAT_SB(sb)->s_lock); 240 232 241 233 cpos = ctx->pos; 242 234 if (!dir_emit_dots(file, ctx)) 243 - goto unlock; 235 + goto out; 244 236 245 237 if (ctx->pos == ITER_POS_FILLED_DOTS) { 246 238 cpos = 0; ··· 251 245 /* name buffer should be allocated before use */ 252 246 err = exfat_alloc_namebuf(nb); 253 247 if (err) 254 - goto unlock; 248 + goto out; 255 249 get_new: 250 + mutex_lock(&EXFAT_SB(sb)->s_lock); 251 + 256 252 if (ei->flags == ALLOC_NO_FAT_CHAIN && cpos >= i_size_read(inode)) 257 253 goto end_of_dir; 258 254 259 255 err = exfat_readdir(inode, &cpos, &de); 260 256 if (err) { 261 257 /* 262 - * At least we tried to read a sector. Move cpos to next sector 263 - * position (should be aligned). 258 + * At least we tried to read a sector. 259 + * Move cpos to next sector position (should be aligned). 264 260 */ 265 261 if (err == -EIO) { 266 262 cpos += 1 << (sb->s_blocksize_bits); ··· 285 277 inum = iunique(sb, EXFAT_ROOT_INO); 286 278 } 287 279 288 - /* 289 - * Before calling dir_emit(), sb_lock should be released. 290 - * Because page fault can occur in dir_emit() when the size 291 - * of buffer given from user is larger than one page size. 292 - */ 293 280 mutex_unlock(&EXFAT_SB(sb)->s_lock); 294 281 if (!dir_emit(ctx, nb->lfn, strlen(nb->lfn), inum, 295 282 (de.attr & ATTR_SUBDIR) ? DT_DIR : DT_REG)) 296 - goto out_unlocked; 297 - mutex_lock(&EXFAT_SB(sb)->s_lock); 283 + goto out; 298 284 ctx->pos = cpos; 299 285 goto get_new; 300 286 ··· 296 294 if (!cpos && fake_offset) 297 295 cpos = ITER_POS_FILLED_DOTS; 298 296 ctx->pos = cpos; 299 - unlock: 300 297 mutex_unlock(&EXFAT_SB(sb)->s_lock); 301 - out_unlocked: 298 + out: 302 299 /* 303 300 * To improve performance, free namebuf after unlock sb_lock. 304 301 * If namebuf is not allocated, this function do nothing ··· 1080 1079 if (entry_type == TYPE_EXTEND) { 1081 1080 unsigned short entry_uniname[16], unichar; 1082 1081 1083 - if (step != DIRENT_STEP_NAME) { 1082 + if (step != DIRENT_STEP_NAME || 1083 + name_len >= MAX_NAME_LENGTH) { 1084 1084 step = DIRENT_STEP_FILE; 1085 1085 continue; 1086 1086 }
+6 -3
fs/nfsd/vfs.c
··· 956 956 last_page = page + (offset + sd->len - 1) / PAGE_SIZE; 957 957 for (page += offset / PAGE_SIZE; page <= last_page; page++) { 958 958 /* 959 - * Skip page replacement when extending the contents 960 - * of the current page. 959 + * Skip page replacement when extending the contents of the 960 + * current page. But note that we may get two zero_pages in a 961 + * row from shmem. 961 962 */ 962 - if (page == *(rqstp->rq_next_page - 1)) 963 + if (page == *(rqstp->rq_next_page - 1) && 964 + offset_in_page(rqstp->rq_res.page_base + 965 + rqstp->rq_res.page_len)) 963 966 continue; 964 967 if (unlikely(!svc_rqst_replace_page(rqstp, page))) 965 968 return -EIO;
+2 -2
fs/nls/nls_base.c
··· 272 272 return -EINVAL; 273 273 } 274 274 275 - static struct nls_table *find_nls(char *charset) 275 + static struct nls_table *find_nls(const char *charset) 276 276 { 277 277 struct nls_table *nls; 278 278 spin_lock(&nls_lock); ··· 288 288 return nls; 289 289 } 290 290 291 - struct nls_table *load_nls(char *charset) 291 + struct nls_table *load_nls(const char *charset) 292 292 { 293 293 return try_then_request_module(find_nls(charset), "nls_%s", charset); 294 294 }
+1 -1
fs/proc/vmcore.c
··· 132 132 u64 *ppos, bool encrypted) 133 133 { 134 134 unsigned long pfn, offset; 135 - size_t nr_bytes; 135 + ssize_t nr_bytes; 136 136 ssize_t read = 0, tmp; 137 137 int idx; 138 138
+1
fs/smb/client/cifsglob.h
··· 1062 1062 unsigned long chans_need_reconnect; 1063 1063 /* ========= end: protected by chan_lock ======== */ 1064 1064 struct cifs_ses *dfs_root_ses; 1065 + struct nls_table *local_nls; 1065 1066 }; 1066 1067 1067 1068 static inline bool
+1 -2
fs/smb/client/cifssmb.c
··· 129 129 } 130 130 spin_unlock(&server->srv_lock); 131 131 132 - nls_codepage = load_nls_default(); 132 + nls_codepage = ses->local_nls; 133 133 134 134 /* 135 135 * need to prevent multiple threads trying to simultaneously ··· 200 200 rc = -EAGAIN; 201 201 } 202 202 203 - unload_nls(nls_codepage); 204 203 return rc; 205 204 } 206 205
+5
fs/smb/client/connect.c
··· 1842 1842 CIFS_MAX_PASSWORD_LEN)) 1843 1843 return 0; 1844 1844 } 1845 + 1846 + if (strcmp(ctx->local_nls->charset, ses->local_nls->charset)) 1847 + return 0; 1848 + 1845 1849 return 1; 1846 1850 } 1847 1851 ··· 2290 2286 2291 2287 ses->sectype = ctx->sectype; 2292 2288 ses->sign = ctx->sign; 2289 + ses->local_nls = load_nls(ctx->local_nls->charset); 2293 2290 2294 2291 /* add server as first channel */ 2295 2292 spin_lock(&ses->chan_lock);
+5
fs/smb/client/ioctl.c
··· 478 478 } 479 479 cifs_sb = CIFS_SB(inode->i_sb); 480 480 tlink = cifs_sb_tlink(cifs_sb); 481 + if (IS_ERR(tlink)) { 482 + rc = PTR_ERR(tlink); 483 + break; 484 + } 485 + 481 486 tcon = tlink_tcon(tlink); 482 487 rc = cifs_dump_full_key(tcon, (void __user *)arg); 483 488 cifs_put_tlink(tlink);
+1
fs/smb/client/misc.c
··· 95 95 return; 96 96 } 97 97 98 + unload_nls(buf_to_free->local_nls); 98 99 atomic_dec(&sesInfoAllocCount); 99 100 kfree(buf_to_free->serverOS); 100 101 kfree(buf_to_free->serverDomain);
+3 -1
fs/smb/client/sess.c
··· 1013 1013 } 1014 1014 1015 1015 1016 + /* See MS-NLMP 2.2.1.3 */ 1016 1017 int build_ntlmssp_auth_blob(unsigned char **pbuffer, 1017 1018 u16 *buflen, 1018 1019 struct cifs_ses *ses, ··· 1048 1047 1049 1048 flags = ses->ntlmssp->server_flags | NTLMSSP_REQUEST_TARGET | 1050 1049 NTLMSSP_NEGOTIATE_TARGET_INFO | NTLMSSP_NEGOTIATE_WORKSTATION_SUPPLIED; 1051 - 1050 + /* we only send version information in ntlmssp negotiate, so do not set this flag */ 1051 + flags = flags & ~NTLMSSP_NEGOTIATE_VERSION; 1052 1052 tmp = *pbuffer + sizeof(AUTHENTICATE_MESSAGE); 1053 1053 sec_blob->NegotiateFlags = cpu_to_le32(flags); 1054 1054
+1 -2
fs/smb/client/smb2pdu.c
··· 242 242 } 243 243 spin_unlock(&server->srv_lock); 244 244 245 - nls_codepage = load_nls_default(); 245 + nls_codepage = ses->local_nls; 246 246 247 247 /* 248 248 * need to prevent multiple threads trying to simultaneously ··· 324 324 rc = -EAGAIN; 325 325 } 326 326 failed: 327 - unload_nls(nls_codepage); 328 327 return rc; 329 328 } 330 329
+1 -1
include/asm-generic/word-at-a-time.h
··· 38 38 return (mask >> 8) ? byte : byte + 1; 39 39 } 40 40 41 - static inline bool has_zero(unsigned long val, unsigned long *data, const struct word_at_a_time *c) 41 + static inline unsigned long has_zero(unsigned long val, unsigned long *data, const struct word_at_a_time *c) 42 42 { 43 43 unsigned long rhs = val | c->low_bits; 44 44 *data = rhs;
-5
include/drm/drm_fb_helper.h
··· 368 368 { 369 369 } 370 370 371 - static inline int drm_fb_helper_defio_init(struct drm_fb_helper *fb_helper) 372 - { 373 - return -ENODEV; 374 - } 375 - 376 371 static inline void drm_fb_helper_set_suspend(struct drm_fb_helper *fb_helper, 377 372 bool suspend) 378 373 {
+6 -2
include/linux/cpumask.h
··· 175 175 176 176 /** 177 177 * cpumask_first_and - return the first cpu from *srcp1 & *srcp2 178 - * @src1p: the first input 179 - * @src2p: the second input 178 + * @srcp1: the first input 179 + * @srcp2: the second input 180 180 * 181 181 * Returns >= nr_cpu_ids if no cpus set in both. See also cpumask_next_and(). 182 182 */ ··· 1197 1197 /** 1198 1198 * cpumap_print_list_to_buf - copies the cpumask into the buffer as 1199 1199 * comma-separated list of cpus 1200 + * @buf: the buffer to copy into 1201 + * @mask: the cpumask to copy 1202 + * @off: in the string from which we are copying, we copy to @buf 1203 + * @count: the maximum number of bytes to print 1200 1204 * 1201 1205 * Everything is same with the above cpumap_print_bitmask_to_buf() 1202 1206 * except the print format.
-4
include/linux/ftrace.h
··· 684 684 ftrace_set_early_filter(struct ftrace_ops *ops, char *buf, int enable); 685 685 686 686 /* defined in arch */ 687 - extern int ftrace_ip_converted(unsigned long ip); 688 687 extern int ftrace_dyn_arch_init(void); 689 688 extern void ftrace_replace_code(int enable); 690 689 extern int ftrace_update_ftrace_func(ftrace_func_t func); ··· 857 858 return -EINVAL; 858 859 } 859 860 #endif 860 - 861 - /* May be defined in arch */ 862 - extern int ftrace_arch_read_dyn_info(char *buf, int size); 863 861 864 862 extern int skip_trace(unsigned long ip); 865 863 extern void ftrace_module_init(struct module *mod);
+23 -6
include/linux/mm.h
··· 641 641 */ 642 642 static inline bool vma_start_read(struct vm_area_struct *vma) 643 643 { 644 - /* Check before locking. A race might cause false locked result. */ 645 - if (vma->vm_lock_seq == READ_ONCE(vma->vm_mm->mm_lock_seq)) 644 + /* 645 + * Check before locking. A race might cause false locked result. 646 + * We can use READ_ONCE() for the mm_lock_seq here, and don't need 647 + * ACQUIRE semantics, because this is just a lockless check whose result 648 + * we don't rely on for anything - the mm_lock_seq read against which we 649 + * need ordering is below. 650 + */ 651 + if (READ_ONCE(vma->vm_lock_seq) == READ_ONCE(vma->vm_mm->mm_lock_seq)) 646 652 return false; 647 653 648 654 if (unlikely(down_read_trylock(&vma->vm_lock->lock) == 0)) ··· 659 653 * False unlocked result is impossible because we modify and check 660 654 * vma->vm_lock_seq under vma->vm_lock protection and mm->mm_lock_seq 661 655 * modification invalidates all existing locks. 656 + * 657 + * We must use ACQUIRE semantics for the mm_lock_seq so that if we are 658 + * racing with vma_end_write_all(), we only start reading from the VMA 659 + * after it has been unlocked. 660 + * This pairs with RELEASE semantics in vma_end_write_all(). 662 661 */ 663 - if (unlikely(vma->vm_lock_seq == READ_ONCE(vma->vm_mm->mm_lock_seq))) { 662 + if (unlikely(vma->vm_lock_seq == smp_load_acquire(&vma->vm_mm->mm_lock_seq))) { 664 663 up_read(&vma->vm_lock->lock); 665 664 return false; 666 665 } ··· 687 676 * current task is holding mmap_write_lock, both vma->vm_lock_seq and 688 677 * mm->mm_lock_seq can't be concurrently modified. 689 678 */ 690 - *mm_lock_seq = READ_ONCE(vma->vm_mm->mm_lock_seq); 679 + *mm_lock_seq = vma->vm_mm->mm_lock_seq; 691 680 return (vma->vm_lock_seq == *mm_lock_seq); 692 681 } 693 682 ··· 699 688 return; 700 689 701 690 down_write(&vma->vm_lock->lock); 702 - vma->vm_lock_seq = mm_lock_seq; 691 + /* 692 + * We should use WRITE_ONCE() here because we can have concurrent reads 693 + * from the early lockless pessimistic check in vma_start_read(). 694 + * We don't really care about the correctness of that early check, but 695 + * we should use WRITE_ONCE() for cleanliness and to keep KCSAN happy. 696 + */ 697 + WRITE_ONCE(vma->vm_lock_seq, mm_lock_seq); 703 698 up_write(&vma->vm_lock->lock); 704 699 } 705 700 ··· 719 702 if (!down_write_trylock(&vma->vm_lock->lock)) 720 703 return false; 721 704 722 - vma->vm_lock_seq = mm_lock_seq; 705 + WRITE_ONCE(vma->vm_lock_seq, mm_lock_seq); 723 706 up_write(&vma->vm_lock->lock); 724 707 return true; 725 708 }
+28
include/linux/mm_types.h
··· 514 514 }; 515 515 516 516 #ifdef CONFIG_PER_VMA_LOCK 517 + /* 518 + * Can only be written (using WRITE_ONCE()) while holding both: 519 + * - mmap_lock (in write mode) 520 + * - vm_lock->lock (in write mode) 521 + * Can be read reliably while holding one of: 522 + * - mmap_lock (in read or write mode) 523 + * - vm_lock->lock (in read or write mode) 524 + * Can be read unreliably (using READ_ONCE()) for pessimistic bailout 525 + * while holding nothing (except RCU to keep the VMA struct allocated). 526 + * 527 + * This sequence counter is explicitly allowed to overflow; sequence 528 + * counter reuse can only lead to occasional unnecessary use of the 529 + * slowpath. 530 + */ 517 531 int vm_lock_seq; 518 532 struct vma_lock *vm_lock; 519 533 ··· 693 679 * by mmlist_lock 694 680 */ 695 681 #ifdef CONFIG_PER_VMA_LOCK 682 + /* 683 + * This field has lock-like semantics, meaning it is sometimes 684 + * accessed with ACQUIRE/RELEASE semantics. 685 + * Roughly speaking, incrementing the sequence number is 686 + * equivalent to releasing locks on VMAs; reading the sequence 687 + * number can be part of taking a read lock on a VMA. 688 + * 689 + * Can be modified under write mmap_lock using RELEASE 690 + * semantics. 691 + * Can be read with no other protection when holding write 692 + * mmap_lock. 693 + * Can be read with ACQUIRE semantics if not holding write 694 + * mmap_lock. 695 + */ 696 696 int mm_lock_seq; 697 697 #endif 698 698
+8 -2
include/linux/mmap_lock.h
··· 76 76 static inline void vma_end_write_all(struct mm_struct *mm) 77 77 { 78 78 mmap_assert_write_locked(mm); 79 - /* No races during update due to exclusive mmap_lock being held */ 80 - WRITE_ONCE(mm->mm_lock_seq, mm->mm_lock_seq + 1); 79 + /* 80 + * Nobody can concurrently modify mm->mm_lock_seq due to exclusive 81 + * mmap_lock being held. 82 + * We need RELEASE semantics here to ensure that preceding stores into 83 + * the VMA take effect before we unlock it with this store. 84 + * Pairs with ACQUIRE semantics in vma_start_read(). 85 + */ 86 + smp_store_release(&mm->mm_lock_seq, mm->mm_lock_seq + 1); 81 87 } 82 88 #else 83 89 static inline void vma_end_write_all(struct mm_struct *mm) {}
+1 -1
include/linux/nls.h
··· 47 47 /* nls_base.c */ 48 48 extern int __register_nls(struct nls_table *, struct module *); 49 49 extern int unregister_nls(struct nls_table *); 50 - extern struct nls_table *load_nls(char *); 50 + extern struct nls_table *load_nls(const char *charset); 51 51 extern void unload_nls(struct nls_table *); 52 52 extern struct nls_table *load_nls_default(void); 53 53 #define register_nls(nls) __register_nls((nls), THIS_MODULE)
-10
include/linux/pm_wakeirq.h
··· 10 10 extern int dev_pm_set_dedicated_wake_irq(struct device *dev, int irq); 11 11 extern int dev_pm_set_dedicated_wake_irq_reverse(struct device *dev, int irq); 12 12 extern void dev_pm_clear_wake_irq(struct device *dev); 13 - extern void dev_pm_enable_wake_irq(struct device *dev); 14 - extern void dev_pm_disable_wake_irq(struct device *dev); 15 13 16 14 #else /* !CONFIG_PM */ 17 15 ··· 29 31 } 30 32 31 33 static inline void dev_pm_clear_wake_irq(struct device *dev) 32 - { 33 - } 34 - 35 - static inline void dev_pm_enable_wake_irq(struct device *dev) 36 - { 37 - } 38 - 39 - static inline void dev_pm_disable_wake_irq(struct device *dev) 40 34 { 41 35 } 42 36
+2
include/linux/spi/corgi_lcd.h
··· 15 15 void (*kick_battery)(void); 16 16 }; 17 17 18 + void corgi_lcd_limit_intensity(int limit); 19 + 18 20 #endif /* __LINUX_SPI_CORGI_LCD_H */
+3 -3
include/linux/thermal.h
··· 301 301 #ifdef CONFIG_THERMAL 302 302 struct thermal_zone_device *thermal_zone_device_register(const char *, int, int, 303 303 void *, struct thermal_zone_device_ops *, 304 - struct thermal_zone_params *, int, int); 304 + const struct thermal_zone_params *, int, int); 305 305 306 306 void thermal_zone_device_unregister(struct thermal_zone_device *); 307 307 308 308 struct thermal_zone_device * 309 309 thermal_zone_device_register_with_trips(const char *, struct thermal_trip *, int, int, 310 310 void *, struct thermal_zone_device_ops *, 311 - struct thermal_zone_params *, int, int); 311 + const struct thermal_zone_params *, int, int); 312 312 313 313 void *thermal_zone_device_priv(struct thermal_zone_device *tzd); 314 314 const char *thermal_zone_device_type(struct thermal_zone_device *tzd); ··· 348 348 static inline struct thermal_zone_device *thermal_zone_device_register( 349 349 const char *type, int trips, int mask, void *devdata, 350 350 struct thermal_zone_device_ops *ops, 351 - struct thermal_zone_params *tzp, 351 + const struct thermal_zone_params *tzp, 352 352 int passive_delay, int polling_delay) 353 353 { return ERR_PTR(-ENODEV); } 354 354 static inline void thermal_zone_device_unregister(
+43
include/net/gro.h
··· 452 452 gro_normal_list(napi); 453 453 } 454 454 455 + /* This function is the alternative of 'inet_iif' and 'inet_sdif' 456 + * functions in case we can not rely on fields of IPCB. 457 + * 458 + * The caller must verify skb_valid_dst(skb) is false and skb->dev is initialized. 459 + * The caller must hold the RCU read lock. 460 + */ 461 + static inline void inet_get_iif_sdif(const struct sk_buff *skb, int *iif, int *sdif) 462 + { 463 + *iif = inet_iif(skb) ?: skb->dev->ifindex; 464 + *sdif = 0; 465 + 466 + #if IS_ENABLED(CONFIG_NET_L3_MASTER_DEV) 467 + if (netif_is_l3_slave(skb->dev)) { 468 + struct net_device *master = netdev_master_upper_dev_get_rcu(skb->dev); 469 + 470 + *sdif = *iif; 471 + *iif = master ? master->ifindex : 0; 472 + } 473 + #endif 474 + } 475 + 476 + /* This function is the alternative of 'inet6_iif' and 'inet6_sdif' 477 + * functions in case we can not rely on fields of IP6CB. 478 + * 479 + * The caller must verify skb_valid_dst(skb) is false and skb->dev is initialized. 480 + * The caller must hold the RCU read lock. 481 + */ 482 + static inline void inet6_get_iif_sdif(const struct sk_buff *skb, int *iif, int *sdif) 483 + { 484 + /* using skb->dev->ifindex because skb_dst(skb) is not initialized */ 485 + *iif = skb->dev->ifindex; 486 + *sdif = 0; 487 + 488 + #if IS_ENABLED(CONFIG_NET_L3_MASTER_DEV) 489 + if (netif_is_l3_slave(skb->dev)) { 490 + struct net_device *master = netdev_master_upper_dev_get_rcu(skb->dev); 491 + 492 + *sdif = *iif; 493 + *iif = master ? master->ifindex : 0; 494 + } 495 + #endif 496 + } 497 + 455 498 extern struct list_head offload_base; 456 499 457 500 #endif /* _NET_IPV6_GRO_H */
+4 -3
include/net/inet_sock.h
··· 107 107 108 108 static inline u32 inet_request_mark(const struct sock *sk, struct sk_buff *skb) 109 109 { 110 - if (!sk->sk_mark && 111 - READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_fwmark_accept)) 110 + u32 mark = READ_ONCE(sk->sk_mark); 111 + 112 + if (!mark && READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_fwmark_accept)) 112 113 return skb->mark; 113 114 114 - return sk->sk_mark; 115 + return mark; 115 116 } 116 117 117 118 static inline int inet_request_bound_dev_if(const struct sock *sk,
+1 -1
include/net/ip.h
··· 93 93 { 94 94 ipcm_init(ipcm); 95 95 96 - ipcm->sockc.mark = inet->sk.sk_mark; 96 + ipcm->sockc.mark = READ_ONCE(inet->sk.sk_mark); 97 97 ipcm->sockc.tsflags = inet->sk.sk_tsflags; 98 98 ipcm->oif = READ_ONCE(inet->sk.sk_bound_dev_if); 99 99 ipcm->addr = inet->inet_saddr;
+2 -2
include/net/route.h
··· 168 168 __be16 dport, __be16 sport, 169 169 __u8 proto, __u8 tos, int oif) 170 170 { 171 - flowi4_init_output(fl4, oif, sk ? sk->sk_mark : 0, tos, 171 + flowi4_init_output(fl4, oif, sk ? READ_ONCE(sk->sk_mark) : 0, tos, 172 172 RT_SCOPE_UNIVERSE, proto, 173 173 sk ? inet_sk_flowi_flags(sk) : 0, 174 174 daddr, saddr, dport, sport, sock_net_uid(net, sk)); ··· 301 301 if (inet_sk(sk)->transparent) 302 302 flow_flags |= FLOWI_FLAG_ANYSRC; 303 303 304 - flowi4_init_output(fl4, oif, sk->sk_mark, ip_sock_rt_tos(sk), 304 + flowi4_init_output(fl4, oif, READ_ONCE(sk->sk_mark), ip_sock_rt_tos(sk), 305 305 ip_sock_rt_scope(sk), protocol, flow_flags, dst, 306 306 src, dport, sport, sk->sk_uid); 307 307 }
+2 -2
include/net/vxlan.h
··· 556 556 } 557 557 558 558 static inline bool vxlan_fdb_nh_path_select(struct nexthop *nh, 559 - int hash, 559 + u32 hash, 560 560 struct vxlan_rdst *rdst) 561 561 { 562 562 struct fib_nh_common *nhc; 563 563 564 - nhc = nexthop_path_fdb_result(nh, hash); 564 + nhc = nexthop_path_fdb_result(nh, hash >> 1); 565 565 if (unlikely(!nhc)) 566 566 return false; 567 567
+3
include/soc/tegra/mc.h
··· 175 175 int (*get_bw)(struct icc_node *node, u32 *avg, u32 *peak); 176 176 }; 177 177 178 + struct icc_node *tegra_mc_icc_xlate(struct of_phandle_args *spec, void *data); 179 + extern const struct tegra_mc_icc_ops tegra_mc_icc_ops; 180 + 178 181 struct tegra_mc_ops { 179 182 /* 180 183 * @probe: Callback to set up SoC-specific bits of the memory controller. This is called
+5 -5
include/uapi/linux/blkzoned.h
··· 51 51 * 52 52 * The Zone Condition state machine in the ZBC/ZAC standards maps the above 53 53 * deinitions as: 54 - * - ZC1: Empty | BLK_ZONE_EMPTY 54 + * - ZC1: Empty | BLK_ZONE_COND_EMPTY 55 55 * - ZC2: Implicit Open | BLK_ZONE_COND_IMP_OPEN 56 56 * - ZC3: Explicit Open | BLK_ZONE_COND_EXP_OPEN 57 - * - ZC4: Closed | BLK_ZONE_CLOSED 58 - * - ZC5: Full | BLK_ZONE_FULL 59 - * - ZC6: Read Only | BLK_ZONE_READONLY 60 - * - ZC7: Offline | BLK_ZONE_OFFLINE 57 + * - ZC4: Closed | BLK_ZONE_COND_CLOSED 58 + * - ZC5: Full | BLK_ZONE_COND_FULL 59 + * - ZC6: Read Only | BLK_ZONE_COND_READONLY 60 + * - ZC7: Offline | BLK_ZONE_COND_OFFLINE 61 61 * 62 62 * Conditions 0x5 to 0xC are reserved by the current ZBC/ZAC spec and should 63 63 * be considered invalid.
+3 -1
include/uapi/linux/pkt_cls.h
··· 713 713 TCA_FLOWER_KEY_CFM_OPT_UNSPEC, 714 714 TCA_FLOWER_KEY_CFM_MD_LEVEL, 715 715 TCA_FLOWER_KEY_CFM_OPCODE, 716 - TCA_FLOWER_KEY_CFM_OPT_MAX, 716 + __TCA_FLOWER_KEY_CFM_OPT_MAX, 717 717 }; 718 + 719 + #define TCA_FLOWER_KEY_CFM_OPT_MAX (__TCA_FLOWER_KEY_CFM_OPT_MAX - 1) 718 720 719 721 #define TCA_FLOWER_MASK_FLAGS_RANGE (1 << 0) /* Range-based match */ 720 722
+9
include/uapi/xen/evtchn.h
··· 101 101 domid_t domid; 102 102 }; 103 103 104 + /* 105 + * Bind statically allocated @port. 106 + */ 107 + #define IOCTL_EVTCHN_BIND_STATIC \ 108 + _IOC(_IOC_NONE, 'E', 7, sizeof(struct ioctl_evtchn_bind)) 109 + struct ioctl_evtchn_bind { 110 + unsigned int port; 111 + }; 112 + 104 113 #endif /* __LINUX_PUBLIC_EVTCHN_H__ */
+10 -1
include/xen/events.h
··· 69 69 /* 70 70 * Allow extra references to event channels exposed to userspace by evtchn 71 71 */ 72 - int evtchn_make_refcounted(evtchn_port_t evtchn); 72 + int evtchn_make_refcounted(evtchn_port_t evtchn, bool is_static); 73 73 int evtchn_get(evtchn_port_t evtchn); 74 74 void evtchn_put(evtchn_port_t evtchn); 75 75 ··· 140 140 void xen_init_IRQ(void); 141 141 142 142 irqreturn_t xen_debug_interrupt(int irq, void *dev_id); 143 + 144 + static inline void xen_evtchn_close(evtchn_port_t port) 145 + { 146 + struct evtchn_close close; 147 + 148 + close.port = port; 149 + if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0) 150 + BUG(); 151 + } 143 152 144 153 #endif /* _XEN_EVENTS_H */
+17 -6
io_uring/io_uring.c
··· 2493 2493 return 0; 2494 2494 } 2495 2495 2496 + static bool current_pending_io(void) 2497 + { 2498 + struct io_uring_task *tctx = current->io_uring; 2499 + 2500 + if (!tctx) 2501 + return false; 2502 + return percpu_counter_read_positive(&tctx->inflight); 2503 + } 2504 + 2496 2505 /* when returns >0, the caller should retry */ 2497 2506 static inline int io_cqring_wait_schedule(struct io_ring_ctx *ctx, 2498 2507 struct io_wait_queue *iowq) 2499 2508 { 2500 - int token, ret; 2509 + int io_wait, ret; 2501 2510 2502 2511 if (unlikely(READ_ONCE(ctx->check_cq))) 2503 2512 return 1; ··· 2520 2511 return 0; 2521 2512 2522 2513 /* 2523 - * Use io_schedule_prepare/finish, so cpufreq can take into account 2524 - * that the task is waiting for IO - turns out to be important for low 2525 - * QD IO. 2514 + * Mark us as being in io_wait if we have pending requests, so cpufreq 2515 + * can take into account that the task is waiting for IO - turns out 2516 + * to be important for low QD IO. 2526 2517 */ 2527 - token = io_schedule_prepare(); 2518 + io_wait = current->in_iowait; 2519 + if (current_pending_io()) 2520 + current->in_iowait = 1; 2528 2521 ret = 0; 2529 2522 if (iowq->timeout == KTIME_MAX) 2530 2523 schedule(); 2531 2524 else if (!schedule_hrtimeout(&iowq->timeout, HRTIMER_MODE_ABS)) 2532 2525 ret = -ETIME; 2533 - io_schedule_finish(token); 2526 + current->in_iowait = io_wait; 2534 2527 return ret; 2535 2528 } 2536 2529
+21 -14
kernel/bpf/cpumap.c
··· 28 28 #include <linux/sched.h> 29 29 #include <linux/workqueue.h> 30 30 #include <linux/kthread.h> 31 + #include <linux/completion.h> 31 32 #include <trace/events/xdp.h> 32 33 #include <linux/btf_ids.h> 33 34 ··· 74 73 struct rcu_head rcu; 75 74 76 75 struct work_struct kthread_stop_wq; 76 + struct completion kthread_running; 77 77 }; 78 78 79 79 struct bpf_cpu_map { ··· 131 129 * invoked cpu_map_kthread_stop(). Catch any broken behaviour 132 130 * gracefully and warn once. 133 131 */ 134 - struct xdp_frame *xdpf; 132 + void *ptr; 135 133 136 - while ((xdpf = ptr_ring_consume(ring))) 137 - if (WARN_ON_ONCE(xdpf)) 138 - xdp_return_frame(xdpf); 134 + while ((ptr = ptr_ring_consume(ring))) { 135 + WARN_ON_ONCE(1); 136 + if (unlikely(__ptr_test_bit(0, &ptr))) { 137 + __ptr_clear_bit(0, &ptr); 138 + kfree_skb(ptr); 139 + continue; 140 + } 141 + xdp_return_frame(ptr); 142 + } 139 143 } 140 144 141 145 static void put_cpu_map_entry(struct bpf_cpu_map_entry *rcpu) ··· 161 153 static void cpu_map_kthread_stop(struct work_struct *work) 162 154 { 163 155 struct bpf_cpu_map_entry *rcpu; 164 - int err; 165 156 166 157 rcpu = container_of(work, struct bpf_cpu_map_entry, kthread_stop_wq); 167 158 ··· 170 163 rcu_barrier(); 171 164 172 165 /* kthread_stop will wake_up_process and wait for it to complete */ 173 - err = kthread_stop(rcpu->kthread); 174 - if (err) { 175 - /* kthread_stop may be called before cpu_map_kthread_run 176 - * is executed, so we need to release the memory related 177 - * to rcpu. 178 - */ 179 - put_cpu_map_entry(rcpu); 180 - } 166 + kthread_stop(rcpu->kthread); 181 167 } 182 168 183 169 static void cpu_map_bpf_prog_run_skb(struct bpf_cpu_map_entry *rcpu, ··· 298 298 return nframes; 299 299 } 300 300 301 - 302 301 static int cpu_map_kthread_run(void *data) 303 302 { 304 303 struct bpf_cpu_map_entry *rcpu = data; 305 304 305 + complete(&rcpu->kthread_running); 306 306 set_current_state(TASK_INTERRUPTIBLE); 307 307 308 308 /* When kthread gives stop order, then rcpu have been disconnected ··· 467 467 goto free_ptr_ring; 468 468 469 469 /* Setup kthread */ 470 + init_completion(&rcpu->kthread_running); 470 471 rcpu->kthread = kthread_create_on_node(cpu_map_kthread_run, rcpu, numa, 471 472 "cpumap/%d/map:%d", cpu, 472 473 map->id); ··· 480 479 /* Make sure kthread runs on a single CPU */ 481 480 kthread_bind(rcpu->kthread, cpu); 482 481 wake_up_process(rcpu->kthread); 482 + 483 + /* Make sure kthread has been running, so kthread_stop() will not 484 + * stop the kthread prematurely and all pending frames or skbs 485 + * will be handled by the kthread before kthread_stop() returns. 486 + */ 487 + wait_for_completion(&rcpu->kthread_running); 483 488 484 489 return rcpu; 485 490
+13 -1
kernel/kprobes.c
··· 1545 1545 return 0; 1546 1546 } 1547 1547 1548 + static bool is_cfi_preamble_symbol(unsigned long addr) 1549 + { 1550 + char symbuf[KSYM_NAME_LEN]; 1551 + 1552 + if (lookup_symbol_name(addr, symbuf)) 1553 + return false; 1554 + 1555 + return str_has_prefix("__cfi_", symbuf) || 1556 + str_has_prefix("__pfx_", symbuf); 1557 + } 1558 + 1548 1559 static int check_kprobe_address_safe(struct kprobe *p, 1549 1560 struct module **probed_mod) 1550 1561 { ··· 1574 1563 within_kprobe_blacklist((unsigned long) p->addr) || 1575 1564 jump_label_text_reserved(p->addr, p->addr) || 1576 1565 static_call_text_reserved(p->addr, p->addr) || 1577 - find_bug((unsigned long)p->addr)) { 1566 + find_bug((unsigned long)p->addr) || 1567 + is_cfi_preamble_symbol((unsigned long)p->addr)) { 1578 1568 ret = -EINVAL; 1579 1569 goto out; 1580 1570 }
+115 -57
kernel/locking/rtmutex.c
··· 333 333 return prio; 334 334 } 335 335 336 + /* 337 + * Update the waiter->tree copy of the sort keys. 338 + */ 336 339 static __always_inline void 337 340 waiter_update_prio(struct rt_mutex_waiter *waiter, struct task_struct *task) 338 341 { 339 - waiter->prio = __waiter_prio(task); 340 - waiter->deadline = task->dl.deadline; 342 + lockdep_assert_held(&waiter->lock->wait_lock); 343 + lockdep_assert(RB_EMPTY_NODE(&waiter->tree.entry)); 344 + 345 + waiter->tree.prio = __waiter_prio(task); 346 + waiter->tree.deadline = task->dl.deadline; 341 347 } 342 348 343 349 /* 344 - * Only use with rt_mutex_waiter_{less,equal}() 350 + * Update the waiter->pi_tree copy of the sort keys (from the tree copy). 345 351 */ 346 - #define task_to_waiter(p) \ 347 - &(struct rt_mutex_waiter){ .prio = __waiter_prio(p), .deadline = (p)->dl.deadline } 352 + static __always_inline void 353 + waiter_clone_prio(struct rt_mutex_waiter *waiter, struct task_struct *task) 354 + { 355 + lockdep_assert_held(&waiter->lock->wait_lock); 356 + lockdep_assert_held(&task->pi_lock); 357 + lockdep_assert(RB_EMPTY_NODE(&waiter->pi_tree.entry)); 348 358 349 - static __always_inline int rt_mutex_waiter_less(struct rt_mutex_waiter *left, 350 - struct rt_mutex_waiter *right) 359 + waiter->pi_tree.prio = waiter->tree.prio; 360 + waiter->pi_tree.deadline = waiter->tree.deadline; 361 + } 362 + 363 + /* 364 + * Only use with rt_waiter_node_{less,equal}() 365 + */ 366 + #define task_to_waiter_node(p) \ 367 + &(struct rt_waiter_node){ .prio = __waiter_prio(p), .deadline = (p)->dl.deadline } 368 + #define task_to_waiter(p) \ 369 + &(struct rt_mutex_waiter){ .tree = *task_to_waiter_node(p) } 370 + 371 + static __always_inline int rt_waiter_node_less(struct rt_waiter_node *left, 372 + struct rt_waiter_node *right) 351 373 { 352 374 if (left->prio < right->prio) 353 375 return 1; ··· 386 364 return 0; 387 365 } 388 366 389 - static __always_inline int rt_mutex_waiter_equal(struct rt_mutex_waiter *left, 390 - struct rt_mutex_waiter *right) 367 + static __always_inline int rt_waiter_node_equal(struct rt_waiter_node *left, 368 + struct rt_waiter_node *right) 391 369 { 392 370 if (left->prio != right->prio) 393 371 return 0; ··· 407 385 static inline bool rt_mutex_steal(struct rt_mutex_waiter *waiter, 408 386 struct rt_mutex_waiter *top_waiter) 409 387 { 410 - if (rt_mutex_waiter_less(waiter, top_waiter)) 388 + if (rt_waiter_node_less(&waiter->tree, &top_waiter->tree)) 411 389 return true; 412 390 413 391 #ifdef RT_MUTEX_BUILD_SPINLOCKS ··· 415 393 * Note that RT tasks are excluded from same priority (lateral) 416 394 * steals to prevent the introduction of an unbounded latency. 417 395 */ 418 - if (rt_prio(waiter->prio) || dl_prio(waiter->prio)) 396 + if (rt_prio(waiter->tree.prio) || dl_prio(waiter->tree.prio)) 419 397 return false; 420 398 421 - return rt_mutex_waiter_equal(waiter, top_waiter); 399 + return rt_waiter_node_equal(&waiter->tree, &top_waiter->tree); 422 400 #else 423 401 return false; 424 402 #endif 425 403 } 426 404 427 405 #define __node_2_waiter(node) \ 428 - rb_entry((node), struct rt_mutex_waiter, tree_entry) 406 + rb_entry((node), struct rt_mutex_waiter, tree.entry) 429 407 430 408 static __always_inline bool __waiter_less(struct rb_node *a, const struct rb_node *b) 431 409 { 432 410 struct rt_mutex_waiter *aw = __node_2_waiter(a); 433 411 struct rt_mutex_waiter *bw = __node_2_waiter(b); 434 412 435 - if (rt_mutex_waiter_less(aw, bw)) 413 + if (rt_waiter_node_less(&aw->tree, &bw->tree)) 436 414 return 1; 437 415 438 416 if (!build_ww_mutex()) 439 417 return 0; 440 418 441 - if (rt_mutex_waiter_less(bw, aw)) 419 + if (rt_waiter_node_less(&bw->tree, &aw->tree)) 442 420 return 0; 443 421 444 422 /* NOTE: relies on waiter->ww_ctx being set before insertion */ ··· 456 434 static __always_inline void 457 435 rt_mutex_enqueue(struct rt_mutex_base *lock, struct rt_mutex_waiter *waiter) 458 436 { 459 - rb_add_cached(&waiter->tree_entry, &lock->waiters, __waiter_less); 437 + lockdep_assert_held(&lock->wait_lock); 438 + 439 + rb_add_cached(&waiter->tree.entry, &lock->waiters, __waiter_less); 460 440 } 461 441 462 442 static __always_inline void 463 443 rt_mutex_dequeue(struct rt_mutex_base *lock, struct rt_mutex_waiter *waiter) 464 444 { 465 - if (RB_EMPTY_NODE(&waiter->tree_entry)) 445 + lockdep_assert_held(&lock->wait_lock); 446 + 447 + if (RB_EMPTY_NODE(&waiter->tree.entry)) 466 448 return; 467 449 468 - rb_erase_cached(&waiter->tree_entry, &lock->waiters); 469 - RB_CLEAR_NODE(&waiter->tree_entry); 450 + rb_erase_cached(&waiter->tree.entry, &lock->waiters); 451 + RB_CLEAR_NODE(&waiter->tree.entry); 470 452 } 471 453 472 - #define __node_2_pi_waiter(node) \ 473 - rb_entry((node), struct rt_mutex_waiter, pi_tree_entry) 454 + #define __node_2_rt_node(node) \ 455 + rb_entry((node), struct rt_waiter_node, entry) 474 456 475 - static __always_inline bool 476 - __pi_waiter_less(struct rb_node *a, const struct rb_node *b) 457 + static __always_inline bool __pi_waiter_less(struct rb_node *a, const struct rb_node *b) 477 458 { 478 - return rt_mutex_waiter_less(__node_2_pi_waiter(a), __node_2_pi_waiter(b)); 459 + return rt_waiter_node_less(__node_2_rt_node(a), __node_2_rt_node(b)); 479 460 } 480 461 481 462 static __always_inline void 482 463 rt_mutex_enqueue_pi(struct task_struct *task, struct rt_mutex_waiter *waiter) 483 464 { 484 - rb_add_cached(&waiter->pi_tree_entry, &task->pi_waiters, __pi_waiter_less); 465 + lockdep_assert_held(&task->pi_lock); 466 + 467 + rb_add_cached(&waiter->pi_tree.entry, &task->pi_waiters, __pi_waiter_less); 485 468 } 486 469 487 470 static __always_inline void 488 471 rt_mutex_dequeue_pi(struct task_struct *task, struct rt_mutex_waiter *waiter) 489 472 { 490 - if (RB_EMPTY_NODE(&waiter->pi_tree_entry)) 473 + lockdep_assert_held(&task->pi_lock); 474 + 475 + if (RB_EMPTY_NODE(&waiter->pi_tree.entry)) 491 476 return; 492 477 493 - rb_erase_cached(&waiter->pi_tree_entry, &task->pi_waiters); 494 - RB_CLEAR_NODE(&waiter->pi_tree_entry); 478 + rb_erase_cached(&waiter->pi_tree.entry, &task->pi_waiters); 479 + RB_CLEAR_NODE(&waiter->pi_tree.entry); 495 480 } 496 481 497 - static __always_inline void rt_mutex_adjust_prio(struct task_struct *p) 482 + static __always_inline void rt_mutex_adjust_prio(struct rt_mutex_base *lock, 483 + struct task_struct *p) 498 484 { 499 485 struct task_struct *pi_task = NULL; 500 486 487 + lockdep_assert_held(&lock->wait_lock); 488 + lockdep_assert(rt_mutex_owner(lock) == p); 501 489 lockdep_assert_held(&p->pi_lock); 502 490 503 491 if (task_has_pi_waiters(p)) ··· 603 571 * Chain walk basics and protection scope 604 572 * 605 573 * [R] refcount on task 606 - * [P] task->pi_lock held 574 + * [Pn] task->pi_lock held 607 575 * [L] rtmutex->wait_lock held 576 + * 577 + * Normal locking order: 578 + * 579 + * rtmutex->wait_lock 580 + * task->pi_lock 608 581 * 609 582 * Step Description Protected by 610 583 * function arguments: ··· 625 588 * again: 626 589 * loop_sanity_check(); 627 590 * retry: 628 - * [1] lock(task->pi_lock); [R] acquire [P] 629 - * [2] waiter = task->pi_blocked_on; [P] 630 - * [3] check_exit_conditions_1(); [P] 631 - * [4] lock = waiter->lock; [P] 632 - * [5] if (!try_lock(lock->wait_lock)) { [P] try to acquire [L] 633 - * unlock(task->pi_lock); release [P] 591 + * [1] lock(task->pi_lock); [R] acquire [P1] 592 + * [2] waiter = task->pi_blocked_on; [P1] 593 + * [3] check_exit_conditions_1(); [P1] 594 + * [4] lock = waiter->lock; [P1] 595 + * [5] if (!try_lock(lock->wait_lock)) { [P1] try to acquire [L] 596 + * unlock(task->pi_lock); release [P1] 634 597 * goto retry; 635 598 * } 636 - * [6] check_exit_conditions_2(); [P] + [L] 637 - * [7] requeue_lock_waiter(lock, waiter); [P] + [L] 638 - * [8] unlock(task->pi_lock); release [P] 599 + * [6] check_exit_conditions_2(); [P1] + [L] 600 + * [7] requeue_lock_waiter(lock, waiter); [P1] + [L] 601 + * [8] unlock(task->pi_lock); release [P1] 639 602 * put_task_struct(task); release [R] 640 603 * [9] check_exit_conditions_3(); [L] 641 604 * [10] task = owner(lock); [L] 642 605 * get_task_struct(task); [L] acquire [R] 643 - * lock(task->pi_lock); [L] acquire [P] 644 - * [11] requeue_pi_waiter(tsk, waiters(lock));[P] + [L] 645 - * [12] check_exit_conditions_4(); [P] + [L] 646 - * [13] unlock(task->pi_lock); release [P] 606 + * lock(task->pi_lock); [L] acquire [P2] 607 + * [11] requeue_pi_waiter(tsk, waiters(lock));[P2] + [L] 608 + * [12] check_exit_conditions_4(); [P2] + [L] 609 + * [13] unlock(task->pi_lock); release [P2] 647 610 * unlock(lock->wait_lock); release [L] 648 611 * goto again; 612 + * 613 + * Where P1 is the blocking task and P2 is the lock owner; going up one step 614 + * the owner becomes the next blocked task etc.. 615 + * 616 + * 649 617 */ 650 618 static int __sched rt_mutex_adjust_prio_chain(struct task_struct *task, 651 619 enum rtmutex_chainwalk chwalk, ··· 798 756 * enabled we continue, but stop the requeueing in the chain 799 757 * walk. 800 758 */ 801 - if (rt_mutex_waiter_equal(waiter, task_to_waiter(task))) { 759 + if (rt_waiter_node_equal(&waiter->tree, task_to_waiter_node(task))) { 802 760 if (!detect_deadlock) 803 761 goto out_unlock_pi; 804 762 else ··· 806 764 } 807 765 808 766 /* 809 - * [4] Get the next lock 767 + * [4] Get the next lock; per holding task->pi_lock we can't unblock 768 + * and guarantee @lock's existence. 810 769 */ 811 770 lock = waiter->lock; 812 771 /* 813 772 * [5] We need to trylock here as we are holding task->pi_lock, 814 773 * which is the reverse lock order versus the other rtmutex 815 774 * operations. 775 + * 776 + * Per the above, holding task->pi_lock guarantees lock exists, so 777 + * inverting this lock order is infeasible from a life-time 778 + * perspective. 816 779 */ 817 780 if (!raw_spin_trylock(&lock->wait_lock)) { 818 781 raw_spin_unlock_irq(&task->pi_lock); ··· 921 874 * or 922 875 * 923 876 * DL CBS enforcement advancing the effective deadline. 924 - * 925 - * Even though pi_waiters also uses these fields, and that tree is only 926 - * updated in [11], we can do this here, since we hold [L], which 927 - * serializes all pi_waiters access and rb_erase() does not care about 928 - * the values of the node being removed. 929 877 */ 930 878 waiter_update_prio(waiter, task); 931 879 932 880 rt_mutex_enqueue(lock, waiter); 933 881 934 - /* [8] Release the task */ 882 + /* 883 + * [8] Release the (blocking) task in preparation for 884 + * taking the owner task in [10]. 885 + * 886 + * Since we hold lock->waiter_lock, task cannot unblock, even if we 887 + * release task->pi_lock. 888 + */ 935 889 raw_spin_unlock(&task->pi_lock); 936 890 put_task_struct(task); 937 891 ··· 956 908 return 0; 957 909 } 958 910 959 - /* [10] Grab the next task, i.e. the owner of @lock */ 911 + /* 912 + * [10] Grab the next task, i.e. the owner of @lock 913 + * 914 + * Per holding lock->wait_lock and checking for !owner above, there 915 + * must be an owner and it cannot go away. 916 + */ 960 917 task = get_task_struct(rt_mutex_owner(lock)); 961 918 raw_spin_lock(&task->pi_lock); 962 919 ··· 974 921 * and adjust the priority of the owner. 975 922 */ 976 923 rt_mutex_dequeue_pi(task, prerequeue_top_waiter); 924 + waiter_clone_prio(waiter, task); 977 925 rt_mutex_enqueue_pi(task, waiter); 978 - rt_mutex_adjust_prio(task); 926 + rt_mutex_adjust_prio(lock, task); 979 927 980 928 } else if (prerequeue_top_waiter == waiter) { 981 929 /* ··· 991 937 */ 992 938 rt_mutex_dequeue_pi(task, waiter); 993 939 waiter = rt_mutex_top_waiter(lock); 940 + waiter_clone_prio(waiter, task); 994 941 rt_mutex_enqueue_pi(task, waiter); 995 - rt_mutex_adjust_prio(task); 942 + rt_mutex_adjust_prio(lock, task); 996 943 } else { 997 944 /* 998 945 * Nothing changed. No need to do any priority ··· 1209 1154 waiter->task = task; 1210 1155 waiter->lock = lock; 1211 1156 waiter_update_prio(waiter, task); 1157 + waiter_clone_prio(waiter, task); 1212 1158 1213 1159 /* Get the top priority waiter on the lock */ 1214 1160 if (rt_mutex_has_waiters(lock)) ··· 1243 1187 rt_mutex_dequeue_pi(owner, top_waiter); 1244 1188 rt_mutex_enqueue_pi(owner, waiter); 1245 1189 1246 - rt_mutex_adjust_prio(owner); 1190 + rt_mutex_adjust_prio(lock, owner); 1247 1191 if (owner->pi_blocked_on) 1248 1192 chain_walk = 1; 1249 1193 } else if (rt_mutex_cond_detect_deadlock(waiter, chwalk)) { ··· 1290 1234 { 1291 1235 struct rt_mutex_waiter *waiter; 1292 1236 1237 + lockdep_assert_held(&lock->wait_lock); 1238 + 1293 1239 raw_spin_lock(&current->pi_lock); 1294 1240 1295 1241 waiter = rt_mutex_top_waiter(lock); ··· 1304 1246 * task unblocks. 1305 1247 */ 1306 1248 rt_mutex_dequeue_pi(current, waiter); 1307 - rt_mutex_adjust_prio(current); 1249 + rt_mutex_adjust_prio(lock, current); 1308 1250 1309 1251 /* 1310 1252 * As we are waking up the top waiter, and the waiter stays ··· 1540 1482 if (rt_mutex_has_waiters(lock)) 1541 1483 rt_mutex_enqueue_pi(owner, rt_mutex_top_waiter(lock)); 1542 1484 1543 - rt_mutex_adjust_prio(owner); 1485 + rt_mutex_adjust_prio(lock, owner); 1544 1486 1545 1487 /* Store the lock on which owner is blocked or NULL */ 1546 1488 next_lock = task_blocked_on_lock(owner);
+1 -1
kernel/locking/rtmutex_api.c
··· 459 459 raw_spin_lock_irqsave(&task->pi_lock, flags); 460 460 461 461 waiter = task->pi_blocked_on; 462 - if (!waiter || rt_mutex_waiter_equal(waiter, task_to_waiter(task))) { 462 + if (!waiter || rt_waiter_node_equal(&waiter->tree, task_to_waiter_node(task))) { 463 463 raw_spin_unlock_irqrestore(&task->pi_lock, flags); 464 464 return; 465 465 }
+34 -13
kernel/locking/rtmutex_common.h
··· 17 17 #include <linux/rtmutex.h> 18 18 #include <linux/sched/wake_q.h> 19 19 20 + 21 + /* 22 + * This is a helper for the struct rt_mutex_waiter below. A waiter goes in two 23 + * separate trees and they need their own copy of the sort keys because of 24 + * different locking requirements. 25 + * 26 + * @entry: rbtree node to enqueue into the waiters tree 27 + * @prio: Priority of the waiter 28 + * @deadline: Deadline of the waiter if applicable 29 + * 30 + * See rt_waiter_node_less() and waiter_*_prio(). 31 + */ 32 + struct rt_waiter_node { 33 + struct rb_node entry; 34 + int prio; 35 + u64 deadline; 36 + }; 37 + 20 38 /* 21 39 * This is the control structure for tasks blocked on a rt_mutex, 22 40 * which is allocated on the kernel stack on of the blocked task. 23 41 * 24 - * @tree_entry: pi node to enqueue into the mutex waiters tree 25 - * @pi_tree_entry: pi node to enqueue into the mutex owner waiters tree 42 + * @tree: node to enqueue into the mutex waiters tree 43 + * @pi_tree: node to enqueue into the mutex owner waiters tree 26 44 * @task: task reference to the blocked task 27 45 * @lock: Pointer to the rt_mutex on which the waiter blocks 28 46 * @wake_state: Wakeup state to use (TASK_NORMAL or TASK_RTLOCK_WAIT) 29 - * @prio: Priority of the waiter 30 - * @deadline: Deadline of the waiter if applicable 31 47 * @ww_ctx: WW context pointer 48 + * 49 + * @tree is ordered by @lock->wait_lock 50 + * @pi_tree is ordered by rt_mutex_owner(@lock)->pi_lock 32 51 */ 33 52 struct rt_mutex_waiter { 34 - struct rb_node tree_entry; 35 - struct rb_node pi_tree_entry; 53 + struct rt_waiter_node tree; 54 + struct rt_waiter_node pi_tree; 36 55 struct task_struct *task; 37 56 struct rt_mutex_base *lock; 38 57 unsigned int wake_state; 39 - int prio; 40 - u64 deadline; 41 58 struct ww_acquire_ctx *ww_ctx; 42 59 }; 43 60 ··· 122 105 { 123 106 struct rb_node *leftmost = rb_first_cached(&lock->waiters); 124 107 125 - return rb_entry(leftmost, struct rt_mutex_waiter, tree_entry) == waiter; 108 + return rb_entry(leftmost, struct rt_mutex_waiter, tree.entry) == waiter; 126 109 } 127 110 128 111 static inline struct rt_mutex_waiter *rt_mutex_top_waiter(struct rt_mutex_base *lock) ··· 130 113 struct rb_node *leftmost = rb_first_cached(&lock->waiters); 131 114 struct rt_mutex_waiter *w = NULL; 132 115 116 + lockdep_assert_held(&lock->wait_lock); 117 + 133 118 if (leftmost) { 134 - w = rb_entry(leftmost, struct rt_mutex_waiter, tree_entry); 119 + w = rb_entry(leftmost, struct rt_mutex_waiter, tree.entry); 135 120 BUG_ON(w->lock != lock); 136 121 } 137 122 return w; ··· 146 127 147 128 static inline struct rt_mutex_waiter *task_top_pi_waiter(struct task_struct *p) 148 129 { 130 + lockdep_assert_held(&p->pi_lock); 131 + 149 132 return rb_entry(p->pi_waiters.rb_leftmost, struct rt_mutex_waiter, 150 - pi_tree_entry); 133 + pi_tree.entry); 151 134 } 152 135 153 136 #define RT_MUTEX_HAS_WAITERS 1UL ··· 211 190 static inline void rt_mutex_init_waiter(struct rt_mutex_waiter *waiter) 212 191 { 213 192 debug_rt_mutex_init_waiter(waiter); 214 - RB_CLEAR_NODE(&waiter->pi_tree_entry); 215 - RB_CLEAR_NODE(&waiter->tree_entry); 193 + RB_CLEAR_NODE(&waiter->pi_tree.entry); 194 + RB_CLEAR_NODE(&waiter->tree.entry); 216 195 waiter->wake_state = TASK_NORMAL; 217 196 waiter->task = NULL; 218 197 }
+6 -6
kernel/locking/ww_mutex.h
··· 96 96 struct rb_node *n = rb_first(&lock->rtmutex.waiters.rb_root); 97 97 if (!n) 98 98 return NULL; 99 - return rb_entry(n, struct rt_mutex_waiter, tree_entry); 99 + return rb_entry(n, struct rt_mutex_waiter, tree.entry); 100 100 } 101 101 102 102 static inline struct rt_mutex_waiter * 103 103 __ww_waiter_next(struct rt_mutex *lock, struct rt_mutex_waiter *w) 104 104 { 105 - struct rb_node *n = rb_next(&w->tree_entry); 105 + struct rb_node *n = rb_next(&w->tree.entry); 106 106 if (!n) 107 107 return NULL; 108 - return rb_entry(n, struct rt_mutex_waiter, tree_entry); 108 + return rb_entry(n, struct rt_mutex_waiter, tree.entry); 109 109 } 110 110 111 111 static inline struct rt_mutex_waiter * 112 112 __ww_waiter_prev(struct rt_mutex *lock, struct rt_mutex_waiter *w) 113 113 { 114 - struct rb_node *n = rb_prev(&w->tree_entry); 114 + struct rb_node *n = rb_prev(&w->tree.entry); 115 115 if (!n) 116 116 return NULL; 117 - return rb_entry(n, struct rt_mutex_waiter, tree_entry); 117 + return rb_entry(n, struct rt_mutex_waiter, tree.entry); 118 118 } 119 119 120 120 static inline struct rt_mutex_waiter * ··· 123 123 struct rb_node *n = rb_last(&lock->rtmutex.waiters.rb_root); 124 124 if (!n) 125 125 return NULL; 126 - return rb_entry(n, struct rt_mutex_waiter, tree_entry); 126 + return rb_entry(n, struct rt_mutex_waiter, tree.entry); 127 127 } 128 128 129 129 static inline void
+12 -5
kernel/trace/bpf_trace.c
··· 661 661 BPF_CALL_5(bpf_perf_event_output, struct pt_regs *, regs, struct bpf_map *, map, 662 662 u64, flags, void *, data, u64, size) 663 663 { 664 - struct bpf_trace_sample_data *sds = this_cpu_ptr(&bpf_trace_sds); 665 - int nest_level = this_cpu_inc_return(bpf_trace_nest_level); 664 + struct bpf_trace_sample_data *sds; 666 665 struct perf_raw_record raw = { 667 666 .frag = { 668 667 .size = size, ··· 669 670 }, 670 671 }; 671 672 struct perf_sample_data *sd; 672 - int err; 673 + int nest_level, err; 674 + 675 + preempt_disable(); 676 + sds = this_cpu_ptr(&bpf_trace_sds); 677 + nest_level = this_cpu_inc_return(bpf_trace_nest_level); 673 678 674 679 if (WARN_ON_ONCE(nest_level > ARRAY_SIZE(sds->sds))) { 675 680 err = -EBUSY; ··· 691 688 perf_sample_save_raw_data(sd, &raw); 692 689 693 690 err = __bpf_perf_event_output(regs, map, flags, sd); 694 - 695 691 out: 696 692 this_cpu_dec(bpf_trace_nest_level); 693 + preempt_enable(); 697 694 return err; 698 695 } 699 696 ··· 718 715 u64 bpf_event_output(struct bpf_map *map, u64 flags, void *meta, u64 meta_size, 719 716 void *ctx, u64 ctx_size, bpf_ctx_copy_t ctx_copy) 720 717 { 721 - int nest_level = this_cpu_inc_return(bpf_event_output_nest_level); 722 718 struct perf_raw_frag frag = { 723 719 .copy = ctx_copy, 724 720 .size = ctx_size, ··· 734 732 }; 735 733 struct perf_sample_data *sd; 736 734 struct pt_regs *regs; 735 + int nest_level; 737 736 u64 ret; 737 + 738 + preempt_disable(); 739 + nest_level = this_cpu_inc_return(bpf_event_output_nest_level); 738 740 739 741 if (WARN_ON_ONCE(nest_level > ARRAY_SIZE(bpf_misc_sds.sds))) { 740 742 ret = -EBUSY; ··· 754 748 ret = __bpf_perf_event_output(regs, map, flags, sd); 755 749 out: 756 750 this_cpu_dec(bpf_event_output_nest_level); 751 + preempt_enable(); 757 752 return ret; 758 753 } 759 754
+13 -12
kernel/trace/ring_buffer.c
··· 523 523 rb_time_t before_stamp; 524 524 u64 event_stamp[MAX_NEST]; 525 525 u64 read_stamp; 526 + /* pages removed since last reset */ 527 + unsigned long pages_removed; 526 528 /* ring buffer pages to update, > 0 to add, < 0 to remove */ 527 529 long nr_pages_to_update; 528 530 struct list_head new_pages; /* new pages to add */ ··· 561 559 struct buffer_page *head_page; 562 560 struct buffer_page *cache_reader_page; 563 561 unsigned long cache_read; 562 + unsigned long cache_pages_removed; 564 563 u64 read_stamp; 565 564 u64 page_stamp; 566 565 struct ring_buffer_event *event; ··· 950 947 /** 951 948 * ring_buffer_wake_waiters - wake up any waiters on this ring buffer 952 949 * @buffer: The ring buffer to wake waiters on 950 + * @cpu: The CPU buffer to wake waiters on 953 951 * 954 952 * In the case of a file that represents a ring buffer is closing, 955 953 * it is prudent to wake up any waiters that are on this. ··· 1961 1957 to_remove = rb_list_head(to_remove)->next; 1962 1958 head_bit |= (unsigned long)to_remove & RB_PAGE_HEAD; 1963 1959 } 1960 + /* Read iterators need to reset themselves when some pages removed */ 1961 + cpu_buffer->pages_removed += nr_removed; 1964 1962 1965 1963 next_page = rb_list_head(to_remove)->next; 1966 1964 ··· 1983 1977 if (head_bit) 1984 1978 cpu_buffer->head_page = list_entry(next_page, 1985 1979 struct buffer_page, list); 1986 - 1987 - /* 1988 - * change read pointer to make sure any read iterators reset 1989 - * themselves 1990 - */ 1991 - cpu_buffer->read = 0; 1992 1980 1993 1981 /* pages are removed, resume tracing and then free the pages */ 1994 1982 atomic_dec(&cpu_buffer->record_disabled); ··· 3376 3376 /** 3377 3377 * ring_buffer_unlock_commit - commit a reserved 3378 3378 * @buffer: The buffer to commit to 3379 - * @event: The event pointer to commit. 3380 3379 * 3381 3380 * This commits the data to the ring buffer, and releases any locks held. 3382 3381 * ··· 4394 4395 4395 4396 iter->cache_reader_page = iter->head_page; 4396 4397 iter->cache_read = cpu_buffer->read; 4398 + iter->cache_pages_removed = cpu_buffer->pages_removed; 4397 4399 4398 4400 if (iter->head) { 4399 4401 iter->read_stamp = cpu_buffer->read_stamp; ··· 4849 4849 buffer = cpu_buffer->buffer; 4850 4850 4851 4851 /* 4852 - * Check if someone performed a consuming read to 4853 - * the buffer. A consuming read invalidates the iterator 4854 - * and we need to reset the iterator in this case. 4852 + * Check if someone performed a consuming read to the buffer 4853 + * or removed some pages from the buffer. In these cases, 4854 + * iterator was invalidated and we need to reset it. 4855 4855 */ 4856 4856 if (unlikely(iter->cache_read != cpu_buffer->read || 4857 - iter->cache_reader_page != cpu_buffer->reader_page)) 4857 + iter->cache_reader_page != cpu_buffer->reader_page || 4858 + iter->cache_pages_removed != cpu_buffer->pages_removed)) 4858 4859 rb_iter_reset(iter); 4859 4860 4860 4861 again: ··· 5299 5298 cpu_buffer->last_overrun = 0; 5300 5299 5301 5300 rb_head_page_activate(cpu_buffer); 5301 + cpu_buffer->pages_removed = 0; 5302 5302 } 5303 5303 5304 5304 /* Must have disabled the cpu buffer then done a synchronize_rcu */ ··· 5358 5356 /** 5359 5357 * ring_buffer_reset_online_cpus - reset a ring buffer per CPU buffer 5360 5358 * @buffer: The ring buffer to reset a per cpu buffer of 5361 - * @cpu: The CPU buffer to be reset 5362 5359 */ 5363 5360 void ring_buffer_reset_online_cpus(struct trace_buffer *buffer) 5364 5361 {
+4 -10
kernel/trace/trace_events.c
··· 611 611 { 612 612 struct trace_event_call *call = file->event_call; 613 613 struct trace_array *tr = file->tr; 614 - unsigned long file_flags = file->flags; 615 614 int ret = 0; 616 615 int disable; 617 616 ··· 634 635 break; 635 636 disable = file->flags & EVENT_FILE_FL_SOFT_DISABLED; 636 637 clear_bit(EVENT_FILE_FL_SOFT_MODE_BIT, &file->flags); 638 + /* Disable use of trace_buffered_event */ 639 + trace_buffered_event_disable(); 637 640 } else 638 641 disable = !(file->flags & EVENT_FILE_FL_SOFT_MODE); 639 642 ··· 674 673 if (atomic_inc_return(&file->sm_ref) > 1) 675 674 break; 676 675 set_bit(EVENT_FILE_FL_SOFT_MODE_BIT, &file->flags); 676 + /* Enable use of trace_buffered_event */ 677 + trace_buffered_event_enable(); 677 678 } 678 679 679 680 if (!(file->flags & EVENT_FILE_FL_ENABLED)) { ··· 713 710 set_bit(EVENT_FILE_FL_WAS_ENABLED_BIT, &file->flags); 714 711 } 715 712 break; 716 - } 717 - 718 - /* Enable or disable use of trace_buffered_event */ 719 - if ((file_flags & EVENT_FILE_FL_SOFT_DISABLED) != 720 - (file->flags & EVENT_FILE_FL_SOFT_DISABLED)) { 721 - if (file->flags & EVENT_FILE_FL_SOFT_DISABLED) 722 - trace_buffered_event_enable(); 723 - else 724 - trace_buffered_event_disable(); 725 713 } 726 714 727 715 return ret;
+1
kernel/trace/trace_events_synth.c
··· 1230 1230 * synth_event_gen_cmd_array_start - Start synthetic event command from an array 1231 1231 * @cmd: A pointer to the dynevent_cmd struct representing the new event 1232 1232 * @name: The name of the synthetic event 1233 + * @mod: The module creating the event, NULL if not created from a module 1233 1234 * @fields: An array of type/name field descriptions 1234 1235 * @n_fields: The number of field descriptions contained in the fields array 1235 1236 *
+2
kernel/trace/trace_events_trigger.c
··· 31 31 /** 32 32 * event_triggers_call - Call triggers associated with a trace event 33 33 * @file: The trace_event_file associated with the event 34 + * @buffer: The ring buffer that the event is being written to 34 35 * @rec: The trace entry for the event, NULL for unconditional invocation 36 + * @event: The event meta data in the ring buffer 35 37 * 36 38 * For each trigger associated with an event, invoke the trigger 37 39 * function registered with the associated trigger command. If rec is
+4 -4
kernel/trace/trace_probe.c
··· 386 386 387 387 /* Get BTF_KIND_FUNC type */ 388 388 t = btf_type_by_id(btf, id); 389 - if (!btf_type_is_func(t)) 389 + if (!t || !btf_type_is_func(t)) 390 390 return ERR_PTR(-ENOENT); 391 391 392 392 /* The type of BTF_KIND_FUNC is BTF_KIND_FUNC_PROTO */ 393 393 t = btf_type_by_id(btf, t->type); 394 - if (!btf_type_is_func_proto(t)) 394 + if (!t || !btf_type_is_func_proto(t)) 395 395 return ERR_PTR(-ENOENT); 396 396 397 397 return t; ··· 443 443 if (!ctx->params) { 444 444 params = find_btf_func_param(ctx->funcname, &ctx->nr_params, 445 445 ctx->flags & TPARG_FL_TPOINT); 446 - if (IS_ERR(params)) { 446 + if (IS_ERR_OR_NULL(params)) { 447 447 trace_probe_log_err(ctx->offset, NO_BTF_ENTRY); 448 448 return PTR_ERR(params); 449 449 } ··· 1273 1273 1274 1274 params = find_btf_func_param(ctx->funcname, &nr_params, 1275 1275 ctx->flags & TPARG_FL_TPOINT); 1276 - if (IS_ERR(params)) { 1276 + if (IS_ERR_OR_NULL(params)) { 1277 1277 if (args_idx != -1) { 1278 1278 /* $arg* requires BTF info */ 1279 1279 trace_probe_log_err(0, NOSUP_BTFARG);
+1
kernel/trace/trace_seq.c
··· 131 131 * trace_seq_vprintf - sequence printing of trace information 132 132 * @s: trace sequence descriptor 133 133 * @fmt: printf format string 134 + * @args: Arguments for the format string 134 135 * 135 136 * The tracer may use either sequence operations or its own 136 137 * copy to user routines. To simplify formatting of a trace
+6
lib/Makefile
··· 82 82 obj-$(CONFIG_TEST_DYNAMIC_DEBUG) += test_dynamic_debug.o 83 83 obj-$(CONFIG_TEST_PRINTF) += test_printf.o 84 84 obj-$(CONFIG_TEST_SCANF) += test_scanf.o 85 + 85 86 obj-$(CONFIG_TEST_BITMAP) += test_bitmap.o 87 + ifeq ($(CONFIG_CC_IS_CLANG)$(CONFIG_KASAN),yy) 88 + # FIXME: Clang breaks test_bitmap_const_eval when KASAN and GCOV are enabled 89 + GCOV_PROFILE_test_bitmap.o := n 90 + endif 91 + 86 92 obj-$(CONFIG_TEST_UUID) += test_uuid.o 87 93 obj-$(CONFIG_TEST_XARRAY) += test_xarray.o 88 94 obj-$(CONFIG_TEST_MAPLE_TREE) += test_maple_tree.o
+4 -1
lib/cpumask.c
··· 45 45 * alloc_cpumask_var_node - allocate a struct cpumask on a given node 46 46 * @mask: pointer to cpumask_var_t where the cpumask is returned 47 47 * @flags: GFP_ flags 48 + * @node: memory node from which to allocate or %NUMA_NO_NODE 48 49 * 49 50 * Only defined when CONFIG_CPUMASK_OFFSTACK=y, otherwise is 50 51 * a nop returning a constant 1 (in <linux/cpumask.h>) ··· 158 157 static DEFINE_PER_CPU(int, distribute_cpu_mask_prev); 159 158 160 159 /** 161 - * cpumask_any_and_distribute - Return an arbitrary cpu within srcp1 & srcp2. 160 + * cpumask_any_and_distribute - Return an arbitrary cpu within src1p & src2p. 161 + * @src1p: first &cpumask for intersection 162 + * @src2p: second &cpumask for intersection 162 163 * 163 164 * Iterated calls using the same srcp1 and srcp2 will be distributed within 164 165 * their intersection.
+1 -1
lib/genalloc.c
··· 895 895 896 896 of_property_read_string(np_pool, "label", &name); 897 897 if (!name) 898 - name = np_pool->name; 898 + name = of_node_full_name(np_pool); 899 899 } 900 900 if (pdev) 901 901 pool = gen_pool_get(&pdev->dev, name);
+4 -4
lib/test_bitmap.c
··· 1161 1161 } 1162 1162 } 1163 1163 1164 + /* 1165 + * FIXME: Clang breaks compile-time evaluations when KASAN and GCOV are enabled. 1166 + * To workaround it, GCOV is force-disabled in Makefile for this configuration. 1167 + */ 1164 1168 static void __init test_bitmap_const_eval(void) 1165 1169 { 1166 1170 DECLARE_BITMAP(bitmap, BITS_PER_LONG); ··· 1190 1186 * the compiler is fixed. 1191 1187 */ 1192 1188 bitmap_clear(bitmap, 0, BITS_PER_LONG); 1193 - #if defined(__s390__) && defined(__clang__) 1194 - if (!const_test_bit(7, bitmap)) 1195 - #else 1196 1189 if (!test_bit(7, bitmap)) 1197 - #endif 1198 1190 bitmap_set(bitmap, 5, 2); 1199 1191 1200 1192 /* Equals to `unsigned long bitopvar = BIT(20)` */
+5 -5
mm/damon/core-test.h
··· 320 320 321 321 static void damon_test_set_attrs(struct kunit *test) 322 322 { 323 - struct damon_ctx ctx; 323 + struct damon_ctx *c = damon_new_ctx(); 324 324 struct damon_attrs valid_attrs = { 325 325 .min_nr_regions = 10, .max_nr_regions = 1000, 326 326 .sample_interval = 5000, .aggr_interval = 100000,}; 327 327 struct damon_attrs invalid_attrs; 328 328 329 - KUNIT_EXPECT_EQ(test, damon_set_attrs(&ctx, &valid_attrs), 0); 329 + KUNIT_EXPECT_EQ(test, damon_set_attrs(c, &valid_attrs), 0); 330 330 331 331 invalid_attrs = valid_attrs; 332 332 invalid_attrs.min_nr_regions = 1; 333 - KUNIT_EXPECT_EQ(test, damon_set_attrs(&ctx, &invalid_attrs), -EINVAL); 333 + KUNIT_EXPECT_EQ(test, damon_set_attrs(c, &invalid_attrs), -EINVAL); 334 334 335 335 invalid_attrs = valid_attrs; 336 336 invalid_attrs.max_nr_regions = 9; 337 - KUNIT_EXPECT_EQ(test, damon_set_attrs(&ctx, &invalid_attrs), -EINVAL); 337 + KUNIT_EXPECT_EQ(test, damon_set_attrs(c, &invalid_attrs), -EINVAL); 338 338 339 339 invalid_attrs = valid_attrs; 340 340 invalid_attrs.aggr_interval = 4999; 341 - KUNIT_EXPECT_EQ(test, damon_set_attrs(&ctx, &invalid_attrs), -EINVAL); 341 + KUNIT_EXPECT_EQ(test, damon_set_attrs(c, &invalid_attrs), -EINVAL); 342 342 } 343 343 344 344 static struct kunit_case damon_test_cases[] = {
-4
mm/memblock.c
··· 374 374 kfree(memblock.reserved.regions); 375 375 else 376 376 memblock_free_late(addr, size); 377 - /* Reset to prevent UAF from stray frees. */ 378 - memblock.reserved.regions = memblock_reserved_init_regions; 379 - memblock.reserved.cnt = 1; 380 - memblock_remove_region(&memblock.reserved, 0); 381 377 } 382 378 383 379 if (memblock.memory.regions != memblock_memory_init_regions) {
+1 -1
mm/memory-failure.c
··· 2487 2487 goto unlock_mutex; 2488 2488 } 2489 2489 2490 - if (!folio_test_hwpoison(folio)) { 2490 + if (!PageHWPoison(p)) { 2491 2491 unpoison_pr_info("Unpoison: Page was already unpoisoned %#lx\n", 2492 2492 pfn, &unpoison_rs); 2493 2493 goto unlock_mutex;
+14 -1
mm/mempolicy.c
··· 384 384 VMA_ITERATOR(vmi, mm, 0); 385 385 386 386 mmap_write_lock(mm); 387 - for_each_vma(vmi, vma) 387 + for_each_vma(vmi, vma) { 388 + vma_start_write(vma); 388 389 mpol_rebind_policy(vma->vm_policy, new); 390 + } 389 391 mmap_write_unlock(mm); 390 392 } 391 393 ··· 769 767 int err; 770 768 struct mempolicy *old; 771 769 struct mempolicy *new; 770 + 771 + vma_assert_write_locked(vma); 772 772 773 773 pr_debug("vma %lx-%lx/%lx vm_ops %p vm_file %p set_policy %p\n", 774 774 vma->vm_start, vma->vm_end, vma->vm_pgoff, ··· 1317 1313 if (err) 1318 1314 goto mpol_out; 1319 1315 1316 + /* 1317 + * Lock the VMAs before scanning for pages to migrate, to ensure we don't 1318 + * miss a concurrently inserted page. 1319 + */ 1320 + vma_iter_init(&vmi, mm, start); 1321 + for_each_vma_range(vmi, vma, end) 1322 + vma_start_write(vma); 1323 + 1320 1324 ret = queue_pages_range(mm, start, end, nmask, 1321 1325 flags | MPOL_MF_INVERT, &pagelist); 1322 1326 ··· 1550 1538 break; 1551 1539 } 1552 1540 1541 + vma_start_write(vma); 1553 1542 new->home_node = home_node; 1554 1543 err = mbind_range(&vmi, vma, &prev, start, end, new); 1555 1544 mpol_put(new);
+1
mm/mmap.c
··· 615 615 * anon pages imported. 616 616 */ 617 617 if (src->anon_vma && !dst->anon_vma) { 618 + vma_start_write(dst); 618 619 dst->anon_vma = src->anon_vma; 619 620 return anon_vma_clone(dst, src); 620 621 }
+4 -1
mm/pagewalk.c
··· 48 48 if (walk->no_vma) { 49 49 /* 50 50 * pte_offset_map() might apply user-specific validation. 51 + * Indeed, on x86_64 the pmd entries set up by init_espfix_ap() 52 + * fit its pmd_bad() check (_PAGE_NX set and _PAGE_RW clear), 53 + * and CONFIG_EFI_PGT_DUMP efi_mm goes so far as to walk them. 51 54 */ 52 - if (walk->mm == &init_mm) 55 + if (walk->mm == &init_mm || addr >= TASK_SIZE) 53 56 pte = pte_offset_kernel(pmd, addr); 54 57 else 55 58 pte = pte_offset_map(pmd, addr);
+6 -3
mm/shmem.c
··· 2796 2796 if (*ppos >= i_size_read(inode)) 2797 2797 break; 2798 2798 2799 - error = shmem_get_folio(inode, *ppos / PAGE_SIZE, &folio, SGP_READ); 2799 + error = shmem_get_folio(inode, *ppos / PAGE_SIZE, &folio, 2800 + SGP_READ); 2800 2801 if (error) { 2801 2802 if (error == -EINVAL) 2802 2803 error = 0; ··· 2806 2805 if (folio) { 2807 2806 folio_unlock(folio); 2808 2807 2809 - if (folio_test_hwpoison(folio)) { 2808 + if (folio_test_hwpoison(folio) || 2809 + (folio_test_large(folio) && 2810 + folio_test_has_hwpoisoned(folio))) { 2810 2811 error = -EIO; 2811 2812 break; 2812 2813 } ··· 2844 2841 folio_put(folio); 2845 2842 folio = NULL; 2846 2843 } else { 2847 - n = splice_zeropage_into_pipe(pipe, *ppos, len); 2844 + n = splice_zeropage_into_pipe(pipe, *ppos, part); 2848 2845 } 2849 2846 2850 2847 if (!n)
+12 -34
net/9p/client.c
··· 904 904 905 905 static int p9_client_version(struct p9_client *c) 906 906 { 907 - int err = 0; 907 + int err; 908 908 struct p9_req_t *req; 909 909 char *version = NULL; 910 910 int msize; ··· 975 975 struct p9_client *clnt; 976 976 char *client_id; 977 977 978 - err = 0; 979 978 clnt = kmalloc(sizeof(*clnt), GFP_KERNEL); 980 979 if (!clnt) 981 980 return ERR_PTR(-ENOMEM); ··· 1093 1094 const char *uname, kuid_t n_uname, 1094 1095 const char *aname) 1095 1096 { 1096 - int err = 0; 1097 + int err; 1097 1098 struct p9_req_t *req; 1098 1099 struct p9_fid *fid; 1099 1100 struct p9_qid qid; ··· 1146 1147 struct p9_req_t *req; 1147 1148 u16 nwqids, count; 1148 1149 1149 - err = 0; 1150 1150 wqids = NULL; 1151 1151 clnt = oldfid->clnt; 1152 1152 if (clone) { ··· 1222 1224 clnt = fid->clnt; 1223 1225 p9_debug(P9_DEBUG_9P, ">>> %s fid %d mode %d\n", 1224 1226 p9_is_proto_dotl(clnt) ? "TLOPEN" : "TOPEN", fid->fid, mode); 1225 - err = 0; 1226 1227 1227 1228 if (fid->mode != -1) 1228 1229 return -EINVAL; ··· 1259 1262 int p9_client_create_dotl(struct p9_fid *ofid, const char *name, u32 flags, 1260 1263 u32 mode, kgid_t gid, struct p9_qid *qid) 1261 1264 { 1262 - int err = 0; 1265 + int err; 1263 1266 struct p9_client *clnt; 1264 1267 struct p9_req_t *req; 1265 1268 int iounit; ··· 1311 1314 1312 1315 p9_debug(P9_DEBUG_9P, ">>> TCREATE fid %d name %s perm %d mode %d\n", 1313 1316 fid->fid, name, perm, mode); 1314 - err = 0; 1315 1317 clnt = fid->clnt; 1316 1318 1317 1319 if (fid->mode != -1) ··· 1346 1350 int p9_client_symlink(struct p9_fid *dfid, const char *name, 1347 1351 const char *symtgt, kgid_t gid, struct p9_qid *qid) 1348 1352 { 1349 - int err = 0; 1353 + int err; 1350 1354 struct p9_client *clnt; 1351 1355 struct p9_req_t *req; 1352 1356 ··· 1398 1402 1399 1403 int p9_client_fsync(struct p9_fid *fid, int datasync) 1400 1404 { 1401 - int err; 1405 + int err = 0; 1402 1406 struct p9_client *clnt; 1403 1407 struct p9_req_t *req; 1404 1408 1405 1409 p9_debug(P9_DEBUG_9P, ">>> TFSYNC fid %d datasync:%d\n", 1406 1410 fid->fid, datasync); 1407 - err = 0; 1408 1411 clnt = fid->clnt; 1409 1412 1410 1413 req = p9_client_rpc(clnt, P9_TFSYNC, "dd", fid->fid, datasync); ··· 1423 1428 1424 1429 int p9_client_clunk(struct p9_fid *fid) 1425 1430 { 1426 - int err; 1431 + int err = 0; 1427 1432 struct p9_client *clnt; 1428 1433 struct p9_req_t *req; 1429 1434 int retries = 0; ··· 1431 1436 again: 1432 1437 p9_debug(P9_DEBUG_9P, ">>> TCLUNK fid %d (try %d)\n", 1433 1438 fid->fid, retries); 1434 - err = 0; 1435 1439 clnt = fid->clnt; 1436 1440 1437 1441 req = p9_client_rpc(clnt, P9_TCLUNK, "d", fid->fid); ··· 1459 1465 1460 1466 int p9_client_remove(struct p9_fid *fid) 1461 1467 { 1462 - int err; 1468 + int err = 0; 1463 1469 struct p9_client *clnt; 1464 1470 struct p9_req_t *req; 1465 1471 1466 1472 p9_debug(P9_DEBUG_9P, ">>> TREMOVE fid %d\n", fid->fid); 1467 - err = 0; 1468 1473 clnt = fid->clnt; 1469 1474 1470 1475 req = p9_client_rpc(clnt, P9_TREMOVE, "d", fid->fid); ··· 1673 1680 if (!ret) 1674 1681 return ERR_PTR(-ENOMEM); 1675 1682 1676 - err = 0; 1677 1683 clnt = fid->clnt; 1678 1684 1679 1685 req = p9_client_rpc(clnt, P9_TSTAT, "d", fid->fid); ··· 1725 1733 if (!ret) 1726 1734 return ERR_PTR(-ENOMEM); 1727 1735 1728 - err = 0; 1729 1736 clnt = fid->clnt; 1730 1737 1731 1738 req = p9_client_rpc(clnt, P9_TGETATTR, "dq", fid->fid, request_mask); ··· 1803 1812 1804 1813 int p9_client_wstat(struct p9_fid *fid, struct p9_wstat *wst) 1805 1814 { 1806 - int err; 1815 + int err = 0; 1807 1816 struct p9_req_t *req; 1808 1817 struct p9_client *clnt; 1809 1818 1810 - err = 0; 1811 1819 clnt = fid->clnt; 1812 1820 wst->size = p9_client_statsize(wst, clnt->proto_version); 1813 1821 p9_debug(P9_DEBUG_9P, ">>> TWSTAT fid %d\n", ··· 1841 1851 1842 1852 int p9_client_setattr(struct p9_fid *fid, struct p9_iattr_dotl *p9attr) 1843 1853 { 1844 - int err; 1854 + int err = 0; 1845 1855 struct p9_req_t *req; 1846 1856 struct p9_client *clnt; 1847 1857 1848 - err = 0; 1849 1858 clnt = fid->clnt; 1850 1859 p9_debug(P9_DEBUG_9P, ">>> TSETATTR fid %d\n", fid->fid); 1851 1860 p9_debug(P9_DEBUG_9P, " valid=%x mode=%x uid=%d gid=%d size=%lld\n", ··· 1876 1887 struct p9_req_t *req; 1877 1888 struct p9_client *clnt; 1878 1889 1879 - err = 0; 1880 1890 clnt = fid->clnt; 1881 1891 1882 1892 p9_debug(P9_DEBUG_9P, ">>> TSTATFS fid %d\n", fid->fid); ··· 1909 1921 int p9_client_rename(struct p9_fid *fid, 1910 1922 struct p9_fid *newdirfid, const char *name) 1911 1923 { 1912 - int err; 1924 + int err = 0; 1913 1925 struct p9_req_t *req; 1914 1926 struct p9_client *clnt; 1915 1927 1916 - err = 0; 1917 1928 clnt = fid->clnt; 1918 1929 1919 1930 p9_debug(P9_DEBUG_9P, ">>> TRENAME fid %d newdirfid %d name %s\n", ··· 1936 1949 int p9_client_renameat(struct p9_fid *olddirfid, const char *old_name, 1937 1950 struct p9_fid *newdirfid, const char *new_name) 1938 1951 { 1939 - int err; 1952 + int err = 0; 1940 1953 struct p9_req_t *req; 1941 1954 struct p9_client *clnt; 1942 1955 1943 - err = 0; 1944 1956 clnt = olddirfid->clnt; 1945 1957 1946 1958 p9_debug(P9_DEBUG_9P, ··· 1972 1986 struct p9_client *clnt; 1973 1987 struct p9_fid *attr_fid; 1974 1988 1975 - err = 0; 1976 1989 clnt = file_fid->clnt; 1977 1990 attr_fid = p9_fid_create(clnt); 1978 1991 if (!attr_fid) { ··· 2012 2027 int p9_client_xattrcreate(struct p9_fid *fid, const char *name, 2013 2028 u64 attr_size, int flags) 2014 2029 { 2015 - int err; 2030 + int err = 0; 2016 2031 struct p9_req_t *req; 2017 2032 struct p9_client *clnt; 2018 2033 2019 2034 p9_debug(P9_DEBUG_9P, 2020 2035 ">>> TXATTRCREATE fid %d name %s size %llu flag %d\n", 2021 2036 fid->fid, name, attr_size, flags); 2022 - err = 0; 2023 2037 clnt = fid->clnt; 2024 2038 req = p9_client_rpc(clnt, P9_TXATTRCREATE, "dsqd", 2025 2039 fid->fid, name, attr_size, flags); ··· 2047 2063 p9_debug(P9_DEBUG_9P, ">>> TREADDIR fid %d offset %llu count %d\n", 2048 2064 fid->fid, offset, count); 2049 2065 2050 - err = 0; 2051 2066 clnt = fid->clnt; 2052 2067 2053 2068 rsize = fid->iounit; ··· 2105 2122 struct p9_client *clnt; 2106 2123 struct p9_req_t *req; 2107 2124 2108 - err = 0; 2109 2125 clnt = fid->clnt; 2110 2126 p9_debug(P9_DEBUG_9P, 2111 2127 ">>> TMKNOD fid %d name %s mode %d major %d minor %d\n", ··· 2135 2153 struct p9_client *clnt; 2136 2154 struct p9_req_t *req; 2137 2155 2138 - err = 0; 2139 2156 clnt = fid->clnt; 2140 2157 p9_debug(P9_DEBUG_9P, ">>> TMKDIR fid %d name %s mode %d gid %d\n", 2141 2158 fid->fid, name, mode, from_kgid(&init_user_ns, gid)); ··· 2163 2182 struct p9_client *clnt; 2164 2183 struct p9_req_t *req; 2165 2184 2166 - err = 0; 2167 2185 clnt = fid->clnt; 2168 2186 p9_debug(P9_DEBUG_9P, 2169 2187 ">>> TLOCK fid %d type %i flags %d start %lld length %lld proc_id %d client_id %s\n", ··· 2194 2214 struct p9_client *clnt; 2195 2215 struct p9_req_t *req; 2196 2216 2197 - err = 0; 2198 2217 clnt = fid->clnt; 2199 2218 p9_debug(P9_DEBUG_9P, 2200 2219 ">>> TGETLOCK fid %d, type %i start %lld length %lld proc_id %d client_id %s\n", ··· 2230 2251 struct p9_client *clnt; 2231 2252 struct p9_req_t *req; 2232 2253 2233 - err = 0; 2234 2254 clnt = fid->clnt; 2235 2255 p9_debug(P9_DEBUG_9P, ">>> TREADLINK fid %d\n", fid->fid); 2236 2256
+4 -4
net/9p/trans_virtio.c
··· 384 384 void *to = req->rc.sdata + in_hdr_len; 385 385 386 386 // Fits entirely into the static data? Nothing to do. 387 - if (req->rc.size < in_hdr_len) 387 + if (req->rc.size < in_hdr_len || !pages) 388 388 return; 389 389 390 390 // Really long error message? Tough, truncate the reply. Might get ··· 428 428 struct page **in_pages = NULL, **out_pages = NULL; 429 429 struct virtio_chan *chan = client->trans; 430 430 struct scatterlist *sgs[4]; 431 - size_t offs; 431 + size_t offs = 0; 432 432 int need_drop = 0; 433 433 int kicked = 0; 434 434 ··· 501 501 502 502 if (in_pages) { 503 503 sgs[out_sgs + in_sgs++] = chan->sg + out + in; 504 - in += pack_sg_list_p(chan->sg, out + in, VIRTQUEUE_NUM, 505 - in_pages, in_nr_pages, offs, inlen); 504 + pack_sg_list_p(chan->sg, out + in, VIRTQUEUE_NUM, 505 + in_pages, in_nr_pages, offs, inlen); 506 506 } 507 507 508 508 BUG_ON(out_sgs + in_sgs > ARRAY_SIZE(sgs));
+1 -1
net/can/raw.c
··· 865 865 866 866 skb->dev = dev; 867 867 skb->priority = sk->sk_priority; 868 - skb->mark = sk->sk_mark; 868 + skb->mark = READ_ONCE(sk->sk_mark); 869 869 skb->tstamp = sockc.transmit_time; 870 870 871 871 skb_setup_tx_timestamp(skb, sockc.tsflags);
+1
net/ceph/messenger.c
··· 1123 1123 return true; 1124 1124 } 1125 1125 } 1126 + EXPORT_SYMBOL(ceph_addr_is_blank); 1126 1127 1127 1128 int ceph_addr_port(const struct ceph_entity_addr *addr) 1128 1129 {
+4 -1
net/core/bpf_sk_storage.c
··· 496 496 return ERR_PTR(-EPERM); 497 497 498 498 nla_for_each_nested(nla, nla_stgs, rem) { 499 - if (nla_type(nla) == SK_DIAG_BPF_STORAGE_REQ_MAP_FD) 499 + if (nla_type(nla) == SK_DIAG_BPF_STORAGE_REQ_MAP_FD) { 500 + if (nla_len(nla) != sizeof(u32)) 501 + return ERR_PTR(-EINVAL); 500 502 nr_maps++; 503 + } 501 504 } 502 505 503 506 diag = kzalloc(struct_size(diag, maps, nr_maps), GFP_KERNEL);
+6 -2
net/core/rtnetlink.c
··· 5139 5139 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC); 5140 5140 if (br_spec) { 5141 5141 nla_for_each_nested(attr, br_spec, rem) { 5142 - if (nla_type(attr) == IFLA_BRIDGE_FLAGS) { 5142 + if (nla_type(attr) == IFLA_BRIDGE_FLAGS && !have_flags) { 5143 5143 if (nla_len(attr) < sizeof(flags)) 5144 5144 return -EINVAL; 5145 5145 5146 5146 have_flags = true; 5147 5147 flags = nla_get_u16(attr); 5148 - break; 5148 + } 5149 + 5150 + if (nla_type(attr) == IFLA_BRIDGE_MODE) { 5151 + if (nla_len(attr) < sizeof(u16)) 5152 + return -EINVAL; 5149 5153 } 5150 5154 } 5151 5155 }
+40 -29
net/core/sock.c
··· 429 429 { 430 430 struct __kernel_sock_timeval tv; 431 431 int err = sock_copy_user_timeval(&tv, optval, optlen, old_timeval); 432 + long val; 432 433 433 434 if (err) 434 435 return err; ··· 440 439 if (tv.tv_sec < 0) { 441 440 static int warned __read_mostly; 442 441 443 - *timeo_p = 0; 442 + WRITE_ONCE(*timeo_p, 0); 444 443 if (warned < 10 && net_ratelimit()) { 445 444 warned++; 446 445 pr_info("%s: `%s' (pid %d) tries to set negative timeout\n", ··· 448 447 } 449 448 return 0; 450 449 } 451 - *timeo_p = MAX_SCHEDULE_TIMEOUT; 452 - if (tv.tv_sec == 0 && tv.tv_usec == 0) 453 - return 0; 454 - if (tv.tv_sec < (MAX_SCHEDULE_TIMEOUT / HZ - 1)) 455 - *timeo_p = tv.tv_sec * HZ + DIV_ROUND_UP((unsigned long)tv.tv_usec, USEC_PER_SEC / HZ); 450 + val = MAX_SCHEDULE_TIMEOUT; 451 + if ((tv.tv_sec || tv.tv_usec) && 452 + (tv.tv_sec < (MAX_SCHEDULE_TIMEOUT / HZ - 1))) 453 + val = tv.tv_sec * HZ + DIV_ROUND_UP((unsigned long)tv.tv_usec, 454 + USEC_PER_SEC / HZ); 455 + WRITE_ONCE(*timeo_p, val); 456 456 return 0; 457 457 } 458 458 ··· 806 804 void sock_set_priority(struct sock *sk, u32 priority) 807 805 { 808 806 lock_sock(sk); 809 - sk->sk_priority = priority; 807 + WRITE_ONCE(sk->sk_priority, priority); 810 808 release_sock(sk); 811 809 } 812 810 EXPORT_SYMBOL(sock_set_priority); ··· 815 813 { 816 814 lock_sock(sk); 817 815 if (secs && secs < MAX_SCHEDULE_TIMEOUT / HZ - 1) 818 - sk->sk_sndtimeo = secs * HZ; 816 + WRITE_ONCE(sk->sk_sndtimeo, secs * HZ); 819 817 else 820 - sk->sk_sndtimeo = MAX_SCHEDULE_TIMEOUT; 818 + WRITE_ONCE(sk->sk_sndtimeo, MAX_SCHEDULE_TIMEOUT); 821 819 release_sock(sk); 822 820 } 823 821 EXPORT_SYMBOL(sock_set_sndtimeo); ··· 990 988 static void __sock_set_mark(struct sock *sk, u32 val) 991 989 { 992 990 if (val != sk->sk_mark) { 993 - sk->sk_mark = val; 991 + WRITE_ONCE(sk->sk_mark, val); 994 992 sk_dst_reset(sk); 995 993 } 996 994 } ··· 1009 1007 bytes = round_down(bytes, PAGE_SIZE); 1010 1008 1011 1009 WARN_ON(bytes > sk->sk_reserved_mem); 1012 - sk->sk_reserved_mem -= bytes; 1010 + WRITE_ONCE(sk->sk_reserved_mem, sk->sk_reserved_mem - bytes); 1013 1011 sk_mem_reclaim(sk); 1014 1012 } 1015 1013 ··· 1046 1044 } 1047 1045 sk->sk_forward_alloc += pages << PAGE_SHIFT; 1048 1046 1049 - sk->sk_reserved_mem += pages << PAGE_SHIFT; 1047 + WRITE_ONCE(sk->sk_reserved_mem, 1048 + sk->sk_reserved_mem + (pages << PAGE_SHIFT)); 1050 1049 1051 1050 return 0; 1052 1051 } ··· 1216 1213 if ((val >= 0 && val <= 6) || 1217 1214 sockopt_ns_capable(sock_net(sk)->user_ns, CAP_NET_RAW) || 1218 1215 sockopt_ns_capable(sock_net(sk)->user_ns, CAP_NET_ADMIN)) 1219 - sk->sk_priority = val; 1216 + WRITE_ONCE(sk->sk_priority, val); 1220 1217 else 1221 1218 ret = -EPERM; 1222 1219 break; ··· 1432 1429 cmpxchg(&sk->sk_pacing_status, 1433 1430 SK_PACING_NONE, 1434 1431 SK_PACING_NEEDED); 1435 - sk->sk_max_pacing_rate = ulval; 1432 + /* Pairs with READ_ONCE() from sk_getsockopt() */ 1433 + WRITE_ONCE(sk->sk_max_pacing_rate, ulval); 1436 1434 sk->sk_pacing_rate = min(sk->sk_pacing_rate, ulval); 1437 1435 break; 1438 1436 } ··· 1528 1524 } 1529 1525 if ((u8)val == SOCK_TXREHASH_DEFAULT) 1530 1526 val = READ_ONCE(sock_net(sk)->core.sysctl_txrehash); 1531 - /* Paired with READ_ONCE() in tcp_rtx_synack() */ 1527 + /* Paired with READ_ONCE() in tcp_rtx_synack() 1528 + * and sk_getsockopt(). 1529 + */ 1532 1530 WRITE_ONCE(sk->sk_txrehash, (u8)val); 1533 1531 break; 1534 1532 ··· 1630 1624 break; 1631 1625 1632 1626 case SO_SNDBUF: 1633 - v.val = sk->sk_sndbuf; 1627 + v.val = READ_ONCE(sk->sk_sndbuf); 1634 1628 break; 1635 1629 1636 1630 case SO_RCVBUF: 1637 - v.val = sk->sk_rcvbuf; 1631 + v.val = READ_ONCE(sk->sk_rcvbuf); 1638 1632 break; 1639 1633 1640 1634 case SO_REUSEADDR: ··· 1676 1670 break; 1677 1671 1678 1672 case SO_PRIORITY: 1679 - v.val = sk->sk_priority; 1673 + v.val = READ_ONCE(sk->sk_priority); 1680 1674 break; 1681 1675 1682 1676 case SO_LINGER: ··· 1714 1708 1715 1709 case SO_RCVTIMEO_OLD: 1716 1710 case SO_RCVTIMEO_NEW: 1717 - lv = sock_get_timeout(sk->sk_rcvtimeo, &v, SO_RCVTIMEO_OLD == optname); 1711 + lv = sock_get_timeout(READ_ONCE(sk->sk_rcvtimeo), &v, 1712 + SO_RCVTIMEO_OLD == optname); 1718 1713 break; 1719 1714 1720 1715 case SO_SNDTIMEO_OLD: 1721 1716 case SO_SNDTIMEO_NEW: 1722 - lv = sock_get_timeout(sk->sk_sndtimeo, &v, SO_SNDTIMEO_OLD == optname); 1717 + lv = sock_get_timeout(READ_ONCE(sk->sk_sndtimeo), &v, 1718 + SO_SNDTIMEO_OLD == optname); 1723 1719 break; 1724 1720 1725 1721 case SO_RCVLOWAT: 1726 - v.val = sk->sk_rcvlowat; 1722 + v.val = READ_ONCE(sk->sk_rcvlowat); 1727 1723 break; 1728 1724 1729 1725 case SO_SNDLOWAT: ··· 1842 1834 optval, optlen, len); 1843 1835 1844 1836 case SO_MARK: 1845 - v.val = sk->sk_mark; 1837 + v.val = READ_ONCE(sk->sk_mark); 1846 1838 break; 1847 1839 1848 1840 case SO_RCVMARK: ··· 1861 1853 if (!sock->ops->set_peek_off) 1862 1854 return -EOPNOTSUPP; 1863 1855 1864 - v.val = sk->sk_peek_off; 1856 + v.val = READ_ONCE(sk->sk_peek_off); 1865 1857 break; 1866 1858 case SO_NOFCS: 1867 1859 v.val = sock_flag(sk, SOCK_NOFCS); ··· 1891 1883 1892 1884 #ifdef CONFIG_NET_RX_BUSY_POLL 1893 1885 case SO_BUSY_POLL: 1894 - v.val = sk->sk_ll_usec; 1886 + v.val = READ_ONCE(sk->sk_ll_usec); 1895 1887 break; 1896 1888 case SO_PREFER_BUSY_POLL: 1897 1889 v.val = READ_ONCE(sk->sk_prefer_busy_poll); ··· 1899 1891 #endif 1900 1892 1901 1893 case SO_MAX_PACING_RATE: 1894 + /* The READ_ONCE() pair with the WRITE_ONCE() in sk_setsockopt() */ 1902 1895 if (sizeof(v.ulval) != sizeof(v.val) && len >= sizeof(v.ulval)) { 1903 1896 lv = sizeof(v.ulval); 1904 - v.ulval = sk->sk_max_pacing_rate; 1897 + v.ulval = READ_ONCE(sk->sk_max_pacing_rate); 1905 1898 } else { 1906 1899 /* 32bit version */ 1907 - v.val = min_t(unsigned long, sk->sk_max_pacing_rate, ~0U); 1900 + v.val = min_t(unsigned long, ~0U, 1901 + READ_ONCE(sk->sk_max_pacing_rate)); 1908 1902 } 1909 1903 break; 1910 1904 ··· 1974 1964 break; 1975 1965 1976 1966 case SO_RESERVE_MEM: 1977 - v.val = sk->sk_reserved_mem; 1967 + v.val = READ_ONCE(sk->sk_reserved_mem); 1978 1968 break; 1979 1969 1980 1970 case SO_TXREHASH: 1981 - v.val = sk->sk_txrehash; 1971 + /* Paired with WRITE_ONCE() in sk_setsockopt() */ 1972 + v.val = READ_ONCE(sk->sk_txrehash); 1982 1973 break; 1983 1974 1984 1975 default: ··· 3170 3159 3171 3160 int sk_set_peek_off(struct sock *sk, int val) 3172 3161 { 3173 - sk->sk_peek_off = val; 3162 + WRITE_ONCE(sk->sk_peek_off, val); 3174 3163 return 0; 3175 3164 } 3176 3165 EXPORT_SYMBOL_GPL(sk_set_peek_off);
-2
net/core/sock_map.c
··· 115 115 __acquires(&sk->sk_lock.slock) 116 116 { 117 117 lock_sock(sk); 118 - preempt_disable(); 119 118 rcu_read_lock(); 120 119 } 121 120 ··· 122 123 __releases(&sk->sk_lock.slock) 123 124 { 124 125 rcu_read_unlock(); 125 - preempt_enable(); 126 126 release_sock(sk); 127 127 } 128 128
+1 -1
net/dcb/dcbnl.c
··· 980 980 return -EOPNOTSUPP; 981 981 982 982 ret = nla_parse_nested_deprecated(data, DCB_BCN_ATTR_MAX, 983 - tb[DCB_ATTR_BCN], dcbnl_pfc_up_nest, 983 + tb[DCB_ATTR_BCN], dcbnl_bcn_nest, 984 984 NULL); 985 985 if (ret) 986 986 return ret;
+2 -2
net/dccp/ipv6.c
··· 238 238 opt = ireq->ipv6_opt; 239 239 if (!opt) 240 240 opt = rcu_dereference(np->opt); 241 - err = ip6_xmit(sk, skb, &fl6, sk->sk_mark, opt, np->tclass, 242 - sk->sk_priority); 241 + err = ip6_xmit(sk, skb, &fl6, READ_ONCE(sk->sk_mark), opt, 242 + np->tclass, sk->sk_priority); 243 243 rcu_read_unlock(); 244 244 err = net_xmit_eval(err); 245 245 }
+8 -1
net/dsa/port.c
··· 1686 1686 if (err) 1687 1687 mode = PHY_INTERFACE_MODE_NA; 1688 1688 1689 - if (ds->ops->phylink_get_caps) 1689 + if (ds->ops->phylink_get_caps) { 1690 1690 ds->ops->phylink_get_caps(ds, dp->index, &dp->pl_config); 1691 + } else { 1692 + /* For legacy drivers */ 1693 + __set_bit(PHY_INTERFACE_MODE_INTERNAL, 1694 + dp->pl_config.supported_interfaces); 1695 + __set_bit(PHY_INTERFACE_MODE_GMII, 1696 + dp->pl_config.supported_interfaces); 1697 + } 1691 1698 1692 1699 pl = phylink_create(&dp->pl_config, of_fwnode_handle(dp->dn), 1693 1700 mode, &dsa_port_phylink_mac_ops);
+2 -2
net/ipv4/inet_diag.c
··· 150 150 } 151 151 #endif 152 152 153 - if (net_admin && nla_put_u32(skb, INET_DIAG_MARK, sk->sk_mark)) 153 + if (net_admin && nla_put_u32(skb, INET_DIAG_MARK, READ_ONCE(sk->sk_mark))) 154 154 goto errout; 155 155 156 156 if (ext & (1 << (INET_DIAG_CLASS_ID - 1)) || ··· 799 799 entry.ifindex = sk->sk_bound_dev_if; 800 800 entry.userlocks = sk_fullsock(sk) ? sk->sk_userlocks : 0; 801 801 if (sk_fullsock(sk)) 802 - entry.mark = sk->sk_mark; 802 + entry.mark = READ_ONCE(sk->sk_mark); 803 803 else if (sk->sk_state == TCP_NEW_SYN_RECV) 804 804 entry.mark = inet_rsk(inet_reqsk(sk))->ir_mark; 805 805 else if (sk->sk_state == TCP_TIME_WAIT)
+13 -4
net/ipv4/ip_output.c
··· 184 184 ip_options_build(skb, &opt->opt, daddr, rt); 185 185 } 186 186 187 - skb->priority = sk->sk_priority; 187 + skb->priority = READ_ONCE(sk->sk_priority); 188 188 if (!skb->mark) 189 - skb->mark = sk->sk_mark; 189 + skb->mark = READ_ONCE(sk->sk_mark); 190 190 191 191 /* Send it out. */ 192 192 return ip_local_out(net, skb->sk, skb); ··· 528 528 skb_shinfo(skb)->gso_segs ?: 1); 529 529 530 530 /* TODO : should we use skb->sk here instead of sk ? */ 531 - skb->priority = sk->sk_priority; 532 - skb->mark = sk->sk_mark; 531 + skb->priority = READ_ONCE(sk->sk_priority); 532 + skb->mark = READ_ONCE(sk->sk_mark); 533 533 534 534 res = ip_local_out(net, sk, skb); 535 535 rcu_read_unlock(); ··· 1158 1158 } 1159 1159 1160 1160 copy = datalen - transhdrlen - fraggap - pagedlen; 1161 + /* [!] NOTE: copy will be negative if pagedlen>0 1162 + * because then the equation reduces to -fraggap. 1163 + */ 1161 1164 if (copy > 0 && getfrag(from, data + transhdrlen, offset, copy, fraggap, skb) < 0) { 1162 1165 err = -EFAULT; 1163 1166 kfree_skb(skb); 1164 1167 goto error; 1168 + } else if (flags & MSG_SPLICE_PAGES) { 1169 + copy = 0; 1165 1170 } 1166 1171 1167 1172 offset += copy; ··· 1213 1208 } 1214 1209 } else if (flags & MSG_SPLICE_PAGES) { 1215 1210 struct msghdr *msg = from; 1211 + 1212 + err = -EIO; 1213 + if (WARN_ON_ONCE(copy > msg->msg_iter.count)) 1214 + goto error; 1216 1215 1217 1216 err = skb_splice_from_iter(skb, &msg->msg_iter, copy, 1218 1217 sk->sk_allocation);
+1 -1
net/ipv4/ip_sockglue.c
··· 592 592 } 593 593 if (inet_sk(sk)->tos != val) { 594 594 inet_sk(sk)->tos = val; 595 - sk->sk_priority = rt_tos2priority(val); 595 + WRITE_ONCE(sk->sk_priority, rt_tos2priority(val)); 596 596 sk_dst_reset(sk); 597 597 } 598 598 }
+1 -1
net/ipv4/raw.c
··· 348 348 goto error; 349 349 skb_reserve(skb, hlen); 350 350 351 - skb->priority = sk->sk_priority; 351 + skb->priority = READ_ONCE(sk->sk_priority); 352 352 skb->mark = sockc->mark; 353 353 skb->tstamp = sockc->transmit_time; 354 354 skb_dst_set(skb, &rt->dst);
+2 -2
net/ipv4/route.c
··· 518 518 const struct inet_sock *inet = inet_sk(sk); 519 519 520 520 oif = sk->sk_bound_dev_if; 521 - mark = sk->sk_mark; 521 + mark = READ_ONCE(sk->sk_mark); 522 522 tos = ip_sock_rt_tos(sk); 523 523 scope = ip_sock_rt_scope(sk); 524 524 prot = inet->hdrincl ? IPPROTO_RAW : sk->sk_protocol; ··· 552 552 inet_opt = rcu_dereference(inet->inet_opt); 553 553 if (inet_opt && inet_opt->opt.srr) 554 554 daddr = inet_opt->opt.faddr; 555 - flowi4_init_output(fl4, sk->sk_bound_dev_if, sk->sk_mark, 555 + flowi4_init_output(fl4, sk->sk_bound_dev_if, READ_ONCE(sk->sk_mark), 556 556 ip_sock_rt_tos(sk) & IPTOS_RT_MASK, 557 557 ip_sock_rt_scope(sk), 558 558 inet->hdrincl ? IPPROTO_RAW : sk->sk_protocol,
+2 -2
net/ipv4/tcp_ipv4.c
··· 932 932 ctl_sk = this_cpu_read(ipv4_tcp_sk); 933 933 sock_net_set(ctl_sk, net); 934 934 ctl_sk->sk_mark = (sk->sk_state == TCP_TIME_WAIT) ? 935 - inet_twsk(sk)->tw_mark : sk->sk_mark; 935 + inet_twsk(sk)->tw_mark : READ_ONCE(sk->sk_mark); 936 936 ctl_sk->sk_priority = (sk->sk_state == TCP_TIME_WAIT) ? 937 - inet_twsk(sk)->tw_priority : sk->sk_priority; 937 + inet_twsk(sk)->tw_priority : READ_ONCE(sk->sk_priority); 938 938 transmit_time = tcp_transmit_time(sk); 939 939 ip_send_unicast_reply(ctl_sk, 940 940 skb, &TCP_SKB_CB(skb)->header.h4.opt,
+44 -26
net/ipv4/tcp_metrics.c
··· 40 40 41 41 struct tcp_metrics_block { 42 42 struct tcp_metrics_block __rcu *tcpm_next; 43 - possible_net_t tcpm_net; 43 + struct net *tcpm_net; 44 44 struct inetpeer_addr tcpm_saddr; 45 45 struct inetpeer_addr tcpm_daddr; 46 46 unsigned long tcpm_stamp; ··· 51 51 struct rcu_head rcu_head; 52 52 }; 53 53 54 - static inline struct net *tm_net(struct tcp_metrics_block *tm) 54 + static inline struct net *tm_net(const struct tcp_metrics_block *tm) 55 55 { 56 - return read_pnet(&tm->tcpm_net); 56 + /* Paired with the WRITE_ONCE() in tcpm_new() */ 57 + return READ_ONCE(tm->tcpm_net); 57 58 } 58 59 59 60 static bool tcp_metric_locked(struct tcp_metrics_block *tm, 60 61 enum tcp_metric_index idx) 61 62 { 62 - return tm->tcpm_lock & (1 << idx); 63 + /* Paired with WRITE_ONCE() in tcpm_suck_dst() */ 64 + return READ_ONCE(tm->tcpm_lock) & (1 << idx); 63 65 } 64 66 65 - static u32 tcp_metric_get(struct tcp_metrics_block *tm, 67 + static u32 tcp_metric_get(const struct tcp_metrics_block *tm, 66 68 enum tcp_metric_index idx) 67 69 { 68 - return tm->tcpm_vals[idx]; 70 + /* Paired with WRITE_ONCE() in tcp_metric_set() */ 71 + return READ_ONCE(tm->tcpm_vals[idx]); 69 72 } 70 73 71 74 static void tcp_metric_set(struct tcp_metrics_block *tm, 72 75 enum tcp_metric_index idx, 73 76 u32 val) 74 77 { 75 - tm->tcpm_vals[idx] = val; 78 + /* Paired with READ_ONCE() in tcp_metric_get() */ 79 + WRITE_ONCE(tm->tcpm_vals[idx], val); 76 80 } 77 81 78 82 static bool addr_same(const struct inetpeer_addr *a, 79 83 const struct inetpeer_addr *b) 80 84 { 81 - return inetpeer_addr_cmp(a, b) == 0; 85 + return (a->family == b->family) && !inetpeer_addr_cmp(a, b); 82 86 } 83 87 84 88 struct tcpm_hash_bucket { ··· 93 89 static unsigned int tcp_metrics_hash_log __read_mostly; 94 90 95 91 static DEFINE_SPINLOCK(tcp_metrics_lock); 92 + static DEFINE_SEQLOCK(fastopen_seqlock); 96 93 97 94 static void tcpm_suck_dst(struct tcp_metrics_block *tm, 98 95 const struct dst_entry *dst, ··· 102 97 u32 msval; 103 98 u32 val; 104 99 105 - tm->tcpm_stamp = jiffies; 100 + WRITE_ONCE(tm->tcpm_stamp, jiffies); 106 101 107 102 val = 0; 108 103 if (dst_metric_locked(dst, RTAX_RTT)) ··· 115 110 val |= 1 << TCP_METRIC_CWND; 116 111 if (dst_metric_locked(dst, RTAX_REORDERING)) 117 112 val |= 1 << TCP_METRIC_REORDERING; 118 - tm->tcpm_lock = val; 113 + /* Paired with READ_ONCE() in tcp_metric_locked() */ 114 + WRITE_ONCE(tm->tcpm_lock, val); 119 115 120 116 msval = dst_metric_raw(dst, RTAX_RTT); 121 - tm->tcpm_vals[TCP_METRIC_RTT] = msval * USEC_PER_MSEC; 117 + tcp_metric_set(tm, TCP_METRIC_RTT, msval * USEC_PER_MSEC); 122 118 123 119 msval = dst_metric_raw(dst, RTAX_RTTVAR); 124 - tm->tcpm_vals[TCP_METRIC_RTTVAR] = msval * USEC_PER_MSEC; 125 - tm->tcpm_vals[TCP_METRIC_SSTHRESH] = dst_metric_raw(dst, RTAX_SSTHRESH); 126 - tm->tcpm_vals[TCP_METRIC_CWND] = dst_metric_raw(dst, RTAX_CWND); 127 - tm->tcpm_vals[TCP_METRIC_REORDERING] = dst_metric_raw(dst, RTAX_REORDERING); 120 + tcp_metric_set(tm, TCP_METRIC_RTTVAR, msval * USEC_PER_MSEC); 121 + tcp_metric_set(tm, TCP_METRIC_SSTHRESH, 122 + dst_metric_raw(dst, RTAX_SSTHRESH)); 123 + tcp_metric_set(tm, TCP_METRIC_CWND, 124 + dst_metric_raw(dst, RTAX_CWND)); 125 + tcp_metric_set(tm, TCP_METRIC_REORDERING, 126 + dst_metric_raw(dst, RTAX_REORDERING)); 128 127 if (fastopen_clear) { 128 + write_seqlock(&fastopen_seqlock); 129 129 tm->tcpm_fastopen.mss = 0; 130 130 tm->tcpm_fastopen.syn_loss = 0; 131 131 tm->tcpm_fastopen.try_exp = 0; 132 132 tm->tcpm_fastopen.cookie.exp = false; 133 133 tm->tcpm_fastopen.cookie.len = 0; 134 + write_sequnlock(&fastopen_seqlock); 134 135 } 135 136 } 136 137 137 138 #define TCP_METRICS_TIMEOUT (60 * 60 * HZ) 138 139 139 - static void tcpm_check_stamp(struct tcp_metrics_block *tm, struct dst_entry *dst) 140 + static void tcpm_check_stamp(struct tcp_metrics_block *tm, 141 + const struct dst_entry *dst) 140 142 { 141 - if (tm && unlikely(time_after(jiffies, tm->tcpm_stamp + TCP_METRICS_TIMEOUT))) 143 + unsigned long limit; 144 + 145 + if (!tm) 146 + return; 147 + limit = READ_ONCE(tm->tcpm_stamp) + TCP_METRICS_TIMEOUT; 148 + if (unlikely(time_after(jiffies, limit))) 142 149 tcpm_suck_dst(tm, dst, false); 143 150 } 144 151 ··· 191 174 oldest = deref_locked(tcp_metrics_hash[hash].chain); 192 175 for (tm = deref_locked(oldest->tcpm_next); tm; 193 176 tm = deref_locked(tm->tcpm_next)) { 194 - if (time_before(tm->tcpm_stamp, oldest->tcpm_stamp)) 177 + if (time_before(READ_ONCE(tm->tcpm_stamp), 178 + READ_ONCE(oldest->tcpm_stamp))) 195 179 oldest = tm; 196 180 } 197 181 tm = oldest; 198 182 } else { 199 - tm = kmalloc(sizeof(*tm), GFP_ATOMIC); 183 + tm = kzalloc(sizeof(*tm), GFP_ATOMIC); 200 184 if (!tm) 201 185 goto out_unlock; 202 186 } 203 - write_pnet(&tm->tcpm_net, net); 187 + /* Paired with the READ_ONCE() in tm_net() */ 188 + WRITE_ONCE(tm->tcpm_net, net); 189 + 204 190 tm->tcpm_saddr = *saddr; 205 191 tm->tcpm_daddr = *daddr; 206 192 207 - tcpm_suck_dst(tm, dst, true); 193 + tcpm_suck_dst(tm, dst, reclaim); 208 194 209 195 if (likely(!reclaim)) { 210 196 tm->tcpm_next = tcp_metrics_hash[hash].chain; ··· 454 434 tp->reordering); 455 435 } 456 436 } 457 - tm->tcpm_stamp = jiffies; 437 + WRITE_ONCE(tm->tcpm_stamp, jiffies); 458 438 out_unlock: 459 439 rcu_read_unlock(); 460 440 } ··· 558 538 559 539 return ret; 560 540 } 561 - 562 - static DEFINE_SEQLOCK(fastopen_seqlock); 563 541 564 542 void tcp_fastopen_cache_get(struct sock *sk, u16 *mss, 565 543 struct tcp_fastopen_cookie *cookie) ··· 665 647 } 666 648 667 649 if (nla_put_msecs(msg, TCP_METRICS_ATTR_AGE, 668 - jiffies - tm->tcpm_stamp, 650 + jiffies - READ_ONCE(tm->tcpm_stamp), 669 651 TCP_METRICS_ATTR_PAD) < 0) 670 652 goto nla_put_failure; 671 653 ··· 676 658 if (!nest) 677 659 goto nla_put_failure; 678 660 for (i = 0; i < TCP_METRIC_MAX_KERNEL + 1; i++) { 679 - u32 val = tm->tcpm_vals[i]; 661 + u32 val = tcp_metric_get(tm, i); 680 662 681 663 if (!val) 682 664 continue;
+6 -2
net/ipv4/udp.c
··· 114 114 #include <net/sock_reuseport.h> 115 115 #include <net/addrconf.h> 116 116 #include <net/udp_tunnel.h> 117 + #include <net/gro.h> 117 118 #if IS_ENABLED(CONFIG_IPV6) 118 119 #include <net/ipv6_stubs.h> 119 120 #endif ··· 556 555 { 557 556 const struct iphdr *iph = ip_hdr(skb); 558 557 struct net *net = dev_net(skb->dev); 558 + int iif, sdif; 559 + 560 + inet_get_iif_sdif(skb, &iif, &sdif); 559 561 560 562 return __udp4_lib_lookup(net, iph->saddr, sport, 561 - iph->daddr, dport, inet_iif(skb), 562 - inet_sdif(skb), net->ipv4.udp_table, NULL); 563 + iph->daddr, dport, iif, 564 + sdif, net->ipv4.udp_table, NULL); 563 565 } 564 566 565 567 /* Must be called under rcu_read_lock().
+5 -2
net/ipv4/udp_offload.c
··· 609 609 { 610 610 const struct iphdr *iph = skb_gro_network_header(skb); 611 611 struct net *net = dev_net(skb->dev); 612 + int iif, sdif; 613 + 614 + inet_get_iif_sdif(skb, &iif, &sdif); 612 615 613 616 return __udp4_lib_lookup(net, iph->saddr, sport, 614 - iph->daddr, dport, inet_iif(skb), 615 - inet_sdif(skb), net->ipv4.udp_table, NULL); 617 + iph->daddr, dport, iif, 618 + sdif, net->ipv4.udp_table, NULL); 616 619 } 617 620 618 621 INDIRECT_CALLABLE_SCOPE
+1 -1
net/ipv6/ip6mr.c
··· 1073 1073 And all this only to mangle msg->im6_msgtype and 1074 1074 to set msg->im6_mbz to "mbz" :-) 1075 1075 */ 1076 - skb_push(skb, -skb_network_offset(pkt)); 1076 + __skb_pull(skb, skb_network_offset(pkt)); 1077 1077 1078 1078 skb_push(skb, sizeof(*msg)); 1079 1079 skb_reset_transport_header(skb);
+1 -1
net/ipv6/ping.c
··· 120 120 121 121 ipcm6_init_sk(&ipc6, np); 122 122 ipc6.sockc.tsflags = sk->sk_tsflags; 123 - ipc6.sockc.mark = sk->sk_mark; 123 + ipc6.sockc.mark = READ_ONCE(sk->sk_mark); 124 124 125 125 fl6.flowi6_oif = oif; 126 126
+3 -3
net/ipv6/raw.c
··· 614 614 skb_reserve(skb, hlen); 615 615 616 616 skb->protocol = htons(ETH_P_IPV6); 617 - skb->priority = sk->sk_priority; 617 + skb->priority = READ_ONCE(sk->sk_priority); 618 618 skb->mark = sockc->mark; 619 619 skb->tstamp = sockc->transmit_time; 620 620 ··· 774 774 */ 775 775 memset(&fl6, 0, sizeof(fl6)); 776 776 777 - fl6.flowi6_mark = sk->sk_mark; 777 + fl6.flowi6_mark = READ_ONCE(sk->sk_mark); 778 778 fl6.flowi6_uid = sk->sk_uid; 779 779 780 780 ipcm6_init(&ipc6); 781 781 ipc6.sockc.tsflags = sk->sk_tsflags; 782 - ipc6.sockc.mark = sk->sk_mark; 782 + ipc6.sockc.mark = fl6.flowi6_mark; 783 783 784 784 if (sin6) { 785 785 if (addr_len < SIN6_LEN_RFC2133)
+4 -3
net/ipv6/route.c
··· 2951 2951 if (!oif && skb->dev) 2952 2952 oif = l3mdev_master_ifindex(skb->dev); 2953 2953 2954 - ip6_update_pmtu(skb, sock_net(sk), mtu, oif, sk->sk_mark, sk->sk_uid); 2954 + ip6_update_pmtu(skb, sock_net(sk), mtu, oif, READ_ONCE(sk->sk_mark), 2955 + sk->sk_uid); 2955 2956 2956 2957 dst = __sk_dst_get(sk); 2957 2958 if (!dst || !dst->obsolete || ··· 3173 3172 3174 3173 void ip6_sk_redirect(struct sk_buff *skb, struct sock *sk) 3175 3174 { 3176 - ip6_redirect(skb, sock_net(sk), sk->sk_bound_dev_if, sk->sk_mark, 3177 - sk->sk_uid); 3175 + ip6_redirect(skb, sock_net(sk), sk->sk_bound_dev_if, 3176 + READ_ONCE(sk->sk_mark), sk->sk_uid); 3178 3177 } 3179 3178 EXPORT_SYMBOL_GPL(ip6_sk_redirect); 3180 3179
+5 -4
net/ipv6/tcp_ipv6.c
··· 564 564 opt = ireq->ipv6_opt; 565 565 if (!opt) 566 566 opt = rcu_dereference(np->opt); 567 - err = ip6_xmit(sk, skb, fl6, skb->mark ? : sk->sk_mark, opt, 568 - tclass, sk->sk_priority); 567 + err = ip6_xmit(sk, skb, fl6, skb->mark ? : READ_ONCE(sk->sk_mark), 568 + opt, tclass, sk->sk_priority); 569 569 rcu_read_unlock(); 570 570 err = net_xmit_eval(err); 571 571 } ··· 939 939 if (sk->sk_state == TCP_TIME_WAIT) 940 940 mark = inet_twsk(sk)->tw_mark; 941 941 else 942 - mark = sk->sk_mark; 942 + mark = READ_ONCE(sk->sk_mark); 943 943 skb_set_delivery_time(buff, tcp_transmit_time(sk), true); 944 944 } 945 945 if (txhash) { ··· 1128 1128 tcp_time_stamp_raw() + tcp_rsk(req)->ts_off, 1129 1129 READ_ONCE(req->ts_recent), sk->sk_bound_dev_if, 1130 1130 tcp_v6_md5_do_lookup(sk, &ipv6_hdr(skb)->saddr, l3index), 1131 - ipv6_get_dsfield(ipv6_hdr(skb)), 0, sk->sk_priority, 1131 + ipv6_get_dsfield(ipv6_hdr(skb)), 0, 1132 + READ_ONCE(sk->sk_priority), 1132 1133 READ_ONCE(tcp_rsk(req)->txhash)); 1133 1134 } 1134 1135
+8 -4
net/ipv6/udp.c
··· 51 51 #include <net/inet6_hashtables.h> 52 52 #include <net/busy_poll.h> 53 53 #include <net/sock_reuseport.h> 54 + #include <net/gro.h> 54 55 55 56 #include <linux/proc_fs.h> 56 57 #include <linux/seq_file.h> ··· 301 300 { 302 301 const struct ipv6hdr *iph = ipv6_hdr(skb); 303 302 struct net *net = dev_net(skb->dev); 303 + int iif, sdif; 304 + 305 + inet6_get_iif_sdif(skb, &iif, &sdif); 304 306 305 307 return __udp6_lib_lookup(net, &iph->saddr, sport, 306 - &iph->daddr, dport, inet6_iif(skb), 307 - inet6_sdif(skb), net->ipv4.udp_table, NULL); 308 + &iph->daddr, dport, iif, 309 + sdif, net->ipv4.udp_table, NULL); 308 310 } 309 311 310 312 /* Must be called under rcu_read_lock(). ··· 628 624 if (type == NDISC_REDIRECT) { 629 625 if (tunnel) { 630 626 ip6_redirect(skb, sock_net(sk), inet6_iif(skb), 631 - sk->sk_mark, sk->sk_uid); 627 + READ_ONCE(sk->sk_mark), sk->sk_uid); 632 628 } else { 633 629 ip6_sk_redirect(skb, sk); 634 630 } ··· 1360 1356 ipcm6_init(&ipc6); 1361 1357 ipc6.gso_size = READ_ONCE(up->gso_size); 1362 1358 ipc6.sockc.tsflags = sk->sk_tsflags; 1363 - ipc6.sockc.mark = sk->sk_mark; 1359 + ipc6.sockc.mark = READ_ONCE(sk->sk_mark); 1364 1360 1365 1361 /* destination address check */ 1366 1362 if (sin6) {
+5 -2
net/ipv6/udp_offload.c
··· 118 118 { 119 119 const struct ipv6hdr *iph = skb_gro_network_header(skb); 120 120 struct net *net = dev_net(skb->dev); 121 + int iif, sdif; 122 + 123 + inet6_get_iif_sdif(skb, &iif, &sdif); 121 124 122 125 return __udp6_lib_lookup(net, &iph->saddr, sport, 123 - &iph->daddr, dport, inet6_iif(skb), 124 - inet6_sdif(skb), net->ipv4.udp_table, NULL); 126 + &iph->daddr, dport, iif, 127 + sdif, net->ipv4.udp_table, NULL); 125 128 } 126 129 127 130 INDIRECT_CALLABLE_SCOPE
+1 -1
net/l2tp/l2tp_ip6.c
··· 516 516 /* Get and verify the address */ 517 517 memset(&fl6, 0, sizeof(fl6)); 518 518 519 - fl6.flowi6_mark = sk->sk_mark; 519 + fl6.flowi6_mark = READ_ONCE(sk->sk_mark); 520 520 fl6.flowi6_uid = sk->sk_uid; 521 521 522 522 ipcm6_init(&ipc6);
+1 -1
net/mptcp/sockopt.c
··· 103 103 break; 104 104 case SO_MARK: 105 105 if (READ_ONCE(ssk->sk_mark) != sk->sk_mark) { 106 - ssk->sk_mark = sk->sk_mark; 106 + WRITE_ONCE(ssk->sk_mark, sk->sk_mark); 107 107 sk_dst_reset(ssk); 108 108 } 109 109 break;
+1 -1
net/netfilter/nft_socket.c
··· 107 107 break; 108 108 case NFT_SOCKET_MARK: 109 109 if (sk_fullsock(sk)) { 110 - *dest = sk->sk_mark; 110 + *dest = READ_ONCE(sk->sk_mark); 111 111 } else { 112 112 regs->verdict.code = NFT_BREAK; 113 113 return;
+2 -2
net/netfilter/xt_socket.c
··· 77 77 78 78 if (info->flags & XT_SOCKET_RESTORESKMARK && !wildcard && 79 79 transparent && sk_fullsock(sk)) 80 - pskb->mark = sk->sk_mark; 80 + pskb->mark = READ_ONCE(sk->sk_mark); 81 81 82 82 if (sk != skb->sk) 83 83 sock_gen_put(sk); ··· 138 138 139 139 if (info->flags & XT_SOCKET_RESTORESKMARK && !wildcard && 140 140 transparent && sk_fullsock(sk)) 141 - pskb->mark = sk->sk_mark; 141 + pskb->mark = READ_ONCE(sk->sk_mark); 142 142 143 143 if (sk != skb->sk) 144 144 sock_gen_put(sk);
+6 -6
net/packet/af_packet.c
··· 2050 2050 2051 2051 skb->protocol = proto; 2052 2052 skb->dev = dev; 2053 - skb->priority = sk->sk_priority; 2054 - skb->mark = sk->sk_mark; 2053 + skb->priority = READ_ONCE(sk->sk_priority); 2054 + skb->mark = READ_ONCE(sk->sk_mark); 2055 2055 skb->tstamp = sockc.transmit_time; 2056 2056 2057 2057 skb_setup_tx_timestamp(skb, sockc.tsflags); ··· 2585 2585 2586 2586 skb->protocol = proto; 2587 2587 skb->dev = dev; 2588 - skb->priority = po->sk.sk_priority; 2589 - skb->mark = po->sk.sk_mark; 2588 + skb->priority = READ_ONCE(po->sk.sk_priority); 2589 + skb->mark = READ_ONCE(po->sk.sk_mark); 2590 2590 skb->tstamp = sockc->transmit_time; 2591 2591 skb_setup_tx_timestamp(skb, sockc->tsflags); 2592 2592 skb_zcopy_set_nouarg(skb, ph.raw); ··· 2990 2990 goto out_unlock; 2991 2991 2992 2992 sockcm_init(&sockc, sk); 2993 - sockc.mark = sk->sk_mark; 2993 + sockc.mark = READ_ONCE(sk->sk_mark); 2994 2994 if (msg->msg_controllen) { 2995 2995 err = sock_cmsg_send(sk, msg, &sockc); 2996 2996 if (unlikely(err)) ··· 3063 3063 3064 3064 skb->protocol = proto; 3065 3065 skb->dev = dev; 3066 - skb->priority = sk->sk_priority; 3066 + skb->priority = READ_ONCE(sk->sk_priority); 3067 3067 skb->mark = sockc.mark; 3068 3068 skb->tstamp = sockc.transmit_time; 3069 3069
+3 -2
net/sched/cls_flower.c
··· 779 779 [TCA_FLOWER_KEY_MPLS_OPT_LSE_LABEL] = { .type = NLA_U32 }, 780 780 }; 781 781 782 - static const struct nla_policy cfm_opt_policy[TCA_FLOWER_KEY_CFM_OPT_MAX] = { 782 + static const struct nla_policy 783 + cfm_opt_policy[TCA_FLOWER_KEY_CFM_OPT_MAX + 1] = { 783 784 [TCA_FLOWER_KEY_CFM_MD_LEVEL] = NLA_POLICY_MAX(NLA_U8, 784 785 FLOW_DIS_CFM_MDL_MAX), 785 786 [TCA_FLOWER_KEY_CFM_OPCODE] = { .type = NLA_U8 }, ··· 1731 1730 struct fl_flow_key *mask, 1732 1731 struct netlink_ext_ack *extack) 1733 1732 { 1734 - struct nlattr *nla_cfm_opt[TCA_FLOWER_KEY_CFM_OPT_MAX]; 1733 + struct nlattr *nla_cfm_opt[TCA_FLOWER_KEY_CFM_OPT_MAX + 1]; 1735 1734 int err; 1736 1735 1737 1736 if (!tb[TCA_FLOWER_KEY_CFM])
-1
net/sched/cls_fw.c
··· 267 267 return -ENOBUFS; 268 268 269 269 fnew->id = f->id; 270 - fnew->res = f->res; 271 270 fnew->ifindex = f->ifindex; 272 271 fnew->tp = f->tp; 273 272
-1
net/sched/cls_route.c
··· 513 513 if (fold) { 514 514 f->id = fold->id; 515 515 f->iif = fold->iif; 516 - f->res = fold->res; 517 516 f->handle = fold->handle; 518 517 519 518 f->tp = fold->tp;
+50 -7
net/sched/cls_u32.c
··· 826 826 827 827 new->ifindex = n->ifindex; 828 828 new->fshift = n->fshift; 829 - new->res = n->res; 830 829 new->flags = n->flags; 831 830 RCU_INIT_POINTER(new->ht_down, ht); 832 831 ··· 1023 1024 return -EINVAL; 1024 1025 } 1025 1026 1027 + /* At this point, we need to derive the new handle that will be used to 1028 + * uniquely map the identity of this table match entry. The 1029 + * identity of the entry that we need to construct is 32 bits made of: 1030 + * htid(12b):bucketid(8b):node/entryid(12b) 1031 + * 1032 + * At this point _we have the table(ht)_ in which we will insert this 1033 + * entry. We carry the table's id in variable "htid". 1034 + * Note that earlier code picked the ht selection either by a) the user 1035 + * providing the htid specified via TCA_U32_HASH attribute or b) when 1036 + * no such attribute is passed then the root ht, is default to at ID 1037 + * 0x[800][00][000]. Rule: the root table has a single bucket with ID 0. 1038 + * If OTOH the user passed us the htid, they may also pass a bucketid of 1039 + * choice. 0 is fine. For example a user htid is 0x[600][01][000] it is 1040 + * indicating hash bucketid of 1. Rule: the entry/node ID _cannot_ be 1041 + * passed via the htid, so even if it was non-zero it will be ignored. 1042 + * 1043 + * We may also have a handle, if the user passed one. The handle also 1044 + * carries the same addressing of htid(12b):bucketid(8b):node/entryid(12b). 1045 + * Rule: the bucketid on the handle is ignored even if one was passed; 1046 + * rather the value on "htid" is always assumed to be the bucketid. 1047 + */ 1026 1048 if (handle) { 1049 + /* Rule: The htid from handle and tableid from htid must match */ 1027 1050 if (TC_U32_HTID(handle) && TC_U32_HTID(handle ^ htid)) { 1028 1051 NL_SET_ERR_MSG_MOD(extack, "Handle specified hash table address mismatch"); 1029 1052 return -EINVAL; 1030 1053 } 1031 - handle = htid | TC_U32_NODE(handle); 1032 - err = idr_alloc_u32(&ht->handle_idr, NULL, &handle, handle, 1033 - GFP_KERNEL); 1034 - if (err) 1035 - return err; 1036 - } else 1054 + /* Ok, so far we have a valid htid(12b):bucketid(8b) but we 1055 + * need to finalize the table entry identification with the last 1056 + * part - the node/entryid(12b)). Rule: Nodeid _cannot be 0_ for 1057 + * entries. Rule: nodeid of 0 is reserved only for tables(see 1058 + * earlier code which processes TC_U32_DIVISOR attribute). 1059 + * Rule: The nodeid can only be derived from the handle (and not 1060 + * htid). 1061 + * Rule: if the handle specified zero for the node id example 1062 + * 0x60000000, then pick a new nodeid from the pool of IDs 1063 + * this hash table has been allocating from. 1064 + * If OTOH it is specified (i.e for example the user passed a 1065 + * handle such as 0x60000123), then we use it generate our final 1066 + * handle which is used to uniquely identify the match entry. 1067 + */ 1068 + if (!TC_U32_NODE(handle)) { 1069 + handle = gen_new_kid(ht, htid); 1070 + } else { 1071 + handle = htid | TC_U32_NODE(handle); 1072 + err = idr_alloc_u32(&ht->handle_idr, NULL, &handle, 1073 + handle, GFP_KERNEL); 1074 + if (err) 1075 + return err; 1076 + } 1077 + } else { 1078 + /* The user did not give us a handle; lets just generate one 1079 + * from the table's pool of nodeids. 1080 + */ 1037 1081 handle = gen_new_kid(ht, htid); 1082 + } 1038 1083 1039 1084 if (tb[TCA_U32_SEL] == NULL) { 1040 1085 NL_SET_ERR_MSG_MOD(extack, "Selector not specified");
+2 -2
net/sched/em_meta.c
··· 568 568 *err = -1; 569 569 return; 570 570 } 571 - dst->value = sk->sk_rcvtimeo / HZ; 571 + dst->value = READ_ONCE(sk->sk_rcvtimeo) / HZ; 572 572 } 573 573 574 574 META_COLLECTOR(int_sk_sndtimeo) ··· 579 579 *err = -1; 580 580 return; 581 581 } 582 - dst->value = sk->sk_sndtimeo / HZ; 582 + dst->value = READ_ONCE(sk->sk_sndtimeo) / HZ; 583 583 } 584 584 585 585 META_COLLECTOR(int_sk_sendmsg_off)
+13 -2
net/sched/sch_taprio.c
··· 1015 1015 TC_FP_PREEMPTIBLE), 1016 1016 }; 1017 1017 1018 + static struct netlink_range_validation_signed taprio_cycle_time_range = { 1019 + .min = 0, 1020 + .max = INT_MAX, 1021 + }; 1022 + 1018 1023 static const struct nla_policy taprio_policy[TCA_TAPRIO_ATTR_MAX + 1] = { 1019 1024 [TCA_TAPRIO_ATTR_PRIOMAP] = { 1020 1025 .len = sizeof(struct tc_mqprio_qopt) ··· 1028 1023 [TCA_TAPRIO_ATTR_SCHED_BASE_TIME] = { .type = NLA_S64 }, 1029 1024 [TCA_TAPRIO_ATTR_SCHED_SINGLE_ENTRY] = { .type = NLA_NESTED }, 1030 1025 [TCA_TAPRIO_ATTR_SCHED_CLOCKID] = { .type = NLA_S32 }, 1031 - [TCA_TAPRIO_ATTR_SCHED_CYCLE_TIME] = { .type = NLA_S64 }, 1026 + [TCA_TAPRIO_ATTR_SCHED_CYCLE_TIME] = 1027 + NLA_POLICY_FULL_RANGE_SIGNED(NLA_S64, &taprio_cycle_time_range), 1032 1028 [TCA_TAPRIO_ATTR_SCHED_CYCLE_TIME_EXTENSION] = { .type = NLA_S64 }, 1033 1029 [TCA_TAPRIO_ATTR_FLAGS] = { .type = NLA_U32 }, 1034 1030 [TCA_TAPRIO_ATTR_TXTIME_DELAY] = { .type = NLA_U32 }, ··· 1162 1156 1163 1157 if (!cycle) { 1164 1158 NL_SET_ERR_MSG(extack, "'cycle_time' can never be 0"); 1159 + return -EINVAL; 1160 + } 1161 + 1162 + if (cycle < 0 || cycle > INT_MAX) { 1163 + NL_SET_ERR_MSG(extack, "'cycle_time' is too big"); 1165 1164 return -EINVAL; 1166 1165 } 1167 1166 ··· 1358 1347 struct sched_gate_list *sched, ktime_t base) 1359 1348 { 1360 1349 struct sched_entry *entry; 1361 - u32 interval = 0; 1350 + u64 interval = 0; 1362 1351 1363 1352 list_for_each_entry(entry, &sched->entries, list) { 1364 1353 entry->next_txtime = ktime_add_ns(base, interval);
+1 -1
net/smc/af_smc.c
··· 445 445 nsk->sk_rcvbuf = osk->sk_rcvbuf; 446 446 nsk->sk_sndtimeo = osk->sk_sndtimeo; 447 447 nsk->sk_rcvtimeo = osk->sk_rcvtimeo; 448 - nsk->sk_mark = osk->sk_mark; 448 + nsk->sk_mark = READ_ONCE(osk->sk_mark); 449 449 nsk->sk_priority = osk->sk_priority; 450 450 nsk->sk_rcvlowat = osk->sk_rcvlowat; 451 451 nsk->sk_bound_dev_if = osk->sk_bound_dev_if;
+1 -1
net/unix/af_unix.c
··· 790 790 if (mutex_lock_interruptible(&u->iolock)) 791 791 return -EINTR; 792 792 793 - sk->sk_peek_off = val; 793 + WRITE_ONCE(sk->sk_peek_off, val); 794 794 mutex_unlock(&u->iolock); 795 795 796 796 return 0;
+1 -1
net/wireless/scan.c
··· 657 657 658 658 ret = cfg80211_calc_short_ssid(ies, &ssid_elem, &s_ssid_tmp); 659 659 if (ret) 660 - return ret; 660 + return 0; 661 661 662 662 for_each_element_id(elem, WLAN_EID_REDUCED_NEIGHBOR_REPORT, 663 663 ies->data, ies->len) {
+1 -1
net/xdp/xsk.c
··· 682 682 683 683 skb->dev = dev; 684 684 skb->priority = xs->sk.sk_priority; 685 - skb->mark = xs->sk.sk_mark; 685 + skb->mark = READ_ONCE(xs->sk.sk_mark); 686 686 skb->destructor = xsk_destruct_skb; 687 687 xsk_set_destructor_arg(skb); 688 688
+1 -1
net/xfrm/xfrm_policy.c
··· 2250 2250 2251 2251 match = xfrm_selector_match(&pol->selector, fl, family); 2252 2252 if (match) { 2253 - if ((sk->sk_mark & pol->mark.m) != pol->mark.v || 2253 + if ((READ_ONCE(sk->sk_mark) & pol->mark.m) != pol->mark.v || 2254 2254 pol->if_id != if_id) { 2255 2255 pol = NULL; 2256 2256 goto out;
-68
scripts/coccinelle/api/debugfs/debugfs_simple_attr.cocci
··· 1 - // SPDX-License-Identifier: GPL-2.0 2 - /// Use DEFINE_DEBUGFS_ATTRIBUTE rather than DEFINE_SIMPLE_ATTRIBUTE 3 - /// for debugfs files. 4 - /// 5 - //# Rationale: DEFINE_SIMPLE_ATTRIBUTE + debugfs_create_file() 6 - //# imposes some significant overhead as compared to 7 - //# DEFINE_DEBUGFS_ATTRIBUTE + debugfs_create_file_unsafe(). 8 - // 9 - // Copyright (C): 2016 Nicolai Stange 10 - // Options: --no-includes 11 - // 12 - 13 - virtual context 14 - virtual patch 15 - virtual org 16 - virtual report 17 - 18 - @dsa@ 19 - declarer name DEFINE_SIMPLE_ATTRIBUTE; 20 - identifier dsa_fops; 21 - expression dsa_get, dsa_set, dsa_fmt; 22 - position p; 23 - @@ 24 - DEFINE_SIMPLE_ATTRIBUTE@p(dsa_fops, dsa_get, dsa_set, dsa_fmt); 25 - 26 - @dcf@ 27 - expression name, mode, parent, data; 28 - identifier dsa.dsa_fops; 29 - @@ 30 - debugfs_create_file(name, mode, parent, data, &dsa_fops) 31 - 32 - 33 - @context_dsa depends on context && dcf@ 34 - declarer name DEFINE_DEBUGFS_ATTRIBUTE; 35 - identifier dsa.dsa_fops; 36 - expression dsa.dsa_get, dsa.dsa_set, dsa.dsa_fmt; 37 - @@ 38 - * DEFINE_SIMPLE_ATTRIBUTE(dsa_fops, dsa_get, dsa_set, dsa_fmt); 39 - 40 - 41 - @patch_dcf depends on patch expression@ 42 - expression name, mode, parent, data; 43 - identifier dsa.dsa_fops; 44 - @@ 45 - - debugfs_create_file(name, mode, parent, data, &dsa_fops) 46 - + debugfs_create_file_unsafe(name, mode, parent, data, &dsa_fops) 47 - 48 - @patch_dsa depends on patch_dcf && patch@ 49 - identifier dsa.dsa_fops; 50 - expression dsa.dsa_get, dsa.dsa_set, dsa.dsa_fmt; 51 - @@ 52 - - DEFINE_SIMPLE_ATTRIBUTE(dsa_fops, dsa_get, dsa_set, dsa_fmt); 53 - + DEFINE_DEBUGFS_ATTRIBUTE(dsa_fops, dsa_get, dsa_set, dsa_fmt); 54 - 55 - 56 - @script:python depends on org && dcf@ 57 - fops << dsa.dsa_fops; 58 - p << dsa.p; 59 - @@ 60 - msg="%s should be defined with DEFINE_DEBUGFS_ATTRIBUTE" % (fops) 61 - coccilib.org.print_todo(p[0], msg) 62 - 63 - @script:python depends on report && dcf@ 64 - fops << dsa.dsa_fops; 65 - p << dsa.p; 66 - @@ 67 - msg="WARNING: %s should be defined with DEFINE_DEBUGFS_ATTRIBUTE" % (fops) 68 - coccilib.report.print_report(p[0], msg)
-1
scripts/spelling.txt
··· 1541 1541 temorary||temporary 1542 1542 temproarily||temporarily 1543 1543 temperture||temperature 1544 - thead||thread 1545 1544 theads||threads 1546 1545 therfore||therefore 1547 1546 thier||their
+8 -3
security/keys/keyctl.c
··· 980 980 ret = -EACCES; 981 981 down_write(&key->sem); 982 982 983 - if (!capable(CAP_SYS_ADMIN)) { 983 + { 984 + bool is_privileged_op = false; 985 + 984 986 /* only the sysadmin can chown a key to some other UID */ 985 987 if (user != (uid_t) -1 && !uid_eq(key->uid, uid)) 986 - goto error_put; 988 + is_privileged_op = true; 987 989 988 990 /* only the sysadmin can set the key's GID to a group other 989 991 * than one of those that the current process subscribes to */ 990 992 if (group != (gid_t) -1 && !gid_eq(gid, key->gid) && !in_group_p(gid)) 993 + is_privileged_op = true; 994 + 995 + if (is_privileged_op && !capable(CAP_SYS_ADMIN)) 991 996 goto error_put; 992 997 } 993 998 ··· 1093 1088 down_write(&key->sem); 1094 1089 1095 1090 /* if we're not the sysadmin, we can only change a key that we own */ 1096 - if (capable(CAP_SYS_ADMIN) || uid_eq(key->uid, current_fsuid())) { 1091 + if (uid_eq(key->uid, current_fsuid()) || capable(CAP_SYS_ADMIN)) { 1097 1092 key->perm = perm; 1098 1093 notify_key(key, NOTIFY_KEY_SETATTR, 0); 1099 1094 ret = 0;
+1 -2
sound/core/seq/seq_ump_client.c
··· 298 298 } 299 299 300 300 list_for_each_entry(fb, &client->ump->block_list, list) { 301 - if (fb->info.first_group < 0 || 302 - fb->info.first_group + fb->info.num_groups > SNDRV_UMP_MAX_GROUPS) 301 + if (fb->info.first_group + fb->info.num_groups > SNDRV_UMP_MAX_GROUPS) 303 302 break; 304 303 group = &client->groups[fb->info.first_group]; 305 304 for (i = 0; i < fb->info.num_groups; i++, group++) {
+2
sound/pci/hda/patch_realtek.c
··· 9541 9541 SND_PCI_QUIRK(0x103c, 0x880d, "HP EliteBook 830 G8 Notebook PC", ALC285_FIXUP_HP_GPIO_LED), 9542 9542 SND_PCI_QUIRK(0x103c, 0x8811, "HP Spectre x360 15-eb1xxx", ALC285_FIXUP_HP_SPECTRE_X360_EB1), 9543 9543 SND_PCI_QUIRK(0x103c, 0x8812, "HP Spectre x360 15-eb1xxx", ALC285_FIXUP_HP_SPECTRE_X360_EB1), 9544 + SND_PCI_QUIRK(0x103c, 0x881d, "HP 250 G8 Notebook PC", ALC236_FIXUP_HP_MUTE_LED_COEFBIT2), 9544 9545 SND_PCI_QUIRK(0x103c, 0x8846, "HP EliteBook 850 G8 Notebook PC", ALC285_FIXUP_HP_GPIO_LED), 9545 9546 SND_PCI_QUIRK(0x103c, 0x8847, "HP EliteBook x360 830 G8 Notebook PC", ALC285_FIXUP_HP_GPIO_LED), 9546 9547 SND_PCI_QUIRK(0x103c, 0x884b, "HP EliteBook 840 Aero G8 Notebook PC", ALC285_FIXUP_HP_GPIO_LED), ··· 9672 9671 SND_PCI_QUIRK(0x1043, 0x1c9f, "ASUS G614JI", ALC285_FIXUP_ASUS_HEADSET_MIC), 9673 9672 SND_PCI_QUIRK(0x1043, 0x1caf, "ASUS G634JYR/JZR", ALC285_FIXUP_ASUS_SPI_REAR_SPEAKERS), 9674 9673 SND_PCI_QUIRK(0x1043, 0x1ccd, "ASUS X555UB", ALC256_FIXUP_ASUS_MIC), 9674 + SND_PCI_QUIRK(0x1043, 0x1d1f, "ASUS ROG Strix G17 2023 (G713PV)", ALC287_FIXUP_CS35L41_I2C_2), 9675 9675 SND_PCI_QUIRK(0x1043, 0x1d42, "ASUS Zephyrus G14 2022", ALC289_FIXUP_ASUS_GA401), 9676 9676 SND_PCI_QUIRK(0x1043, 0x1d4e, "ASUS TM420", ALC256_FIXUP_ASUS_HPE), 9677 9677 SND_PCI_QUIRK(0x1043, 0x1e02, "ASUS UX3402", ALC245_FIXUP_CS35L41_SPI_2),
+4 -1
sound/soc/atmel/atmel-i2s.c
··· 163 163 164 164 #define I2S_MCK_12M288 12288000UL 165 165 #define I2S_MCK_11M2896 11289600UL 166 + #define I2S_MCK_6M144 6144000UL 166 167 167 168 /* mck = (32 * (imckfs+1) / (imckdiv+1)) * fs */ 168 169 static const struct atmel_i2s_gck_param gck_params[] = { 170 + /* mck = 6.144Mhz */ 171 + { 8000, I2S_MCK_6M144, 1, 47}, /* mck = 768 fs */ 172 + 169 173 /* mck = 12.288MHz */ 170 - { 8000, I2S_MCK_12M288, 0, 47}, /* mck = 1536 fs */ 171 174 { 16000, I2S_MCK_12M288, 1, 47}, /* mck = 768 fs */ 172 175 { 24000, I2S_MCK_12M288, 3, 63}, /* mck = 512 fs */ 173 176 { 32000, I2S_MCK_12M288, 3, 47}, /* mck = 384 fs */
+9 -3
sound/soc/codecs/da7219-aad.c
··· 361 361 struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component); 362 362 u8 events[DA7219_AAD_IRQ_REG_MAX]; 363 363 u8 statusa; 364 - int i, report = 0, mask = 0; 364 + int i, ret, report = 0, mask = 0; 365 365 366 366 /* Read current IRQ events */ 367 - regmap_bulk_read(da7219->regmap, DA7219_ACCDET_IRQ_EVENT_A, 368 - events, DA7219_AAD_IRQ_REG_MAX); 367 + ret = regmap_bulk_read(da7219->regmap, DA7219_ACCDET_IRQ_EVENT_A, 368 + events, DA7219_AAD_IRQ_REG_MAX); 369 + if (ret) { 370 + dev_warn_ratelimited(component->dev, "Failed to read IRQ events: %d\n", ret); 371 + return IRQ_NONE; 372 + } 369 373 370 374 if (!events[DA7219_AAD_IRQ_REG_A] && !events[DA7219_AAD_IRQ_REG_B]) 371 375 return IRQ_NONE; ··· 948 944 } 949 945 } 950 946 } 947 + 948 + synchronize_irq(da7219_aad->irq); 951 949 } 952 950 953 951 void da7219_aad_resume(struct snd_soc_component *component)
+1 -1
sound/soc/codecs/es8316.c
··· 153 153 "dmic data at high level", 154 154 "dmic data at low level", 155 155 }; 156 - static const unsigned int es8316_dmic_values[] = { 0, 1, 2 }; 156 + static const unsigned int es8316_dmic_values[] = { 0, 2, 3 }; 157 157 static const struct soc_enum es8316_dmic_src_enum = 158 158 SOC_VALUE_ENUM_SINGLE(ES8316_ADC_DMIC, 0, 3, 159 159 ARRAY_SIZE(es8316_dmic_txt),
+41
sound/soc/codecs/nau8821.c
··· 10 10 #include <linux/acpi.h> 11 11 #include <linux/clk.h> 12 12 #include <linux/delay.h> 13 + #include <linux/dmi.h> 13 14 #include <linux/init.h> 14 15 #include <linux/i2c.h> 15 16 #include <linux/module.h> ··· 25 24 #include <sound/soc.h> 26 25 #include <sound/tlv.h> 27 26 #include "nau8821.h" 27 + 28 + #define NAU8821_JD_ACTIVE_HIGH BIT(0) 29 + 30 + static int nau8821_quirk; 31 + static int quirk_override = -1; 32 + module_param_named(quirk, quirk_override, uint, 0444); 33 + MODULE_PARM_DESC(quirk, "Board-specific quirk override"); 28 34 29 35 #define NAU_FREF_MAX 13500000 30 36 #define NAU_FVCO_MAX 100000000 ··· 1800 1792 return 0; 1801 1793 } 1802 1794 1795 + /* Please keep this list alphabetically sorted */ 1796 + static const struct dmi_system_id nau8821_quirk_table[] = { 1797 + { 1798 + /* Positivo CW14Q01P-V2 */ 1799 + .matches = { 1800 + DMI_MATCH(DMI_SYS_VENDOR, "Positivo Tecnologia SA"), 1801 + DMI_MATCH(DMI_BOARD_NAME, "CW14Q01P-V2"), 1802 + }, 1803 + .driver_data = (void *)(NAU8821_JD_ACTIVE_HIGH), 1804 + }, 1805 + {} 1806 + }; 1807 + 1808 + static void nau8821_check_quirks(void) 1809 + { 1810 + const struct dmi_system_id *dmi_id; 1811 + 1812 + if (quirk_override != -1) { 1813 + nau8821_quirk = quirk_override; 1814 + return; 1815 + } 1816 + 1817 + dmi_id = dmi_first_match(nau8821_quirk_table); 1818 + if (dmi_id) 1819 + nau8821_quirk = (unsigned long)dmi_id->driver_data; 1820 + } 1821 + 1803 1822 static int nau8821_i2c_probe(struct i2c_client *i2c) 1804 1823 { 1805 1824 struct device *dev = &i2c->dev; ··· 1847 1812 1848 1813 nau8821->dev = dev; 1849 1814 nau8821->irq = i2c->irq; 1815 + 1816 + nau8821_check_quirks(); 1817 + 1818 + if (nau8821_quirk & NAU8821_JD_ACTIVE_HIGH) 1819 + nau8821->jkdet_polarity = 0; 1820 + 1850 1821 nau8821_print_device_properties(nau8821); 1851 1822 1852 1823 nau8821_reset_chip(nau8821->regmap);
+8 -1
sound/soc/codecs/rt5682-sdw.c
··· 750 750 if (!rt5682->first_hw_init) 751 751 return 0; 752 752 753 - if (!slave->unattach_request) 753 + if (!slave->unattach_request) { 754 + if (rt5682->disable_irq == true) { 755 + mutex_lock(&rt5682->disable_irq_lock); 756 + sdw_write_no_pm(slave, SDW_SCP_INTMASK1, SDW_SCP_INT1_IMPL_DEF); 757 + rt5682->disable_irq = false; 758 + mutex_unlock(&rt5682->disable_irq_lock); 759 + } 754 760 goto regmap_sync; 761 + } 755 762 756 763 time = wait_for_completion_timeout(&slave->initialization_complete, 757 764 msecs_to_jiffies(RT5682_PROBE_TIMEOUT));
+9 -1
sound/soc/codecs/rt711-sdca-sdw.c
··· 438 438 if (!rt711->first_hw_init) 439 439 return 0; 440 440 441 - if (!slave->unattach_request) 441 + if (!slave->unattach_request) { 442 + if (rt711->disable_irq == true) { 443 + mutex_lock(&rt711->disable_irq_lock); 444 + sdw_write_no_pm(slave, SDW_SCP_SDCA_INTMASK1, SDW_SCP_SDCA_INTMASK_SDCA_0); 445 + sdw_write_no_pm(slave, SDW_SCP_SDCA_INTMASK2, SDW_SCP_SDCA_INTMASK_SDCA_8); 446 + rt711->disable_irq = false; 447 + mutex_unlock(&rt711->disable_irq_lock); 448 + } 442 449 goto regmap_sync; 450 + } 443 451 444 452 time = wait_for_completion_timeout(&slave->initialization_complete, 445 453 msecs_to_jiffies(RT711_PROBE_TIMEOUT));
+8 -1
sound/soc/codecs/rt711-sdw.c
··· 538 538 if (!rt711->first_hw_init) 539 539 return 0; 540 540 541 - if (!slave->unattach_request) 541 + if (!slave->unattach_request) { 542 + if (rt711->disable_irq == true) { 543 + mutex_lock(&rt711->disable_irq_lock); 544 + sdw_write_no_pm(slave, SDW_SCP_INTMASK1, SDW_SCP_INT1_IMPL_DEF); 545 + rt711->disable_irq = false; 546 + mutex_unlock(&rt711->disable_irq_lock); 547 + } 542 548 goto regmap_sync; 549 + } 543 550 544 551 time = wait_for_completion_timeout(&slave->initialization_complete, 545 552 msecs_to_jiffies(RT711_PROBE_TIMEOUT));
+9 -1
sound/soc/codecs/rt712-sdca-sdw.c
··· 438 438 if (!rt712->first_hw_init) 439 439 return 0; 440 440 441 - if (!slave->unattach_request) 441 + if (!slave->unattach_request) { 442 + if (rt712->disable_irq == true) { 443 + mutex_lock(&rt712->disable_irq_lock); 444 + sdw_write_no_pm(slave, SDW_SCP_SDCA_INTMASK1, SDW_SCP_SDCA_INTMASK_SDCA_0); 445 + sdw_write_no_pm(slave, SDW_SCP_SDCA_INTMASK2, SDW_SCP_SDCA_INTMASK_SDCA_8); 446 + rt712->disable_irq = false; 447 + mutex_unlock(&rt712->disable_irq_lock); 448 + } 442 449 goto regmap_sync; 450 + } 443 451 444 452 time = wait_for_completion_timeout(&slave->initialization_complete, 445 453 msecs_to_jiffies(RT712_PROBE_TIMEOUT));
+9 -1
sound/soc/codecs/rt722-sdca-sdw.c
··· 463 463 if (!rt722->first_hw_init) 464 464 return 0; 465 465 466 - if (!slave->unattach_request) 466 + if (!slave->unattach_request) { 467 + if (rt722->disable_irq == true) { 468 + mutex_lock(&rt722->disable_irq_lock); 469 + sdw_write_no_pm(slave, SDW_SCP_SDCA_INTMASK1, SDW_SCP_SDCA_INTMASK_SDCA_6); 470 + sdw_write_no_pm(slave, SDW_SCP_SDCA_INTMASK2, SDW_SCP_SDCA_INTMASK_SDCA_8); 471 + rt722->disable_irq = false; 472 + mutex_unlock(&rt722->disable_irq_lock); 473 + } 467 474 goto regmap_sync; 475 + } 468 476 469 477 time = wait_for_completion_timeout(&slave->initialization_complete, 470 478 msecs_to_jiffies(RT722_PROBE_TIMEOUT));
+3
sound/soc/codecs/wm8904.c
··· 2308 2308 regmap_update_bits(wm8904->regmap, WM8904_BIAS_CONTROL_0, 2309 2309 WM8904_POBCTRL, 0); 2310 2310 2311 + /* Fill the cache for the ADC test register */ 2312 + regmap_read(wm8904->regmap, WM8904_ADC_TEST_0, &val); 2313 + 2311 2314 /* Can leave the device powered off until we need it */ 2312 2315 regcache_cache_only(wm8904->regmap, true); 2313 2316 regulator_bulk_disable(ARRAY_SIZE(wm8904->supplies), wm8904->supplies);
+2
sound/soc/fsl/fsl_spdif.c
··· 751 751 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 752 752 regmap_update_bits(regmap, REG_SPDIF_SCR, dmaen, 0); 753 753 regmap_update_bits(regmap, REG_SPDIF_SIE, intr, 0); 754 + regmap_write(regmap, REG_SPDIF_STL, 0x0); 755 + regmap_write(regmap, REG_SPDIF_STR, 0x0); 754 756 break; 755 757 default: 756 758 return -EINVAL;
+14
sound/usb/mixer_maps.c
··· 374 374 { 0 } 375 375 }; 376 376 377 + /* Microsoft USB Link headset */ 378 + /* a guess work: raw playback volume values are from 2 to 129 */ 379 + static const struct usbmix_dB_map ms_usb_link_dB = { -3225, 0, true }; 380 + static const struct usbmix_name_map ms_usb_link_map[] = { 381 + { 9, NULL, .dB = &ms_usb_link_dB }, 382 + { 10, NULL }, /* Headset Capture volume; seems non-working, disabled */ 383 + { 0 } /* terminator */ 384 + }; 385 + 377 386 /* ASUS ROG Zenith II with Realtek ALC1220-VB */ 378 387 static const struct usbmix_name_map asus_zenith_ii_map[] = { 379 388 { 19, NULL, 12 }, /* FU, Input Gain Pad - broken response, disabled */ ··· 676 667 /* Sennheiser Communications Headset [PC 8] */ 677 668 .id = USB_ID(0x1395, 0x0025), 678 669 .map = sennheiser_pc8_map, 670 + }, 671 + { 672 + /* Microsoft USB Link headset */ 673 + .id = USB_ID(0x045e, 0x083c), 674 + .map = ms_usb_link_map, 679 675 }, 680 676 { 0 } /* terminator */ 681 677 };
+31 -6
sound/usb/quirks.c
··· 1876 1876 1877 1877 /* XMOS based USB DACs */ 1878 1878 switch (chip->usb_id) { 1879 - case USB_ID(0x1511, 0x0037): /* AURALiC VEGA */ 1880 - case USB_ID(0x21ed, 0xd75a): /* Accuphase DAC-60 option card */ 1879 + case USB_ID(0x139f, 0x5504): /* Nagra DAC */ 1880 + case USB_ID(0x20b1, 0x3089): /* Mola-Mola DAC */ 1881 + case USB_ID(0x2522, 0x0007): /* LH Labs Geek Out 1V5 */ 1882 + case USB_ID(0x2522, 0x0009): /* LH Labs Geek Pulse X Inifinity 2V0 */ 1881 1883 case USB_ID(0x2522, 0x0012): /* LH Labs VI DAC Infinity */ 1882 1884 case USB_ID(0x2772, 0x0230): /* Pro-Ject Pre Box S2 Digital */ 1883 1885 if (fp->altsetting == 2) ··· 1889 1887 case USB_ID(0x0d8c, 0x0316): /* Hegel HD12 DSD */ 1890 1888 case USB_ID(0x10cb, 0x0103): /* The Bit Opus #3; with fp->dsd_raw */ 1891 1889 case USB_ID(0x16d0, 0x06b2): /* NuPrime DAC-10 */ 1892 - case USB_ID(0x16d0, 0x09dd): /* Encore mDSD */ 1890 + case USB_ID(0x16d0, 0x06b4): /* NuPrime Audio HD-AVP/AVA */ 1893 1891 case USB_ID(0x16d0, 0x0733): /* Furutech ADL Stratos */ 1892 + case USB_ID(0x16d0, 0x09d8): /* NuPrime IDA-8 */ 1894 1893 case USB_ID(0x16d0, 0x09db): /* NuPrime Audio DAC-9 */ 1894 + case USB_ID(0x16d0, 0x09dd): /* Encore mDSD */ 1895 1895 case USB_ID(0x1db5, 0x0003): /* Bryston BDA3 */ 1896 + case USB_ID(0x20a0, 0x4143): /* WaveIO USB Audio 2.0 */ 1896 1897 case USB_ID(0x22e1, 0xca01): /* HDTA Serenade DSD */ 1897 1898 case USB_ID(0x249c, 0x9326): /* M2Tech Young MkIII */ 1898 1899 case USB_ID(0x2616, 0x0106): /* PS Audio NuWave DAC */ 1899 1900 case USB_ID(0x2622, 0x0041): /* Audiolab M-DAC+ */ 1901 + case USB_ID(0x278b, 0x5100): /* Rotel RC-1590 */ 1900 1902 case USB_ID(0x27f7, 0x3002): /* W4S DAC-2v2SE */ 1901 1903 case USB_ID(0x29a2, 0x0086): /* Mutec MC3+ USB */ 1902 1904 case USB_ID(0x6b42, 0x0042): /* MSB Technology */ ··· 1910 1904 1911 1905 /* Amanero Combo384 USB based DACs with native DSD support */ 1912 1906 case USB_ID(0x16d0, 0x071a): /* Amanero - Combo384 */ 1913 - case USB_ID(0x2ab6, 0x0004): /* T+A DAC8DSD-V2.0, MP1000E-V2.0, MP2000R-V2.0, MP2500R-V2.0, MP3100HV-V2.0 */ 1914 - case USB_ID(0x2ab6, 0x0005): /* T+A USB HD Audio 1 */ 1915 - case USB_ID(0x2ab6, 0x0006): /* T+A USB HD Audio 2 */ 1916 1907 if (fp->altsetting == 2) { 1917 1908 switch (le16_to_cpu(chip->dev->descriptor.bcdDevice)) { 1918 1909 case 0x199: ··· 2016 2013 QUIRK_FLAG_IGNORE_CTL_ERROR), 2017 2014 DEVICE_FLG(0x041e, 0x4080, /* Creative Live Cam VF0610 */ 2018 2015 QUIRK_FLAG_GET_SAMPLE_RATE), 2016 + DEVICE_FLG(0x045e, 0x083c, /* MS USB Link headset */ 2017 + QUIRK_FLAG_GET_SAMPLE_RATE | QUIRK_FLAG_CTL_MSG_DELAY | 2018 + QUIRK_FLAG_DISABLE_AUTOSUSPEND), 2019 2019 DEVICE_FLG(0x046d, 0x084c, /* Logitech ConferenceCam Connect */ 2020 2020 QUIRK_FLAG_GET_SAMPLE_RATE | QUIRK_FLAG_CTL_MSG_DELAY_1M), 2021 2021 DEVICE_FLG(0x046d, 0x0991, /* Logitech QuickCam Pro */ ··· 2054 2048 QUIRK_FLAG_IFACE_DELAY), 2055 2049 DEVICE_FLG(0x0644, 0x805f, /* TEAC Model 12 */ 2056 2050 QUIRK_FLAG_FORCE_IFACE_RESET), 2051 + DEVICE_FLG(0x0644, 0x806b, /* TEAC UD-701 */ 2052 + QUIRK_FLAG_ITF_USB_DSD_DAC | QUIRK_FLAG_CTL_MSG_DELAY | 2053 + QUIRK_FLAG_IFACE_DELAY), 2057 2054 DEVICE_FLG(0x06f8, 0xb000, /* Hercules DJ Console (Windows Edition) */ 2058 2055 QUIRK_FLAG_IGNORE_CTL_ERROR), 2059 2056 DEVICE_FLG(0x06f8, 0xd002, /* Hercules DJ Console (Macintosh Edition) */ ··· 2095 2086 QUIRK_FLAG_ITF_USB_DSD_DAC | QUIRK_FLAG_CTL_MSG_DELAY), 2096 2087 DEVICE_FLG(0x154e, 0x3006, /* Marantz SA-14S1 */ 2097 2088 QUIRK_FLAG_ITF_USB_DSD_DAC | QUIRK_FLAG_CTL_MSG_DELAY), 2089 + DEVICE_FLG(0x154e, 0x300b, /* Marantz SA-KI RUBY / SA-12 */ 2090 + QUIRK_FLAG_DSD_RAW), 2098 2091 DEVICE_FLG(0x154e, 0x500e, /* Denon DN-X1600 */ 2099 2092 QUIRK_FLAG_IGNORE_CLOCK_SOURCE), 2100 2093 DEVICE_FLG(0x1686, 0x00dd, /* Zoom R16/24 */ ··· 2141 2130 QUIRK_FLAG_SHARE_MEDIA_DEVICE | QUIRK_FLAG_ALIGN_TRANSFER), 2142 2131 DEVICE_FLG(0x21b4, 0x0081, /* AudioQuest DragonFly */ 2143 2132 QUIRK_FLAG_GET_SAMPLE_RATE), 2133 + DEVICE_FLG(0x21b4, 0x0230, /* Ayre QB-9 Twenty */ 2134 + QUIRK_FLAG_DSD_RAW), 2135 + DEVICE_FLG(0x21b4, 0x0232, /* Ayre QX-5 Twenty */ 2136 + QUIRK_FLAG_DSD_RAW), 2144 2137 DEVICE_FLG(0x2522, 0x0007, /* LH Labs Geek Out HD Audio 1V5 */ 2145 2138 QUIRK_FLAG_SET_IFACE_FIRST), 2146 2139 DEVICE_FLG(0x2708, 0x0002, /* Audient iD14 */ ··· 2187 2172 QUIRK_FLAG_VALIDATE_RATES), 2188 2173 VENDOR_FLG(0x1235, /* Focusrite Novation */ 2189 2174 QUIRK_FLAG_VALIDATE_RATES), 2175 + VENDOR_FLG(0x1511, /* AURALiC */ 2176 + QUIRK_FLAG_DSD_RAW), 2190 2177 VENDOR_FLG(0x152a, /* Thesycon devices */ 2178 + QUIRK_FLAG_DSD_RAW), 2179 + VENDOR_FLG(0x18d1, /* iBasso devices */ 2191 2180 QUIRK_FLAG_DSD_RAW), 2192 2181 VENDOR_FLG(0x1de7, /* Phoenix Audio */ 2193 2182 QUIRK_FLAG_GET_SAMPLE_RATE), 2194 2183 VENDOR_FLG(0x20b1, /* XMOS based devices */ 2184 + QUIRK_FLAG_DSD_RAW), 2185 + VENDOR_FLG(0x21ed, /* Accuphase Laboratory */ 2195 2186 QUIRK_FLAG_DSD_RAW), 2196 2187 VENDOR_FLG(0x22d9, /* Oppo */ 2197 2188 QUIRK_FLAG_DSD_RAW), ··· 2214 2193 QUIRK_FLAG_DSD_RAW), 2215 2194 VENDOR_FLG(0x2ab6, /* T+A devices */ 2216 2195 QUIRK_FLAG_DSD_RAW), 2196 + VENDOR_FLG(0x2d87, /* Cayin device */ 2197 + QUIRK_FLAG_DSD_RAW), 2217 2198 VENDOR_FLG(0x3336, /* HEM devices */ 2218 2199 QUIRK_FLAG_DSD_RAW), 2219 2200 VENDOR_FLG(0x3353, /* Khadas devices */ 2201 + QUIRK_FLAG_DSD_RAW), 2202 + VENDOR_FLG(0x35f4, /* MSB Technology */ 2220 2203 QUIRK_FLAG_DSD_RAW), 2221 2204 VENDOR_FLG(0x3842, /* EVGA */ 2222 2205 QUIRK_FLAG_DSD_RAW),
-4
tools/testing/cxl/test/cxl.c
··· 999 999 #define SZ_64G (SZ_32G * 2) 1000 1000 #endif 1001 1001 1002 - #ifndef SZ_512G 1003 - #define SZ_512G (SZ_64G * 8) 1004 - #endif 1005 - 1006 1002 static __init int cxl_rch_init(void) 1007 1003 { 1008 1004 int rc, i;
+1 -1
tools/testing/selftests/ftrace/test.d/dynevent/add_remove_btfarg.tc
··· 13 13 FPROBES=yes 14 14 fi 15 15 16 - if [ -z "$KPROBES" -a "$FPROBES" ] ; then 16 + if [ -z "$KPROBES" -a -z "$FPROBES" ] ; then 17 17 exit_unsupported 18 18 fi 19 19
+4 -2
tools/testing/selftests/kvm/include/kvm_util_base.h
··· 362 362 { 363 363 ssize_t ret; 364 364 365 - ret = read(stats_fd, header, sizeof(*header)); 366 - TEST_ASSERT(ret == sizeof(*header), "Read stats header"); 365 + ret = pread(stats_fd, header, sizeof(*header), 0); 366 + TEST_ASSERT(ret == sizeof(*header), 367 + "Failed to read '%lu' header bytes, ret = '%ld'", 368 + sizeof(*header), ret); 367 369 } 368 370 369 371 struct kvm_stats_desc *read_stats_descriptors(int stats_fd,
+45 -23
tools/testing/selftests/kvm/kvm_binary_stats_test.c
··· 43 43 id = malloc(header.name_size); 44 44 TEST_ASSERT(id, "Allocate memory for id string"); 45 45 46 - ret = read(stats_fd, id, header.name_size); 47 - TEST_ASSERT(ret == header.name_size, "Read id string"); 46 + ret = pread(stats_fd, id, header.name_size, sizeof(header)); 47 + TEST_ASSERT(ret == header.name_size, 48 + "Expected header size '%u', read '%lu' bytes", 49 + header.name_size, ret); 48 50 49 51 /* Check id string, that should start with "kvm" */ 50 52 TEST_ASSERT(!strncmp(id, "kvm", 3) && strlen(id) < header.name_size, ··· 167 165 free(stats_data); 168 166 free(stats_desc); 169 167 free(id); 170 - } 171 168 172 - 173 - static void vm_stats_test(struct kvm_vm *vm) 174 - { 175 - int stats_fd = vm_get_stats_fd(vm); 176 - 177 - stats_test(stats_fd); 178 - close(stats_fd); 179 - TEST_ASSERT(fcntl(stats_fd, F_GETFD) == -1, "Stats fd not freed"); 180 - } 181 - 182 - static void vcpu_stats_test(struct kvm_vcpu *vcpu) 183 - { 184 - int stats_fd = vcpu_get_stats_fd(vcpu); 185 - 186 - stats_test(stats_fd); 187 169 close(stats_fd); 188 170 TEST_ASSERT(fcntl(stats_fd, F_GETFD) == -1, "Stats fd not freed"); 189 171 } ··· 185 199 186 200 int main(int argc, char *argv[]) 187 201 { 202 + int vm_stats_fds, *vcpu_stats_fds; 188 203 int i, j; 189 204 struct kvm_vcpu **vcpus; 190 205 struct kvm_vm **vms; ··· 218 231 vcpus = malloc(sizeof(struct kvm_vcpu *) * max_vm * max_vcpu); 219 232 TEST_ASSERT(vcpus, "Allocate memory for storing vCPU pointers"); 220 233 234 + /* 235 + * Not per-VM as the array is populated, used, and invalidated within a 236 + * single for-loop iteration. 237 + */ 238 + vcpu_stats_fds = calloc(max_vm, sizeof(*vcpu_stats_fds)); 239 + TEST_ASSERT(vcpu_stats_fds, "Allocate memory for VM stats fds"); 240 + 221 241 for (i = 0; i < max_vm; ++i) { 222 242 vms[i] = vm_create_barebones(); 223 243 for (j = 0; j < max_vcpu; ++j) 224 244 vcpus[i * max_vcpu + j] = __vm_vcpu_add(vms[i], j); 225 245 } 226 246 227 - /* Check stats read for every VM and VCPU */ 247 + /* 248 + * Check stats read for every VM and vCPU, with a variety of flavors. 249 + * Note, stats_test() closes the passed in stats fd. 250 + */ 228 251 for (i = 0; i < max_vm; ++i) { 229 - vm_stats_test(vms[i]); 252 + /* 253 + * Verify that creating multiple userspace references to a 254 + * single stats file works and doesn't cause explosions. 255 + */ 256 + vm_stats_fds = vm_get_stats_fd(vms[i]); 257 + stats_test(dup(vm_stats_fds)); 258 + 259 + /* Verify userspace can instantiate multiple stats files. */ 260 + stats_test(vm_get_stats_fd(vms[i])); 261 + 262 + for (j = 0; j < max_vcpu; ++j) { 263 + vcpu_stats_fds[j] = vcpu_get_stats_fd(vcpus[i * max_vcpu + j]); 264 + stats_test(dup(vcpu_stats_fds[j])); 265 + stats_test(vcpu_get_stats_fd(vcpus[i * max_vcpu + j])); 266 + } 267 + 268 + /* 269 + * Close the VM fd and redo the stats tests. KVM should gift a 270 + * reference (to the VM) to each stats fd, i.e. stats should 271 + * still be accessible even after userspace has put its last 272 + * _direct_ reference to the VM. 273 + */ 274 + kvm_vm_free(vms[i]); 275 + 276 + stats_test(vm_stats_fds); 230 277 for (j = 0; j < max_vcpu; ++j) 231 - vcpu_stats_test(vcpus[i * max_vcpu + j]); 278 + stats_test(vcpu_stats_fds[j]); 279 + 232 280 ksft_test_result_pass("vm%i\n", i); 233 281 } 234 282 235 - for (i = 0; i < max_vm; ++i) 236 - kvm_vm_free(vms[i]); 237 283 free(vms); 284 + free(vcpus); 285 + free(vcpu_stats_fds); 238 286 239 287 ksft_finished(); /* Print results and exit() accordingly */ 240 288 }
+39 -31
tools/testing/selftests/kvm/x86_64/set_sregs_test.c
··· 22 22 #include "kvm_util.h" 23 23 #include "processor.h" 24 24 25 - static void test_cr4_feature_bit(struct kvm_vcpu *vcpu, struct kvm_sregs *orig, 26 - uint64_t feature_bit) 27 - { 28 - struct kvm_sregs sregs; 29 - int rc; 30 - 31 - /* Skip the sub-test, the feature is supported. */ 32 - if (orig->cr4 & feature_bit) 33 - return; 34 - 35 - memcpy(&sregs, orig, sizeof(sregs)); 36 - sregs.cr4 |= feature_bit; 37 - 38 - rc = _vcpu_sregs_set(vcpu, &sregs); 39 - TEST_ASSERT(rc, "KVM allowed unsupported CR4 bit (0x%lx)", feature_bit); 40 - 41 - /* Sanity check that KVM didn't change anything. */ 42 - vcpu_sregs_get(vcpu, &sregs); 43 - TEST_ASSERT(!memcmp(&sregs, orig, sizeof(sregs)), "KVM modified sregs"); 44 - } 25 + #define TEST_INVALID_CR_BIT(vcpu, cr, orig, bit) \ 26 + do { \ 27 + struct kvm_sregs new; \ 28 + int rc; \ 29 + \ 30 + /* Skip the sub-test, the feature/bit is supported. */ \ 31 + if (orig.cr & bit) \ 32 + break; \ 33 + \ 34 + memcpy(&new, &orig, sizeof(sregs)); \ 35 + new.cr |= bit; \ 36 + \ 37 + rc = _vcpu_sregs_set(vcpu, &new); \ 38 + TEST_ASSERT(rc, "KVM allowed invalid " #cr " bit (0x%lx)", bit); \ 39 + \ 40 + /* Sanity check that KVM didn't change anything. */ \ 41 + vcpu_sregs_get(vcpu, &new); \ 42 + TEST_ASSERT(!memcmp(&new, &orig, sizeof(new)), "KVM modified sregs"); \ 43 + } while (0) 45 44 46 45 static uint64_t calc_supported_cr4_feature_bits(void) 47 46 { ··· 79 80 struct kvm_vcpu *vcpu; 80 81 struct kvm_vm *vm; 81 82 uint64_t cr4; 82 - int rc; 83 + int rc, i; 83 84 84 85 /* 85 86 * Create a dummy VM, specifically to avoid doing KVM_SET_CPUID2, and ··· 91 92 92 93 vcpu_sregs_get(vcpu, &sregs); 93 94 95 + sregs.cr0 = 0; 94 96 sregs.cr4 |= calc_supported_cr4_feature_bits(); 95 97 cr4 = sregs.cr4; 96 98 ··· 103 103 sregs.cr4, cr4); 104 104 105 105 /* Verify all unsupported features are rejected by KVM. */ 106 - test_cr4_feature_bit(vcpu, &sregs, X86_CR4_UMIP); 107 - test_cr4_feature_bit(vcpu, &sregs, X86_CR4_LA57); 108 - test_cr4_feature_bit(vcpu, &sregs, X86_CR4_VMXE); 109 - test_cr4_feature_bit(vcpu, &sregs, X86_CR4_SMXE); 110 - test_cr4_feature_bit(vcpu, &sregs, X86_CR4_FSGSBASE); 111 - test_cr4_feature_bit(vcpu, &sregs, X86_CR4_PCIDE); 112 - test_cr4_feature_bit(vcpu, &sregs, X86_CR4_OSXSAVE); 113 - test_cr4_feature_bit(vcpu, &sregs, X86_CR4_SMEP); 114 - test_cr4_feature_bit(vcpu, &sregs, X86_CR4_SMAP); 115 - test_cr4_feature_bit(vcpu, &sregs, X86_CR4_PKE); 106 + TEST_INVALID_CR_BIT(vcpu, cr4, sregs, X86_CR4_UMIP); 107 + TEST_INVALID_CR_BIT(vcpu, cr4, sregs, X86_CR4_LA57); 108 + TEST_INVALID_CR_BIT(vcpu, cr4, sregs, X86_CR4_VMXE); 109 + TEST_INVALID_CR_BIT(vcpu, cr4, sregs, X86_CR4_SMXE); 110 + TEST_INVALID_CR_BIT(vcpu, cr4, sregs, X86_CR4_FSGSBASE); 111 + TEST_INVALID_CR_BIT(vcpu, cr4, sregs, X86_CR4_PCIDE); 112 + TEST_INVALID_CR_BIT(vcpu, cr4, sregs, X86_CR4_OSXSAVE); 113 + TEST_INVALID_CR_BIT(vcpu, cr4, sregs, X86_CR4_SMEP); 114 + TEST_INVALID_CR_BIT(vcpu, cr4, sregs, X86_CR4_SMAP); 115 + TEST_INVALID_CR_BIT(vcpu, cr4, sregs, X86_CR4_PKE); 116 + 117 + for (i = 32; i < 64; i++) 118 + TEST_INVALID_CR_BIT(vcpu, cr0, sregs, BIT(i)); 119 + 120 + /* NW without CD is illegal, as is PG without PE. */ 121 + TEST_INVALID_CR_BIT(vcpu, cr0, sregs, X86_CR0_NW); 122 + TEST_INVALID_CR_BIT(vcpu, cr0, sregs, X86_CR0_PG); 123 + 116 124 kvm_vm_free(vm); 117 125 118 126 /* Create a "real" VM and verify APIC_BASE can be set. */
+1 -1
tools/testing/selftests/net/so_incoming_cpu.c
··· 159 159 /* Make sure SYN will be processed on the i-th CPU 160 160 * and finally distributed to the i-th listener. 161 161 */ 162 - sched_setaffinity(0, sizeof(cpu_set), &cpu_set); 162 + ret = sched_setaffinity(0, sizeof(cpu_set), &cpu_set); 163 163 ASSERT_EQ(ret, 0); 164 164 165 165 for (j = 0; j < CLIENT_PER_SERVER; j++) {
+22 -6
tools/testing/selftests/rseq/rseq.c
··· 34 34 #include "../kselftest.h" 35 35 #include "rseq.h" 36 36 37 - static const ptrdiff_t *libc_rseq_offset_p; 38 - static const unsigned int *libc_rseq_size_p; 39 - static const unsigned int *libc_rseq_flags_p; 37 + /* 38 + * Define weak versions to play nice with binaries that are statically linked 39 + * against a libc that doesn't support registering its own rseq. 40 + */ 41 + __weak ptrdiff_t __rseq_offset; 42 + __weak unsigned int __rseq_size; 43 + __weak unsigned int __rseq_flags; 44 + 45 + static const ptrdiff_t *libc_rseq_offset_p = &__rseq_offset; 46 + static const unsigned int *libc_rseq_size_p = &__rseq_size; 47 + static const unsigned int *libc_rseq_flags_p = &__rseq_flags; 40 48 41 49 /* Offset from the thread pointer to the rseq area. */ 42 50 ptrdiff_t rseq_offset; ··· 163 155 static __attribute__((constructor)) 164 156 void rseq_init(void) 165 157 { 166 - libc_rseq_offset_p = dlsym(RTLD_NEXT, "__rseq_offset"); 167 - libc_rseq_size_p = dlsym(RTLD_NEXT, "__rseq_size"); 168 - libc_rseq_flags_p = dlsym(RTLD_NEXT, "__rseq_flags"); 158 + /* 159 + * If the libc's registered rseq size isn't already valid, it may be 160 + * because the binary is dynamically linked and not necessarily due to 161 + * libc not having registered a restartable sequence. Try to find the 162 + * symbols if that's the case. 163 + */ 164 + if (!*libc_rseq_size_p) { 165 + libc_rseq_offset_p = dlsym(RTLD_NEXT, "__rseq_offset"); 166 + libc_rseq_size_p = dlsym(RTLD_NEXT, "__rseq_size"); 167 + libc_rseq_flags_p = dlsym(RTLD_NEXT, "__rseq_flags"); 168 + } 169 169 if (libc_rseq_size_p && libc_rseq_offset_p && libc_rseq_flags_p && 170 170 *libc_rseq_size_p != 0) { 171 171 /* rseq registration owned by glibc */
+25
tools/testing/selftests/tc-testing/tc-tests/qdiscs/taprio.json
··· 131 131 "teardown": [ 132 132 "echo \"1\" > /sys/bus/netdevsim/del_device" 133 133 ] 134 + }, 135 + { 136 + "id": "3e1e", 137 + "name": "Add taprio Qdisc with an invalid cycle-time", 138 + "category": [ 139 + "qdisc", 140 + "taprio" 141 + ], 142 + "plugins": { 143 + "requires": "nsPlugin" 144 + }, 145 + "setup": [ 146 + "echo \"1 1 8\" > /sys/bus/netdevsim/new_device", 147 + "$TC qdisc add dev $ETH root handle 1: taprio num_tc 3 map 2 2 1 0 2 2 2 2 2 2 2 2 2 2 2 2 queues 1@0 1@0 1@0 base-time 1000000000 sched-entry S 01 300000 flags 0x1 clockid CLOCK_TAI cycle-time 4294967296 || /bin/true", 148 + "$IP link set dev $ETH up", 149 + "$IP addr add 10.10.10.10/24 dev $ETH" 150 + ], 151 + "cmdUnderTest": "/bin/true", 152 + "expExitCode": "0", 153 + "verifyCmd": "$TC qdisc show dev $ETH", 154 + "matchPattern": "qdisc taprio 1: root refcnt", 155 + "matchCount": "0", 156 + "teardown": [ 157 + "echo \"1\" > /sys/bus/netdevsim/del_device" 158 + ] 134 159 } 135 160 ]
+1 -1
tools/testing/vsock/Makefile
··· 8 8 CFLAGS += -g -O2 -Werror -Wall -I. -I../../include -I../../../usr/include -Wno-pointer-sign -fno-strict-overflow -fno-strict-aliasing -fno-common -MMD -U_FORTIFY_SOURCE -D_GNU_SOURCE 9 9 .PHONY: all test clean 10 10 clean: 11 - ${RM} *.o *.d vsock_test vsock_diag_test 11 + ${RM} *.o *.d vsock_test vsock_diag_test vsock_perf 12 12 -include *.d
+24
virt/kvm/kvm_main.c
··· 4035 4035 sizeof(vcpu->stat), user_buffer, size, offset); 4036 4036 } 4037 4037 4038 + static int kvm_vcpu_stats_release(struct inode *inode, struct file *file) 4039 + { 4040 + struct kvm_vcpu *vcpu = file->private_data; 4041 + 4042 + kvm_put_kvm(vcpu->kvm); 4043 + return 0; 4044 + } 4045 + 4038 4046 static const struct file_operations kvm_vcpu_stats_fops = { 4039 4047 .read = kvm_vcpu_stats_read, 4048 + .release = kvm_vcpu_stats_release, 4040 4049 .llseek = noop_llseek, 4041 4050 }; 4042 4051 ··· 4066 4057 put_unused_fd(fd); 4067 4058 return PTR_ERR(file); 4068 4059 } 4060 + 4061 + kvm_get_kvm(vcpu->kvm); 4062 + 4069 4063 file->f_mode |= FMODE_PREAD; 4070 4064 fd_install(fd, file); 4071 4065 ··· 4713 4701 sizeof(kvm->stat), user_buffer, size, offset); 4714 4702 } 4715 4703 4704 + static int kvm_vm_stats_release(struct inode *inode, struct file *file) 4705 + { 4706 + struct kvm *kvm = file->private_data; 4707 + 4708 + kvm_put_kvm(kvm); 4709 + return 0; 4710 + } 4711 + 4716 4712 static const struct file_operations kvm_vm_stats_fops = { 4717 4713 .read = kvm_vm_stats_read, 4714 + .release = kvm_vm_stats_release, 4718 4715 .llseek = noop_llseek, 4719 4716 }; 4720 4717 ··· 4742 4721 put_unused_fd(fd); 4743 4722 return PTR_ERR(file); 4744 4723 } 4724 + 4725 + kvm_get_kvm(kvm); 4726 + 4745 4727 file->f_mode |= FMODE_PREAD; 4746 4728 fd_install(fd, file); 4747 4729