Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
"A small batch of fixes this week, mostly OMAP related. Nothing stands
out as particularly controversial.

Also a fix for a 3.12-rc1 timer regression for Exynos platforms,
including the Chromebooks"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: exynos: dts: Update 5250 arch timer node with clock frequency
ARM: OMAP2: RX-51: Add missing max_current to rx51_lp5523_led_config
ARM: mach-omap2: board-generic: fix undefined symbol
ARM: dts: Fix pinctrl mask for omap3
ARM: OMAP3: Fix hardware detection for omap3630 when booted with device tree
ARM: OMAP2: gpmc-onenand: fix sync mode setup with DT

Changed files
+50 -12
arch
include
dt-bindings
pinctrl
+5
arch/arm/boot/dts/exynos5250.dtsi
··· 96 96 <1 14 0xf08>, 97 97 <1 11 0xf08>, 98 98 <1 10 0xf08>; 99 + /* Unfortunately we need this since some versions of U-Boot 100 + * on Exynos don't set the CNTFRQ register, so we need the 101 + * value from DT. 102 + */ 103 + clock-frequency = <24000000>; 99 104 }; 100 105 101 106 mct@101C0000 {
+1 -1
arch/arm/boot/dts/omap3-beagle-xm.dts
··· 11 11 12 12 / { 13 13 model = "TI OMAP3 BeagleBoard xM"; 14 - compatible = "ti,omap3-beagle-xm", "ti,omap3-beagle", "ti,omap3"; 14 + compatible = "ti,omap3-beagle-xm", "ti,omap36xx", "ti,omap3"; 15 15 16 16 cpus { 17 17 cpu@0 {
+2 -2
arch/arm/boot/dts/omap3.dtsi
··· 108 108 #address-cells = <1>; 109 109 #size-cells = <0>; 110 110 pinctrl-single,register-width = <16>; 111 - pinctrl-single,function-mask = <0x7f1f>; 111 + pinctrl-single,function-mask = <0xff1f>; 112 112 }; 113 113 114 114 omap3_pmx_wkup: pinmux@0x48002a00 { ··· 117 117 #address-cells = <1>; 118 118 #size-cells = <0>; 119 119 pinctrl-single,register-width = <16>; 120 - pinctrl-single,function-mask = <0x7f1f>; 120 + pinctrl-single,function-mask = <0xff1f>; 121 121 }; 122 122 123 123 gpio1: gpio@48310000 {
+18
arch/arm/mach-omap2/board-generic.c
··· 129 129 .restart = omap3xxx_restart, 130 130 MACHINE_END 131 131 132 + static const char *omap36xx_boards_compat[] __initdata = { 133 + "ti,omap36xx", 134 + NULL, 135 + }; 136 + 137 + DT_MACHINE_START(OMAP36XX_DT, "Generic OMAP36xx (Flattened Device Tree)") 138 + .reserve = omap_reserve, 139 + .map_io = omap3_map_io, 140 + .init_early = omap3630_init_early, 141 + .init_irq = omap_intc_of_init, 142 + .handle_irq = omap3_intc_handle_irq, 143 + .init_machine = omap_generic_init, 144 + .init_late = omap3_init_late, 145 + .init_time = omap3_sync32k_timer_init, 146 + .dt_compat = omap36xx_boards_compat, 147 + .restart = omap3xxx_restart, 148 + MACHINE_END 149 + 132 150 static const char *omap3_gp_boards_compat[] __initdata = { 133 151 "ti,omap3-beagle", 134 152 "timll,omap3-devkit8000",
+9
arch/arm/mach-omap2/board-rx51-peripherals.c
··· 167 167 .name = "lp5523:kb1", 168 168 .chan_nr = 0, 169 169 .led_current = 50, 170 + .max_current = 100, 170 171 }, { 171 172 .name = "lp5523:kb2", 172 173 .chan_nr = 1, 173 174 .led_current = 50, 175 + .max_current = 100, 174 176 }, { 175 177 .name = "lp5523:kb3", 176 178 .chan_nr = 2, 177 179 .led_current = 50, 180 + .max_current = 100, 178 181 }, { 179 182 .name = "lp5523:kb4", 180 183 .chan_nr = 3, 181 184 .led_current = 50, 185 + .max_current = 100, 182 186 }, { 183 187 .name = "lp5523:b", 184 188 .chan_nr = 4, 185 189 .led_current = 50, 190 + .max_current = 100, 186 191 }, { 187 192 .name = "lp5523:g", 188 193 .chan_nr = 5, 189 194 .led_current = 50, 195 + .max_current = 100, 190 196 }, { 191 197 .name = "lp5523:r", 192 198 .chan_nr = 6, 193 199 .led_current = 50, 200 + .max_current = 100, 194 201 }, { 195 202 .name = "lp5523:kb5", 196 203 .chan_nr = 7, 197 204 .led_current = 50, 205 + .max_current = 100, 198 206 }, { 199 207 .name = "lp5523:kb6", 200 208 .chan_nr = 8, 201 209 .led_current = 50, 210 + .max_current = 100, 202 211 } 203 212 }; 204 213
+11 -1
arch/arm/mach-omap2/gpmc-onenand.c
··· 272 272 struct gpmc_timings t; 273 273 int ret; 274 274 275 - if (gpmc_onenand_data->of_node) 275 + if (gpmc_onenand_data->of_node) { 276 276 gpmc_read_settings_dt(gpmc_onenand_data->of_node, 277 277 &onenand_async); 278 + if (onenand_async.sync_read || onenand_async.sync_write) { 279 + if (onenand_async.sync_write) 280 + gpmc_onenand_data->flags |= 281 + ONENAND_SYNC_READWRITE; 282 + else 283 + gpmc_onenand_data->flags |= ONENAND_SYNC_READ; 284 + onenand_async.sync_read = false; 285 + onenand_async.sync_write = false; 286 + } 287 + } 278 288 279 289 omap2_onenand_set_async_mode(onenand_base); 280 290
+1 -3
arch/arm/mach-omap2/mux.h
··· 28 28 #define OMAP_PULL_UP (1 << 4) 29 29 #define OMAP_ALTELECTRICALSEL (1 << 5) 30 30 31 - /* 34xx specific mux bit defines */ 31 + /* omap3/4/5 specific mux bit defines */ 32 32 #define OMAP_INPUT_EN (1 << 8) 33 33 #define OMAP_OFF_EN (1 << 9) 34 34 #define OMAP_OFFOUT_EN (1 << 10) ··· 36 36 #define OMAP_OFF_PULL_EN (1 << 12) 37 37 #define OMAP_OFF_PULL_UP (1 << 13) 38 38 #define OMAP_WAKEUP_EN (1 << 14) 39 - 40 - /* 44xx specific mux bit defines */ 41 39 #define OMAP_WAKEUP_EVENT (1 << 15) 42 40 43 41 /* Active pin states */
+2 -2
arch/arm/mach-omap2/timer.c
··· 628 628 #endif /* CONFIG_HAVE_ARM_TWD */ 629 629 #endif /* CONFIG_ARCH_OMAP4 */ 630 630 631 - #ifdef CONFIG_SOC_OMAP5 631 + #if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX) 632 632 void __init omap5_realtime_timer_init(void) 633 633 { 634 634 omap4_sync32k_timer_init(); ··· 636 636 637 637 clocksource_of_init(); 638 638 } 639 - #endif /* CONFIG_SOC_OMAP5 */ 639 + #endif /* CONFIG_SOC_OMAP5 || CONFIG_SOC_DRA7XX */ 640 640 641 641 /** 642 642 * omap_timer_init - build and register timer device with an
+1 -3
include/dt-bindings/pinctrl/omap.h
··· 23 23 #define PULL_UP (1 << 4) 24 24 #define ALTELECTRICALSEL (1 << 5) 25 25 26 - /* 34xx specific mux bit defines */ 26 + /* omap3/4/5 specific mux bit defines */ 27 27 #define INPUT_EN (1 << 8) 28 28 #define OFF_EN (1 << 9) 29 29 #define OFFOUT_EN (1 << 10) ··· 31 31 #define OFF_PULL_EN (1 << 12) 32 32 #define OFF_PULL_UP (1 << 13) 33 33 #define WAKEUP_EN (1 << 14) 34 - 35 - /* 44xx specific mux bit defines */ 36 34 #define WAKEUP_EVENT (1 << 15) 37 35 38 36 /* Active pin states */