tjh.dev / kernel
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ARM/serial: at91: switch atmel serial to use gpiolib

This passes the errata fix using a GPIO to control the RTS pin
on one of the AT91 chips to use gpiolib instead of the
AT91-specific interfaces. Also remove the reliance on
compile-time #defines and the cpu_* check and rely on the
platform passing down the proper GPIO pin through platform
data.

This is a prerequisite for getting rid of the local GPIO
implementation in the AT91 platform and move toward
multiplatform.

The patch also adds device tree support for getting the
RTS GPIO pin from the device tree on DT boot paths.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>

authored by

Linus Walleij and committed by
Uwe Kleine-König 354e57f3 6a79799d

+68 -20
+3
Documentation/devicetree/bindings/serial/atmel-usart.txt
··· 10 10 Optional properties: 11 11 - atmel,use-dma-rx: use of PDC or DMA for receiving data 12 12 - atmel,use-dma-tx: use of PDC or DMA for transmitting data 13 + - rts-gpios: specify a GPIO for RTS line. It will use specified PIO instead of the peripheral 14 + function pin for the USART RTS feature. If unsure, don't specify this property. 13 15 - add dma bindings for dma transfer: 14 16 - dmas: DMA specifier, consisting of a phandle to DMA controller node, 15 17 memory peripheral interface and USART DMA channel ID, FIFO configuration. ··· 30 28 interrupts = <7>; 31 29 atmel,use-dma-rx; 32 30 atmel,use-dma-tx; 31 + rts-gpios = <&pioD 15 0>; 33 32 }; 34 33 35 34 - use DMA:
+8 -2
arch/arm/mach-at91/at91rm9200_devices.c
··· 922 922 static struct atmel_uart_data dbgu_data = { 923 923 .use_dma_tx = 0, 924 924 .use_dma_rx = 0, /* DBGU not capable of receive DMA */ 925 + .rts_gpio = -EINVAL, 925 926 }; 926 927 927 928 static u64 dbgu_dmamask = DMA_BIT_MASK(32); ··· 961 960 static struct atmel_uart_data uart0_data = { 962 961 .use_dma_tx = 1, 963 962 .use_dma_rx = 1, 963 + .rts_gpio = -EINVAL, 964 964 }; 965 965 966 966 static u64 uart0_dmamask = DMA_BIT_MASK(32); ··· 989 987 if (pins & ATMEL_UART_RTS) { 990 988 /* 991 989 * AT91RM9200 Errata #39 - RTS0 is not internally connected to PA21. 992 - * We need to drive the pin manually. Default is off (RTS is active low). 990 + * We need to drive the pin manually. The serial driver will driver 991 + * this to high when initializing. 993 992 */ 994 - at91_set_gpio_output(AT91_PIN_PA21, 1); 993 + uart0_data.rts_gpio = AT91_PIN_PA21; 995 994 } 996 995 } 997 996 ··· 1012 1009 static struct atmel_uart_data uart1_data = { 1013 1010 .use_dma_tx = 1, 1014 1011 .use_dma_rx = 1, 1012 + .rts_gpio = -EINVAL, 1015 1013 }; 1016 1014 1017 1015 static u64 uart1_dmamask = DMA_BIT_MASK(32); ··· 1064 1060 static struct atmel_uart_data uart2_data = { 1065 1061 .use_dma_tx = 1, 1066 1062 .use_dma_rx = 1, 1063 + .rts_gpio = -EINVAL, 1067 1064 }; 1068 1065 1069 1066 static u64 uart2_dmamask = DMA_BIT_MASK(32); ··· 1108 1103 static struct atmel_uart_data uart3_data = { 1109 1104 .use_dma_tx = 1, 1110 1105 .use_dma_rx = 1, 1106 + .rts_gpio = -EINVAL, 1111 1107 }; 1112 1108 1113 1109 static u64 uart3_dmamask = DMA_BIT_MASK(32);
+7
arch/arm/mach-at91/at91sam9260_devices.c
··· 819 819 static struct atmel_uart_data dbgu_data = { 820 820 .use_dma_tx = 0, 821 821 .use_dma_rx = 0, /* DBGU not capable of receive DMA */ 822 + .rts_gpio = -EINVAL, 822 823 }; 823 824 824 825 static u64 dbgu_dmamask = DMA_BIT_MASK(32); ··· 858 857 static struct atmel_uart_data uart0_data = { 859 858 .use_dma_tx = 1, 860 859 .use_dma_rx = 1, 860 + .rts_gpio = -EINVAL, 861 861 }; 862 862 863 863 static u64 uart0_dmamask = DMA_BIT_MASK(32); ··· 910 908 static struct atmel_uart_data uart1_data = { 911 909 .use_dma_tx = 1, 912 910 .use_dma_rx = 1, 911 + .rts_gpio = -EINVAL, 913 912 }; 914 913 915 914 static u64 uart1_dmamask = DMA_BIT_MASK(32); ··· 954 951 static struct atmel_uart_data uart2_data = { 955 952 .use_dma_tx = 1, 956 953 .use_dma_rx = 1, 954 + .rts_gpio = -EINVAL, 957 955 }; 958 956 959 957 static u64 uart2_dmamask = DMA_BIT_MASK(32); ··· 998 994 static struct atmel_uart_data uart3_data = { 999 995 .use_dma_tx = 1, 1000 996 .use_dma_rx = 1, 997 + .rts_gpio = -EINVAL, 1001 998 }; 1002 999 1003 1000 static u64 uart3_dmamask = DMA_BIT_MASK(32); ··· 1042 1037 static struct atmel_uart_data uart4_data = { 1043 1038 .use_dma_tx = 1, 1044 1039 .use_dma_rx = 1, 1040 + .rts_gpio = -EINVAL, 1045 1041 }; 1046 1042 1047 1043 static u64 uart4_dmamask = DMA_BIT_MASK(32); ··· 1081 1075 static struct atmel_uart_data uart5_data = { 1082 1076 .use_dma_tx = 1, 1083 1077 .use_dma_rx = 1, 1078 + .rts_gpio = -EINVAL, 1084 1079 }; 1085 1080 1086 1081 static u64 uart5_dmamask = DMA_BIT_MASK(32);
+4
arch/arm/mach-at91/at91sam9261_devices.c
··· 880 880 static struct atmel_uart_data dbgu_data = { 881 881 .use_dma_tx = 0, 882 882 .use_dma_rx = 0, /* DBGU not capable of receive DMA */ 883 + .rts_gpio = -EINVAL, 883 884 }; 884 885 885 886 static u64 dbgu_dmamask = DMA_BIT_MASK(32); ··· 919 918 static struct atmel_uart_data uart0_data = { 920 919 .use_dma_tx = 1, 921 920 .use_dma_rx = 1, 921 + .rts_gpio = -EINVAL, 922 922 }; 923 923 924 924 static u64 uart0_dmamask = DMA_BIT_MASK(32); ··· 963 961 static struct atmel_uart_data uart1_data = { 964 962 .use_dma_tx = 1, 965 963 .use_dma_rx = 1, 964 + .rts_gpio = -EINVAL, 966 965 }; 967 966 968 967 static u64 uart1_dmamask = DMA_BIT_MASK(32); ··· 1007 1004 static struct atmel_uart_data uart2_data = { 1008 1005 .use_dma_tx = 1, 1009 1006 .use_dma_rx = 1, 1007 + .rts_gpio = -EINVAL, 1010 1008 }; 1011 1009 1012 1010 static u64 uart2_dmamask = DMA_BIT_MASK(32);
+4
arch/arm/mach-at91/at91sam9263_devices.c
··· 1324 1324 static struct atmel_uart_data dbgu_data = { 1325 1325 .use_dma_tx = 0, 1326 1326 .use_dma_rx = 0, /* DBGU not capable of receive DMA */ 1327 + .rts_gpio = -EINVAL, 1327 1328 }; 1328 1329 1329 1330 static u64 dbgu_dmamask = DMA_BIT_MASK(32); ··· 1363 1362 static struct atmel_uart_data uart0_data = { 1364 1363 .use_dma_tx = 1, 1365 1364 .use_dma_rx = 1, 1365 + .rts_gpio = -EINVAL, 1366 1366 }; 1367 1367 1368 1368 static u64 uart0_dmamask = DMA_BIT_MASK(32); ··· 1407 1405 static struct atmel_uart_data uart1_data = { 1408 1406 .use_dma_tx = 1, 1409 1407 .use_dma_rx = 1, 1408 + .rts_gpio = -EINVAL, 1410 1409 }; 1411 1410 1412 1411 static u64 uart1_dmamask = DMA_BIT_MASK(32); ··· 1451 1448 static struct atmel_uart_data uart2_data = { 1452 1449 .use_dma_tx = 1, 1453 1450 .use_dma_rx = 1, 1451 + .rts_gpio = -EINVAL, 1454 1452 }; 1455 1453 1456 1454 static u64 uart2_dmamask = DMA_BIT_MASK(32);
+5
arch/arm/mach-at91/at91sam9g45_devices.c
··· 1587 1587 static struct atmel_uart_data dbgu_data = { 1588 1588 .use_dma_tx = 0, 1589 1589 .use_dma_rx = 0, 1590 + .rts_gpio = -EINVAL, 1590 1591 }; 1591 1592 1592 1593 static u64 dbgu_dmamask = DMA_BIT_MASK(32); ··· 1626 1625 static struct atmel_uart_data uart0_data = { 1627 1626 .use_dma_tx = 1, 1628 1627 .use_dma_rx = 1, 1628 + .rts_gpio = -EINVAL, 1629 1629 }; 1630 1630 1631 1631 static u64 uart0_dmamask = DMA_BIT_MASK(32); ··· 1670 1668 static struct atmel_uart_data uart1_data = { 1671 1669 .use_dma_tx = 1, 1672 1670 .use_dma_rx = 1, 1671 + .rts_gpio = -EINVAL, 1673 1672 }; 1674 1673 1675 1674 static u64 uart1_dmamask = DMA_BIT_MASK(32); ··· 1714 1711 static struct atmel_uart_data uart2_data = { 1715 1712 .use_dma_tx = 1, 1716 1713 .use_dma_rx = 1, 1714 + .rts_gpio = -EINVAL, 1717 1715 }; 1718 1716 1719 1717 static u64 uart2_dmamask = DMA_BIT_MASK(32); ··· 1758 1754 static struct atmel_uart_data uart3_data = { 1759 1755 .use_dma_tx = 1, 1760 1756 .use_dma_rx = 1, 1757 + .rts_gpio = -EINVAL, 1761 1758 }; 1762 1759 1763 1760 static u64 uart3_dmamask = DMA_BIT_MASK(32);
+5
arch/arm/mach-at91/at91sam9rl_devices.c
··· 956 956 static struct atmel_uart_data dbgu_data = { 957 957 .use_dma_tx = 0, 958 958 .use_dma_rx = 0, /* DBGU not capable of receive DMA */ 959 + .rts_gpio = -EINVAL, 959 960 }; 960 961 961 962 static u64 dbgu_dmamask = DMA_BIT_MASK(32); ··· 995 994 static struct atmel_uart_data uart0_data = { 996 995 .use_dma_tx = 1, 997 996 .use_dma_rx = 1, 997 + .rts_gpio = -EINVAL, 998 998 }; 999 999 1000 1000 static u64 uart0_dmamask = DMA_BIT_MASK(32); ··· 1047 1045 static struct atmel_uart_data uart1_data = { 1048 1046 .use_dma_tx = 1, 1049 1047 .use_dma_rx = 1, 1048 + .rts_gpio = -EINVAL, 1050 1049 }; 1051 1050 1052 1051 static u64 uart1_dmamask = DMA_BIT_MASK(32); ··· 1091 1088 static struct atmel_uart_data uart2_data = { 1092 1089 .use_dma_tx = 1, 1093 1090 .use_dma_rx = 1, 1091 + .rts_gpio = -EINVAL, 1094 1092 }; 1095 1093 1096 1094 static u64 uart2_dmamask = DMA_BIT_MASK(32); ··· 1135 1131 static struct atmel_uart_data uart3_data = { 1136 1132 .use_dma_tx = 1, 1137 1133 .use_dma_rx = 1, 1134 + .rts_gpio = -EINVAL, 1138 1135 }; 1139 1136 1140 1137 static u64 uart3_dmamask = DMA_BIT_MASK(32);
+31 -18
drivers/tty/serial/atmel_serial.c
··· 35 35 #include <linux/platform_device.h> 36 36 #include <linux/of.h> 37 37 #include <linux/of_device.h> 38 + #include <linux/of_gpio.h> 38 39 #include <linux/dma-mapping.h> 39 40 #include <linux/atmel_pdc.h> 40 41 #include <linux/atmel_serial.h> 41 42 #include <linux/uaccess.h> 42 43 #include <linux/platform_data/atmel.h> 43 44 #include <linux/timer.h> 45 + #include <linux/gpio.h> 44 46 45 47 #include <asm/io.h> 46 48 #include <asm/ioctls.h> 47 - 48 - #ifdef CONFIG_ARM 49 - #include <mach/cpu.h> 50 - #include <asm/gpio.h> 51 - #endif 52 49 53 50 #define PDC_BUFFER_SIZE 512 54 51 /* Revisit: We should calculate this based on the actual port settings */ ··· 165 168 struct circ_buf rx_ring; 166 169 167 170 struct serial_rs485 rs485; /* rs485 settings */ 171 + int rts_gpio; /* optional RTS GPIO */ 168 172 unsigned int tx_done_mask; 169 173 bool is_usart; /* usart or uart */ 170 174 struct timer_list uart_timer; /* uart timer */ ··· 299 301 unsigned int mode; 300 302 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 301 303 302 - #ifdef CONFIG_ARCH_AT91RM9200 303 - if (cpu_is_at91rm9200()) { 304 - /* 305 - * AT91RM9200 Errata #39: RTS0 is not internally connected 306 - * to PA21. We need to drive the pin manually. 307 - */ 308 - if (port->mapbase == AT91RM9200_BASE_US0) { 309 - if (mctrl & TIOCM_RTS) 310 - at91_set_gpio_value(AT91_PIN_PA21, 0); 311 - else 312 - at91_set_gpio_value(AT91_PIN_PA21, 1); 313 - } 304 + /* 305 + * AT91RM9200 Errata #39: RTS0 is not internally connected 306 + * to PA21. We need to drive the pin as a GPIO. 307 + */ 308 + if (gpio_is_valid(atmel_port->rts_gpio)) { 309 + if (mctrl & TIOCM_RTS) 310 + gpio_set_value(atmel_port->rts_gpio, 0); 311 + else 312 + gpio_set_value(atmel_port->rts_gpio, 1); 314 313 } 315 - #endif 316 314 317 315 if (mctrl & TIOCM_RTS) 318 316 control |= ATMEL_US_RTSEN; ··· 2373 2379 port = &atmel_ports[ret]; 2374 2380 port->backup_imr = 0; 2375 2381 port->uart.line = ret; 2382 + port->rts_gpio = -EINVAL; /* Invalid, zero could be valid */ 2383 + if (pdata) 2384 + port->rts_gpio = pdata->rts_gpio; 2385 + else if (np) 2386 + port->rts_gpio = of_get_named_gpio(np, "rts-gpios", 0); 2387 + 2388 + if (gpio_is_valid(port->rts_gpio)) { 2389 + ret = devm_gpio_request(&pdev->dev, port->rts_gpio, "RTS"); 2390 + if (ret) { 2391 + dev_err(&pdev->dev, "error requesting RTS GPIO\n"); 2392 + goto err; 2393 + } 2394 + /* Default to 1 as RTS is active low */ 2395 + ret = gpio_direction_output(port->rts_gpio, 1); 2396 + if (ret) { 2397 + dev_err(&pdev->dev, "error setting up RTS GPIO\n"); 2398 + goto err; 2399 + } 2400 + } 2376 2401 2377 2402 ret = atmel_init_port(port, pdev); 2378 2403 if (ret)
+1
include/linux/platform_data/atmel.h
··· 84 84 short use_dma_rx; /* use receive DMA? */ 85 85 void __iomem *regs; /* virt. base address, if any */ 86 86 struct serial_rs485 rs485; /* rs485 settings */ 87 + int rts_gpio; /* optional RTS GPIO */ 87 88 }; 88 89 89 90 /* Touchscreen Controller */