Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

dt-bindings: pinctrl: qcom: Add SDM660 LPI pinctrl

Add bindings for pin controller in SDM660 Low Power Audio SubSystem
(LPASS).

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Co-developed-by: Richard Acayan <mailingradian@gmail.com>
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Signed-off-by: Nickolay Goppen <setotau@mainlining.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

authored by

Nickolay Goppen and committed by
Linus Walleij
350027a3 18d676ac

+109
+109
Documentation/devicetree/bindings/pinctrl/qcom,sdm660-lpass-lpi-pinctrl.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/pinctrl/qcom,sdm660-lpass-lpi-pinctrl.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Qualcomm SDM660 SoC LPASS LPI TLMM 8 + 9 + maintainers: 10 + - Nickolay Goppen <setotau@mainlining.org> 11 + 12 + description: 13 + Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem 14 + (LPASS) Low Power Island (LPI) of Qualcomm SDM660 SoC. 15 + 16 + properties: 17 + compatible: 18 + const: qcom,sdm660-lpass-lpi-pinctrl 19 + 20 + reg: 21 + items: 22 + - description: LPASS LPI TLMM Control and Status registers 23 + 24 + patternProperties: 25 + "-state$": 26 + oneOf: 27 + - $ref: "#/$defs/qcom-sdm660-lpass-state" 28 + - patternProperties: 29 + "-pins$": 30 + $ref: "#/$defs/qcom-sdm660-lpass-state" 31 + additionalProperties: false 32 + 33 + $defs: 34 + qcom-sdm660-lpass-state: 35 + type: object 36 + description: 37 + Pinctrl node's client devices use subnodes for desired pin configuration. 38 + Client device subnodes use below standard properties. 39 + $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state 40 + unevaluatedProperties: false 41 + 42 + properties: 43 + pins: 44 + description: 45 + List of gpio pins affected by the properties specified in this 46 + subnode. 47 + items: 48 + pattern: "^gpio([0-9]|[1-2][0-9]|3[0-1])$" 49 + 50 + function: 51 + enum: [ gpio, comp_rx, dmic1_clk, dmic1_data, dmic2_clk, dmic2_data, 52 + mclk0, pdm_tx, pdm_clk, pdm_rx, pdm_sync ] 53 + description: 54 + Specify the alternative function to be configured for the specified 55 + pins. 56 + 57 + allOf: 58 + - $ref: qcom,lpass-lpi-common.yaml# 59 + 60 + required: 61 + - compatible 62 + - reg 63 + 64 + unevaluatedProperties: false 65 + 66 + examples: 67 + - | 68 + lpi_tlmm: pinctrl@15070000 { 69 + compatible = "qcom,sdm660-lpass-lpi-pinctrl"; 70 + reg = <0x15070000 0x20000>; 71 + gpio-controller; 72 + #gpio-cells = <2>; 73 + gpio-ranges = <&lpi_tlmm 0 0 32>; 74 + 75 + cdc_pdm_default: cdc-pdm-default-state { 76 + clk-pins { 77 + pins = "gpio18"; 78 + function = "pdm_clk"; 79 + drive-strength = <8>; 80 + output-high; 81 + }; 82 + 83 + sync-pins{ 84 + pins = "gpio19"; 85 + function = "pdm_sync"; 86 + drive-strength = <4>; 87 + output-high; 88 + }; 89 + 90 + tx-pins { 91 + pins = "gpio20"; 92 + function = "pdm_tx"; 93 + drive-strength = <8>; 94 + }; 95 + 96 + rx-pins { 97 + pins = "gpio21", "gpio23", "gpio25"; 98 + function = "pdm_rx"; 99 + drive-strength = <4>; 100 + output-high; 101 + }; 102 + }; 103 + 104 + cdc_comp_default: cdc-comp-default-state { 105 + pins = "gpio22", "gpio24"; 106 + function = "comp_rx"; 107 + drive-strength = <8>; 108 + }; 109 + };