ARM: dts: bcm-mobile: Split out nodes used by both BCM21664 and BCM23550

+33 -305

arch/arm/boot/dts/broadcom/bcm21664.dtsi

··· 1 1 // SPDX-License-Identifier: GPL-2.0-only 2 2 // Copyright (C) 2014 Broadcom Corporation 3 3 4 - #include <dt-bindings/clock/bcm21664.h> 5 - #include <dt-bindings/interrupt-controller/arm-gic.h> 6 - #include <dt-bindings/interrupt-controller/irq.h> 4 + #include "bcm2166x-common.dtsi" 7 5 8 6 / { 9 - #address-cells = <1>; 10 - #size-cells = <1>; 11 - model = "BCM21664 SoC"; 12 - compatible = "brcm,bcm21664"; 13 7 interrupt-parent = <&gic>; 14 8 15 9 cpus { ··· 24 30 reg = <1>; 25 31 }; 26 32 }; 33 + }; 27 34 28 - gic: interrupt-controller@3ff00100 { 29 - compatible = "arm,cortex-a9-gic"; 30 - #interrupt-cells = <3>; 31 - #address-cells = <0>; 32 - interrupt-controller; 33 - reg = <0x3ff01000 0x1000>, 34 - <0x3ff00100 0x100>; 35 - }; 36 - 37 - smc@3404e000 { 38 - compatible = "brcm,bcm21664-smc", "brcm,kona-smc"; 39 - reg = <0x3404e000 0x400>; /* 1 KiB in SRAM */ 40 - }; 41 - 42 - uartb: serial@3e000000 { 43 - compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart"; 44 - reg = <0x3e000000 0x118>; 45 - clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB>; 46 - interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 47 - reg-shift = <2>; 48 - reg-io-width = <4>; 49 - status = "disabled"; 50 - }; 51 - 52 - uartb2: serial@3e001000 { 53 - compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart"; 54 - reg = <0x3e001000 0x118>; 55 - clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB2>; 56 - interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; 57 - reg-shift = <2>; 58 - reg-io-width = <4>; 59 - status = "disabled"; 60 - }; 61 - 62 - uartb3: serial@3e002000 { 63 - compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart"; 64 - reg = <0x3e002000 0x118>; 65 - clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB3>; 66 - interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 67 - reg-shift = <2>; 68 - reg-io-width = <4>; 69 - status = "disabled"; 70 - }; 71 - 72 - L2: cache-controller@3ff20000 { 73 - compatible = "arm,pl310-cache"; 74 - reg = <0x3ff20000 0x1000>; 75 - cache-unified; 76 - cache-level = <2>; 77 - }; 78 - 79 - brcm,resetmgr@35001f00 { 80 - compatible = "brcm,bcm21664-resetmgr"; 81 - reg = <0x35001f00 0x24>; 82 - }; 83 - 84 - timer@35006000 { 85 - compatible = "brcm,kona-timer"; 86 - reg = <0x35006000 0x1c>; 87 - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 88 - clocks = <&aon_ccu BCM21664_AON_CCU_HUB_TIMER>; 89 - }; 90 - 91 - gpio: gpio@35003000 { 92 - compatible = "brcm,bcm21664-gpio", "brcm,kona-gpio"; 93 - reg = <0x35003000 0x524>; 94 - interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 95 - <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 96 - <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 97 - <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 98 - #gpio-cells = <2>; 99 - #interrupt-cells = <2>; 100 - gpio-controller; 101 - interrupt-controller; 102 - }; 103 - 104 - sdio1: mmc@3f180000 { 105 - compatible = "brcm,kona-sdhci"; 106 - reg = <0x3f180000 0x801c>; 107 - interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 108 - clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO1>; 109 - status = "disabled"; 110 - }; 111 - 112 - sdio2: mmc@3f190000 { 113 - compatible = "brcm,kona-sdhci"; 114 - reg = <0x3f190000 0x801c>; 115 - interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 116 - clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO2>; 117 - status = "disabled"; 118 - }; 119 - 120 - sdio3: mmc@3f1a0000 { 121 - compatible = "brcm,kona-sdhci"; 122 - reg = <0x3f1a0000 0x801c>; 123 - interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 124 - clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO3>; 125 - status = "disabled"; 126 - }; 127 - 128 - sdio4: mmc@3f1b0000 { 129 - compatible = "brcm,kona-sdhci"; 130 - reg = <0x3f1b0000 0x801c>; 131 - interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 132 - clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO4>; 133 - status = "disabled"; 134 - }; 135 - 136 - bsc1: i2c@3e016000 { 137 - compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c"; 138 - reg = <0x3e016000 0x70>; 139 - interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; 140 - #address-cells = <1>; 141 - #size-cells = <0>; 142 - clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC1>; 143 - status = "disabled"; 144 - }; 145 - 146 - bsc2: i2c@3e017000 { 147 - compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c"; 148 - reg = <0x3e017000 0x70>; 149 - interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 150 - #address-cells = <1>; 151 - #size-cells = <0>; 152 - clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC2>; 153 - status = "disabled"; 154 - }; 155 - 156 - bsc3: i2c@3e018000 { 157 - compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c"; 158 - reg = <0x3e018000 0x70>; 159 - interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 160 - #address-cells = <1>; 161 - #size-cells = <0>; 162 - clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC3>; 163 - status = "disabled"; 164 - }; 165 - 166 - bsc4: i2c@3e01c000 { 167 - compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c"; 168 - reg = <0x3e01c000 0x70>; 169 - interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; 170 - #address-cells = <1>; 171 - #size-cells = <0>; 172 - clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC4>; 173 - status = "disabled"; 174 - }; 175 - 176 - clocks { 177 - #address-cells = <1>; 178 - #size-cells = <1>; 179 - ranges; 180 - 181 - /* 182 - * Fixed clocks are defined before CCUs whose 183 - * clocks may depend on them. 184 - */ 185 - 186 - ref_32k_clk: ref_32k { 187 - #clock-cells = <0>; 188 - compatible = "fixed-clock"; 189 - clock-frequency = <32768>; 35 + &apps { 36 + gic: interrupt-controller@1c01000 { 37 + compatible = "arm,cortex-a9-gic"; 38 + #interrupt-cells = <3>; 39 + #address-cells = <0>; 40 + interrupt-controller; 41 + reg = <0x01c01000 0x1000>, 42 + <0x01c00100 0x100>; 190 43 }; 191 44 192 - bbl_32k_clk: bbl_32k { 193 - #clock-cells = <0>; 194 - compatible = "fixed-clock"; 195 - clock-frequency = <32768>; 45 + L2: cache-controller@1c20000 { 46 + compatible = "arm,pl310-cache"; 47 + reg = <0x01c20000 0x1000>; 48 + cache-unified; 49 + cache-level = <2>; 196 50 }; 51 + }; 197 52 198 - ref_13m_clk: ref_13m { 199 - #clock-cells = <0>; 200 - compatible = "fixed-clock"; 201 - clock-frequency = <13000000>; 202 - }; 53 + &bsc1 { 54 + compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c"; 55 + }; 203 56 204 - var_13m_clk: var_13m { 205 - #clock-cells = <0>; 206 - compatible = "fixed-clock"; 207 - clock-frequency = <13000000>; 208 - }; 57 + &bsc2 { 58 + compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c"; 59 + }; 209 60 210 - dft_19_5m_clk: dft_19_5m { 211 - #clock-cells = <0>; 212 - compatible = "fixed-clock"; 213 - clock-frequency = <19500000>; 214 - }; 61 + &bsc3 { 62 + compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c"; 63 + }; 215 64 216 - ref_crystal_clk: ref_crystal { 217 - #clock-cells = <0>; 218 - compatible = "fixed-clock"; 219 - clock-frequency = <26000000>; 220 - }; 65 + &bsc4 { 66 + compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c"; 67 + }; 221 68 222 - ref_52m_clk: ref_52m { 223 - #clock-cells = <0>; 224 - compatible = "fixed-clock"; 225 - clock-frequency = <52000000>; 226 - }; 69 + &gpio { 70 + compatible = "brcm,bcm21664-gpio", "brcm,kona-gpio"; 71 + }; 227 72 228 - var_52m_clk: var_52m { 229 - #clock-cells = <0>; 230 - compatible = "fixed-clock"; 231 - clock-frequency = <52000000>; 232 - }; 233 - 234 - usb_otg_ahb_clk: usb_otg_ahb { 235 - #clock-cells = <0>; 236 - compatible = "fixed-clock"; 237 - clock-frequency = <52000000>; 238 - }; 239 - 240 - ref_96m_clk: ref_96m { 241 - #clock-cells = <0>; 242 - compatible = "fixed-clock"; 243 - clock-frequency = <96000000>; 244 - }; 245 - 246 - var_96m_clk: var_96m { 247 - #clock-cells = <0>; 248 - compatible = "fixed-clock"; 249 - clock-frequency = <96000000>; 250 - }; 251 - 252 - ref_104m_clk: ref_104m { 253 - #clock-cells = <0>; 254 - compatible = "fixed-clock"; 255 - clock-frequency = <104000000>; 256 - }; 257 - 258 - var_104m_clk: var_104m { 259 - #clock-cells = <0>; 260 - compatible = "fixed-clock"; 261 - clock-frequency = <104000000>; 262 - }; 263 - 264 - ref_156m_clk: ref_156m { 265 - #clock-cells = <0>; 266 - compatible = "fixed-clock"; 267 - clock-frequency = <156000000>; 268 - }; 269 - 270 - var_156m_clk: var_156m { 271 - #clock-cells = <0>; 272 - compatible = "fixed-clock"; 273 - clock-frequency = <156000000>; 274 - }; 275 - 276 - root_ccu: root_ccu@35001000 { 277 - compatible = "brcm,bcm21664-root-ccu"; 278 - reg = <0x35001000 0x0f00>; 279 - #clock-cells = <1>; 280 - clock-output-names = "frac_1m"; 281 - }; 282 - 283 - aon_ccu: aon_ccu@35002000 { 284 - compatible = "brcm,bcm21664-aon-ccu"; 285 - reg = <0x35002000 0x0f00>; 286 - #clock-cells = <1>; 287 - clock-output-names = "hub_timer"; 288 - }; 289 - 290 - master_ccu: master_ccu@3f001000 { 291 - compatible = "brcm,bcm21664-master-ccu"; 292 - reg = <0x3f001000 0x0f00>; 293 - #clock-cells = <1>; 294 - clock-output-names = "sdio1", 295 - "sdio2", 296 - "sdio3", 297 - "sdio4", 298 - "sdio1_sleep", 299 - "sdio2_sleep", 300 - "sdio3_sleep", 301 - "sdio4_sleep"; 302 - }; 303 - 304 - slave_ccu: slave_ccu@3e011000 { 305 - compatible = "brcm,bcm21664-slave-ccu"; 306 - reg = <0x3e011000 0x0f00>; 307 - #clock-cells = <1>; 308 - clock-output-names = "uartb", 309 - "uartb2", 310 - "uartb3", 311 - "bsc1", 312 - "bsc2", 313 - "bsc3", 314 - "bsc4"; 315 - }; 316 - }; 317 - 318 - usbotg: usb@3f120000 { 319 - compatible = "snps,dwc2"; 320 - reg = <0x3f120000 0x10000>; 321 - interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 322 - clocks = <&usb_otg_ahb_clk>; 323 - clock-names = "otg"; 324 - phys = <&usbphy>; 325 - phy-names = "usb2-phy"; 326 - status = "disabled"; 327 - }; 328 - 329 - usbphy: usb-phy@3f130000 { 330 - compatible = "brcm,kona-usb2-phy"; 331 - reg = <0x3f130000 0x28>; 332 - #phy-cells = <0>; 333 - status = "disabled"; 334 - }; 73 + &smc { 74 + compatible = "brcm,bcm21664-smc", "brcm,kona-smc"; 335 75 };

+334

arch/arm/boot/dts/broadcom/bcm2166x-common.dtsi

··· 1 + // SPDX-License-Identifier: BSD-3-Clause 2 + /* 3 + * Common device tree for components shared between the BCM21664 and BCM23550 4 + * SoCs. 5 + * 6 + * Copyright (C) 2016 Broadcom 7 + */ 8 + 9 + /dts-v1/; 10 + 11 + #include <dt-bindings/clock/bcm21664.h> 12 + #include <dt-bindings/interrupt-controller/arm-gic.h> 13 + #include <dt-bindings/interrupt-controller/irq.h> 14 + 15 + / { 16 + #address-cells = <1>; 17 + #size-cells = <1>; 18 + 19 + /* Hub bus */ 20 + hub: hub-bus@34000000 { 21 + compatible = "simple-bus"; 22 + ranges = <0 0x34000000 0x102f83ac>; 23 + #address-cells = <1>; 24 + #size-cells = <1>; 25 + 26 + smc: smc@4e000 { 27 + /* Compatible filled by SoC DTSI */ 28 + reg = <0x0004e000 0x400>; /* 1 KiB in SRAM */ 29 + }; 30 + 31 + resetmgr: reset-controller@1001f00 { 32 + compatible = "brcm,bcm21664-resetmgr"; 33 + reg = <0x01001f00 0x24>; 34 + }; 35 + 36 + gpio: gpio@1003000 { 37 + /* Compatible filled by SoC DTSI */ 38 + reg = <0x01003000 0x524>; 39 + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 40 + <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 41 + <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 42 + <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 43 + #gpio-cells = <2>; 44 + #interrupt-cells = <2>; 45 + gpio-controller; 46 + interrupt-controller; 47 + }; 48 + 49 + timer@1006000 { 50 + compatible = "brcm,kona-timer"; 51 + reg = <0x01006000 0x1c>; 52 + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 53 + clocks = <&aon_ccu BCM21664_AON_CCU_HUB_TIMER>; 54 + }; 55 + }; 56 + 57 + /* Slaves bus */ 58 + slaves: slaves-bus@3e000000 { 59 + compatible = "simple-bus"; 60 + ranges = <0 0x3e000000 0x0001c070>; 61 + #address-cells = <1>; 62 + #size-cells = <1>; 63 + 64 + uartb: serial@0 { 65 + compatible = "snps,dw-apb-uart"; 66 + reg = <0x00000000 0x118>; 67 + clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB>; 68 + interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 69 + reg-shift = <2>; 70 + reg-io-width = <4>; 71 + status = "disabled"; 72 + }; 73 + 74 + uartb2: serial@1000 { 75 + compatible = "snps,dw-apb-uart"; 76 + reg = <0x00001000 0x118>; 77 + clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB2>; 78 + interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; 79 + reg-shift = <2>; 80 + reg-io-width = <4>; 81 + status = "disabled"; 82 + }; 83 + 84 + uartb3: serial@2000 { 85 + compatible = "snps,dw-apb-uart"; 86 + reg = <0x00002000 0x118>; 87 + clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB3>; 88 + interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 89 + reg-shift = <2>; 90 + reg-io-width = <4>; 91 + status = "disabled"; 92 + }; 93 + 94 + bsc1: i2c@16000 { 95 + /* Compatible filled by SoC DTSI */ 96 + reg = <0x00016000 0x70>; 97 + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; 98 + #address-cells = <1>; 99 + #size-cells = <0>; 100 + clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC1>; 101 + status = "disabled"; 102 + }; 103 + 104 + bsc2: i2c@17000 { 105 + /* Compatible filled by SoC DTSI */ 106 + reg = <0x00017000 0x70>; 107 + interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 108 + #address-cells = <1>; 109 + #size-cells = <0>; 110 + clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC2>; 111 + status = "disabled"; 112 + }; 113 + 114 + bsc3: i2c@18000 { 115 + /* Compatible filled by SoC DTSI */ 116 + reg = <0x00018000 0x70>; 117 + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 118 + #address-cells = <1>; 119 + #size-cells = <0>; 120 + clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC3>; 121 + status = "disabled"; 122 + }; 123 + 124 + bsc4: i2c@1c000 { 125 + /* Compatible filled by SoC DTSI */ 126 + reg = <0x0001c000 0x70>; 127 + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; 128 + #address-cells = <1>; 129 + #size-cells = <0>; 130 + clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC4>; 131 + status = "disabled"; 132 + }; 133 + }; 134 + 135 + /* Apps bus */ 136 + apps: apps-bus@3e300000 { 137 + compatible = "simple-bus"; 138 + ranges = <0 0x3e300000 0x01c02000>; 139 + #address-cells = <1>; 140 + #size-cells = <1>; 141 + 142 + usbotg: usb@e20000 { 143 + compatible = "snps,dwc2"; 144 + reg = <0x00e20000 0x10000>; 145 + interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 146 + clocks = <&usb_otg_ahb_clk>; 147 + clock-names = "otg"; 148 + phys = <&usbphy>; 149 + phy-names = "usb2-phy"; 150 + status = "disabled"; 151 + }; 152 + 153 + usbphy: usb-phy@e30000 { 154 + compatible = "brcm,kona-usb2-phy"; 155 + reg = <0x00e30000 0x28>; 156 + #phy-cells = <0>; 157 + status = "disabled"; 158 + }; 159 + 160 + sdio1: mmc@e80000 { 161 + compatible = "brcm,kona-sdhci"; 162 + reg = <0x00e80000 0x801c>; 163 + interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 164 + clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO1>; 165 + status = "disabled"; 166 + }; 167 + 168 + sdio2: mmc@e90000 { 169 + compatible = "brcm,kona-sdhci"; 170 + reg = <0x00e90000 0x801c>; 171 + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 172 + clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO2>; 173 + status = "disabled"; 174 + }; 175 + 176 + sdio3: mmc@ea0000 { 177 + compatible = "brcm,kona-sdhci"; 178 + reg = <0x00ea0000 0x801c>; 179 + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 180 + clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO3>; 181 + status = "disabled"; 182 + }; 183 + 184 + sdio4: mmc@eb0000 { 185 + compatible = "brcm,kona-sdhci"; 186 + reg = <0x00eb0000 0x801c>; 187 + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 188 + clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO4>; 189 + status = "disabled"; 190 + }; 191 + }; 192 + 193 + clocks { 194 + #address-cells = <1>; 195 + #size-cells = <1>; 196 + ranges; 197 + 198 + /* 199 + * Fixed clocks are defined before CCUs whose 200 + * clocks may depend on them. 201 + */ 202 + 203 + ref_32k_clk: ref_32k { 204 + #clock-cells = <0>; 205 + compatible = "fixed-clock"; 206 + clock-frequency = <32768>; 207 + }; 208 + 209 + bbl_32k_clk: bbl_32k { 210 + #clock-cells = <0>; 211 + compatible = "fixed-clock"; 212 + clock-frequency = <32768>; 213 + }; 214 + 215 + ref_13m_clk: ref_13m { 216 + #clock-cells = <0>; 217 + compatible = "fixed-clock"; 218 + clock-frequency = <13000000>; 219 + }; 220 + 221 + var_13m_clk: var_13m { 222 + #clock-cells = <0>; 223 + compatible = "fixed-clock"; 224 + clock-frequency = <13000000>; 225 + }; 226 + 227 + dft_19_5m_clk: dft_19_5m { 228 + #clock-cells = <0>; 229 + compatible = "fixed-clock"; 230 + clock-frequency = <19500000>; 231 + }; 232 + 233 + ref_crystal_clk: ref_crystal { 234 + #clock-cells = <0>; 235 + compatible = "fixed-clock"; 236 + clock-frequency = <26000000>; 237 + }; 238 + 239 + ref_52m_clk: ref_52m { 240 + #clock-cells = <0>; 241 + compatible = "fixed-clock"; 242 + clock-frequency = <52000000>; 243 + }; 244 + 245 + var_52m_clk: var_52m { 246 + #clock-cells = <0>; 247 + compatible = "fixed-clock"; 248 + clock-frequency = <52000000>; 249 + }; 250 + 251 + usb_otg_ahb_clk: usb_otg_ahb { 252 + #clock-cells = <0>; 253 + compatible = "fixed-clock"; 254 + clock-frequency = <52000000>; 255 + }; 256 + 257 + ref_96m_clk: ref_96m { 258 + #clock-cells = <0>; 259 + compatible = "fixed-clock"; 260 + clock-frequency = <96000000>; 261 + }; 262 + 263 + var_96m_clk: var_96m { 264 + #clock-cells = <0>; 265 + compatible = "fixed-clock"; 266 + clock-frequency = <96000000>; 267 + }; 268 + 269 + ref_104m_clk: ref_104m { 270 + #clock-cells = <0>; 271 + compatible = "fixed-clock"; 272 + clock-frequency = <104000000>; 273 + }; 274 + 275 + var_104m_clk: var_104m { 276 + #clock-cells = <0>; 277 + compatible = "fixed-clock"; 278 + clock-frequency = <104000000>; 279 + }; 280 + 281 + ref_156m_clk: ref_156m { 282 + #clock-cells = <0>; 283 + compatible = "fixed-clock"; 284 + clock-frequency = <156000000>; 285 + }; 286 + 287 + var_156m_clk: var_156m { 288 + #clock-cells = <0>; 289 + compatible = "fixed-clock"; 290 + clock-frequency = <156000000>; 291 + }; 292 + 293 + root_ccu: root_ccu@35001000 { 294 + compatible = "brcm,bcm21664-root-ccu"; 295 + reg = <0x35001000 0x0f00>; 296 + #clock-cells = <1>; 297 + clock-output-names = "frac_1m"; 298 + }; 299 + 300 + aon_ccu: aon_ccu@35002000 { 301 + compatible = "brcm,bcm21664-aon-ccu"; 302 + reg = <0x35002000 0x0f00>; 303 + #clock-cells = <1>; 304 + clock-output-names = "hub_timer"; 305 + }; 306 + 307 + slave_ccu: slave_ccu@3e011000 { 308 + compatible = "brcm,bcm21664-slave-ccu"; 309 + reg = <0x3e011000 0x0f00>; 310 + #clock-cells = <1>; 311 + clock-output-names = "uartb", 312 + "uartb2", 313 + "uartb3", 314 + "bsc1", 315 + "bsc2", 316 + "bsc3", 317 + "bsc4"; 318 + }; 319 + 320 + master_ccu: master_ccu@3f001000 { 321 + compatible = "brcm,bcm21664-master-ccu"; 322 + reg = <0x3f001000 0x0f00>; 323 + #clock-cells = <1>; 324 + clock-output-names = "sdio1", 325 + "sdio2", 326 + "sdio3", 327 + "sdio4", 328 + "sdio1_sleep", 329 + "sdio2_sleep", 330 + "sdio3_sleep", 331 + "sdio4_sleep"; 332 + }; 333 + }; 334 + };

+24 -346

arch/arm/boot/dts/broadcom/bcm23550.dtsi

··· 1 + // SPDX-License-Identifier: BSD-3-Clause 1 2 /* 2 - * BSD LICENSE 3 + * Device tree for the BCM23550 SoC. 3 4 * 4 - * Copyright(c) 2016 Broadcom. All rights reserved. 5 - * 6 - * Redistribution and use in source and binary forms, with or without 7 - * modification, are permitted provided that the following conditions 8 - * are met: 9 - * 10 - * * Redistributions of source code must retain the above copyright 11 - * notice, this list of conditions and the following disclaimer. 12 - * * Redistributions in binary form must reproduce the above copyright 13 - * notice, this list of conditions and the following disclaimer in 14 - * the documentation and/or other materials provided with the 15 - * distribution. 16 - * * Neither the name of Broadcom Corporation nor the names of its 17 - * contributors may be used to endorse or promote products derived 18 - * from this software without specific prior written permission. 19 - * 20 - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 21 - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 22 - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 23 - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 24 - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 25 - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 26 - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 30 - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 5 + * Copyright (C) 2016 Broadcom 31 6 */ 32 7 33 - /* BCM23550 and BCM21664 have almost identical clocks */ 34 - #include <dt-bindings/clock/bcm21664.h> 35 - #include <dt-bindings/interrupt-controller/arm-gic.h> 36 - #include <dt-bindings/interrupt-controller/irq.h> 8 + #include "bcm2166x-common.dtsi" 37 9 38 10 / { 39 - #address-cells = <1>; 40 - #size-cells = <1>; 41 - model = "BCM23550 SoC"; 42 - compatible = "brcm,bcm23550"; 43 11 interrupt-parent = <&gic>; 44 12 45 13 cpus { ··· 48 80 clock-frequency = <1000000000>; 49 81 }; 50 82 }; 83 + }; 51 84 52 - /* Hub bus */ 53 - hub@34000000 { 54 - compatible = "simple-bus"; 55 - ranges = <0 0x34000000 0x102f83ac>; 56 - #address-cells = <1>; 57 - #size-cells = <1>; 58 - 59 - smc@4e000 { 60 - compatible = "brcm,bcm23550-smc", "brcm,kona-smc"; 61 - reg = <0x0004e000 0x400>; /* 1 KiB in SRAM */ 62 - }; 63 - 64 - resetmgr: reset-controller@1001f00 { 65 - compatible = "brcm,bcm21664-resetmgr"; 66 - reg = <0x01001f00 0x24>; 67 - }; 68 - 69 - gpio: gpio@1003000 { 70 - compatible = "brcm,bcm23550-gpio", "brcm,kona-gpio"; 71 - reg = <0x01003000 0x524>; 72 - interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 73 - <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 74 - <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 75 - <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 76 - #gpio-cells = <2>; 77 - #interrupt-cells = <2>; 78 - gpio-controller; 79 - interrupt-controller; 80 - }; 81 - 82 - timer@1006000 { 83 - compatible = "brcm,kona-timer"; 84 - reg = <0x01006000 0x1c>; 85 - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 86 - clocks = <&aon_ccu BCM21664_AON_CCU_HUB_TIMER>; 87 - }; 88 - }; 89 - 90 - /* Slaves bus */ 91 - slaves@3e000000 { 92 - compatible = "simple-bus"; 93 - ranges = <0 0x3e000000 0x0001c070>; 94 - #address-cells = <1>; 95 - #size-cells = <1>; 96 - 97 - uartb: serial@0 { 98 - compatible = "snps,dw-apb-uart"; 99 - reg = <0x00000000 0x118>; 100 - clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB>; 101 - interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 102 - reg-shift = <2>; 103 - reg-io-width = <4>; 104 - status = "disabled"; 105 - }; 106 - 107 - uartb2: serial@1000 { 108 - compatible = "snps,dw-apb-uart"; 109 - reg = <0x00001000 0x118>; 110 - clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB2>; 111 - interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; 112 - reg-shift = <2>; 113 - reg-io-width = <4>; 114 - status = "disabled"; 115 - }; 116 - 117 - uartb3: serial@2000 { 118 - compatible = "snps,dw-apb-uart"; 119 - reg = <0x00002000 0x118>; 120 - clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB3>; 121 - interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 122 - reg-shift = <2>; 123 - reg-io-width = <4>; 124 - status = "disabled"; 125 - }; 126 - 127 - bsc1: i2c@16000 { 128 - compatible = "brcm,bcm23550-i2c", "brcm,kona-i2c"; 129 - reg = <0x00016000 0x70>; 130 - interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; 131 - #address-cells = <1>; 132 - #size-cells = <0>; 133 - clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC1>; 134 - status = "disabled"; 135 - }; 136 - 137 - bsc2: i2c@17000 { 138 - compatible = "brcm,bcm23550-i2c", "brcm,kona-i2c"; 139 - reg = <0x00017000 0x70>; 140 - interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 141 - #address-cells = <1>; 142 - #size-cells = <0>; 143 - clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC2>; 144 - status = "disabled"; 145 - }; 146 - 147 - bsc3: i2c@18000 { 148 - compatible = "brcm,bcm23550-i2c", "brcm,kona-i2c"; 149 - reg = <0x00018000 0x70>; 150 - interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 151 - #address-cells = <1>; 152 - #size-cells = <0>; 153 - clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC3>; 154 - status = "disabled"; 155 - }; 156 - 157 - bsc4: i2c@1c000 { 158 - compatible = "brcm,bcm23550-i2c", "brcm,kona-i2c"; 159 - reg = <0x0001c000 0x70>; 160 - interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; 161 - #address-cells = <1>; 162 - #size-cells = <0>; 163 - clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC4>; 164 - status = "disabled"; 165 - }; 166 - }; 167 - 168 - /* Apps bus */ 169 - apps@3e300000 { 170 - compatible = "simple-bus"; 171 - ranges = <0 0x3e300000 0x01b77000>; 172 - #address-cells = <1>; 173 - #size-cells = <1>; 174 - 175 - usbotg: usb@e20000 { 176 - compatible = "snps,dwc2"; 177 - reg = <0x00e20000 0x10000>; 178 - interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 179 - clocks = <&usb_otg_ahb_clk>; 180 - clock-names = "otg"; 181 - phys = <&usbphy>; 182 - phy-names = "usb2-phy"; 183 - status = "disabled"; 184 - }; 185 - 186 - usbphy: usb-phy@e30000 { 187 - compatible = "brcm,kona-usb2-phy"; 188 - reg = <0x00e30000 0x28>; 189 - #phy-cells = <0>; 190 - status = "disabled"; 191 - }; 192 - 193 - sdio1: mmc@e80000 { 194 - compatible = "brcm,kona-sdhci"; 195 - reg = <0x00e80000 0x801c>; 196 - interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 197 - clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO1>; 198 - status = "disabled"; 199 - }; 200 - 201 - sdio2: mmc@e90000 { 202 - compatible = "brcm,kona-sdhci"; 203 - reg = <0x00e90000 0x801c>; 204 - interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 205 - clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO2>; 206 - status = "disabled"; 207 - }; 208 - 209 - sdio3: mmc@ea0000 { 210 - compatible = "brcm,kona-sdhci"; 211 - reg = <0x00ea0000 0x801c>; 212 - interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 213 - clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO3>; 214 - status = "disabled"; 215 - }; 216 - 217 - sdio4: mmc@eb0000 { 218 - compatible = "brcm,kona-sdhci"; 219 - reg = <0x00eb0000 0x801c>; 220 - interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 221 - clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO4>; 222 - status = "disabled"; 223 - }; 224 - 85 + &apps { 225 86 cdc: cdc@1b0e000 { 226 87 compatible = "brcm,bcm23550-cdc"; 227 88 reg = <0x01b0e000 0x78>; ··· 64 267 reg = <0x01b21000 0x1000>, 65 268 <0x01b22000 0x1000>; 66 269 }; 67 - }; 270 + }; 68 271 69 - clocks { 70 - #address-cells = <1>; 71 - #size-cells = <1>; 72 - ranges; 272 + &bsc1 { 273 + compatible = "brcm,bcm23550-i2c", "brcm,kona-i2c"; 274 + }; 73 275 74 - /* 75 - * Fixed clocks are defined before CCUs whose 76 - * clocks may depend on them. 77 - */ 276 + &bsc2 { 277 + compatible = "brcm,bcm23550-i2c", "brcm,kona-i2c"; 278 + }; 78 279 79 - ref_32k_clk: ref_32k { 80 - #clock-cells = <0>; 81 - compatible = "fixed-clock"; 82 - clock-frequency = <32768>; 83 - }; 280 + &bsc3 { 281 + compatible = "brcm,bcm23550-i2c", "brcm,kona-i2c"; 282 + }; 84 283 85 - bbl_32k_clk: bbl_32k { 86 - #clock-cells = <0>; 87 - compatible = "fixed-clock"; 88 - clock-frequency = <32768>; 89 - }; 284 + &bsc4 { 285 + compatible = "brcm,bcm23550-i2c", "brcm,kona-i2c"; 286 + }; 90 287 91 - ref_13m_clk: ref_13m { 92 - #clock-cells = <0>; 93 - compatible = "fixed-clock"; 94 - clock-frequency = <13000000>; 95 - }; 288 + &gpio { 289 + compatible = "brcm,bcm23550-gpio", "brcm,kona-gpio"; 290 + }; 96 291 97 - var_13m_clk: var_13m { 98 - #clock-cells = <0>; 99 - compatible = "fixed-clock"; 100 - clock-frequency = <13000000>; 101 - }; 102 - 103 - dft_19_5m_clk: dft_19_5m { 104 - #clock-cells = <0>; 105 - compatible = "fixed-clock"; 106 - clock-frequency = <19500000>; 107 - }; 108 - 109 - ref_crystal_clk: ref_crystal { 110 - #clock-cells = <0>; 111 - compatible = "fixed-clock"; 112 - clock-frequency = <26000000>; 113 - }; 114 - 115 - ref_52m_clk: ref_52m { 116 - #clock-cells = <0>; 117 - compatible = "fixed-clock"; 118 - clock-frequency = <52000000>; 119 - }; 120 - 121 - var_52m_clk: var_52m { 122 - #clock-cells = <0>; 123 - compatible = "fixed-clock"; 124 - clock-frequency = <52000000>; 125 - }; 126 - 127 - usb_otg_ahb_clk: usb_otg_ahb { 128 - #clock-cells = <0>; 129 - compatible = "fixed-clock"; 130 - clock-frequency = <52000000>; 131 - }; 132 - 133 - ref_96m_clk: ref_96m { 134 - #clock-cells = <0>; 135 - compatible = "fixed-clock"; 136 - clock-frequency = <96000000>; 137 - }; 138 - 139 - var_96m_clk: var_96m { 140 - #clock-cells = <0>; 141 - compatible = "fixed-clock"; 142 - clock-frequency = <96000000>; 143 - }; 144 - 145 - ref_104m_clk: ref_104m { 146 - #clock-cells = <0>; 147 - compatible = "fixed-clock"; 148 - clock-frequency = <104000000>; 149 - }; 150 - 151 - var_104m_clk: var_104m { 152 - #clock-cells = <0>; 153 - compatible = "fixed-clock"; 154 - clock-frequency = <104000000>; 155 - }; 156 - 157 - ref_156m_clk: ref_156m { 158 - #clock-cells = <0>; 159 - compatible = "fixed-clock"; 160 - clock-frequency = <156000000>; 161 - }; 162 - 163 - var_156m_clk: var_156m { 164 - #clock-cells = <0>; 165 - compatible = "fixed-clock"; 166 - clock-frequency = <156000000>; 167 - }; 168 - 169 - root_ccu: root_ccu@35001000 { 170 - compatible = "brcm,bcm21664-root-ccu"; 171 - reg = <0x35001000 0x0f00>; 172 - #clock-cells = <1>; 173 - clock-output-names = "frac_1m"; 174 - }; 175 - 176 - aon_ccu: aon_ccu@35002000 { 177 - compatible = "brcm,bcm21664-aon-ccu"; 178 - reg = <0x35002000 0x0f00>; 179 - #clock-cells = <1>; 180 - clock-output-names = "hub_timer"; 181 - }; 182 - 183 - slave_ccu: slave_ccu@3e011000 { 184 - compatible = "brcm,bcm21664-slave-ccu"; 185 - reg = <0x3e011000 0x0f00>; 186 - #clock-cells = <1>; 187 - clock-output-names = "uartb", 188 - "uartb2", 189 - "uartb3", 190 - "bsc1", 191 - "bsc2", 192 - "bsc3", 193 - "bsc4"; 194 - }; 195 - 196 - master_ccu: master_ccu@3f001000 { 197 - compatible = "brcm,bcm21664-master-ccu"; 198 - reg = <0x3f001000 0x0f00>; 199 - #clock-cells = <1>; 200 - clock-output-names = "sdio1", 201 - "sdio2", 202 - "sdio3", 203 - "sdio4", 204 - "sdio1_sleep", 205 - "sdio2_sleep", 206 - "sdio3_sleep", 207 - "sdio4_sleep"; 208 - }; 209 - }; 292 + &smc { 293 + compatible = "brcm,bcm23550-smc", "brcm,kona-smc"; 210 294 };