amd-xgbe: Support defining PHY resources in ETH device node

Simplify the device tree support of the amd-xgbe driver by defining
the PHY-related resources within the ethernet device node. The support
provides backwards compatibility with the original way.

Update the driver version to 1.0.2.

Signed-off-by: Tom Lendacky <[e-mail]>
Signed-off-by: David S. Miller <[e-mail]>

Documentation/devicetree/bindings/net/amd-xgbe.txt

···
 * AMD 10GbE driver (amd-xgbe)
 
-Required properties (ethernet device):
+Required properties:
 - compatible: Should be "amd,xgbe-seattle-v1a"
 - reg: Address and length of the register sets for the device
    - MAC registers
    - PCS registers
+   - SerDes Rx/Tx registers
+   - SerDes integration registers (1/2)
+   - SerDes integration registers (2/2)
 - interrupt-parent: Should be the phandle for the interrupt controller
   that services interrupts for this device
 - interrupts: Should contain the amd-xgbe interrupt(s). The first interrupt
   listed is required and is the general device interrupt. If the optional
   amd,per-channel-interrupt property is specified, then one additional
-  interrupt for each DMA channel supported by the device should be specified
+  interrupt for each DMA channel supported by the device should be specified.
+  The last interrupt listed should be the PCS auto-negotiation interrupt.
 - clocks:
    - DMA clock for the amd-xgbe device (used for calculating the
      correct Rx interrupt watchdog timer value on a DMA channel
···
 - clock-names: Should be the names of the clocks
    - "dma_clk" for the DMA clock
    - "ptp_clk" for the PTP clock
-- phy-handle: See ethernet.txt file in the same directory
 - phy-mode: See ethernet.txt file in the same directory
 
-Optional properties (ethernet device):
+Optional properties:
 - mac-address: mac address to be assigned to the device. Can be overridden
   by UEFI.
 - dma-coherent: Present if dma operations are coherent
 - amd,per-channel-interrupt: Indicates that Rx and Tx complete will generate
   a unique interrupt for each DMA channel - this requires an additional
   interrupt be configured for each DMA channel
-
-Required properties (phy device):
-- compatible: Should be "amd,xgbe-phy-seattle-v1a"
-- reg: Address and length of the register sets for the device
-   - SerDes Rx/Tx registers
-   - SerDes integration registers (1/2)
-   - SerDes integration registers (2/2)
-- interrupt-parent: Should be the phandle for the interrupt controller
-  that services interrupts for this device
-- interrupts: Should contain the amd-xgbe-phy interrupt.
-
-Optional properties (phy device):
 - amd,speed-set: Speed capabilities of the device
     0 - 1GbE and 10GbE (default)
     1 - 2.5GbE and 10GbE
···
 	xgbe@e0700000 {
 		compatible = "amd,xgbe-seattle-v1a";
 		reg = <0 0xe0700000 0 0x80000>,
-		      <0 0xe0780000 0 0x80000>;
-		interrupt-parent = <&gic>;
-		interrupts = <0 325 4>,
-			     <0 326 1>, <0 327 1>, <0 328 1>, <0 329 1>;
-		amd,per-channel-interrupt;
-		clocks = <&xgbe_dma_clk>, <&xgbe_ptp_clk>;
-		clock-names = "dma_clk", "ptp_clk";
-		phy-handle = <&xgbe_phy>;
-		phy-mode = "xgmii";
-		mac-address = [ 02 a1 a2 a3 a4 a5 ];
-	};
-
-	xgbe_phy@e1240800 {
-		compatible = "amd,xgbe-phy-seattle-v1a";
-		reg = <0 0xe1240800 0 0x00400>,
+		      <0 0xe0780000 0 0x80000>,
+		      <0 0xe1240800 0 0x00400>,
 		      <0 0xe1250000 0 0x00060>,
 		      <0 0xe1250080 0 0x00004>;
 		interrupt-parent = <&gic>;
-		interrupts = <0 323 4>;
+		interrupts = <0 325 4>,
+			     <0 326 1>, <0 327 1>, <0 328 1>, <0 329 1>,
+			     <0 323 4>;
+		amd,per-channel-interrupt;
+		clocks = <&xgbe_dma_clk>, <&xgbe_ptp_clk>;
+		clock-names = "dma_clk", "ptp_clk";
+		phy-mode = "xgmii";
+		mac-address = [ 02 a1 a2 a3 a4 a5 ];
 		amd,speed-set = <0>;
 		amd,serdes-blwc = <1>, <1>, <0>;
 		amd,serdes-cdr-rate = <2>, <2>, <7>;

drivers/net/ethernet/amd/xgbe/xgbe-main.c

···
 	struct platform_device *phy_pdev;
 
 	phy_node = of_parse_phandle(dev->of_node, "phy-handle", 0);
-	if (!phy_node) {
-		dev_err(dev, "unable to locate phy device\n");
-		return NULL;
+	if (phy_node) {
+		/* Old style device tree:
+		 *   The XGBE and PHY resources are separate
+		 */
+		phy_pdev = of_find_device_by_node(phy_node);
+		of_node_put(phy_node);
+	} else {
+		/* New style device tree:
+		 *   The XGBE and PHY resources are grouped together with
+		 *   the PHY resources listed last
+		 */
+		get_device(dev);
+		phy_pdev = pdata->pdev;
 	}
-
-	phy_pdev = of_find_device_by_node(phy_node);
-	of_node_put(phy_node);
 
 	return phy_pdev;
 }
···
 	phy_dev = &phy_pdev->dev;
 
 	if (pdev == phy_pdev) {
-		/* ACPI:
+		/* New style device tree or ACPI:
 		 *   The XGBE and PHY resources are grouped together with
 		 *   the PHY resources listed last
 		 */
 		phy_memnum = xgbe_resource_count(pdev, IORESOURCE_MEM) - 3;
 		phy_irqnum = xgbe_resource_count(pdev, IORESOURCE_IRQ) - 1;
 	} else {
-		/* Device tree:
+		/* Old style device tree:
 		 *   The XGBE and PHY resources are separate
 		 */
 		phy_memnum = 0;

drivers/net/ethernet/amd/xgbe/xgbe.h

···
 #include <net/dcbnl.h>
 
 #define XGBE_DRV_NAME		"amd-xgbe"
-#define XGBE_DRV_VERSION	"1.0.1"
+#define XGBE_DRV_VERSION	"1.0.2"
 #define XGBE_DRV_DESC		"AMD 10 Gigabit Ethernet Driver"
 
 /* Descriptor related defines */