dt-bindings: timer: Add nxp tpm timer binding doc

Adding NXP Low Power Timer/Pulse Width Modulation Module (TPM)
binding doc.

Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Bai Ping <ping.bai@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>

authored by

Dong Aisheng and committed by
Daniel Lezcano
34b0c26c 4e2a8097

+28
+28
Documentation/devicetree/bindings/timer/nxp,tpm-timer.txt
··· 1 + NXP Low Power Timer/Pulse Width Modulation Module (TPM) 2 + 3 + The Timer/PWM Module (TPM) supports input capture, output compare, 4 + and the generation of PWM signals to control electric motor and power 5 + management applications. The counter, compare and capture registers 6 + are clocked by an asynchronous clock that can remain enabled in low 7 + power modes. TPM can support global counter bus where one TPM drives 8 + the counter bus for the others, provided bit width is the same. 9 + 10 + Required properties: 11 + 12 + - compatible : should be "fsl,imx7ulp-tpm" 13 + - reg : Specifies base physical address and size of the register sets 14 + for the clock event device and clock source device. 15 + - interrupts : Should be the clock event device interrupt. 16 + - clocks : The clocks provided by the SoC to drive the timer, must contain 17 + an entry for each entry in clock-names. 18 + - clock-names : Must include the following entries: "igp" and "per". 19 + 20 + Example: 21 + tpm5: tpm@40260000 { 22 + compatible = "fsl,imx7ulp-tpm"; 23 + reg = <0x40260000 0x1000>; 24 + interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 25 + clocks = <&clks IMX7ULP_CLK_NIC1_BUS_DIV>, 26 + <&clks IMX7ULP_CLK_LPTPM5>; 27 + clock-names = "ipg", "per"; 28 + };