tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

smb347-charger: Convert to regmap API

The smb347-charger driver does a lot of read-modify-write to the device
registers. Instead of open-coding everything we can take advantage of
regmap API which provides nice functions to do this kind of things.

In addition there is no need for custom debugfs file for dumping
registers as this is already provided by the regmap API.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Anton Vorontsov <anton.vorontsov@linaro.org>

authored by

Mika Westerberg and committed by
Anton Vorontsov 34298d40 d72bade7

+232 -327
+1
drivers/power/Kconfig
··· 291 291 config CHARGER_SMB347 292 292 tristate "Summit Microelectronics SMB347 Battery Charger" 293 293 depends on I2C 294 + select REGMAP_I2C 294 295 help 295 296 Say Y to include support for Summit Microelectronics SMB347 296 297 Battery Charger.
+231 -327
drivers/power/smb347-charger.c
··· 11 11 * published by the Free Software Foundation. 12 12 */ 13 13 14 - #include <linux/debugfs.h> 15 14 #include <linux/gpio.h> 16 15 #include <linux/kernel.h> 17 16 #include <linux/module.h> ··· 20 21 #include <linux/mutex.h> 21 22 #include <linux/power_supply.h> 22 23 #include <linux/power/smb347-charger.h> 23 - #include <linux/seq_file.h> 24 + #include <linux/regmap.h> 24 25 25 26 /* 26 27 * Configuration registers. These are mirrored to volatile RAM and can be ··· 38 39 #define CFG_CURRENT_LIMIT_DC_SHIFT 4 39 40 #define CFG_CURRENT_LIMIT_USB_MASK 0x0f 40 41 #define CFG_FLOAT_VOLTAGE 0x03 42 + #define CFG_FLOAT_VOLTAGE_FLOAT_MASK 0x3f 41 43 #define CFG_FLOAT_VOLTAGE_THRESHOLD_MASK 0xc0 42 44 #define CFG_FLOAT_VOLTAGE_THRESHOLD_SHIFT 6 43 45 #define CFG_STAT 0x05 ··· 113 113 #define STAT_C_CHARGER_ERROR BIT(6) 114 114 #define STAT_E 0x3f 115 115 116 + #define SMB347_MAX_REGISTER 0x3f 117 + 116 118 /** 117 119 * struct smb347_charger - smb347 charger instance 118 120 * @lock: protects concurrent access to online variables 119 - * @client: pointer to i2c client 121 + * @dev: pointer to device 122 + * @regmap: pointer to driver regmap 120 123 * @mains: power_supply instance for AC/DC power 121 124 * @usb: power_supply instance for USB power 122 125 * @battery: power_supply instance for battery 123 126 * @mains_online: is AC/DC input connected 124 127 * @usb_online: is USB input connected 125 128 * @charging_enabled: is charging enabled 126 - * @dentry: for debugfs 127 129 * @pdata: pointer to platform data 128 130 */ 129 131 struct smb347_charger { 130 132 struct mutex lock; 131 - struct i2c_client *client; 133 + struct device *dev; 134 + struct regmap *regmap; 132 135 struct power_supply mains; 133 136 struct power_supply usb; 134 137 struct power_supply battery; 135 138 bool mains_online; 136 139 bool usb_online; 137 140 bool charging_enabled; 138 - struct dentry *dentry; 139 141 const struct smb347_charger_platform_data *pdata; 140 142 }; 141 143 ··· 214 212 return i > 0 ? i - 1 : -EINVAL; 215 213 } 216 214 217 - static int smb347_read(struct smb347_charger *smb, u8 reg) 218 - { 219 - int ret; 220 - 221 - ret = i2c_smbus_read_byte_data(smb->client, reg); 222 - if (ret < 0) 223 - dev_warn(&smb->client->dev, "failed to read reg 0x%x: %d\n", 224 - reg, ret); 225 - return ret; 226 - } 227 - 228 - static int smb347_write(struct smb347_charger *smb, u8 reg, u8 val) 229 - { 230 - int ret; 231 - 232 - ret = i2c_smbus_write_byte_data(smb->client, reg, val); 233 - if (ret < 0) 234 - dev_warn(&smb->client->dev, "failed to write reg 0x%x: %d\n", 235 - reg, ret); 236 - return ret; 237 - } 238 - 239 215 /** 240 216 * smb347_update_ps_status - refreshes the power source status 241 217 * @smb: pointer to smb347 charger instance ··· 226 246 { 227 247 bool usb = false; 228 248 bool dc = false; 249 + unsigned int val; 229 250 int ret; 230 251 231 - ret = smb347_read(smb, IRQSTAT_E); 252 + ret = regmap_read(smb->regmap, IRQSTAT_E, &val); 232 253 if (ret < 0) 233 254 return ret; 234 255 ··· 238 257 * platform data _and_ whether corresponding undervoltage is set. 239 258 */ 240 259 if (smb->pdata->use_mains) 241 - dc = !(ret & IRQSTAT_E_DCIN_UV_STAT); 260 + dc = !(val & IRQSTAT_E_DCIN_UV_STAT); 242 261 if (smb->pdata->use_usb) 243 - usb = !(ret & IRQSTAT_E_USBIN_UV_STAT); 262 + usb = !(val & IRQSTAT_E_USBIN_UV_STAT); 244 263 245 264 mutex_lock(&smb->lock); 246 265 ret = smb->mains_online != dc || smb->usb_online != usb; ··· 280 299 */ 281 300 static int smb347_charging_status(struct smb347_charger *smb) 282 301 { 302 + unsigned int val; 283 303 int ret; 284 304 285 305 if (!smb347_is_ps_online(smb)) 286 306 return 0; 287 307 288 - ret = smb347_read(smb, STAT_C); 308 + ret = regmap_read(smb->regmap, STAT_C, &val); 289 309 if (ret < 0) 290 310 return 0; 291 311 292 - return (ret & STAT_C_CHG_MASK) >> STAT_C_CHG_SHIFT; 312 + return (val & STAT_C_CHG_MASK) >> STAT_C_CHG_SHIFT; 293 313 } 294 314 295 315 static int smb347_charging_set(struct smb347_charger *smb, bool enable) ··· 298 316 int ret = 0; 299 317 300 318 if (smb->pdata->enable_control != SMB347_CHG_ENABLE_SW) { 301 - dev_dbg(&smb->client->dev, 302 - "charging enable/disable in SW disabled\n"); 319 + dev_dbg(smb->dev, "charging enable/disable in SW disabled\n"); 303 320 return 0; 304 321 } 305 322 306 323 mutex_lock(&smb->lock); 307 324 if (smb->charging_enabled != enable) { 308 - ret = smb347_read(smb, CMD_A); 309 - if (ret < 0) 310 - goto out; 311 - 312 - smb->charging_enabled = enable; 313 - 314 - if (enable) 315 - ret |= CMD_A_CHG_ENABLED; 316 - else 317 - ret &= ~CMD_A_CHG_ENABLED; 318 - 319 - ret = smb347_write(smb, CMD_A, ret); 325 + ret = regmap_update_bits(smb->regmap, CMD_A, CMD_A_CHG_ENABLED, 326 + enable ? CMD_A_CHG_ENABLED : 0); 327 + if (!ret) 328 + smb->charging_enabled = enable; 320 329 } 321 - out: 322 330 mutex_unlock(&smb->lock); 323 331 return ret; 324 332 } ··· 335 363 if (smb347_is_ps_online(smb)) { 336 364 ret = smb347_charging_enable(smb); 337 365 if (ret < 0) 338 - dev_err(&smb->client->dev, 339 - "failed to enable charging\n"); 366 + dev_err(smb->dev, "failed to enable charging\n"); 340 367 } else { 341 368 ret = smb347_charging_disable(smb); 342 369 if (ret < 0) 343 - dev_err(&smb->client->dev, 344 - "failed to disable charging\n"); 370 + dev_err(smb->dev, "failed to disable charging\n"); 345 371 } 346 372 347 373 return ret; ··· 347 377 348 378 static int smb347_set_charge_current(struct smb347_charger *smb) 349 379 { 350 - int ret, val; 351 - 352 - ret = smb347_read(smb, CFG_CHARGE_CURRENT); 353 - if (ret < 0) 354 - return ret; 380 + int ret; 355 381 356 382 if (smb->pdata->max_charge_current) { 357 - val = current_to_hw(fcc_tbl, ARRAY_SIZE(fcc_tbl), 383 + ret = current_to_hw(fcc_tbl, ARRAY_SIZE(fcc_tbl), 358 384 smb->pdata->max_charge_current); 359 - if (val < 0) 360 - return val; 385 + if (ret < 0) 386 + return ret; 361 387 362 - ret &= ~CFG_CHARGE_CURRENT_FCC_MASK; 363 - ret |= val << CFG_CHARGE_CURRENT_FCC_SHIFT; 388 + ret = regmap_update_bits(smb->regmap, CFG_CHARGE_CURRENT, 389 + CFG_CHARGE_CURRENT_FCC_MASK, 390 + ret << CFG_CHARGE_CURRENT_FCC_SHIFT); 391 + if (ret < 0) 392 + return ret; 364 393 } 365 394 366 395 if (smb->pdata->pre_charge_current) { 367 - val = current_to_hw(pcc_tbl, ARRAY_SIZE(pcc_tbl), 396 + ret = current_to_hw(pcc_tbl, ARRAY_SIZE(pcc_tbl), 368 397 smb->pdata->pre_charge_current); 369 - if (val < 0) 370 - return val; 398 + if (ret < 0) 399 + return ret; 371 400 372 - ret &= ~CFG_CHARGE_CURRENT_PCC_MASK; 373 - ret |= val << CFG_CHARGE_CURRENT_PCC_SHIFT; 401 + ret = regmap_update_bits(smb->regmap, CFG_CHARGE_CURRENT, 402 + CFG_CHARGE_CURRENT_PCC_MASK, 403 + ret << CFG_CHARGE_CURRENT_PCC_SHIFT); 404 + if (ret < 0) 405 + return ret; 374 406 } 375 407 376 408 if (smb->pdata->termination_current) { 377 - val = current_to_hw(tc_tbl, ARRAY_SIZE(tc_tbl), 409 + ret = current_to_hw(tc_tbl, ARRAY_SIZE(tc_tbl), 378 410 smb->pdata->termination_current); 379 - if (val < 0) 380 - return val; 411 + if (ret < 0) 412 + return ret; 381 413 382 - ret &= ~CFG_CHARGE_CURRENT_TC_MASK; 383 - ret |= val; 414 + ret = regmap_update_bits(smb->regmap, CFG_CHARGE_CURRENT, 415 + CFG_CHARGE_CURRENT_TC_MASK, ret); 416 + if (ret < 0) 417 + return ret; 384 418 } 385 419 386 - return smb347_write(smb, CFG_CHARGE_CURRENT, ret); 420 + return 0; 387 421 } 388 422 389 423 static int smb347_set_current_limits(struct smb347_charger *smb) 390 424 { 391 - int ret, val; 392 - 393 - ret = smb347_read(smb, CFG_CURRENT_LIMIT); 394 - if (ret < 0) 395 - return ret; 425 + int ret; 396 426 397 427 if (smb->pdata->mains_current_limit) { 398 - val = current_to_hw(icl_tbl, ARRAY_SIZE(icl_tbl), 428 + ret = current_to_hw(icl_tbl, ARRAY_SIZE(icl_tbl), 399 429 smb->pdata->mains_current_limit); 400 - if (val < 0) 401 - return val; 430 + if (ret < 0) 431 + return ret; 402 432 403 - ret &= ~CFG_CURRENT_LIMIT_DC_MASK; 404 - ret |= val << CFG_CURRENT_LIMIT_DC_SHIFT; 433 + ret = regmap_update_bits(smb->regmap, CFG_CURRENT_LIMIT, 434 + CFG_CURRENT_LIMIT_DC_MASK, 435 + ret << CFG_CURRENT_LIMIT_DC_SHIFT); 436 + if (ret < 0) 437 + return ret; 405 438 } 406 439 407 440 if (smb->pdata->usb_hc_current_limit) { 408 - val = current_to_hw(icl_tbl, ARRAY_SIZE(icl_tbl), 441 + ret = current_to_hw(icl_tbl, ARRAY_SIZE(icl_tbl), 409 442 smb->pdata->usb_hc_current_limit); 410 - if (val < 0) 411 - return val; 443 + if (ret < 0) 444 + return ret; 412 445 413 - ret &= ~CFG_CURRENT_LIMIT_USB_MASK; 414 - ret |= val; 446 + ret = regmap_update_bits(smb->regmap, CFG_CURRENT_LIMIT, 447 + CFG_CURRENT_LIMIT_USB_MASK, ret); 448 + if (ret < 0) 449 + return ret; 415 450 } 416 451 417 - return smb347_write(smb, CFG_CURRENT_LIMIT, ret); 452 + return 0; 418 453 } 419 454 420 455 static int smb347_set_voltage_limits(struct smb347_charger *smb) 421 456 { 422 - int ret, val; 423 - 424 - ret = smb347_read(smb, CFG_FLOAT_VOLTAGE); 425 - if (ret < 0) 426 - return ret; 457 + int ret; 427 458 428 459 if (smb->pdata->pre_to_fast_voltage) { 429 - val = smb->pdata->pre_to_fast_voltage; 460 + ret = smb->pdata->pre_to_fast_voltage; 430 461 431 462 /* uV */ 432 - val = clamp_val(val, 2400000, 3000000) - 2400000; 433 - val /= 200000; 463 + ret = clamp_val(ret, 2400000, 3000000) - 2400000; 464 + ret /= 200000; 434 465 435 - ret &= ~CFG_FLOAT_VOLTAGE_THRESHOLD_MASK; 436 - ret |= val << CFG_FLOAT_VOLTAGE_THRESHOLD_SHIFT; 466 + ret = regmap_update_bits(smb->regmap, CFG_FLOAT_VOLTAGE, 467 + CFG_FLOAT_VOLTAGE_THRESHOLD_MASK, 468 + ret << CFG_FLOAT_VOLTAGE_THRESHOLD_SHIFT); 469 + if (ret < 0) 470 + return ret; 437 471 } 438 472 439 473 if (smb->pdata->max_charge_voltage) { 440 - val = smb->pdata->max_charge_voltage; 474 + ret = smb->pdata->max_charge_voltage; 441 475 442 476 /* uV */ 443 - val = clamp_val(val, 3500000, 4500000) - 3500000; 444 - val /= 20000; 477 + ret = clamp_val(ret, 3500000, 4500000) - 3500000; 478 + ret /= 20000; 445 479 446 - ret |= val; 480 + ret = regmap_update_bits(smb->regmap, CFG_FLOAT_VOLTAGE, 481 + CFG_FLOAT_VOLTAGE_FLOAT_MASK, ret); 482 + if (ret < 0) 483 + return ret; 447 484 } 448 485 449 - return smb347_write(smb, CFG_FLOAT_VOLTAGE, ret); 486 + return 0; 450 487 } 451 488 452 489 static int smb347_set_temp_limits(struct smb347_charger *smb) 453 490 { 454 491 bool enable_therm_monitor = false; 455 - int ret, val; 492 + int ret = 0; 493 + int val; 456 494 457 495 if (smb->pdata->chip_temp_threshold) { 458 496 val = smb->pdata->chip_temp_threshold; ··· 469 491 val = clamp_val(val, 100, 130) - 100; 470 492 val /= 10; 471 493 472 - ret = smb347_read(smb, CFG_OTG); 473 - if (ret < 0) 474 - return ret; 475 - 476 - ret &= ~CFG_OTG_TEMP_THRESHOLD_MASK; 477 - ret |= val << CFG_OTG_TEMP_THRESHOLD_SHIFT; 478 - 479 - ret = smb347_write(smb, CFG_OTG, ret); 494 + ret = regmap_update_bits(smb->regmap, CFG_OTG, 495 + CFG_OTG_TEMP_THRESHOLD_MASK, 496 + val << CFG_OTG_TEMP_THRESHOLD_SHIFT); 480 497 if (ret < 0) 481 498 return ret; 482 499 } 483 - 484 - ret = smb347_read(smb, CFG_TEMP_LIMIT); 485 - if (ret < 0) 486 - return ret; 487 500 488 501 if (smb->pdata->soft_cold_temp_limit != SMB347_TEMP_USE_DEFAULT) { 489 502 val = smb->pdata->soft_cold_temp_limit; ··· 484 515 /* this goes from higher to lower so invert the value */ 485 516 val = ~val & 0x3; 486 517 487 - ret &= ~CFG_TEMP_LIMIT_SOFT_COLD_MASK; 488 - ret |= val << CFG_TEMP_LIMIT_SOFT_COLD_SHIFT; 518 + ret = regmap_update_bits(smb->regmap, CFG_TEMP_LIMIT, 519 + CFG_TEMP_LIMIT_SOFT_COLD_MASK, 520 + val << CFG_TEMP_LIMIT_SOFT_COLD_SHIFT); 521 + if (ret < 0) 522 + return ret; 489 523 490 524 enable_therm_monitor = true; 491 525 } ··· 499 527 val = clamp_val(val, 40, 55) - 40; 500 528 val /= 5; 501 529 502 - ret &= ~CFG_TEMP_LIMIT_SOFT_HOT_MASK; 503 - ret |= val << CFG_TEMP_LIMIT_SOFT_HOT_SHIFT; 530 + ret = regmap_update_bits(smb->regmap, CFG_TEMP_LIMIT, 531 + CFG_TEMP_LIMIT_SOFT_HOT_MASK, 532 + val << CFG_TEMP_LIMIT_SOFT_HOT_SHIFT); 533 + if (ret < 0) 534 + return ret; 504 535 505 536 enable_therm_monitor = true; 506 537 } ··· 516 541 /* this goes from higher to lower so invert the value */ 517 542 val = ~val & 0x3; 518 543 519 - ret &= ~CFG_TEMP_LIMIT_HARD_COLD_MASK; 520 - ret |= val << CFG_TEMP_LIMIT_HARD_COLD_SHIFT; 544 + ret = regmap_update_bits(smb->regmap, CFG_TEMP_LIMIT, 545 + CFG_TEMP_LIMIT_HARD_COLD_MASK, 546 + val << CFG_TEMP_LIMIT_HARD_COLD_SHIFT); 547 + if (ret < 0) 548 + return ret; 521 549 522 550 enable_therm_monitor = true; 523 551 } ··· 531 553 val = clamp_val(val, 50, 65) - 50; 532 554 val /= 5; 533 555 534 - ret &= ~CFG_TEMP_LIMIT_HARD_HOT_MASK; 535 - ret |= val << CFG_TEMP_LIMIT_HARD_HOT_SHIFT; 556 + ret = regmap_update_bits(smb->regmap, CFG_TEMP_LIMIT, 557 + CFG_TEMP_LIMIT_HARD_HOT_MASK, 558 + val << CFG_TEMP_LIMIT_HARD_HOT_SHIFT); 559 + if (ret < 0) 560 + return ret; 536 561 537 562 enable_therm_monitor = true; 538 563 } 539 - 540 - ret = smb347_write(smb, CFG_TEMP_LIMIT, ret); 541 - if (ret < 0) 542 - return ret; 543 564 544 565 /* 545 566 * If any of the temperature limits are set, we also enable the ··· 551 574 * depending on the configuration. 552 575 */ 553 576 if (enable_therm_monitor) { 554 - ret = smb347_read(smb, CFG_THERM); 555 - if (ret < 0) 556 - return ret; 557 - 558 - ret &= ~CFG_THERM_MONITOR_DISABLED; 559 - 560 - ret = smb347_write(smb, CFG_THERM, ret); 577 + ret = regmap_update_bits(smb->regmap, CFG_THERM, 578 + CFG_THERM_MONITOR_DISABLED, 0); 561 579 if (ret < 0) 562 580 return ret; 563 581 } 564 582 565 583 if (smb->pdata->suspend_on_hard_temp_limit) { 566 - ret = smb347_read(smb, CFG_SYSOK); 567 - if (ret < 0) 568 - return ret; 569 - 570 - ret &= ~CFG_SYSOK_SUSPEND_HARD_LIMIT_DISABLED; 571 - 572 - ret = smb347_write(smb, CFG_SYSOK, ret); 584 + ret = regmap_update_bits(smb->regmap, CFG_SYSOK, 585 + CFG_SYSOK_SUSPEND_HARD_LIMIT_DISABLED, 0); 573 586 if (ret < 0) 574 587 return ret; 575 588 } ··· 568 601 SMB347_SOFT_TEMP_COMPENSATE_DEFAULT) { 569 602 val = smb->pdata->soft_temp_limit_compensation & 0x3; 570 603 571 - ret = smb347_read(smb, CFG_THERM); 604 + ret = regmap_update_bits(smb->regmap, CFG_THERM, 605 + CFG_THERM_SOFT_HOT_COMPENSATION_MASK, 606 + val << CFG_THERM_SOFT_HOT_COMPENSATION_SHIFT); 572 607 if (ret < 0) 573 608 return ret; 574 609 575 - ret &= ~CFG_THERM_SOFT_HOT_COMPENSATION_MASK; 576 - ret |= val << CFG_THERM_SOFT_HOT_COMPENSATION_SHIFT; 577 - 578 - ret &= ~CFG_THERM_SOFT_COLD_COMPENSATION_MASK; 579 - ret |= val << CFG_THERM_SOFT_COLD_COMPENSATION_SHIFT; 580 - 581 - ret = smb347_write(smb, CFG_THERM, ret); 610 + ret = regmap_update_bits(smb->regmap, CFG_THERM, 611 + CFG_THERM_SOFT_COLD_COMPENSATION_MASK, 612 + val << CFG_THERM_SOFT_COLD_COMPENSATION_SHIFT); 582 613 if (ret < 0) 583 614 return ret; 584 615 } ··· 587 622 if (val < 0) 588 623 return val; 589 624 590 - ret = smb347_read(smb, CFG_OTG); 591 - if (ret < 0) 592 - return ret; 593 - 594 - ret &= ~CFG_OTG_CC_COMPENSATION_MASK; 595 - ret |= (val & 0x3) << CFG_OTG_CC_COMPENSATION_SHIFT; 596 - 597 - ret = smb347_write(smb, CFG_OTG, ret); 625 + ret = regmap_update_bits(smb->regmap, CFG_OTG, 626 + CFG_OTG_CC_COMPENSATION_MASK, 627 + (val & 0x3) << CFG_OTG_CC_COMPENSATION_SHIFT); 598 628 if (ret < 0) 599 629 return ret; 600 630 } ··· 608 648 */ 609 649 static int smb347_set_writable(struct smb347_charger *smb, bool writable) 610 650 { 611 - int ret; 612 - 613 - ret = smb347_read(smb, CMD_A); 614 - if (ret < 0) 615 - return ret; 616 - 617 - if (writable) 618 - ret |= CMD_A_ALLOW_WRITE; 619 - else 620 - ret &= ~CMD_A_ALLOW_WRITE; 621 - 622 - return smb347_write(smb, CMD_A, ret); 651 + return regmap_update_bits(smb->regmap, CMD_A, CMD_A_ALLOW_WRITE, 652 + writable ? CMD_A_ALLOW_WRITE : 0); 623 653 } 624 654 625 655 static int smb347_hw_init(struct smb347_charger *smb) 626 656 { 657 + unsigned int val; 627 658 int ret; 628 659 629 660 ret = smb347_set_writable(smb, true); ··· 643 692 644 693 /* If USB charging is disabled we put the USB in suspend mode */ 645 694 if (!smb->pdata->use_usb) { 646 - ret = smb347_read(smb, CMD_A); 647 - if (ret < 0) 648 - goto fail; 649 - 650 - ret |= CMD_A_SUSPEND_ENABLED; 651 - 652 - ret = smb347_write(smb, CMD_A, ret); 695 + ret = regmap_update_bits(smb->regmap, CMD_A, 696 + CMD_A_SUSPEND_ENABLED, 697 + CMD_A_SUSPEND_ENABLED); 653 698 if (ret < 0) 654 699 goto fail; 655 700 } 656 - 657 - ret = smb347_read(smb, CFG_OTHER); 658 - if (ret < 0) 659 - goto fail; 660 701 661 702 /* 662 703 * If configured by platform data, we enable hardware Auto-OTG 663 704 * support for driving VBUS. Otherwise we disable it. 664 705 */ 665 - ret &= ~CFG_OTHER_RID_MASK; 666 - if (smb->pdata->use_usb_otg) 667 - ret |= CFG_OTHER_RID_ENABLED_AUTO_OTG; 668 - 669 - ret = smb347_write(smb, CFG_OTHER, ret); 670 - if (ret < 0) 671 - goto fail; 672 - 673 - ret = smb347_read(smb, CFG_PIN); 706 + ret = regmap_update_bits(smb->regmap, CFG_OTHER, CFG_OTHER_RID_MASK, 707 + smb->pdata->use_usb_otg ? CFG_OTHER_RID_ENABLED_AUTO_OTG : 0); 674 708 if (ret < 0) 675 709 goto fail; 676 710 ··· 664 728 * command register unless pin control is specified in the platform 665 729 * data. 666 730 */ 667 - ret &= ~CFG_PIN_EN_CTRL_MASK; 668 - 669 731 switch (smb->pdata->enable_control) { 670 - case SMB347_CHG_ENABLE_SW: 671 - /* Do nothing, 0 means i2c control */ 672 - break; 673 732 case SMB347_CHG_ENABLE_PIN_ACTIVE_LOW: 674 - ret |= CFG_PIN_EN_CTRL_ACTIVE_LOW; 733 + val = CFG_PIN_EN_CTRL_ACTIVE_LOW; 675 734 break; 676 735 case SMB347_CHG_ENABLE_PIN_ACTIVE_HIGH: 677 - ret |= CFG_PIN_EN_CTRL_ACTIVE_HIGH; 736 + val = CFG_PIN_EN_CTRL_ACTIVE_HIGH; 737 + break; 738 + default: 739 + val = 0; 678 740 break; 679 741 } 680 742 681 - /* Disable Automatic Power Source Detection (APSD) interrupt. */ 682 - ret &= ~CFG_PIN_EN_APSD_IRQ; 743 + ret = regmap_update_bits(smb->regmap, CFG_PIN, CFG_PIN_EN_CTRL_MASK, 744 + val); 745 + if (ret < 0) 746 + goto fail; 683 747 684 - ret = smb347_write(smb, CFG_PIN, ret); 748 + /* Disable Automatic Power Source Detection (APSD) interrupt. */ 749 + ret = regmap_update_bits(smb->regmap, CFG_PIN, CFG_PIN_EN_APSD_IRQ, 0); 685 750 if (ret < 0) 686 751 goto fail; 687 752 ··· 700 763 static irqreturn_t smb347_interrupt(int irq, void *data) 701 764 { 702 765 struct smb347_charger *smb = data; 703 - int stat_c, irqstat_e, irqstat_c; 704 - irqreturn_t ret = IRQ_NONE; 766 + unsigned int stat_c, irqstat_e, irqstat_c; 767 + bool handled = false; 768 + int ret; 705 769 706 - stat_c = smb347_read(smb, STAT_C); 707 - if (stat_c < 0) { 708 - dev_warn(&smb->client->dev, "reading STAT_C failed\n"); 770 + ret = regmap_read(smb->regmap, STAT_C, &stat_c); 771 + if (ret < 0) { 772 + dev_warn(smb->dev, "reading STAT_C failed\n"); 709 773 return IRQ_NONE; 710 774 } 711 775 712 - irqstat_c = smb347_read(smb, IRQSTAT_C); 713 - if (irqstat_c < 0) { 714 - dev_warn(&smb->client->dev, "reading IRQSTAT_C failed\n"); 776 + ret = regmap_read(smb->regmap, IRQSTAT_C, &irqstat_c); 777 + if (ret < 0) { 778 + dev_warn(smb->dev, "reading IRQSTAT_C failed\n"); 715 779 return IRQ_NONE; 716 780 } 717 781 718 - irqstat_e = smb347_read(smb, IRQSTAT_E); 719 - if (irqstat_e < 0) { 720 - dev_warn(&smb->client->dev, "reading IRQSTAT_E failed\n"); 782 + ret = regmap_read(smb->regmap, IRQSTAT_E, &irqstat_e); 783 + if (ret < 0) { 784 + dev_warn(smb->dev, "reading IRQSTAT_E failed\n"); 721 785 return IRQ_NONE; 722 786 } 723 787 ··· 727 789 * disable charging. 728 790 */ 729 791 if (stat_c & STAT_C_CHARGER_ERROR) { 730 - dev_err(&smb->client->dev, 731 - "error in charger, disabling charging\n"); 792 + dev_err(smb->dev, "error in charger, disabling charging\n"); 732 793 733 794 smb347_charging_disable(smb); 734 795 power_supply_changed(&smb->battery); 735 - 736 - ret = IRQ_HANDLED; 796 + handled = true; 737 797 } 738 798 739 799 /* ··· 742 806 if (irqstat_c & (IRQSTAT_C_TERMINATION_IRQ | IRQSTAT_C_TAPER_IRQ)) { 743 807 if (irqstat_c & IRQSTAT_C_TERMINATION_STAT) 744 808 power_supply_changed(&smb->battery); 745 - ret = IRQ_HANDLED; 809 + handled = true; 746 810 } 747 811 748 812 /* ··· 757 821 if (smb->pdata->use_usb) 758 822 power_supply_changed(&smb->usb); 759 823 } 760 - ret = IRQ_HANDLED; 824 + handled = true; 761 825 } 762 826 763 - return ret; 827 + return handled ? IRQ_HANDLED : IRQ_NONE; 764 828 } 765 829 766 830 static int smb347_irq_set(struct smb347_charger *smb, bool enable) ··· 777 841 * - termination current reached 778 842 * - charger error 779 843 */ 780 - if (enable) { 781 - ret = smb347_write(smb, CFG_FAULT_IRQ, CFG_FAULT_IRQ_DCIN_UV); 782 - if (ret < 0) 783 - goto fail; 844 + ret = regmap_update_bits(smb->regmap, CFG_FAULT_IRQ, 0xff, 845 + enable ? CFG_FAULT_IRQ_DCIN_UV : 0); 846 + if (ret < 0) 847 + goto fail; 784 848 785 - ret = smb347_write(smb, CFG_STATUS_IRQ, 786 - CFG_STATUS_IRQ_TERMINATION_OR_TAPER); 787 - if (ret < 0) 788 - goto fail; 849 + ret = regmap_update_bits(smb->regmap, CFG_STATUS_IRQ, 0xff, 850 + enable ? CFG_STATUS_IRQ_TERMINATION_OR_TAPER : 0); 851 + if (ret < 0) 852 + goto fail; 789 853 790 - ret = smb347_read(smb, CFG_PIN); 791 - if (ret < 0) 792 - goto fail; 793 - 794 - ret |= CFG_PIN_EN_CHARGER_ERROR; 795 - 796 - ret = smb347_write(smb, CFG_PIN, ret); 797 - } else { 798 - ret = smb347_write(smb, CFG_FAULT_IRQ, 0); 799 - if (ret < 0) 800 - goto fail; 801 - 802 - ret = smb347_write(smb, CFG_STATUS_IRQ, 0); 803 - if (ret < 0) 804 - goto fail; 805 - 806 - ret = smb347_read(smb, CFG_PIN); 807 - if (ret < 0) 808 - goto fail; 809 - 810 - ret &= ~CFG_PIN_EN_CHARGER_ERROR; 811 - 812 - ret = smb347_write(smb, CFG_PIN, ret); 813 - } 814 - 854 + ret = regmap_update_bits(smb->regmap, CFG_PIN, CFG_PIN_EN_CHARGER_ERROR, 855 + enable ? CFG_PIN_EN_CHARGER_ERROR : 0); 815 856 fail: 816 857 smb347_set_writable(smb, false); 817 858 return ret; ··· 804 891 return smb347_irq_set(smb, false); 805 892 } 806 893 807 - static int smb347_irq_init(struct smb347_charger *smb) 894 + static int smb347_irq_init(struct smb347_charger *smb, 895 + struct i2c_client *client) 808 896 { 809 897 const struct smb347_charger_platform_data *pdata = smb->pdata; 810 898 int ret, irq = gpio_to_irq(pdata->irq_gpio); 811 899 812 - ret = gpio_request_one(pdata->irq_gpio, GPIOF_IN, smb->client->name); 900 + ret = gpio_request_one(pdata->irq_gpio, GPIOF_IN, client->name); 813 901 if (ret < 0) 814 902 goto fail; 815 903 816 904 ret = request_threaded_irq(irq, NULL, smb347_interrupt, 817 - IRQF_TRIGGER_FALLING, smb->client->name, 818 - smb); 905 + IRQF_TRIGGER_FALLING, client->name, smb); 819 906 if (ret < 0) 820 907 goto fail_gpio; 821 908 ··· 827 914 * Configure the STAT output to be suitable for interrupts: disable 828 915 * all other output (except interrupts) and make it active low. 829 916 */ 830 - ret = smb347_read(smb, CFG_STAT); 831 - if (ret < 0) 832 - goto fail_readonly; 833 - 834 - ret &= ~CFG_STAT_ACTIVE_HIGH; 835 - ret |= CFG_STAT_DISABLED; 836 - 837 - ret = smb347_write(smb, CFG_STAT, ret); 917 + ret = regmap_update_bits(smb->regmap, CFG_STAT, 918 + CFG_STAT_ACTIVE_HIGH | CFG_STAT_DISABLED, 919 + CFG_STAT_DISABLED); 838 920 if (ret < 0) 839 921 goto fail_readonly; 840 922 841 923 smb347_set_writable(smb, false); 842 - smb->client->irq = irq; 924 + client->irq = irq; 843 925 return 0; 844 926 845 927 fail_readonly: ··· 844 936 fail_gpio: 845 937 gpio_free(pdata->irq_gpio); 846 938 fail: 847 - smb->client->irq = 0; 939 + client->irq = 0; 848 940 return ret; 849 941 } 850 942 ··· 891 983 struct smb347_charger *smb = 892 984 container_of(psy, struct smb347_charger, battery); 893 985 const struct smb347_charger_platform_data *pdata = smb->pdata; 986 + unsigned int v; 894 987 int ret; 895 988 896 989 ret = smb347_update_ps_status(smb); ··· 946 1037 case POWER_SUPPLY_PROP_VOLTAGE_NOW: 947 1038 if (!smb347_is_ps_online(smb)) 948 1039 return -ENODATA; 949 - ret = smb347_read(smb, STAT_A); 1040 + ret = regmap_read(smb->regmap, STAT_A, &v); 950 1041 if (ret < 0) 951 1042 return ret; 952 1043 953 - ret &= STAT_A_FLOAT_VOLTAGE_MASK; 954 - if (ret > 0x3d) 955 - ret = 0x3d; 1044 + v &= STAT_A_FLOAT_VOLTAGE_MASK; 1045 + if (v > 0x3d) 1046 + v = 0x3d; 956 1047 957 - val->intval = 3500000 + ret * 20000; 1048 + val->intval = 3500000 + v * 20000; 958 1049 break; 959 1050 960 1051 case POWER_SUPPLY_PROP_CURRENT_NOW: 961 1052 if (!smb347_is_ps_online(smb)) 962 1053 return -ENODATA; 963 1054 964 - ret = smb347_read(smb, STAT_B); 1055 + ret = regmap_read(smb->regmap, STAT_B, &v); 965 1056 if (ret < 0) 966 1057 return ret; 967 1058 ··· 969 1060 * The current value is composition of FCC and PCC values 970 1061 * and we can detect which table to use from bit 5. 971 1062 */ 972 - if (ret & 0x20) { 1063 + if (v & 0x20) { 973 1064 val->intval = hw_to_current(fcc_tbl, 974 1065 ARRAY_SIZE(fcc_tbl), 975 - ret & 7); 1066 + v & 7); 976 1067 } else { 977 - ret >>= 3; 1068 + v >>= 3; 978 1069 val->intval = hw_to_current(pcc_tbl, 979 1070 ARRAY_SIZE(pcc_tbl), 980 - ret & 7); 1071 + v & 7); 981 1072 } 982 1073 break; 983 1074 ··· 1008 1099 POWER_SUPPLY_PROP_MODEL_NAME, 1009 1100 }; 1010 1101 1011 - static int smb347_debugfs_show(struct seq_file *s, void *data) 1102 + static bool smb347_volatile_reg(struct device *dev, unsigned int reg) 1012 1103 { 1013 - struct smb347_charger *smb = s->private; 1014 - int ret; 1015 - u8 reg; 1016 - 1017 - seq_printf(s, "Control registers:\n"); 1018 - seq_printf(s, "==================\n"); 1019 - for (reg = CFG_CHARGE_CURRENT; reg <= CFG_ADDRESS; reg++) { 1020 - ret = smb347_read(smb, reg); 1021 - seq_printf(s, "0x%02x:\t0x%02x\n", reg, ret); 1022 - } 1023 - seq_printf(s, "\n"); 1024 - 1025 - seq_printf(s, "Command registers:\n"); 1026 - seq_printf(s, "==================\n"); 1027 - ret = smb347_read(smb, CMD_A); 1028 - seq_printf(s, "0x%02x:\t0x%02x\n", CMD_A, ret); 1029 - ret = smb347_read(smb, CMD_B); 1030 - seq_printf(s, "0x%02x:\t0x%02x\n", CMD_B, ret); 1031 - ret = smb347_read(smb, CMD_C); 1032 - seq_printf(s, "0x%02x:\t0x%02x\n", CMD_C, ret); 1033 - seq_printf(s, "\n"); 1034 - 1035 - seq_printf(s, "Interrupt status registers:\n"); 1036 - seq_printf(s, "===========================\n"); 1037 - for (reg = IRQSTAT_A; reg <= IRQSTAT_F; reg++) { 1038 - ret = smb347_read(smb, reg); 1039 - seq_printf(s, "0x%02x:\t0x%02x\n", reg, ret); 1040 - } 1041 - seq_printf(s, "\n"); 1042 - 1043 - seq_printf(s, "Status registers:\n"); 1044 - seq_printf(s, "=================\n"); 1045 - for (reg = STAT_A; reg <= STAT_E; reg++) { 1046 - ret = smb347_read(smb, reg); 1047 - seq_printf(s, "0x%02x:\t0x%02x\n", reg, ret); 1104 + switch (reg) { 1105 + case IRQSTAT_A: 1106 + case IRQSTAT_C: 1107 + case IRQSTAT_E: 1108 + case IRQSTAT_F: 1109 + case STAT_A: 1110 + case STAT_B: 1111 + case STAT_C: 1112 + case STAT_E: 1113 + return true; 1048 1114 } 1049 1115 1050 - return 0; 1116 + return false; 1051 1117 } 1052 1118 1053 - static int smb347_debugfs_open(struct inode *inode, struct file *file) 1119 + static bool smb347_readable_reg(struct device *dev, unsigned int reg) 1054 1120 { 1055 - return single_open(file, smb347_debugfs_show, inode->i_private); 1121 + switch (reg) { 1122 + case CFG_CHARGE_CURRENT: 1123 + case CFG_CURRENT_LIMIT: 1124 + case CFG_FLOAT_VOLTAGE: 1125 + case CFG_STAT: 1126 + case CFG_PIN: 1127 + case CFG_THERM: 1128 + case CFG_SYSOK: 1129 + case CFG_OTHER: 1130 + case CFG_OTG: 1131 + case CFG_TEMP_LIMIT: 1132 + case CFG_FAULT_IRQ: 1133 + case CFG_STATUS_IRQ: 1134 + case CFG_ADDRESS: 1135 + case CMD_A: 1136 + case CMD_B: 1137 + case CMD_C: 1138 + return true; 1139 + } 1140 + 1141 + return smb347_volatile_reg(dev, reg); 1056 1142 } 1057 1143 1058 - static const struct file_operations smb347_debugfs_fops = { 1059 - .open = smb347_debugfs_open, 1060 - .read = seq_read, 1061 - .llseek = seq_lseek, 1062 - .release = single_release, 1144 + static const struct regmap_config smb347_regmap = { 1145 + .reg_bits = 8, 1146 + .val_bits = 8, 1147 + .max_register = SMB347_MAX_REGISTER, 1148 + .volatile_reg = smb347_volatile_reg, 1149 + .readable_reg = smb347_readable_reg, 1063 1150 }; 1064 1151 1065 1152 static int smb347_probe(struct i2c_client *client, ··· 1081 1176 i2c_set_clientdata(client, smb); 1082 1177 1083 1178 mutex_init(&smb->lock); 1084 - smb->client = client; 1179 + smb->dev = &client->dev; 1085 1180 smb->pdata = pdata; 1181 + 1182 + smb->regmap = devm_regmap_init_i2c(client, &smb347_regmap); 1183 + if (IS_ERR(smb->regmap)) 1184 + return PTR_ERR(smb->regmap); 1086 1185 1087 1186 ret = smb347_hw_init(smb); 1088 1187 if (ret < 0) ··· 1142 1233 * interrupt support here. 1143 1234 */ 1144 1235 if (pdata->irq_gpio >= 0) { 1145 - ret = smb347_irq_init(smb); 1236 + ret = smb347_irq_init(smb, client); 1146 1237 if (ret < 0) { 1147 1238 dev_warn(dev, "failed to initialize IRQ: %d\n", ret); 1148 1239 dev_warn(dev, "disabling IRQ support\n"); ··· 1151 1242 } 1152 1243 } 1153 1244 1154 - smb->dentry = debugfs_create_file("smb347-regs", S_IRUSR, NULL, smb, 1155 - &smb347_debugfs_fops); 1156 1245 return 0; 1157 1246 } 1158 1247 1159 1248 static int smb347_remove(struct i2c_client *client) 1160 1249 { 1161 1250 struct smb347_charger *smb = i2c_get_clientdata(client); 1162 - 1163 - if (!IS_ERR_OR_NULL(smb->dentry)) 1164 - debugfs_remove(smb->dentry); 1165 1251 1166 1252 if (client->irq) { 1167 1253 smb347_irq_disable(smb);