Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

crypto: qat - remove redundant arbiter configuration

The default arbiter configuration for ring weights and response ordering
is exactly what we want so we don't need to configure anything more.
This will also fix the problem where number of bundles is different
between different devices.

Reported-by: Ahsan Atta <ahsan.atta@intel.com>
Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

authored by

Tadeusz Struk and committed by
Herbert Xu
34074205 b62917a2

-19
-19
drivers/crypto/qat/qat_common/adf_hw_arbiter.c
··· 49 49 #include "adf_transport_internal.h" 50 50 51 51 #define ADF_ARB_NUM 4 52 - #define ADF_ARB_REQ_RING_NUM 8 53 52 #define ADF_ARB_REG_SIZE 0x4 54 53 #define ADF_ARB_WTR_SIZE 0x20 55 54 #define ADF_ARB_OFFSET 0x30000 ··· 62 63 #define WRITE_CSR_ARB_RINGSRVARBEN(csr_addr, index, value) \ 63 64 ADF_CSR_WR(csr_addr, ADF_ARB_RINGSRVARBEN_OFFSET + \ 64 65 (ADF_ARB_REG_SLOT * index), value) 65 - 66 - #define WRITE_CSR_ARB_RESPORDERING(csr_addr, index, value) \ 67 - ADF_CSR_WR(csr_addr, (ADF_ARB_OFFSET + \ 68 - ADF_ARB_RO_EN_OFFSET) + (ADF_ARB_REG_SIZE * index), value) 69 - 70 - #define WRITE_CSR_ARB_WEIGHT(csr_addr, arb, index, value) \ 71 - ADF_CSR_WR(csr_addr, (ADF_ARB_OFFSET + \ 72 - ADF_ARB_WTR_OFFSET) + (ADF_ARB_WTR_SIZE * arb) + \ 73 - (ADF_ARB_REG_SIZE * index), value) 74 66 75 67 #define WRITE_CSR_ARB_SARCONFIG(csr_addr, index, value) \ 76 68 ADF_CSR_WR(csr_addr, ADF_ARB_OFFSET + \ ··· 88 98 * ring flow control check enabled. */ 89 99 for (arb = 0; arb < ADF_ARB_NUM; arb++) 90 100 WRITE_CSR_ARB_SARCONFIG(csr, arb, arb_cfg); 91 - 92 - /* Setup service weighting */ 93 - for (arb = 0; arb < ADF_ARB_NUM; arb++) 94 - for (i = 0; i < ADF_ARB_REQ_RING_NUM; i++) 95 - WRITE_CSR_ARB_WEIGHT(csr, arb, i, 0xFFFFFFFF); 96 - 97 - /* Setup ring response ordering */ 98 - for (i = 0; i < ADF_ARB_REQ_RING_NUM; i++) 99 - WRITE_CSR_ARB_RESPORDERING(csr, i, 0xFFFFFFFF); 100 101 101 102 /* Setup worker queue registers */ 102 103 for (i = 0; i < hw_data->num_engines; i++)