tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'mvebu-dt64-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dt
mvebu dt64 for 5.9 (part 1)
Add SMMU support for the Marvell AP806 based SoCs (Armada 70xx and
Armada 80xx)
* tag 'mvebu-dt64-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
arm64: dts: marvell: add SMMU support
+86
+28
arch/arm64/boot/dts/marvell/armada-7040.dtsi
+28
arch/arm64/boot/dts/marvell/armada-7040.dtsi
···
14
14
compatible = "marvell,armada7040", "marvell,armada-ap806-quad",
15
15
"marvell,armada-ap806";
16
16
};
17
+
18
+
&smmu {
19
+
status = "okay";
20
+
};
21
+
22
+
&cp0_pcie0 {
23
+
iommu-map =
24
+
<0x0 &smmu 0x480 0x20>,
25
+
<0x100 &smmu 0x4a0 0x20>,
26
+
<0x200 &smmu 0x4c0 0x20>;
27
+
iommu-map-mask = <0x031f>;
28
+
};
29
+
30
+
&cp0_sata0 {
31
+
iommus = <&smmu 0x444>;
32
+
};
33
+
34
+
&cp0_sdhci0 {
35
+
iommus = <&smmu 0x445>;
36
+
};
37
+
38
+
&cp0_usb3_0 {
39
+
iommus = <&smmu 0x440>;
40
+
};
41
+
42
+
&cp0_usb3_1 {
43
+
iommus = <&smmu 0x441>;
44
+
};
+40
arch/arm64/boot/dts/marvell/armada-8040.dtsi
+40
arch/arm64/boot/dts/marvell/armada-8040.dtsi
···
15
15
"marvell,armada-ap806";
16
16
};
17
17
18
+
&smmu {
19
+
status = "okay";
20
+
};
21
+
22
+
&cp0_pcie0 {
23
+
iommu-map =
24
+
<0x0 &smmu 0x480 0x20>,
25
+
<0x100 &smmu 0x4a0 0x20>,
26
+
<0x200 &smmu 0x4c0 0x20>;
27
+
iommu-map-mask = <0x031f>;
28
+
};
29
+
18
30
/* The RTC requires external oscillator. But on Aramda 80x0, the RTC clock
19
31
* in CP master is not connected (by package) to the oscillator. So
20
32
* disable it. However, the RTC clock in CP slave is connected to the
···
34
22
*/
35
23
&cp0_rtc {
36
24
status = "disabled";
25
+
};
26
+
27
+
&cp0_sata0 {
28
+
iommus = <&smmu 0x444>;
29
+
};
30
+
31
+
&cp0_sdhci0 {
32
+
iommus = <&smmu 0x445>;
33
+
};
34
+
35
+
&cp0_usb3_0 {
36
+
iommus = <&smmu 0x440>;
37
+
};
38
+
39
+
&cp0_usb3_1 {
40
+
iommus = <&smmu 0x441>;
41
+
};
42
+
43
+
&cp1_sata0 {
44
+
iommus = <&smmu 0x454>;
45
+
};
46
+
47
+
&cp1_usb3_0 {
48
+
iommus = <&smmu 0x450>;
49
+
};
50
+
51
+
&cp1_usb3_1 {
52
+
iommus = <&smmu 0x451>;
37
53
};
+18
arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
+18
arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
···
56
56
compatible = "simple-bus";
57
57
ranges = <0x0 0x0 0xf0000000 0x1000000>;
58
58
59
+
smmu: iommu@5000000 {
60
+
compatible = "marvell,ap806-smmu-500", "arm,mmu-500";
61
+
reg = <0x100000 0x100000>;
62
+
dma-coherent;
63
+
#iommu-cells = <1>;
64
+
#global-interrupts = <1>;
65
+
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
66
+
<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
67
+
<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
68
+
<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
69
+
<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
70
+
<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
71
+
<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
72
+
<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
73
+
<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
74
+
status = "disabled";
75
+
};
76
+
59
77
gic: interrupt-controller@210000 {
60
78
compatible = "arm,gic-400";
61
79
#interrupt-cells = <3>;