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kernel os linux

MIPS: lantiq: remove ltq_reset_cause() and ltq_boot_select()

Do not export the ltq_reset_cause() and ltq_boot_select() function any
more. ltq_reset_cause() was accessed by the watchdog driver before to
see why the last reset happened, this is now done through direct access
of the register over regmap. The bits in this register are anyway
different between the xrx200 and the falcon SoC.
ltq_boot_select() is not used any more and was used by the flash
drivers to check if the system was booted from this flash type, now the
drivers should depend on the device tree only.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: john@phrozen.org
Cc: robh@kernel.org
Cc: andy.shevchenko@gmail.com
Cc: p.zabel@pengutronix.de
Cc: kishon@ti.com
Cc: mark.rutland@arm.com
Cc: linux-mips@linux-mips.org
Cc: linux-mtd@lists.infradead.org
Cc: linux-watchdog@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-spi@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/17126/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

authored by

Hauke Mehrtens and committed by
Ralf Baechle
333b2707 c20b3b80

-34
-2
arch/mips/include/asm/mach-lantiq/lantiq.h
··· 46 46 47 47 /* find out what bootsource we have */ 48 48 extern unsigned char ltq_boot_select(void); 49 - /* find out what caused the last cpu reset */ 50 - extern int ltq_reset_cause(void); 51 49 /* find out the soc type */ 52 50 extern int ltq_soc_type(void); 53 51
-13
arch/mips/lantiq/falcon/reset.c
··· 15 15 16 16 #include <lantiq_soc.h> 17 17 18 - /* CPU0 Reset Source Register */ 19 - #define SYS1_CPU0RS 0x0040 20 - /* reset cause mask */ 21 - #define CPU0RS_MASK 0x0003 22 - /* CPU0 Boot Mode Register */ 23 - #define SYS1_BM 0x00a0 24 18 /* boot mode mask */ 25 19 #define BM_MASK 0x0005 26 20 ··· 23 29 { 24 30 return ltq_sys1_r32(SYS1_BM) & BM_MASK; 25 31 } 26 - 27 - /* allow the watchdog driver to find out what the boot reason was */ 28 - int ltq_reset_cause(void) 29 - { 30 - return ltq_sys1_r32(SYS1_CPU0RS) & CPU0RS_MASK; 31 - } 32 - EXPORT_SYMBOL_GPL(ltq_reset_cause); 33 32 34 33 #define BOOT_REG_BASE (KSEG1 | 0x1F200000) 35 34 #define BOOT_PW1_REG (BOOT_REG_BASE | 0x20)
-19
arch/mips/lantiq/xway/reset.c
··· 119 119 spin_unlock_irqrestore(&ltq_rcu_lock, flags); 120 120 } 121 121 122 - /* This function is used by the watchdog driver */ 123 - int ltq_reset_cause(void) 124 - { 125 - u32 val = ltq_rcu_r32(RCU_RST_STAT); 126 - return val >> RCU_STAT_SHIFT; 127 - } 128 - EXPORT_SYMBOL_GPL(ltq_reset_cause); 129 - 130 - /* allow platform code to find out what source we booted from */ 131 - unsigned char ltq_boot_select(void) 132 - { 133 - u32 val = ltq_rcu_r32(RCU_RST_STAT); 134 - 135 - if (of_device_is_compatible(ltq_rcu_np, "lantiq,rcu-xrx200")) 136 - return RCU_BOOT_SEL_XRX200(val); 137 - 138 - return RCU_BOOT_SEL(val); 139 - } 140 - 141 122 struct ltq_gphy_reset { 142 123 u32 rd; 143 124 u32 addr;