Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6

Conflicts:
drivers/net/bnx2x/bnx2x_cmn.c

+1275 -528
+12 -5
MAINTAINERS
··· 1010 1010 S: Maintained 1011 1011 F: arch/arm/mach-s5p*/ 1012 1012 1013 + ARM/SAMSUNG MOBILE MACHINE SUPPORT 1014 + M: Kyungmin Park <kyungmin.park@samsung.com> 1015 + L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 1016 + S: Maintained 1017 + F: arch/arm/mach-s5pv210/mach-aquila.c 1018 + F: arch/arm/mach-s5pv210/mach-goni.c 1019 + F: arch/arm/mach-exynos4/mach-universal_c210.c 1020 + F: arch/arm/mach-exynos4/mach-nuri.c 1021 + 1013 1022 ARM/SAMSUNG S5P SERIES FIMC SUPPORT 1014 1023 M: Kyungmin Park <kyungmin.park@samsung.com> 1015 1024 M: Sylwester Nawrocki <s.nawrocki@samsung.com> ··· 3530 3521 F: Documentation/hwmon/jc42 3531 3522 3532 3523 JFS FILESYSTEM 3533 - M: Dave Kleikamp <shaggy@linux.vnet.ibm.com> 3524 + M: Dave Kleikamp <shaggy@kernel.org> 3534 3525 L: jfs-discussion@lists.sourceforge.net 3535 3526 W: http://jfs.sourceforge.net/ 3536 3527 T: git git://git.kernel.org/pub/scm/linux/kernel/git/shaggy/jfs-2.6.git ··· 4293 4284 F: net/sched/sch_netem.c 4294 4285 4295 4286 NETERION 10GbE DRIVERS (s2io/vxge) 4296 - M: Ramkrishna Vepa <ramkrishna.vepa@exar.com> 4297 - M: Sivakumar Subramani <sivakumar.subramani@exar.com> 4298 - M: Sreenivasa Honnur <sreenivasa.honnur@exar.com> 4299 - M: Jon Mason <jon.mason@exar.com> 4287 + M: Jon Mason <jdmason@kudzu.us> 4300 4288 L: netdev@vger.kernel.org 4301 4289 W: http://trac.neterion.com/cgi-bin/trac.cgi/wiki/Linux?Anonymous 4302 4290 W: http://trac.neterion.com/cgi-bin/trac.cgi/wiki/X3100Linux?Anonymous ··· 5180 5174 5181 5175 RAPIDIO SUBSYSTEM 5182 5176 M: Matt Porter <mporter@kernel.crashing.org> 5177 + M: Alexandre Bounine <alexandre.bounine@idt.com> 5183 5178 S: Maintained 5184 5179 F: drivers/rapidio/ 5185 5180
+1 -1
Makefile
··· 1 1 VERSION = 2 2 2 PATCHLEVEL = 6 3 3 SUBLEVEL = 38 4 - EXTRAVERSION = -rc7 4 + EXTRAVERSION = -rc8 5 5 NAME = Flesh-Eating Bats with Fangs 6 6 7 7 # *DOCUMENTATION*
+1
arch/alpha/kernel/sys_titan.c
··· 149 149 titan_set_irq_affinity(struct irq_data *d, const struct cpumask *affinity, 150 150 bool force) 151 151 { 152 + unsigned int irq = d->irq; 152 153 spin_lock(&titan_irq_lock); 153 154 titan_cpu_set_irq_affinity(irq - 16, *affinity); 154 155 titan_update_irq_hw(titan_cached_irq_mask);
+2
arch/arm/common/Kconfig
··· 6 6 7 7 config ARM_VIC_NR 8 8 int 9 + default 4 if ARCH_S5PV210 10 + default 3 if ARCH_S5P6442 || ARCH_S5PC100 9 11 default 2 10 12 depends on ARM_VIC 11 13 help
-4
arch/arm/include/asm/mach/arch.h
··· 15 15 struct sys_timer; 16 16 17 17 struct machine_desc { 18 - /* 19 - * Note! The first two elements are used 20 - * by assembler code in head.S, head-common.S 21 - */ 22 18 unsigned int nr; /* architecture number */ 23 19 const char *name; /* architecture name */ 24 20 unsigned long boot_params; /* tagged list */
+2
arch/arm/include/asm/pgalloc.h
··· 10 10 #ifndef _ASMARM_PGALLOC_H 11 11 #define _ASMARM_PGALLOC_H 12 12 13 + #include <linux/pagemap.h> 14 + 13 15 #include <asm/domain.h> 14 16 #include <asm/pgtable-hwdef.h> 15 17 #include <asm/processor.h>
+23 -3
arch/arm/kernel/hw_breakpoint.c
··· 836 836 /* 837 837 * One-time initialisation. 838 838 */ 839 - static void reset_ctrl_regs(void *unused) 839 + static void reset_ctrl_regs(void *info) 840 840 { 841 - int i; 841 + int i, cpu = smp_processor_id(); 842 + u32 dbg_power; 843 + cpumask_t *cpumask = info; 842 844 843 845 /* 844 846 * v7 debug contains save and restore registers so that debug state ··· 851 849 * later on. 852 850 */ 853 851 if (debug_arch >= ARM_DEBUG_ARCH_V7_ECP14) { 852 + /* 853 + * Ensure sticky power-down is clear (i.e. debug logic is 854 + * powered up). 855 + */ 856 + asm volatile("mrc p14, 0, %0, c1, c5, 4" : "=r" (dbg_power)); 857 + if ((dbg_power & 0x1) == 0) { 858 + pr_warning("CPU %d debug is powered down!\n", cpu); 859 + cpumask_or(cpumask, cpumask, cpumask_of(cpu)); 860 + return; 861 + } 862 + 854 863 /* 855 864 * Unconditionally clear the lock by writing a value 856 865 * other than 0xC5ACCE55 to the access register. ··· 900 887 static int __init arch_hw_breakpoint_init(void) 901 888 { 902 889 u32 dscr; 890 + cpumask_t cpumask = { CPU_BITS_NONE }; 903 891 904 892 debug_arch = get_debug_arch(); 905 893 ··· 925 911 * Reset the breakpoint resources. We assume that a halting 926 912 * debugger will leave the world in a nice state for us. 927 913 */ 928 - on_each_cpu(reset_ctrl_regs, NULL, 1); 914 + on_each_cpu(reset_ctrl_regs, &cpumask, 1); 915 + if (!cpumask_empty(&cpumask)) { 916 + core_num_brps = 0; 917 + core_num_reserved_brps = 0; 918 + core_num_wrps = 0; 919 + return 0; 920 + } 929 921 930 922 ARM_DBG_READ(c1, 0, dscr); 931 923 if (dscr & ARM_DSCR_HDBGEN) {
+3 -3
arch/arm/kernel/ptrace.c
··· 996 996 while (!(arch_ctrl.len & 0x1)) 997 997 arch_ctrl.len >>= 1; 998 998 999 - if (idx & 0x1) 1000 - reg = encode_ctrl_reg(arch_ctrl); 1001 - else 999 + if (num & 0x1) 1002 1000 reg = bp->attr.bp_addr; 1001 + else 1002 + reg = encode_ctrl_reg(arch_ctrl); 1003 1003 } 1004 1004 1005 1005 put:
+1 -1
arch/arm/mach-davinci/cpufreq.c
··· 132 132 return ret; 133 133 } 134 134 135 - static int __init davinci_cpu_init(struct cpufreq_policy *policy) 135 + static int davinci_cpu_init(struct cpufreq_policy *policy) 136 136 { 137 137 int result = 0; 138 138 struct davinci_cpufreq_config *pdata = cpufreq.dev->platform_data;
+7
arch/arm/mach-davinci/devices-da8xx.c
··· 480 480 .resource = da850_mcasp_resources, 481 481 }; 482 482 483 + struct platform_device davinci_pcm_device = { 484 + .name = "davinci-pcm-audio", 485 + .id = -1, 486 + }; 487 + 483 488 void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata) 484 489 { 490 + platform_device_register(&davinci_pcm_device); 491 + 485 492 /* DA830/OMAP-L137 has 3 instances of McASP */ 486 493 if (cpu_is_davinci_da830() && id == 1) { 487 494 da830_mcasp1_device.dev.platform_data = pdata;
+9 -9
arch/arm/mach-davinci/gpio-tnetv107x.c
··· 58 58 59 59 spin_lock_irqsave(&ctlr->lock, flags); 60 60 61 - gpio_reg_set_bit(&regs->enable, gpio); 61 + gpio_reg_set_bit(regs->enable, gpio); 62 62 63 63 spin_unlock_irqrestore(&ctlr->lock, flags); 64 64 ··· 74 74 75 75 spin_lock_irqsave(&ctlr->lock, flags); 76 76 77 - gpio_reg_clear_bit(&regs->enable, gpio); 77 + gpio_reg_clear_bit(regs->enable, gpio); 78 78 79 79 spin_unlock_irqrestore(&ctlr->lock, flags); 80 80 } ··· 88 88 89 89 spin_lock_irqsave(&ctlr->lock, flags); 90 90 91 - gpio_reg_set_bit(&regs->direction, gpio); 91 + gpio_reg_set_bit(regs->direction, gpio); 92 92 93 93 spin_unlock_irqrestore(&ctlr->lock, flags); 94 94 ··· 106 106 spin_lock_irqsave(&ctlr->lock, flags); 107 107 108 108 if (value) 109 - gpio_reg_set_bit(&regs->data_out, gpio); 109 + gpio_reg_set_bit(regs->data_out, gpio); 110 110 else 111 - gpio_reg_clear_bit(&regs->data_out, gpio); 111 + gpio_reg_clear_bit(regs->data_out, gpio); 112 112 113 - gpio_reg_clear_bit(&regs->direction, gpio); 113 + gpio_reg_clear_bit(regs->direction, gpio); 114 114 115 115 spin_unlock_irqrestore(&ctlr->lock, flags); 116 116 ··· 124 124 unsigned gpio = chip->base + offset; 125 125 int ret; 126 126 127 - ret = gpio_reg_get_bit(&regs->data_in, gpio); 127 + ret = gpio_reg_get_bit(regs->data_in, gpio); 128 128 129 129 return ret ? 1 : 0; 130 130 } ··· 140 140 spin_lock_irqsave(&ctlr->lock, flags); 141 141 142 142 if (value) 143 - gpio_reg_set_bit(&regs->data_out, gpio); 143 + gpio_reg_set_bit(regs->data_out, gpio); 144 144 else 145 - gpio_reg_clear_bit(&regs->data_out, gpio); 145 + gpio_reg_clear_bit(regs->data_out, gpio); 146 146 147 147 spin_unlock_irqrestore(&ctlr->lock, flags); 148 148 }
+2
arch/arm/mach-davinci/include/mach/clkdev.h
··· 1 1 #ifndef __MACH_CLKDEV_H 2 2 #define __MACH_CLKDEV_H 3 3 4 + struct clk; 5 + 4 6 static inline int __clk_get(struct clk *clk) 5 7 { 6 8 return 1;
+6 -4
arch/arm/mach-omap2/mailbox.c
··· 193 193 omap_mbox_type_t irq) 194 194 { 195 195 struct omap_mbox2_priv *p = mbox->priv; 196 - u32 l, bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit; 197 - l = mbox_read_reg(p->irqdisable); 198 - l &= ~bit; 199 - mbox_write_reg(l, p->irqdisable); 196 + u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit; 197 + 198 + if (!cpu_is_omap44xx()) 199 + bit = mbox_read_reg(p->irqdisable) & ~bit; 200 + 201 + mbox_write_reg(bit, p->irqdisable); 200 202 } 201 203 202 204 static void omap2_mbox_ack_irq(struct omap_mbox *mbox,
+15 -18
arch/arm/mach-omap2/smartreflex.c
··· 282 282 dev_err(&sr_info->pdev->dev, "%s: ERROR in registering" 283 283 "interrupt handler. Smartreflex will" 284 284 "not function as desired\n", __func__); 285 + kfree(name); 285 286 kfree(sr_info); 286 287 return ret; 287 288 } ··· 880 879 ret = sr_late_init(sr_info); 881 880 if (ret) { 882 881 pr_warning("%s: Error in SR late init\n", __func__); 883 - return ret; 882 + goto err_release_region; 884 883 } 885 884 } 886 885 ··· 891 890 * not try to create rest of the debugfs entries. 892 891 */ 893 892 vdd_dbg_dir = omap_voltage_get_dbgdir(sr_info->voltdm); 894 - if (!vdd_dbg_dir) 895 - return -EINVAL; 893 + if (!vdd_dbg_dir) { 894 + ret = -EINVAL; 895 + goto err_release_region; 896 + } 896 897 897 898 dbg_dir = debugfs_create_dir("smartreflex", vdd_dbg_dir); 898 899 if (IS_ERR(dbg_dir)) { 899 900 dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n", 900 901 __func__); 901 - return PTR_ERR(dbg_dir); 902 + ret = PTR_ERR(dbg_dir); 903 + goto err_release_region; 902 904 } 903 905 904 906 (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR, dbg_dir, ··· 917 913 if (IS_ERR(nvalue_dir)) { 918 914 dev_err(&pdev->dev, "%s: Unable to create debugfs directory" 919 915 "for n-values\n", __func__); 920 - return PTR_ERR(nvalue_dir); 916 + ret = PTR_ERR(nvalue_dir); 917 + goto err_release_region; 921 918 } 922 919 923 920 omap_voltage_get_volttable(sr_info->voltdm, &volt_data); ··· 927 922 " corresponding vdd vdd_%s. Cannot create debugfs" 928 923 "entries for n-values\n", 929 924 __func__, sr_info->voltdm->name); 930 - return -ENODATA; 925 + ret = -ENODATA; 926 + goto err_release_region; 931 927 } 932 928 933 929 for (i = 0; i < sr_info->nvalue_count; i++) { 934 - char *name; 935 - char volt_name[32]; 930 + char name[NVALUE_NAME_LEN + 1]; 936 931 937 - name = kzalloc(NVALUE_NAME_LEN + 1, GFP_KERNEL); 938 - if (!name) { 939 - dev_err(&pdev->dev, "%s: Unable to allocate memory" 940 - " for n-value directory name\n", __func__); 941 - return -ENOMEM; 942 - } 943 - 944 - strcpy(name, "volt_"); 945 - sprintf(volt_name, "%d", volt_data[i].volt_nominal); 946 - strcat(name, volt_name); 932 + snprintf(name, sizeof(name), "volt_%d", 933 + volt_data[i].volt_nominal); 947 934 (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir, 948 935 &(sr_info->nvalue_table[i].nvalue)); 949 936 }
+1
arch/arm/mach-pxa/pxa25x.c
··· 347 347 &pxa25x_device_assp, 348 348 &pxa25x_device_pwm0, 349 349 &pxa25x_device_pwm1, 350 + &pxa_device_asoc_platform, 350 351 }; 351 352 352 353 static struct sys_device pxa25x_sysdev[] = {
-2
arch/arm/mach-pxa/tosa-bt.c
··· 81 81 goto err_rfk_alloc; 82 82 } 83 83 84 - rfkill_set_led_trigger_name(rfk, "tosa-bt"); 85 - 86 84 rc = rfkill_register(rfk); 87 85 if (rc) 88 86 goto err_rfkill;
+6
arch/arm/mach-pxa/tosa.c
··· 875 875 .dev.platform_data = &sharpsl_rom_data, 876 876 }; 877 877 878 + static struct platform_device wm9712_device = { 879 + .name = "wm9712-codec", 880 + .id = -1, 881 + }; 882 + 878 883 static struct platform_device *devices[] __initdata = { 879 884 &tosascoop_device, 880 885 &tosascoop_jc_device, ··· 890 885 &tosaled_device, 891 886 &tosa_bt_device, 892 887 &sharpsl_rom_device, 888 + &wm9712_device, 893 889 }; 894 890 895 891 static void tosa_poweroff(void)
+1
arch/arm/mach-s3c2440/Kconfig
··· 99 99 select POWER_SUPPLY 100 100 select MACH_NEO1973 101 101 select S3C2410_PWM 102 + select S3C_DEV_USB_HOST 102 103 help 103 104 Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone 104 105
+13 -13
arch/arm/mach-s3c2440/include/mach/gta02.h
··· 44 44 #define GTA02v3_GPIO_nUSB_FLT S3C2410_GPG(10) /* v3 + v4 only */ 45 45 #define GTA02v3_GPIO_nGSM_OC S3C2410_GPG(11) /* v3 + v4 only */ 46 46 47 - #define GTA02_GPIO_AMP_SHUT S3C2440_GPJ1 /* v2 + v3 + v4 only */ 48 - #define GTA02v1_GPIO_WLAN_GPIO10 S3C2440_GPJ2 49 - #define GTA02_GPIO_HP_IN S3C2440_GPJ2 /* v2 + v3 + v4 only */ 50 - #define GTA02_GPIO_INT0 S3C2440_GPJ3 /* v2 + v3 + v4 only */ 51 - #define GTA02_GPIO_nGSM_EN S3C2440_GPJ4 52 - #define GTA02_GPIO_3D_RESET S3C2440_GPJ5 53 - #define GTA02_GPIO_nDL_GSM S3C2440_GPJ6 /* v4 + v5 only */ 54 - #define GTA02_GPIO_WLAN_GPIO0 S3C2440_GPJ7 55 - #define GTA02v1_GPIO_BAT_ID S3C2440_GPJ8 56 - #define GTA02_GPIO_KEEPACT S3C2440_GPJ8 57 - #define GTA02v1_GPIO_HP_IN S3C2440_GPJ10 58 - #define GTA02_CHIP_PWD S3C2440_GPJ11 /* v2 + v3 + v4 only */ 59 - #define GTA02_GPIO_nWLAN_RESET S3C2440_GPJ12 /* v2 + v3 + v4 only */ 47 + #define GTA02_GPIO_AMP_SHUT S3C2410_GPJ(1) /* v2 + v3 + v4 only */ 48 + #define GTA02v1_GPIO_WLAN_GPIO10 S3C2410_GPJ(2) 49 + #define GTA02_GPIO_HP_IN S3C2410_GPJ(2) /* v2 + v3 + v4 only */ 50 + #define GTA02_GPIO_INT0 S3C2410_GPJ(3) /* v2 + v3 + v4 only */ 51 + #define GTA02_GPIO_nGSM_EN S3C2410_GPJ(4) 52 + #define GTA02_GPIO_3D_RESET S3C2410_GPJ(5) 53 + #define GTA02_GPIO_nDL_GSM S3C2410_GPJ(6) /* v4 + v5 only */ 54 + #define GTA02_GPIO_WLAN_GPIO0 S3C2410_GPJ(7) 55 + #define GTA02v1_GPIO_BAT_ID S3C2410_GPJ(8) 56 + #define GTA02_GPIO_KEEPACT S3C2410_GPJ(8) 57 + #define GTA02v1_GPIO_HP_IN S3C2410_GPJ(10) 58 + #define GTA02_CHIP_PWD S3C2410_GPJ(11) /* v2 + v3 + v4 only */ 59 + #define GTA02_GPIO_nWLAN_RESET S3C2410_GPJ(12) /* v2 + v3 + v4 only */ 60 60 61 61 #define GTA02_IRQ_GSENSOR_1 IRQ_EINT0 62 62 #define GTA02_IRQ_MODEM IRQ_EINT1
+6
arch/arm/mach-s3c64xx/clock.c
··· 151 151 .enable = s3c64xx_pclk_ctrl, 152 152 .ctrlbit = S3C_CLKCON_PCLK_IIC, 153 153 }, { 154 + .name = "i2c", 155 + .id = 1, 156 + .parent = &clk_p, 157 + .enable = s3c64xx_pclk_ctrl, 158 + .ctrlbit = S3C6410_CLKCON_PCLK_I2C1, 159 + }, { 154 160 .name = "iis", 155 161 .id = 0, 156 162 .parent = &clk_p,
+6 -5
arch/arm/mach-s3c64xx/dma.c
··· 690 690 691 691 regptr = regs + PL080_Cx_BASE(0); 692 692 693 - for (ch = 0; ch < 8; ch++, chno++, chptr++) { 694 - printk(KERN_INFO "%s: registering DMA %d (%p)\n", 695 - __func__, chno, regptr); 693 + for (ch = 0; ch < 8; ch++, chptr++) { 694 + pr_debug("%s: registering DMA %d (%p)\n", 695 + __func__, chno + ch, regptr); 696 696 697 697 chptr->bit = 1 << ch; 698 - chptr->number = chno; 698 + chptr->number = chno + ch; 699 699 chptr->dmac = dmac; 700 700 chptr->regs = regptr; 701 701 regptr += PL080_Cx_STRIDE; ··· 704 704 /* for the moment, permanently enable the controller */ 705 705 writel(PL080_CONFIG_ENABLE, regs + PL080_CONFIG); 706 706 707 - printk(KERN_INFO "PL080: IRQ %d, at %p\n", irq, regs); 707 + printk(KERN_INFO "PL080: IRQ %d, at %p, channels %d..%d\n", 708 + irq, regs, chno, chno+8); 708 709 709 710 return 0; 710 711
+2 -2
arch/arm/mach-s3c64xx/gpiolib.c
··· 72 72 .get_pull = s3c_gpio_getpull_updown, 73 73 }; 74 74 75 - int s3c64xx_gpio2int_gpm(struct gpio_chip *chip, unsigned pin) 75 + static int s3c64xx_gpio2int_gpm(struct gpio_chip *chip, unsigned pin) 76 76 { 77 77 return pin < 5 ? IRQ_EINT(23) + pin : -ENXIO; 78 78 } ··· 138 138 }, 139 139 }; 140 140 141 - int s3c64xx_gpio2int_gpl(struct gpio_chip *chip, unsigned pin) 141 + static int s3c64xx_gpio2int_gpl(struct gpio_chip *chip, unsigned pin) 142 142 { 143 143 return pin >= 8 ? IRQ_EINT(16) + pin - 8 : -ENXIO; 144 144 }
+7 -6
arch/arm/mach-s3c64xx/mach-smdk6410.c
··· 28 28 #include <linux/delay.h> 29 29 #include <linux/smsc911x.h> 30 30 #include <linux/regulator/fixed.h> 31 + #include <linux/regulator/machine.h> 31 32 32 33 #ifdef CONFIG_SMDK6410_WM1190_EV1 33 34 #include <linux/mfd/wm8350/core.h> ··· 352 351 /* VDD_UH_MMC, LDO5 on J5 */ 353 352 static struct regulator_init_data smdk6410_vdduh_mmc = { 354 353 .constraints = { 355 - .name = "PVDD_UH/PVDD_MMC", 354 + .name = "PVDD_UH+PVDD_MMC", 356 355 .always_on = 1, 357 356 }, 358 357 }; ··· 418 417 /* S3C64xx internal logic & PLL */ 419 418 static struct regulator_init_data wm8350_dcdc1_data = { 420 419 .constraints = { 421 - .name = "PVDD_INT/PVDD_PLL", 420 + .name = "PVDD_INT+PVDD_PLL", 422 421 .min_uV = 1200000, 423 422 .max_uV = 1200000, 424 423 .always_on = 1, ··· 453 452 454 453 static struct regulator_init_data wm8350_dcdc4_data = { 455 454 .constraints = { 456 - .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV", 455 + .name = "PVDD_HI+PVDD_EXT+PVDD_SYS+PVCCM2MTV", 457 456 .min_uV = 3000000, 458 457 .max_uV = 3000000, 459 458 .always_on = 1, ··· 465 464 /* OTGi/1190-EV1 HPVDD & AVDD */ 466 465 static struct regulator_init_data wm8350_ldo4_data = { 467 466 .constraints = { 468 - .name = "PVDD_OTGI/HPVDD/AVDD", 467 + .name = "PVDD_OTGI+HPVDD+AVDD", 469 468 .min_uV = 1200000, 470 469 .max_uV = 1200000, 471 470 .apply_uV = 1, ··· 553 552 554 553 static struct regulator_init_data wm1192_dcdc3 = { 555 554 .constraints = { 556 - .name = "PVDD_MEM/PVDD_GPS", 555 + .name = "PVDD_MEM+PVDD_GPS", 557 556 .always_on = 1, 558 557 }, 559 558 }; ··· 564 563 565 564 static struct regulator_init_data wm1192_ldo1 = { 566 565 .constraints = { 567 - .name = "PVDD_LCD/PVDD_EXT", 566 + .name = "PVDD_LCD+PVDD_EXT", 568 567 .always_on = 1, 569 568 }, 570 569 .consumer_supplies = wm1192_ldo1_consumers,
+1 -1
arch/arm/mach-s3c64xx/setup-keypad.c
··· 17 17 void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) 18 18 { 19 19 /* Set all the necessary GPK pins to special-function 3: KP_ROW[x] */ 20 - s3c_gpio_cfgrange_nopull(S3C64XX_GPK(8), 8 + rows, S3C_GPIO_SFN(3)); 20 + s3c_gpio_cfgrange_nopull(S3C64XX_GPK(8), rows, S3C_GPIO_SFN(3)); 21 21 22 22 /* Set all the necessary GPL pins to special-function 3: KP_COL[x] */ 23 23 s3c_gpio_cfgrange_nopull(S3C64XX_GPL(0), cols, S3C_GPIO_SFN(3));
+1 -1
arch/arm/mach-s3c64xx/setup-sdhci.c
··· 56 56 else 57 57 ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0); 58 58 59 - printk(KERN_INFO "%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3); 59 + pr_debug("%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3); 60 60 writel(ctrl2, r + S3C_SDHCI_CONTROL2); 61 61 writel(ctrl3, r + S3C_SDHCI_CONTROL3); 62 62 }
+2 -2
arch/arm/mach-s5p64x0/include/mach/gpio.h
··· 23 23 #define S5P6440_GPIO_A_NR (6) 24 24 #define S5P6440_GPIO_B_NR (7) 25 25 #define S5P6440_GPIO_C_NR (8) 26 - #define S5P6440_GPIO_F_NR (2) 26 + #define S5P6440_GPIO_F_NR (16) 27 27 #define S5P6440_GPIO_G_NR (7) 28 28 #define S5P6440_GPIO_H_NR (10) 29 29 #define S5P6440_GPIO_I_NR (16) ··· 36 36 #define S5P6450_GPIO_B_NR (7) 37 37 #define S5P6450_GPIO_C_NR (8) 38 38 #define S5P6450_GPIO_D_NR (8) 39 - #define S5P6450_GPIO_F_NR (2) 39 + #define S5P6450_GPIO_F_NR (16) 40 40 #define S5P6450_GPIO_G_NR (14) 41 41 #define S5P6450_GPIO_H_NR (10) 42 42 #define S5P6450_GPIO_I_NR (16)
+1
arch/arm/mach-shmobile/board-ag5evm.c
··· 454 454 gpio_direction_output(GPIO_PORT217, 0); 455 455 mdelay(1); 456 456 gpio_set_value(GPIO_PORT217, 1); 457 + mdelay(100); 457 458 458 459 /* LCD backlight controller */ 459 460 gpio_request(GPIO_PORT235, NULL); /* RESET */
+1 -1
arch/arm/mach-shmobile/board-ap4evb.c
··· 1303 1303 1304 1304 lcdc_info.clock_source = LCDC_CLK_BUS; 1305 1305 lcdc_info.ch[0].interface_type = RGB18; 1306 - lcdc_info.ch[0].clock_divider = 2; 1306 + lcdc_info.ch[0].clock_divider = 3; 1307 1307 lcdc_info.ch[0].flags = 0; 1308 1308 lcdc_info.ch[0].lcd_size_cfg.width = 152; 1309 1309 lcdc_info.ch[0].lcd_size_cfg.height = 91;
+1 -1
arch/arm/mach-shmobile/board-mackerel.c
··· 303 303 .lcd_cfg = mackerel_lcdc_modes, 304 304 .num_cfg = ARRAY_SIZE(mackerel_lcdc_modes), 305 305 .interface_type = RGB24, 306 - .clock_divider = 2, 306 + .clock_divider = 3, 307 307 .flags = 0, 308 308 .lcd_size_cfg.width = 152, 309 309 .lcd_size_cfg.height = 91,
+14 -3
arch/arm/mach-shmobile/clock-sh73a0.c
··· 263 263 }; 264 264 265 265 enum { MSTP001, 266 - MSTP125, MSTP118, MSTP116, MSTP100, 266 + MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100, 267 267 MSTP219, 268 268 MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, 269 269 MSTP331, MSTP329, MSTP325, MSTP323, MSTP312, ··· 275 275 276 276 static struct clk mstp_clks[MSTP_NR] = { 277 277 [MSTP001] = MSTP(&div4_clks[DIV4_HP], SMSTPCR0, 1, 0), /* IIC2 */ 278 + [MSTP129] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 29, 0), /* CEU1 */ 279 + [MSTP128] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 28, 0), /* CSI2-RX1 */ 280 + [MSTP127] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 27, 0), /* CEU0 */ 281 + [MSTP126] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 26, 0), /* CSI2-RX0 */ 278 282 [MSTP125] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */ 279 283 [MSTP118] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 18, 0), /* DSITX0 */ 280 284 [MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */ ··· 310 306 CLKDEV_CON_ID("r_clk", &r_clk), 311 307 312 308 /* DIV6 clocks */ 309 + CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]), 310 + CLKDEV_CON_ID("vck2_clk", &div6_clks[DIV6_VCK2]), 311 + CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]), 313 312 CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]), 314 313 CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]), 315 314 CLKDEV_ICK_ID("dsi0p_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]), ··· 320 313 321 314 /* MSTP32 clocks */ 322 315 CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */ 323 - CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */ 316 + CLKDEV_DEV_ID("sh_mobile_ceu.1", &mstp_clks[MSTP129]), /* CEU1 */ 317 + CLKDEV_DEV_ID("sh-mobile-csi2.1", &mstp_clks[MSTP128]), /* CSI2-RX1 */ 318 + CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), /* CEU0 */ 319 + CLKDEV_DEV_ID("sh-mobile-csi2.0", &mstp_clks[MSTP126]), /* CSI2-RX0 */ 324 320 CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */ 325 321 CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */ 326 - CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */ 327 322 CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */ 323 + CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */ 324 + CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */ 328 325 CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */ 329 326 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */ 330 327 CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */
+5 -5
arch/arm/mach-shmobile/include/mach/head-ap4evb.txt
··· 6 6 EW 0xE6020004, 0xA500 7 7 EW 0xE6030004, 0xA500 8 8 9 - DD 0x01001000, 0x01001000 10 - 11 9 LIST "GPIO Setting" 12 10 EB 0xE6051013, 0xA2 13 11 14 12 LIST "CPG" 15 - ED 0xE6150080, 0x00000180 16 13 ED 0xE61500C0, 0x00000002 17 14 18 15 WAIT 1, 0xFE40009C ··· 34 37 35 38 WAIT 1, 0xFE40009C 36 39 40 + LIST "SUB/USBClk" 41 + ED 0xE6150080, 0x00000180 42 + 37 43 LIST "BSC" 38 44 ED 0xFEC10000, 0x00E0001B 39 45 ··· 53 53 ED 0xFE40004C, 0x00110209 54 54 ED 0xFE400010, 0x00000087 55 55 56 - WAIT 10, 0xFE40009C 56 + WAIT 30, 0xFE40009C 57 57 58 58 ED 0xFE400084, 0x0000003F 59 59 EB 0xFE500000, 0x00 ··· 84 84 85 85 WAIT 1, 0xFE40009C 86 86 87 - ED 0xE6150354, 0x00000002 87 + ED 0xFE400354, 0x01AD8002 88 88 89 89 LIST "SCIF0 - Serial port for earlyprintk" 90 90 EB 0xE6053098, 0x11
+5 -5
arch/arm/mach-shmobile/include/mach/head-mackerel.txt
··· 6 6 EW 0xE6020004, 0xA500 7 7 EW 0xE6030004, 0xA500 8 8 9 - DD 0x01001000, 0x01001000 10 - 11 9 LIST "GPIO Setting" 12 10 EB 0xE6051013, 0xA2 13 11 14 12 LIST "CPG" 15 - ED 0xE6150080, 0x00000180 16 13 ED 0xE61500C0, 0x00000002 17 14 18 15 WAIT 1, 0xFE40009C ··· 34 37 35 38 WAIT 1, 0xFE40009C 36 39 40 + LIST "SUB/USBClk" 41 + ED 0xE6150080, 0x00000180 42 + 37 43 LIST "BSC" 38 44 ED 0xFEC10000, 0x00E0001B 39 45 ··· 53 53 ED 0xFE40004C, 0x00110209 54 54 ED 0xFE400010, 0x00000087 55 55 56 - WAIT 10, 0xFE40009C 56 + WAIT 30, 0xFE40009C 57 57 58 58 ED 0xFE400084, 0x0000003F 59 59 EB 0xFE500000, 0x00 ··· 84 84 85 85 WAIT 1, 0xFE40009C 86 86 87 - ED 0xE6150354, 0x00000002 87 + ED 0xFE400354, 0x01AD8002 88 88 89 89 LIST "SCIF0 - Serial port for earlyprintk" 90 90 EB 0xE6053098, 0x11
+2
arch/arm/plat-samsung/dev-uart.c
··· 15 15 #include <linux/kernel.h> 16 16 #include <linux/platform_device.h> 17 17 18 + #include <plat/devs.h> 19 + 18 20 /* uart devices */ 19 21 20 22 static struct platform_device s3c24xx_uart_device0 = {
+12 -4
arch/blackfin/lib/outs.S
··· 13 13 .align 2 14 14 15 15 ENTRY(_outsl) 16 + CC = R2 == 0; 17 + IF CC JUMP 1f; 16 18 P0 = R0; /* P0 = port */ 17 19 P1 = R1; /* P1 = address */ 18 20 P2 = R2; /* P2 = count */ ··· 22 20 LSETUP( .Llong_loop_s, .Llong_loop_e) LC0 = P2; 23 21 .Llong_loop_s: R0 = [P1++]; 24 22 .Llong_loop_e: [P0] = R0; 25 - RTS; 23 + 1: RTS; 26 24 ENDPROC(_outsl) 27 25 28 26 ENTRY(_outsw) 27 + CC = R2 == 0; 28 + IF CC JUMP 1f; 29 29 P0 = R0; /* P0 = port */ 30 30 P1 = R1; /* P1 = address */ 31 31 P2 = R2; /* P2 = count */ ··· 35 31 LSETUP( .Lword_loop_s, .Lword_loop_e) LC0 = P2; 36 32 .Lword_loop_s: R0 = W[P1++]; 37 33 .Lword_loop_e: W[P0] = R0; 38 - RTS; 34 + 1: RTS; 39 35 ENDPROC(_outsw) 40 36 41 37 ENTRY(_outsb) 38 + CC = R2 == 0; 39 + IF CC JUMP 1f; 42 40 P0 = R0; /* P0 = port */ 43 41 P1 = R1; /* P1 = address */ 44 42 P2 = R2; /* P2 = count */ ··· 48 42 LSETUP( .Lbyte_loop_s, .Lbyte_loop_e) LC0 = P2; 49 43 .Lbyte_loop_s: R0 = B[P1++]; 50 44 .Lbyte_loop_e: B[P0] = R0; 51 - RTS; 45 + 1: RTS; 52 46 ENDPROC(_outsb) 53 47 54 48 ENTRY(_outsw_8) 49 + CC = R2 == 0; 50 + IF CC JUMP 1f; 55 51 P0 = R0; /* P0 = port */ 56 52 P1 = R1; /* P1 = address */ 57 53 P2 = R2; /* P2 = count */ ··· 64 56 R0 = R0 << 8; 65 57 R0 = R0 + R1; 66 58 .Lword8_loop_e: W[P0] = R0; 67 - RTS; 59 + 1: RTS; 68 60 ENDPROC(_outsw_8)
+2
arch/blackfin/mach-common/cache.S
··· 58 58 1: 59 59 .ifeqs "\flushins", BROK_FLUSH_INST 60 60 \flushins [P0++]; 61 + nop; 62 + nop; 61 63 2: nop; 62 64 .else 63 65 2: \flushins [P0++];
+16
arch/powerpc/include/asm/lppaca.h
··· 33 33 // 34 34 //---------------------------------------------------------------------------- 35 35 #include <linux/cache.h> 36 + #include <linux/threads.h> 36 37 #include <asm/types.h> 37 38 #include <asm/mmu.h> 39 + 40 + /* 41 + * We only have to have statically allocated lppaca structs on 42 + * legacy iSeries, which supports at most 64 cpus. 43 + */ 44 + #ifdef CONFIG_PPC_ISERIES 45 + #if NR_CPUS < 64 46 + #define NR_LPPACAS NR_CPUS 47 + #else 48 + #define NR_LPPACAS 64 49 + #endif 50 + #else /* not iSeries */ 51 + #define NR_LPPACAS 1 52 + #endif 53 + 38 54 39 55 /* The Hypervisor barfs if the lppaca crosses a page boundary. A 1k 40 56 * alignment is sufficient to prevent this */
-14
arch/powerpc/kernel/paca.c
··· 27 27 #ifdef CONFIG_PPC_BOOK3S 28 28 29 29 /* 30 - * We only have to have statically allocated lppaca structs on 31 - * legacy iSeries, which supports at most 64 cpus. 32 - */ 33 - #ifdef CONFIG_PPC_ISERIES 34 - #if NR_CPUS < 64 35 - #define NR_LPPACAS NR_CPUS 36 - #else 37 - #define NR_LPPACAS 64 38 - #endif 39 - #else /* not iSeries */ 40 - #define NR_LPPACAS 1 41 - #endif 42 - 43 - /* 44 30 * The structure which the hypervisor knows about - this structure 45 31 * should not cross a page boundary. The vpa_init/register_vpa call 46 32 * is now known to fail if the lppaca structure crosses a page
+2 -1
arch/powerpc/mm/numa.c
··· 1516 1516 { 1517 1517 int rc = 0; 1518 1518 1519 - if (firmware_has_feature(FW_FEATURE_VPHN) && 1519 + /* Disabled until races with load balancing are fixed */ 1520 + if (0 && firmware_has_feature(FW_FEATURE_VPHN) && 1520 1521 get_lppaca()->shared_proc) { 1521 1522 vphn_enabled = 1; 1522 1523 setup_cpu_associativity_change_counters();
+3 -3
arch/powerpc/platforms/iseries/dt.c
··· 242 242 pft_size[0] = 0; /* NUMA CEC cookie, 0 for non NUMA */ 243 243 pft_size[1] = __ilog2(HvCallHpt_getHptPages() * HW_PAGE_SIZE); 244 244 245 - for (i = 0; i < NR_CPUS; i++) { 246 - if (lppaca_of(i).dyn_proc_status >= 2) 245 + for (i = 0; i < NR_LPPACAS; i++) { 246 + if (lppaca[i].dyn_proc_status >= 2) 247 247 continue; 248 248 249 249 snprintf(p, 32 - (p - buf), "@%d", i); ··· 251 251 252 252 dt_prop_str(dt, "device_type", device_type_cpu); 253 253 254 - index = lppaca_of(i).dyn_hv_phys_proc_index; 254 + index = lppaca[i].dyn_hv_phys_proc_index; 255 255 d = &xIoHriProcessorVpd[index]; 256 256 257 257 dt_prop_u32(dt, "i-cache-size", d->xInstCacheSize * 1024);
+1
arch/powerpc/platforms/iseries/setup.c
··· 680 680 * on but calling this function multiple times is fine. 681 681 */ 682 682 identify_cpu(0, mfspr(SPRN_PVR)); 683 + initialise_paca(&boot_paca, 0); 683 684 684 685 powerpc_firmware_features |= FW_FEATURE_ISERIES; 685 686 powerpc_firmware_features |= FW_FEATURE_LPAR;
+1 -1
arch/sh/include/asm/sections.h
··· 3 3 4 4 #include <asm-generic/sections.h> 5 5 6 - extern void __nosave_begin, __nosave_end; 6 + extern long __nosave_begin, __nosave_end; 7 7 extern long __machvec_start, __machvec_end; 8 8 extern char __uncached_start, __uncached_end; 9 9 extern char _ebss[];
+9 -4
arch/sh/kernel/cpu/sh4/setup-sh7750.c
··· 14 14 #include <linux/io.h> 15 15 #include <linux/sh_timer.h> 16 16 #include <linux/serial_sci.h> 17 - #include <asm/machtypes.h> 17 + #include <generated/machtypes.h> 18 18 19 19 static struct resource rtc_resources[] = { 20 20 [0] = { ··· 255 255 256 256 void __init plat_early_device_setup(void) 257 257 { 258 + struct platform_device *dev[1]; 259 + 258 260 if (mach_is_rts7751r2d()) { 259 261 scif_platform_data.scscr |= SCSCR_CKE1; 260 - early_platform_add_devices(&scif_device, 1); 262 + dev[0] = &scif_device; 263 + early_platform_add_devices(dev, 1); 261 264 } else { 262 - early_platform_add_devices(&sci_device, 1); 263 - early_platform_add_devices(&scif_device, 1); 265 + dev[0] = &sci_device; 266 + early_platform_add_devices(dev, 1); 267 + dev[0] = &scif_device; 268 + early_platform_add_devices(dev, 1); 264 269 } 265 270 266 271 early_platform_add_devices(sh7750_early_devices,
+10
arch/sh/lib/delay.c
··· 10 10 void __delay(unsigned long loops) 11 11 { 12 12 __asm__ __volatile__( 13 + /* 14 + * ST40-300 appears to have an issue with this code, 15 + * normally taking two cycles each loop, as with all 16 + * other SH variants. If however the branch and the 17 + * delay slot straddle an 8 byte boundary, this increases 18 + * to 3 cycles. 19 + * This align directive ensures this doesn't occur. 20 + */ 21 + ".balign 8\n\t" 22 + 13 23 "tst %0, %0\n\t" 14 24 "1:\t" 15 25 "bf/s 1b\n\t"
+2 -1
arch/sh/mm/cache.c
··· 108 108 kunmap_atomic(vfrom, KM_USER0); 109 109 } 110 110 111 - if (pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK)) 111 + if (pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK) || 112 + (vma->vm_flags & VM_EXEC)) 112 113 __flush_purge_region(vto, PAGE_SIZE); 113 114 114 115 kunmap_atomic(vto, KM_USER1);
+6 -1
arch/x86/boot/compressed/mkpiggy.c
··· 62 62 if (fseek(f, -4L, SEEK_END)) { 63 63 perror(argv[1]); 64 64 } 65 - fread(&olen, sizeof olen, 1, f); 65 + 66 + if (fread(&olen, sizeof(olen), 1, f) != 1) { 67 + perror(argv[1]); 68 + return 1; 69 + } 70 + 66 71 ilen = ftell(f); 67 72 olen = getle32(&olen); 68 73 fclose(f);
+1 -1
arch/x86/include/asm/uv/uv_bau.h
··· 176 176 struct bau_msg_header { 177 177 unsigned int dest_subnodeid:6; /* must be 0x10, for the LB */ 178 178 /* bits 5:0 */ 179 - unsigned int base_dest_nodeid:15; /* nasid (pnode<<1) of */ 179 + unsigned int base_dest_nodeid:15; /* nasid of the */ 180 180 /* bits 20:6 */ /* first bit in uvhub map */ 181 181 unsigned int command:8; /* message type */ 182 182 /* bits 28:21 */
+1 -1
arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c
··· 195 195 cmd_incomplete: 196 196 iowrite16(0, &pcch_hdr->status); 197 197 spin_unlock(&pcc_lock); 198 - return -EINVAL; 198 + return 0; 199 199 } 200 200 201 201 static int pcc_cpufreq_target(struct cpufreq_policy *policy,
+1 -5
arch/x86/mm/numa_64.c
··· 780 780 int physnid; 781 781 int nid = NUMA_NO_NODE; 782 782 783 - apicid = early_per_cpu(x86_cpu_to_apicid, cpu); 784 - if (apicid != BAD_APICID) 785 - nid = apicid_to_node[apicid]; 786 - if (nid == NUMA_NO_NODE) 787 - nid = early_cpu_to_node(cpu); 783 + nid = early_cpu_to_node(cpu); 788 784 BUG_ON(nid == NUMA_NO_NODE || !node_online(nid)); 789 785 790 786 /*
+2 -2
arch/x86/platform/uv/tlb_uv.c
··· 1364 1364 memset(bd2, 0, sizeof(struct bau_desc)); 1365 1365 bd2->header.sw_ack_flag = 1; 1366 1366 /* 1367 - * base_dest_nodeid is the nasid (pnode<<1) of the first uvhub 1367 + * base_dest_nodeid is the nasid of the first uvhub 1368 1368 * in the partition. The bit map will indicate uvhub numbers, 1369 1369 * which are 0-N in a partition. Pnodes are unique system-wide. 1370 1370 */ 1371 - bd2->header.base_dest_nodeid = uv_partition_base_pnode << 1; 1371 + bd2->header.base_dest_nodeid = UV_PNODE_TO_NASID(uv_partition_base_pnode); 1372 1372 bd2->header.dest_subnodeid = 0x10; /* the LB */ 1373 1373 bd2->header.command = UV_NET_ENDPOINT_INTD; 1374 1374 bd2->header.int_both = 1;
+8
drivers/char/ipmi/ipmi_si_intf.c
··· 900 900 printk("**Enqueue: %d.%9.9d\n", t.tv_sec, t.tv_usec); 901 901 #endif 902 902 903 + /* 904 + * last_timeout_jiffies is updated here to avoid 905 + * smi_timeout() handler passing very large time_diff 906 + * value to smi_event_handler() that causes 907 + * the send command to abort. 908 + */ 909 + smi_info->last_timeout_jiffies = jiffies; 910 + 903 911 mod_timer(&smi_info->si_timer, jiffies + SI_TIMEOUT_JIFFIES); 904 912 905 913 if (smi_info->thread)
+8
drivers/char/virtio_console.c
··· 388 388 unsigned int len; 389 389 int ret; 390 390 391 + if (!port->portdev) { 392 + /* Device has been unplugged. vqs are already gone. */ 393 + return; 394 + } 391 395 vq = port->in_vq; 392 396 if (port->inbuf) 393 397 buf = port->inbuf; ··· 474 470 void *buf; 475 471 unsigned int len; 476 472 473 + if (!port->portdev) { 474 + /* Device has been unplugged. vqs are already gone. */ 475 + return; 476 + } 477 477 while ((buf = virtqueue_get_buf(port->out_vq, &len))) { 478 478 kfree(buf); 479 479 port->outvq_full = false;
+2 -2
drivers/gpu/drm/drm_fb_helper.c
··· 672 672 struct drm_crtc_helper_funcs *crtc_funcs; 673 673 u16 *red, *green, *blue, *transp; 674 674 struct drm_crtc *crtc; 675 - int i, rc = 0; 675 + int i, j, rc = 0; 676 676 int start; 677 677 678 678 for (i = 0; i < fb_helper->crtc_count; i++) { ··· 685 685 transp = cmap->transp; 686 686 start = cmap->start; 687 687 688 - for (i = 0; i < cmap->len; i++) { 688 + for (j = 0; j < cmap->len; j++) { 689 689 u16 hred, hgreen, hblue, htransp = 0xffff; 690 690 691 691 hred = *red++;
+2 -2
drivers/gpu/drm/i915/i915_debugfs.c
··· 865 865 int max_freq; 866 866 867 867 /* RPSTAT1 is in the GT power well */ 868 - __gen6_force_wake_get(dev_priv); 868 + __gen6_gt_force_wake_get(dev_priv); 869 869 870 870 seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status); 871 871 seq_printf(m, "RPSTAT1: 0x%08x\n", I915_READ(GEN6_RPSTAT1)); ··· 888 888 seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n", 889 889 max_freq * 100); 890 890 891 - __gen6_force_wake_put(dev_priv); 891 + __gen6_gt_force_wake_put(dev_priv); 892 892 } else { 893 893 seq_printf(m, "no P-state info available\n"); 894 894 }
+15 -2
drivers/gpu/drm/i915/i915_drv.c
··· 46 46 unsigned int i915_powersave = 1; 47 47 module_param_named(powersave, i915_powersave, int, 0600); 48 48 49 + unsigned int i915_semaphores = 0; 50 + module_param_named(semaphores, i915_semaphores, int, 0600); 51 + 49 52 unsigned int i915_enable_rc6 = 0; 50 53 module_param_named(i915_enable_rc6, i915_enable_rc6, int, 0600); 51 54 ··· 257 254 } 258 255 } 259 256 260 - void __gen6_force_wake_get(struct drm_i915_private *dev_priv) 257 + void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv) 261 258 { 262 259 int count; 263 260 ··· 273 270 udelay(10); 274 271 } 275 272 276 - void __gen6_force_wake_put(struct drm_i915_private *dev_priv) 273 + void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv) 277 274 { 278 275 I915_WRITE_NOTRACE(FORCEWAKE, 0); 279 276 POSTING_READ(FORCEWAKE); 277 + } 278 + 279 + void __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv) 280 + { 281 + int loop = 500; 282 + u32 fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES); 283 + while (fifo < 20 && loop--) { 284 + udelay(10); 285 + fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES); 286 + } 280 287 } 281 288 282 289 static int i915_drm_freeze(struct drm_device *dev)
+19 -5
drivers/gpu/drm/i915/i915_drv.h
··· 956 956 extern int i915_max_ioctl; 957 957 extern unsigned int i915_fbpercrtc; 958 958 extern unsigned int i915_powersave; 959 + extern unsigned int i915_semaphores; 959 960 extern unsigned int i915_lvds_downclock; 960 961 extern unsigned int i915_panel_use_ssc; 961 962 extern unsigned int i915_enable_rc6; ··· 1178 1177 void i915_gem_free_all_phys_object(struct drm_device *dev); 1179 1178 void i915_gem_release(struct drm_device *dev, struct drm_file *file); 1180 1179 1180 + uint32_t 1181 + i915_gem_get_unfenced_gtt_alignment(struct drm_i915_gem_object *obj); 1182 + 1181 1183 /* i915_gem_gtt.c */ 1182 1184 void i915_gem_restore_gtt_mappings(struct drm_device *dev); 1183 1185 int __must_check i915_gem_gtt_bind_object(struct drm_i915_gem_object *obj); ··· 1357 1353 * must be set to prevent GT core from power down and stale values being 1358 1354 * returned. 1359 1355 */ 1360 - void __gen6_force_wake_get(struct drm_i915_private *dev_priv); 1361 - void __gen6_force_wake_put (struct drm_i915_private *dev_priv); 1362 - static inline u32 i915_safe_read(struct drm_i915_private *dev_priv, u32 reg) 1356 + void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv); 1357 + void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv); 1358 + void __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv); 1359 + 1360 + static inline u32 i915_gt_read(struct drm_i915_private *dev_priv, u32 reg) 1363 1361 { 1364 1362 u32 val; 1365 1363 1366 1364 if (dev_priv->info->gen >= 6) { 1367 - __gen6_force_wake_get(dev_priv); 1365 + __gen6_gt_force_wake_get(dev_priv); 1368 1366 val = I915_READ(reg); 1369 - __gen6_force_wake_put(dev_priv); 1367 + __gen6_gt_force_wake_put(dev_priv); 1370 1368 } else 1371 1369 val = I915_READ(reg); 1372 1370 1373 1371 return val; 1372 + } 1373 + 1374 + static inline void i915_gt_write(struct drm_i915_private *dev_priv, 1375 + u32 reg, u32 val) 1376 + { 1377 + if (dev_priv->info->gen >= 6) 1378 + __gen6_gt_wait_for_fifo(dev_priv); 1379 + I915_WRITE(reg, val); 1374 1380 } 1375 1381 1376 1382 static inline void
+1 -1
drivers/gpu/drm/i915/i915_gem.c
··· 1398 1398 * Return the required GTT alignment for an object, only taking into account 1399 1399 * unfenced tiled surface requirements. 1400 1400 */ 1401 - static uint32_t 1401 + uint32_t 1402 1402 i915_gem_get_unfenced_gtt_alignment(struct drm_i915_gem_object *obj) 1403 1403 { 1404 1404 struct drm_device *dev = obj->base.dev;
+2 -2
drivers/gpu/drm/i915/i915_gem_execbuffer.c
··· 772 772 if (from == NULL || to == from) 773 773 return 0; 774 774 775 - /* XXX gpu semaphores are currently causing hard hangs on SNB mobile */ 776 - if (INTEL_INFO(obj->base.dev)->gen < 6 || IS_MOBILE(obj->base.dev)) 775 + /* XXX gpu semaphores are implicated in various hard hangs on SNB */ 776 + if (INTEL_INFO(obj->base.dev)->gen < 6 || !i915_semaphores) 777 777 return i915_gem_object_wait_rendering(obj, true); 778 778 779 779 idx = intel_ring_sync_index(from, to);
+18 -19
drivers/gpu/drm/i915/i915_gem_tiling.c
··· 184 184 static bool 185 185 i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode) 186 186 { 187 - int tile_width, tile_height; 187 + int tile_width; 188 188 189 189 /* Linear is always fine */ 190 190 if (tiling_mode == I915_TILING_NONE) ··· 214 214 return false; 215 215 } 216 216 } 217 - 218 - if (IS_GEN2(dev) || 219 - (tiling_mode == I915_TILING_Y && HAS_128_BYTE_Y_TILING(dev))) 220 - tile_height = 32; 221 - else 222 - tile_height = 8; 223 - /* i8xx is strange: It has 2 interleaved rows of tiles, so needs an even 224 - * number of tile rows. */ 225 - if (IS_GEN2(dev)) 226 - tile_height *= 2; 227 - 228 - /* Size needs to be aligned to a full tile row */ 229 - if (size & (tile_height * stride - 1)) 230 - return false; 231 217 232 218 /* 965+ just needs multiples of tile width */ 233 219 if (INTEL_INFO(dev)->gen >= 4) { ··· 349 363 (obj->gtt_offset + obj->base.size <= dev_priv->mm.gtt_mappable_end && 350 364 i915_gem_object_fence_ok(obj, args->tiling_mode)); 351 365 352 - obj->tiling_changed = true; 353 - obj->tiling_mode = args->tiling_mode; 354 - obj->stride = args->stride; 366 + /* Rebind if we need a change of alignment */ 367 + if (!obj->map_and_fenceable) { 368 + u32 unfenced_alignment = 369 + i915_gem_get_unfenced_gtt_alignment(obj); 370 + if (obj->gtt_offset & (unfenced_alignment - 1)) 371 + ret = i915_gem_object_unbind(obj); 372 + } 373 + 374 + if (ret == 0) { 375 + obj->tiling_changed = true; 376 + obj->tiling_mode = args->tiling_mode; 377 + obj->stride = args->stride; 378 + } 355 379 } 380 + /* we have to maintain this existing ABI... */ 381 + args->stride = obj->stride; 382 + args->tiling_mode = obj->tiling_mode; 356 383 drm_gem_object_unreference(&obj->base); 357 384 mutex_unlock(&dev->struct_mutex); 358 385 359 - return 0; 386 + return ret; 360 387 } 361 388 362 389 /**
+12
drivers/gpu/drm/i915/i915_reg.h
··· 1553 1553 1554 1554 /* Backlight control */ 1555 1555 #define BLC_PWM_CTL 0x61254 1556 + #define BACKLIGHT_MODULATION_FREQ_SHIFT (17) 1556 1557 #define BLC_PWM_CTL2 0x61250 /* 965+ only */ 1558 + #define BLM_COMBINATION_MODE (1 << 30) 1559 + /* 1560 + * This is the most significant 15 bits of the number of backlight cycles in a 1561 + * complete cycle of the modulated backlight control. 1562 + * 1563 + * The actual value is this field multiplied by two. 1564 + */ 1565 + #define BACKLIGHT_MODULATION_FREQ_MASK (0x7fff << 17) 1566 + #define BLM_LEGACY_MODE (1 << 16) 1557 1567 /* 1558 1568 * This is the number of cycles out of the backlight modulation cycle for which 1559 1569 * the backlight is on. ··· 3270 3260 3271 3261 #define FORCEWAKE 0xA18C 3272 3262 #define FORCEWAKE_ACK 0x130090 3263 + 3264 + #define GT_FIFO_FREE_ENTRIES 0x120008 3273 3265 3274 3266 #define GEN6_RPNSWREQ 0xA008 3275 3267 #define GEN6_TURBO_DISABLE (1<<31)
+4 -4
drivers/gpu/drm/i915/intel_display.c
··· 1219 1219 u32 blt_ecoskpd; 1220 1220 1221 1221 /* Make sure blitter notifies FBC of writes */ 1222 - __gen6_force_wake_get(dev_priv); 1222 + __gen6_gt_force_wake_get(dev_priv); 1223 1223 blt_ecoskpd = I915_READ(GEN6_BLITTER_ECOSKPD); 1224 1224 blt_ecoskpd |= GEN6_BLITTER_FBC_NOTIFY << 1225 1225 GEN6_BLITTER_LOCK_SHIFT; ··· 1230 1230 GEN6_BLITTER_LOCK_SHIFT); 1231 1231 I915_WRITE(GEN6_BLITTER_ECOSKPD, blt_ecoskpd); 1232 1232 POSTING_READ(GEN6_BLITTER_ECOSKPD); 1233 - __gen6_force_wake_put(dev_priv); 1233 + __gen6_gt_force_wake_put(dev_priv); 1234 1234 } 1235 1235 1236 1236 static void ironlake_enable_fbc(struct drm_crtc *crtc, unsigned long interval) ··· 6282 6282 * userspace... 6283 6283 */ 6284 6284 I915_WRITE(GEN6_RC_STATE, 0); 6285 - __gen6_force_wake_get(dev_priv); 6285 + __gen6_gt_force_wake_get(dev_priv); 6286 6286 6287 6287 /* disable the counters and set deterministic thresholds */ 6288 6288 I915_WRITE(GEN6_RC_CONTROL, 0); ··· 6380 6380 /* enable all PM interrupts */ 6381 6381 I915_WRITE(GEN6_PMINTRMSK, 0); 6382 6382 6383 - __gen6_force_wake_put(dev_priv); 6383 + __gen6_gt_force_wake_put(dev_priv); 6384 6384 } 6385 6385 6386 6386 void intel_enable_clock_gating(struct drm_device *dev)
+36
drivers/gpu/drm/i915/intel_panel.c
··· 30 30 31 31 #include "intel_drv.h" 32 32 33 + #define PCI_LBPC 0xf4 /* legacy/combination backlight modes */ 34 + 33 35 void 34 36 intel_fixed_panel_mode(struct drm_display_mode *fixed_mode, 35 37 struct drm_display_mode *adjusted_mode) ··· 112 110 dev_priv->pch_pf_size = (width << 16) | height; 113 111 } 114 112 113 + static int is_backlight_combination_mode(struct drm_device *dev) 114 + { 115 + struct drm_i915_private *dev_priv = dev->dev_private; 116 + 117 + if (INTEL_INFO(dev)->gen >= 4) 118 + return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE; 119 + 120 + if (IS_GEN2(dev)) 121 + return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE; 122 + 123 + return 0; 124 + } 125 + 115 126 static u32 i915_read_blc_pwm_ctl(struct drm_i915_private *dev_priv) 116 127 { 117 128 u32 val; ··· 181 166 if (INTEL_INFO(dev)->gen < 4) 182 167 max &= ~1; 183 168 } 169 + 170 + if (is_backlight_combination_mode(dev)) 171 + max *= 0xff; 184 172 } 185 173 186 174 DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max); ··· 201 183 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; 202 184 if (IS_PINEVIEW(dev)) 203 185 val >>= 1; 186 + 187 + if (is_backlight_combination_mode(dev)){ 188 + u8 lbpc; 189 + 190 + val &= ~1; 191 + pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc); 192 + val *= lbpc; 193 + } 204 194 } 205 195 206 196 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val); ··· 231 205 232 206 if (HAS_PCH_SPLIT(dev)) 233 207 return intel_pch_panel_set_backlight(dev, level); 208 + 209 + if (is_backlight_combination_mode(dev)){ 210 + u32 max = intel_panel_get_max_backlight(dev); 211 + u8 lbpc; 212 + 213 + lbpc = level * 0xfe / max + 1; 214 + level /= lbpc; 215 + pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc); 216 + } 217 + 234 218 tmp = I915_READ(BLC_PWM_CTL); 235 219 if (IS_PINEVIEW(dev)) { 236 220 tmp &= ~(BACKLIGHT_DUTY_CYCLE_MASK - 1);
+7 -6
drivers/gpu/drm/i915/intel_ringbuffer.h
··· 14 14 struct drm_i915_gem_object *obj; 15 15 }; 16 16 17 - #define I915_RING_READ(reg) i915_safe_read(dev_priv, reg) 17 + #define I915_RING_READ(reg) i915_gt_read(dev_priv, reg) 18 + #define I915_RING_WRITE(reg, val) i915_gt_write(dev_priv, reg, val) 18 19 19 20 #define I915_READ_TAIL(ring) I915_RING_READ(RING_TAIL((ring)->mmio_base)) 20 - #define I915_WRITE_TAIL(ring, val) I915_WRITE(RING_TAIL((ring)->mmio_base), val) 21 + #define I915_WRITE_TAIL(ring, val) I915_RING_WRITE(RING_TAIL((ring)->mmio_base), val) 21 22 22 23 #define I915_READ_START(ring) I915_RING_READ(RING_START((ring)->mmio_base)) 23 - #define I915_WRITE_START(ring, val) I915_WRITE(RING_START((ring)->mmio_base), val) 24 + #define I915_WRITE_START(ring, val) I915_RING_WRITE(RING_START((ring)->mmio_base), val) 24 25 25 26 #define I915_READ_HEAD(ring) I915_RING_READ(RING_HEAD((ring)->mmio_base)) 26 - #define I915_WRITE_HEAD(ring, val) I915_WRITE(RING_HEAD((ring)->mmio_base), val) 27 + #define I915_WRITE_HEAD(ring, val) I915_RING_WRITE(RING_HEAD((ring)->mmio_base), val) 27 28 28 29 #define I915_READ_CTL(ring) I915_RING_READ(RING_CTL((ring)->mmio_base)) 29 - #define I915_WRITE_CTL(ring, val) I915_WRITE(RING_CTL((ring)->mmio_base), val) 30 + #define I915_WRITE_CTL(ring, val) I915_RING_WRITE(RING_CTL((ring)->mmio_base), val) 30 31 31 - #define I915_WRITE_IMR(ring, val) I915_WRITE(RING_IMR((ring)->mmio_base), val) 32 32 #define I915_READ_IMR(ring) I915_RING_READ(RING_IMR((ring)->mmio_base)) 33 + #define I915_WRITE_IMR(ring, val) I915_RING_WRITE(RING_IMR((ring)->mmio_base), val) 33 34 34 35 #define I915_READ_NOPID(ring) I915_RING_READ(RING_NOPID((ring)->mmio_base)) 35 36 #define I915_READ_SYNC_0(ring) I915_RING_READ(RING_SYNC_0((ring)->mmio_base))
+2 -1
drivers/gpu/drm/nouveau/nouveau_dma.c
··· 83 83 return ret; 84 84 85 85 /* NV_MEMORY_TO_MEMORY_FORMAT requires a notifier object */ 86 - ret = nouveau_notifier_alloc(chan, NvNotify0, 32, &chan->m2mf_ntfy); 86 + ret = nouveau_notifier_alloc(chan, NvNotify0, 32, 0xfd0, 0x1000, 87 + &chan->m2mf_ntfy); 87 88 if (ret) 88 89 return ret; 89 90
+2 -1
drivers/gpu/drm/nouveau/nouveau_drv.h
··· 852 852 extern int nouveau_notifier_init_channel(struct nouveau_channel *); 853 853 extern void nouveau_notifier_takedown_channel(struct nouveau_channel *); 854 854 extern int nouveau_notifier_alloc(struct nouveau_channel *, uint32_t handle, 855 - int cout, uint32_t *offset); 855 + int cout, uint32_t start, uint32_t end, 856 + uint32_t *offset); 856 857 extern int nouveau_notifier_offset(struct nouveau_gpuobj *, uint32_t *); 857 858 extern int nouveau_ioctl_notifier_alloc(struct drm_device *, void *data, 858 859 struct drm_file *);
+4 -2
drivers/gpu/drm/nouveau/nouveau_mem.c
··· 725 725 ret = vram->get(dev, mem->num_pages << PAGE_SHIFT, 726 726 mem->page_alignment << PAGE_SHIFT, size_nc, 727 727 (nvbo->tile_flags >> 8) & 0xff, &node); 728 - if (ret) 729 - return ret; 728 + if (ret) { 729 + mem->mm_node = NULL; 730 + return (ret == -ENOSPC) ? 0 : ret; 731 + } 730 732 731 733 node->page_shift = 12; 732 734 if (nvbo->vma.node)
+1 -1
drivers/gpu/drm/nouveau/nouveau_mm.c
··· 123 123 return 0; 124 124 } 125 125 126 - return -ENOMEM; 126 + return -ENOSPC; 127 127 } 128 128 129 129 int
+7 -4
drivers/gpu/drm/nouveau/nouveau_notifier.c
··· 96 96 97 97 int 98 98 nouveau_notifier_alloc(struct nouveau_channel *chan, uint32_t handle, 99 - int size, uint32_t *b_offset) 99 + int size, uint32_t start, uint32_t end, 100 + uint32_t *b_offset) 100 101 { 101 102 struct drm_device *dev = chan->dev; 102 103 struct nouveau_gpuobj *nobj = NULL; ··· 105 104 uint32_t offset; 106 105 int target, ret; 107 106 108 - mem = drm_mm_search_free(&chan->notifier_heap, size, 0, 0); 107 + mem = drm_mm_search_free_in_range(&chan->notifier_heap, size, 0, 108 + start, end, 0); 109 109 if (mem) 110 - mem = drm_mm_get_block(mem, size, 0); 110 + mem = drm_mm_get_block_range(mem, size, 0, start, end); 111 111 if (!mem) { 112 112 NV_ERROR(dev, "Channel %d notifier block full\n", chan->id); 113 113 return -ENOMEM; ··· 179 177 if (IS_ERR(chan)) 180 178 return PTR_ERR(chan); 181 179 182 - ret = nouveau_notifier_alloc(chan, na->handle, na->size, &na->offset); 180 + ret = nouveau_notifier_alloc(chan, na->handle, na->size, 0, 0x1000, 181 + &na->offset); 183 182 nouveau_channel_put(&chan); 184 183 return ret; 185 184 }
+8
drivers/gpu/drm/nouveau/nv50_instmem.c
··· 403 403 void 404 404 nv50_instmem_flush(struct drm_device *dev) 405 405 { 406 + struct drm_nouveau_private *dev_priv = dev->dev_private; 407 + 408 + spin_lock(&dev_priv->ramin_lock); 406 409 nv_wr32(dev, 0x00330c, 0x00000001); 407 410 if (!nv_wait(dev, 0x00330c, 0x00000002, 0x00000000)) 408 411 NV_ERROR(dev, "PRAMIN flush timeout\n"); 412 + spin_unlock(&dev_priv->ramin_lock); 409 413 } 410 414 411 415 void 412 416 nv84_instmem_flush(struct drm_device *dev) 413 417 { 418 + struct drm_nouveau_private *dev_priv = dev->dev_private; 419 + 420 + spin_lock(&dev_priv->ramin_lock); 414 421 nv_wr32(dev, 0x070000, 0x00000001); 415 422 if (!nv_wait(dev, 0x070000, 0x00000002, 0x00000000)) 416 423 NV_ERROR(dev, "PRAMIN flush timeout\n"); 424 + spin_unlock(&dev_priv->ramin_lock); 417 425 } 418 426
+4
drivers/gpu/drm/nouveau/nv50_vm.c
··· 169 169 void 170 170 nv50_vm_flush_engine(struct drm_device *dev, int engine) 171 171 { 172 + struct drm_nouveau_private *dev_priv = dev->dev_private; 173 + 174 + spin_lock(&dev_priv->ramin_lock); 172 175 nv_wr32(dev, 0x100c80, (engine << 16) | 1); 173 176 if (!nv_wait(dev, 0x100c80, 0x00000001, 0x00000000)) 174 177 NV_ERROR(dev, "vm flush timeout: engine %d\n", engine); 178 + spin_unlock(&dev_priv->ramin_lock); 175 179 }
+1
drivers/i2c/busses/i2c-eg20t.c
··· 29 29 #include <linux/pci.h> 30 30 #include <linux/mutex.h> 31 31 #include <linux/ktime.h> 32 + #include <linux/slab.h> 32 33 33 34 #define PCH_EVENT_SET 0 /* I2C Interrupt Event Set Status */ 34 35 #define PCH_EVENT_NONE 1 /* I2C Interrupt Event Clear Status */
+1 -1
drivers/i2c/busses/i2c-ocores.c
··· 249 249 static int ocores_i2c_of_probe(struct platform_device* pdev, 250 250 struct ocores_i2c* i2c) 251 251 { 252 - __be32* val; 252 + const __be32* val; 253 253 254 254 val = of_get_property(pdev->dev.of_node, "regstep", NULL); 255 255 if (!val) {
+1 -3
drivers/i2c/busses/i2c-omap.c
··· 378 378 * REVISIT: Some wkup sources might not be needed. 379 379 */ 380 380 dev->westate = OMAP_I2C_WE_ALL; 381 - if (dev->rev < OMAP_I2C_REV_ON_4430) 382 - omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, 383 - dev->westate); 381 + omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, dev->westate); 384 382 } 385 383 } 386 384 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
+7 -7
drivers/media/common/tuners/tda8290.c
··· 658 658 #define TDA8290_ID 0x89 659 659 u8 reg = 0x1f, id; 660 660 struct i2c_msg msg_read[] = { 661 - { .addr = 0x4b, .flags = 0, .len = 1, .buf = &reg }, 662 - { .addr = 0x4b, .flags = I2C_M_RD, .len = 1, .buf = &id }, 661 + { .addr = i2c_props->addr, .flags = 0, .len = 1, .buf = &reg }, 662 + { .addr = i2c_props->addr, .flags = I2C_M_RD, .len = 1, .buf = &id }, 663 663 }; 664 664 665 665 /* detect tda8290 */ 666 666 if (i2c_transfer(i2c_props->adap, msg_read, 2) != 2) { 667 - printk(KERN_WARNING "%s: tda8290 couldn't read register 0x%02x\n", 667 + printk(KERN_WARNING "%s: couldn't read register 0x%02x\n", 668 668 __func__, reg); 669 669 return -ENODEV; 670 670 } ··· 685 685 #define TDA8295C2_ID 0x8b 686 686 u8 reg = 0x2f, id; 687 687 struct i2c_msg msg_read[] = { 688 - { .addr = 0x4b, .flags = 0, .len = 1, .buf = &reg }, 689 - { .addr = 0x4b, .flags = I2C_M_RD, .len = 1, .buf = &id }, 688 + { .addr = i2c_props->addr, .flags = 0, .len = 1, .buf = &reg }, 689 + { .addr = i2c_props->addr, .flags = I2C_M_RD, .len = 1, .buf = &id }, 690 690 }; 691 691 692 - /* detect tda8290 */ 692 + /* detect tda8295 */ 693 693 if (i2c_transfer(i2c_props->adap, msg_read, 2) != 2) { 694 - printk(KERN_WARNING "%s: tda8290 couldn't read register 0x%02x\n", 694 + printk(KERN_WARNING "%s: couldn't read register 0x%02x\n", 695 695 __func__, reg); 696 696 return -ENODEV; 697 697 }
+19 -2
drivers/media/dvb/dvb-usb/dib0700_devices.c
··· 870 870 return 0; 871 871 } 872 872 873 + static int stk7700p_pid_filter(struct dvb_usb_adapter *adapter, int index, 874 + u16 pid, int onoff) 875 + { 876 + struct dib0700_state *st = adapter->dev->priv; 877 + if (st->is_dib7000pc) 878 + return dib7000p_pid_filter(adapter->fe, index, pid, onoff); 879 + return dib7000m_pid_filter(adapter->fe, index, pid, onoff); 880 + } 881 + 882 + static int stk7700p_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff) 883 + { 884 + struct dib0700_state *st = adapter->dev->priv; 885 + if (st->is_dib7000pc) 886 + return dib7000p_pid_filter_ctrl(adapter->fe, onoff); 887 + return dib7000m_pid_filter_ctrl(adapter->fe, onoff); 888 + } 889 + 873 890 static int stk70x0p_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff) 874 891 { 875 892 return dib7000p_pid_filter(adapter->fe, index, pid, onoff); ··· 1892 1875 { 1893 1876 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, 1894 1877 .pid_filter_count = 32, 1895 - .pid_filter = stk70x0p_pid_filter, 1896 - .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, 1878 + .pid_filter = stk7700p_pid_filter, 1879 + .pid_filter_ctrl = stk7700p_pid_filter_ctrl, 1897 1880 .frontend_attach = stk7700p_frontend_attach, 1898 1881 .tuner_attach = stk7700p_tuner_attach, 1899 1882
+3 -3
drivers/media/dvb/dvb-usb/lmedm04.c
··· 659 659 } 660 660 661 661 /* Default firmware for LME2510C */ 662 - const char lme_firmware[50] = "dvb-usb-lme2510c-s7395.fw"; 662 + char lme_firmware[50] = "dvb-usb-lme2510c-s7395.fw"; 663 663 664 664 static void lme_coldreset(struct usb_device *dev) 665 665 { ··· 1006 1006 .caps = DVB_USB_IS_AN_I2C_ADAPTER, 1007 1007 .usb_ctrl = DEVICE_SPECIFIC, 1008 1008 .download_firmware = lme2510_download_firmware, 1009 - .firmware = lme_firmware, 1009 + .firmware = (const char *)&lme_firmware, 1010 1010 .size_of_priv = sizeof(struct lme2510_state), 1011 1011 .num_adapters = 1, 1012 1012 .adapter = { ··· 1109 1109 1110 1110 MODULE_AUTHOR("Malcolm Priestley <tvboxspy@gmail.com>"); 1111 1111 MODULE_DESCRIPTION("LME2510(C) DVB-S USB2.0"); 1112 - MODULE_VERSION("1.74"); 1112 + MODULE_VERSION("1.75"); 1113 1113 MODULE_LICENSE("GPL");
+19
drivers/media/dvb/frontends/dib7000m.c
··· 1285 1285 } 1286 1286 EXPORT_SYMBOL(dib7000m_get_i2c_master); 1287 1287 1288 + int dib7000m_pid_filter_ctrl(struct dvb_frontend *fe, u8 onoff) 1289 + { 1290 + struct dib7000m_state *state = fe->demodulator_priv; 1291 + u16 val = dib7000m_read_word(state, 294 + state->reg_offs) & 0xffef; 1292 + val |= (onoff & 0x1) << 4; 1293 + dprintk("PID filter enabled %d", onoff); 1294 + return dib7000m_write_word(state, 294 + state->reg_offs, val); 1295 + } 1296 + EXPORT_SYMBOL(dib7000m_pid_filter_ctrl); 1297 + 1298 + int dib7000m_pid_filter(struct dvb_frontend *fe, u8 id, u16 pid, u8 onoff) 1299 + { 1300 + struct dib7000m_state *state = fe->demodulator_priv; 1301 + dprintk("PID filter: index %x, PID %d, OnOff %d", id, pid, onoff); 1302 + return dib7000m_write_word(state, 300 + state->reg_offs + id, 1303 + onoff ? (1 << 13) | pid : 0); 1304 + } 1305 + EXPORT_SYMBOL(dib7000m_pid_filter); 1306 + 1288 1307 #if 0 1289 1308 /* used with some prototype boards */ 1290 1309 int dib7000m_i2c_enumeration(struct i2c_adapter *i2c, int no_of_demods,
+15
drivers/media/dvb/frontends/dib7000m.h
··· 46 46 extern struct i2c_adapter *dib7000m_get_i2c_master(struct dvb_frontend *, 47 47 enum dibx000_i2c_interface, 48 48 int); 49 + extern int dib7000m_pid_filter(struct dvb_frontend *, u8 id, u16 pid, u8 onoff); 50 + extern int dib7000m_pid_filter_ctrl(struct dvb_frontend *fe, u8 onoff); 49 51 #else 50 52 static inline 51 53 struct dvb_frontend *dib7000m_attach(struct i2c_adapter *i2c_adap, ··· 64 62 { 65 63 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); 66 64 return NULL; 65 + } 66 + static inline int dib7000m_pid_filter(struct dvb_frontend *fe, u8 id, 67 + u16 pid, u8 onoff) 68 + { 69 + printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); 70 + return -ENODEV; 71 + } 72 + 73 + static inline int dib7000m_pid_filter_ctrl(struct dvb_frontend *fe, 74 + uint8_t onoff) 75 + { 76 + printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); 77 + return -ENODEV; 67 78 } 68 79 #endif 69 80
-1
drivers/media/dvb/mantis/mantis_pci.c
··· 22 22 #include <linux/moduleparam.h> 23 23 #include <linux/kernel.h> 24 24 #include <asm/io.h> 25 - #include <asm/pgtable.h> 26 25 #include <asm/page.h> 27 26 #include <linux/kmod.h> 28 27 #include <linux/vmalloc.h>
+1 -2
drivers/media/rc/ir-raw.c
··· 112 112 { 113 113 ktime_t now; 114 114 s64 delta; /* ns */ 115 - struct ir_raw_event ev; 115 + DEFINE_IR_RAW_EVENT(ev); 116 116 int rc = 0; 117 117 118 118 if (!dev->raw) ··· 125 125 * being called for the first time, note that delta can't 126 126 * possibly be negative. 127 127 */ 128 - ev.duration = 0; 129 128 if (delta > IR_MAX_DURATION || !dev->raw->last_type) 130 129 type |= IR_START_EVENT; 131 130 else
+15 -12
drivers/media/rc/mceusb.c
··· 148 148 MCE_GEN2_TX_INV, 149 149 POLARIS_EVK, 150 150 CX_HYBRID_TV, 151 + MULTIFUNCTION, 151 152 }; 152 153 153 154 struct mceusb_model { ··· 156 155 u32 mce_gen2:1; 157 156 u32 mce_gen3:1; 158 157 u32 tx_mask_normal:1; 159 - u32 is_polaris:1; 160 158 u32 no_tx:1; 159 + 160 + int ir_intfnum; 161 161 162 162 const char *rc_map; /* Allow specify a per-board map */ 163 163 const char *name; /* per-board name */ ··· 181 179 .tx_mask_normal = 1, 182 180 }, 183 181 [POLARIS_EVK] = { 184 - .is_polaris = 1, 185 182 /* 186 183 * In fact, the EVK is shipped without 187 184 * remotes, but we should have something handy, ··· 190 189 .name = "Conexant Hybrid TV (cx231xx) MCE IR", 191 190 }, 192 191 [CX_HYBRID_TV] = { 193 - .is_polaris = 1, 194 192 .no_tx = 1, /* tx isn't wired up at all */ 195 193 .name = "Conexant Hybrid TV (cx231xx) MCE IR", 194 + }, 195 + [MULTIFUNCTION] = { 196 + .mce_gen2 = 1, 197 + .ir_intfnum = 2, 196 198 }, 197 199 }; 198 200 ··· 220 216 { USB_DEVICE(VENDOR_PHILIPS, 0x206c) }, 221 217 /* Philips/Spinel plus IR transceiver for ASUS */ 222 218 { USB_DEVICE(VENDOR_PHILIPS, 0x2088) }, 223 - /* Realtek MCE IR Receiver */ 224 - { USB_DEVICE(VENDOR_REALTEK, 0x0161) }, 219 + /* Realtek MCE IR Receiver and card reader */ 220 + { USB_DEVICE(VENDOR_REALTEK, 0x0161), 221 + .driver_info = MULTIFUNCTION }, 225 222 /* SMK/Toshiba G83C0004D410 */ 226 223 { USB_DEVICE(VENDOR_SMK, 0x031d), 227 224 .driver_info = MCE_GEN2_TX_INV }, ··· 1106 1101 bool is_gen3; 1107 1102 bool is_microsoft_gen1; 1108 1103 bool tx_mask_normal; 1109 - bool is_polaris; 1104 + int ir_intfnum; 1110 1105 1111 1106 dev_dbg(&intf->dev, "%s called\n", __func__); 1112 1107 ··· 1115 1110 is_gen3 = mceusb_model[model].mce_gen3; 1116 1111 is_microsoft_gen1 = mceusb_model[model].mce_gen1; 1117 1112 tx_mask_normal = mceusb_model[model].tx_mask_normal; 1118 - is_polaris = mceusb_model[model].is_polaris; 1113 + ir_intfnum = mceusb_model[model].ir_intfnum; 1119 1114 1120 - if (is_polaris) { 1121 - /* Interface 0 is IR */ 1122 - if (idesc->desc.bInterfaceNumber) 1123 - return -ENODEV; 1124 - } 1115 + /* There are multi-function devices with non-IR interfaces */ 1116 + if (idesc->desc.bInterfaceNumber != ir_intfnum) 1117 + return -ENODEV; 1125 1118 1126 1119 /* step through the endpoints to find first bulk in and out endpoint */ 1127 1120 for (i = 0; i < idesc->desc.bNumEndpoints; ++i) {
+3 -2
drivers/media/rc/nuvoton-cir.c
··· 385 385 386 386 static void nvt_cir_wake_regs_init(struct nvt_dev *nvt) 387 387 { 388 - /* set number of bytes needed for wake key comparison (default 67) */ 389 - nvt_cir_wake_reg_write(nvt, CIR_WAKE_FIFO_LEN, CIR_WAKE_FIFO_CMP_DEEP); 388 + /* set number of bytes needed for wake from s3 (default 65) */ 389 + nvt_cir_wake_reg_write(nvt, CIR_WAKE_FIFO_CMP_BYTES, 390 + CIR_WAKE_FIFO_CMP_DEEP); 390 391 391 392 /* set tolerance/variance allowed per byte during wake compare */ 392 393 nvt_cir_wake_reg_write(nvt, CIR_WAKE_CMP_TOLERANCE,
+5 -2
drivers/media/rc/nuvoton-cir.h
··· 305 305 #define CIR_WAKE_IRFIFOSTS_RX_EMPTY 0x20 306 306 #define CIR_WAKE_IRFIFOSTS_RX_FULL 0x10 307 307 308 - /* CIR Wake FIFO buffer is 67 bytes long */ 309 - #define CIR_WAKE_FIFO_LEN 67 308 + /* 309 + * The CIR Wake FIFO buffer is 67 bytes long, but the stock remote wakes 310 + * the system comparing only 65 bytes (fails with this set to 67) 311 + */ 312 + #define CIR_WAKE_FIFO_CMP_BYTES 65 310 313 /* CIR Wake byte comparison tolerance */ 311 314 #define CIR_WAKE_CMP_TOLERANCE 5 312 315
+1 -1
drivers/media/rc/rc-main.c
··· 850 850 count++; 851 851 } else { 852 852 for (i = 0; i < ARRAY_SIZE(proto_names); i++) { 853 - if (!strncasecmp(tmp, proto_names[i].name, strlen(proto_names[i].name))) { 853 + if (!strcasecmp(tmp, proto_names[i].name)) { 854 854 tmp += strlen(proto_names[i].name); 855 855 mask = proto_names[i].type; 856 856 break;
+24 -4
drivers/media/video/au0828/au0828-video.c
··· 1758 1758 if (rc < 0) 1759 1759 return rc; 1760 1760 1761 - return videobuf_reqbufs(&fh->vb_vidq, rb); 1761 + if (fh->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) 1762 + rc = videobuf_reqbufs(&fh->vb_vidq, rb); 1763 + else if (fh->type == V4L2_BUF_TYPE_VBI_CAPTURE) 1764 + rc = videobuf_reqbufs(&fh->vb_vbiq, rb); 1765 + 1766 + return rc; 1762 1767 } 1763 1768 1764 1769 static int vidioc_querybuf(struct file *file, void *priv, ··· 1777 1772 if (rc < 0) 1778 1773 return rc; 1779 1774 1780 - return videobuf_querybuf(&fh->vb_vidq, b); 1775 + if (fh->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) 1776 + rc = videobuf_querybuf(&fh->vb_vidq, b); 1777 + else if (fh->type == V4L2_BUF_TYPE_VBI_CAPTURE) 1778 + rc = videobuf_querybuf(&fh->vb_vbiq, b); 1779 + 1780 + return rc; 1781 1781 } 1782 1782 1783 1783 static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *b) ··· 1795 1785 if (rc < 0) 1796 1786 return rc; 1797 1787 1798 - return videobuf_qbuf(&fh->vb_vidq, b); 1788 + if (fh->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) 1789 + rc = videobuf_qbuf(&fh->vb_vidq, b); 1790 + else if (fh->type == V4L2_BUF_TYPE_VBI_CAPTURE) 1791 + rc = videobuf_qbuf(&fh->vb_vbiq, b); 1792 + 1793 + return rc; 1799 1794 } 1800 1795 1801 1796 static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *b) ··· 1821 1806 dev->greenscreen_detected = 0; 1822 1807 } 1823 1808 1824 - return videobuf_dqbuf(&fh->vb_vidq, b, file->f_flags & O_NONBLOCK); 1809 + if (fh->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) 1810 + rc = videobuf_dqbuf(&fh->vb_vidq, b, file->f_flags & O_NONBLOCK); 1811 + else if (fh->type == V4L2_BUF_TYPE_VBI_CAPTURE) 1812 + rc = videobuf_dqbuf(&fh->vb_vbiq, b, file->f_flags & O_NONBLOCK); 1813 + 1814 + return rc; 1825 1815 } 1826 1816 1827 1817 static struct v4l2_file_operations au0828_v4l_fops = {
+49 -1
drivers/media/video/cx18/cx18-cards.c
··· 95 95 .i2c = &cx18_i2c_std, 96 96 }; 97 97 98 + static const struct cx18_card cx18_card_hvr1600_s5h1411 = { 99 + .type = CX18_CARD_HVR_1600_S5H1411, 100 + .name = "Hauppauge HVR-1600", 101 + .comment = "Simultaneous Digital and Analog TV capture supported\n", 102 + .v4l2_capabilities = CX18_CAP_ENCODER, 103 + .hw_audio_ctrl = CX18_HW_418_AV, 104 + .hw_muxer = CX18_HW_CS5345, 105 + .hw_all = CX18_HW_TVEEPROM | CX18_HW_418_AV | CX18_HW_TUNER | 106 + CX18_HW_CS5345 | CX18_HW_DVB | CX18_HW_GPIO_RESET_CTRL | 107 + CX18_HW_Z8F0811_IR_HAUP, 108 + .video_inputs = { 109 + { CX18_CARD_INPUT_VID_TUNER, 0, CX18_AV_COMPOSITE7 }, 110 + { CX18_CARD_INPUT_SVIDEO1, 1, CX18_AV_SVIDEO1 }, 111 + { CX18_CARD_INPUT_COMPOSITE1, 1, CX18_AV_COMPOSITE3 }, 112 + { CX18_CARD_INPUT_SVIDEO2, 2, CX18_AV_SVIDEO2 }, 113 + { CX18_CARD_INPUT_COMPOSITE2, 2, CX18_AV_COMPOSITE4 }, 114 + }, 115 + .audio_inputs = { 116 + { CX18_CARD_INPUT_AUD_TUNER, 117 + CX18_AV_AUDIO8, CS5345_IN_1 | CS5345_MCLK_1_5 }, 118 + { CX18_CARD_INPUT_LINE_IN1, 119 + CX18_AV_AUDIO_SERIAL1, CS5345_IN_2 }, 120 + { CX18_CARD_INPUT_LINE_IN2, 121 + CX18_AV_AUDIO_SERIAL1, CS5345_IN_3 }, 122 + }, 123 + .radio_input = { CX18_CARD_INPUT_AUD_TUNER, 124 + CX18_AV_AUDIO_SERIAL1, CS5345_IN_4 }, 125 + .ddr = { 126 + /* ESMT M13S128324A-5B memory */ 127 + .chip_config = 0x003, 128 + .refresh = 0x30c, 129 + .timing1 = 0x44220e82, 130 + .timing2 = 0x08, 131 + .tune_lane = 0, 132 + .initial_emrs = 0, 133 + }, 134 + .gpio_init.initial_value = 0x3001, 135 + .gpio_init.direction = 0x3001, 136 + .gpio_i2c_slave_reset = { 137 + .active_lo_mask = 0x3001, 138 + .msecs_asserted = 10, 139 + .msecs_recovery = 40, 140 + .ir_reset_mask = 0x0001, 141 + }, 142 + .i2c = &cx18_i2c_std, 143 + }; 144 + 98 145 static const struct cx18_card cx18_card_hvr1600_samsung = { 99 146 .type = CX18_CARD_HVR_1600_SAMSUNG, 100 147 .name = "Hauppauge HVR-1600 (Preproduction)", ··· 570 523 &cx18_card_toshiba_qosmio_dvbt, 571 524 &cx18_card_leadtek_pvr2100, 572 525 &cx18_card_leadtek_dvr3100h, 573 - &cx18_card_gotview_dvd3 526 + &cx18_card_gotview_dvd3, 527 + &cx18_card_hvr1600_s5h1411 574 528 }; 575 529 576 530 const struct cx18_card *cx18_get_card(u16 index)
+23 -2
drivers/media/video/cx18/cx18-driver.c
··· 157 157 "\t\t\t 7 = Leadtek WinFast PVR2100\n" 158 158 "\t\t\t 8 = Leadtek WinFast DVR3100 H\n" 159 159 "\t\t\t 9 = GoTView PCI DVD3 Hybrid\n" 160 + "\t\t\t 10 = Hauppauge HVR 1600 (S5H1411)\n" 160 161 "\t\t\t 0 = Autodetect (default)\n" 161 162 "\t\t\t-1 = Ignore this card\n\t\t"); 162 163 MODULE_PARM_DESC(pal, "Set PAL standard: B, G, H, D, K, I, M, N, Nc, 60"); ··· 338 337 switch (cx->card->type) { 339 338 case CX18_CARD_HVR_1600_ESMT: 340 339 case CX18_CARD_HVR_1600_SAMSUNG: 340 + case CX18_CARD_HVR_1600_S5H1411: 341 341 tveeprom_hauppauge_analog(&c, tv, eedata); 342 342 break; 343 343 case CX18_CARD_YUAN_MPC718: ··· 367 365 from the model number. Use the cardtype module option if you 368 366 have one of these preproduction models. */ 369 367 switch (tv.model) { 370 - case 74000 ... 74999: 368 + case 74301: /* Retail models */ 369 + case 74321: 370 + case 74351: /* OEM models */ 371 + case 74361: 372 + /* Digital side is s5h1411/tda18271 */ 373 + cx->card = cx18_get_card(CX18_CARD_HVR_1600_S5H1411); 374 + break; 375 + case 74021: /* Retail models */ 376 + case 74031: 377 + case 74041: 378 + case 74141: 379 + case 74541: /* OEM models */ 380 + case 74551: 381 + case 74591: 382 + case 74651: 383 + case 74691: 384 + case 74751: 385 + case 74891: 386 + /* Digital side is s5h1409/mxl5005s */ 371 387 cx->card = cx18_get_card(CX18_CARD_HVR_1600_ESMT); 372 388 break; 373 389 case 0x718: ··· 397 377 CX18_ERR("Invalid EEPROM\n"); 398 378 return; 399 379 default: 400 - CX18_ERR("Unknown model %d, defaulting to HVR-1600\n", tv.model); 380 + CX18_ERR("Unknown model %d, defaulting to original HVR-1600 " 381 + "(cardtype=1)\n", tv.model); 401 382 cx->card = cx18_get_card(CX18_CARD_HVR_1600_ESMT); 402 383 break; 403 384 }
+2 -1
drivers/media/video/cx18/cx18-driver.h
··· 85 85 #define CX18_CARD_LEADTEK_PVR2100 6 /* Leadtek WinFast PVR2100 */ 86 86 #define CX18_CARD_LEADTEK_DVR3100H 7 /* Leadtek WinFast DVR3100 H */ 87 87 #define CX18_CARD_GOTVIEW_PCI_DVD3 8 /* GoTView PCI DVD3 Hybrid */ 88 - #define CX18_CARD_LAST 8 88 + #define CX18_CARD_HVR_1600_S5H1411 9 /* Hauppauge HVR 1600 s5h1411/tda18271*/ 89 + #define CX18_CARD_LAST 9 89 90 90 91 #define CX18_ENC_STREAM_TYPE_MPG 0 91 92 #define CX18_ENC_STREAM_TYPE_TS 1
+38
drivers/media/video/cx18/cx18-dvb.c
··· 29 29 #include "cx18-gpio.h" 30 30 #include "s5h1409.h" 31 31 #include "mxl5005s.h" 32 + #include "s5h1411.h" 33 + #include "tda18271.h" 32 34 #include "zl10353.h" 33 35 34 36 #include <linux/firmware.h> ··· 76 74 .status_mode = S5H1409_DEMODLOCKING, 77 75 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, 78 76 .hvr1600_opt = S5H1409_HVR1600_OPTIMIZE 77 + }; 78 + 79 + /* 80 + * CX18_CARD_HVR_1600_S5H1411 81 + */ 82 + static struct s5h1411_config hcw_s5h1411_config = { 83 + .output_mode = S5H1411_SERIAL_OUTPUT, 84 + .gpio = S5H1411_GPIO_OFF, 85 + .vsb_if = S5H1411_IF_44000, 86 + .qam_if = S5H1411_IF_4000, 87 + .inversion = S5H1411_INVERSION_ON, 88 + .status_mode = S5H1411_DEMODLOCKING, 89 + .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, 90 + }; 91 + 92 + static struct tda18271_std_map hauppauge_tda18271_std_map = { 93 + .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3, 94 + .if_lvl = 6, .rfagc_top = 0x37 }, 95 + .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0, 96 + .if_lvl = 6, .rfagc_top = 0x37 }, 97 + }; 98 + 99 + static struct tda18271_config hauppauge_tda18271_config = { 100 + .std_map = &hauppauge_tda18271_std_map, 101 + .gate = TDA18271_GATE_DIGITAL, 102 + .output_opt = TDA18271_OUTPUT_LT_OFF, 79 103 }; 80 104 81 105 /* ··· 272 244 switch (cx->card->type) { 273 245 case CX18_CARD_HVR_1600_ESMT: 274 246 case CX18_CARD_HVR_1600_SAMSUNG: 247 + case CX18_CARD_HVR_1600_S5H1411: 275 248 v = cx18_read_reg(cx, CX18_REG_DMUX_NUM_PORT_0_CONTROL); 276 249 v |= 0x00400000; /* Serial Mode */ 277 250 v |= 0x00002000; /* Data Length - Byte */ ··· 483 454 &hauppauge_hvr1600_tuner); 484 455 ret = 0; 485 456 } 457 + break; 458 + case CX18_CARD_HVR_1600_S5H1411: 459 + dvb->fe = dvb_attach(s5h1411_attach, 460 + &hcw_s5h1411_config, 461 + &cx->i2c_adap[0]); 462 + if (dvb->fe != NULL) 463 + dvb_attach(tda18271_attach, dvb->fe, 464 + 0x60, &cx->i2c_adap[0], 465 + &hauppauge_tda18271_config); 486 466 break; 487 467 case CX18_CARD_LEADTEK_DVR3100H: 488 468 dvb->fe = dvb_attach(zl10353_attach,
-10
drivers/media/video/cx23885/cx23885-i2c.c
··· 122 122 123 123 if (!i2c_wait_done(i2c_adap)) 124 124 goto eio; 125 - if (!i2c_slave_did_ack(i2c_adap)) { 126 - retval = -ENXIO; 127 - goto err; 128 - } 129 125 if (i2c_debug) { 130 126 printk(" <W %02x %02x", msg->addr << 1, msg->buf[0]); 131 127 if (!(ctrl & I2C_NOSTOP)) ··· 154 158 155 159 eio: 156 160 retval = -EIO; 157 - err: 158 161 if (i2c_debug) 159 162 printk(KERN_ERR " ERR: %d\n", retval); 160 163 return retval; ··· 204 209 205 210 if (!i2c_wait_done(i2c_adap)) 206 211 goto eio; 207 - if (cnt == 0 && !i2c_slave_did_ack(i2c_adap)) { 208 - retval = -ENXIO; 209 - goto err; 210 - } 211 212 msg->buf[cnt] = cx_read(bus->reg_rdata) & 0xff; 212 213 if (i2c_debug) { 213 214 dprintk(1, " %02x", msg->buf[cnt]); ··· 215 224 216 225 eio: 217 226 retval = -EIO; 218 - err: 219 227 if (i2c_debug) 220 228 printk(KERN_ERR " ERR: %d\n", retval); 221 229 return retval;
+2 -1
drivers/media/video/cx25840/cx25840-core.c
··· 2015 2015 kfree(state); 2016 2016 return err; 2017 2017 } 2018 - v4l2_ctrl_cluster(2, &state->volume); 2018 + if (!is_cx2583x(state)) 2019 + v4l2_ctrl_cluster(2, &state->volume); 2019 2020 v4l2_ctrl_handler_setup(&state->hdl); 2020 2021 2021 2022 if (client->dev.platform_data) {
+51 -7
drivers/media/video/ivtv/ivtv-irq.c
··· 628 628 static void ivtv_irq_dma_err(struct ivtv *itv) 629 629 { 630 630 u32 data[CX2341X_MBOX_MAX_DATA]; 631 + u32 status; 631 632 632 633 del_timer(&itv->dma_timer); 634 + 633 635 ivtv_api_get_data(&itv->enc_mbox, IVTV_MBOX_DMA_END, 2, data); 636 + status = read_reg(IVTV_REG_DMASTATUS); 634 637 IVTV_DEBUG_WARN("DMA ERROR %08x %08x %08x %d\n", data[0], data[1], 635 - read_reg(IVTV_REG_DMASTATUS), itv->cur_dma_stream); 636 - write_reg(read_reg(IVTV_REG_DMASTATUS) & 3, IVTV_REG_DMASTATUS); 638 + status, itv->cur_dma_stream); 639 + /* 640 + * We do *not* write back to the IVTV_REG_DMASTATUS register to 641 + * clear the error status, if either the encoder write (0x02) or 642 + * decoder read (0x01) bus master DMA operation do not indicate 643 + * completed. We can race with the DMA engine, which may have 644 + * transitioned to completed status *after* we read the register. 645 + * Setting a IVTV_REG_DMASTATUS flag back to "busy" status, after the 646 + * DMA engine has completed, will cause the DMA engine to stop working. 647 + */ 648 + status &= 0x3; 649 + if (status == 0x3) 650 + write_reg(status, IVTV_REG_DMASTATUS); 651 + 637 652 if (!test_bit(IVTV_F_I_UDMA, &itv->i_flags) && 638 653 itv->cur_dma_stream >= 0 && itv->cur_dma_stream < IVTV_MAX_STREAMS) { 639 654 struct ivtv_stream *s = &itv->streams[itv->cur_dma_stream]; 640 655 641 - /* retry */ 642 - if (s->type >= IVTV_DEC_STREAM_TYPE_MPG) 656 + if (s->type >= IVTV_DEC_STREAM_TYPE_MPG) { 657 + /* retry */ 658 + /* 659 + * FIXME - handle cases of DMA error similar to 660 + * encoder below, except conditioned on status & 0x1 661 + */ 643 662 ivtv_dma_dec_start(s); 644 - else 645 - ivtv_dma_enc_start(s); 646 - return; 663 + return; 664 + } else { 665 + if ((status & 0x2) == 0) { 666 + /* 667 + * CX2341x Bus Master DMA write is ongoing. 668 + * Reset the timer and let it complete. 669 + */ 670 + itv->dma_timer.expires = 671 + jiffies + msecs_to_jiffies(600); 672 + add_timer(&itv->dma_timer); 673 + return; 674 + } 675 + 676 + if (itv->dma_retries < 3) { 677 + /* 678 + * CX2341x Bus Master DMA write has ended. 679 + * Retry the write, starting with the first 680 + * xfer segment. Just retrying the current 681 + * segment is not sufficient. 682 + */ 683 + s->sg_processed = 0; 684 + itv->dma_retries++; 685 + ivtv_dma_enc_start_xfer(s); 686 + return; 687 + } 688 + /* Too many retries, give up on this one */ 689 + } 690 + 647 691 } 648 692 if (test_bit(IVTV_F_I_UDMA, &itv->i_flags)) { 649 693 ivtv_udma_start(itv);
-1
drivers/media/video/mem2mem_testdev.c
··· 1011 1011 v4l2_m2m_release(dev->m2m_dev); 1012 1012 del_timer_sync(&dev->timer); 1013 1013 video_unregister_device(dev->vfd); 1014 - video_device_release(dev->vfd); 1015 1014 v4l2_device_unregister(&dev->v4l2_dev); 1016 1015 kfree(dev); 1017 1016
+6 -4
drivers/media/video/s2255drv.c
··· 57 57 #include <linux/usb.h> 58 58 59 59 #define S2255_MAJOR_VERSION 1 60 - #define S2255_MINOR_VERSION 20 60 + #define S2255_MINOR_VERSION 21 61 61 #define S2255_RELEASE 0 62 62 #define S2255_VERSION KERNEL_VERSION(S2255_MAJOR_VERSION, \ 63 63 S2255_MINOR_VERSION, \ ··· 312 312 }; 313 313 314 314 /* current cypress EEPROM firmware version */ 315 - #define S2255_CUR_USB_FWVER ((3 << 8) | 6) 315 + #define S2255_CUR_USB_FWVER ((3 << 8) | 11) 316 316 /* current DSP FW version */ 317 - #define S2255_CUR_DSP_FWVER 8 317 + #define S2255_CUR_DSP_FWVER 10102 318 318 /* Need DSP version 5+ for video status feature */ 319 319 #define S2255_MIN_DSP_STATUS 5 320 320 #define S2255_MIN_DSP_COLORFILTER 8 ··· 492 492 493 493 static void s2255_reset_dsppower(struct s2255_dev *dev) 494 494 { 495 - s2255_vendor_req(dev, 0x40, 0x0b0b, 0x0b0b, NULL, 0, 1); 495 + s2255_vendor_req(dev, 0x40, 0x0b0b, 0x0b01, NULL, 0, 1); 496 496 msleep(10); 497 497 s2255_vendor_req(dev, 0x50, 0x0000, 0x0000, NULL, 0, 1); 498 + msleep(600); 499 + s2255_vendor_req(dev, 0x10, 0x0000, 0x0000, NULL, 0, 1); 498 500 return; 499 501 } 500 502
+1
drivers/misc/bmp085.c
··· 449 449 { "bmp085", 0 }, 450 450 { } 451 451 }; 452 + MODULE_DEVICE_TABLE(i2c, bmp085_id); 452 453 453 454 static struct i2c_driver bmp085_driver = { 454 455 .driver = {
+1 -1
drivers/mmc/core/core.c
··· 1529 1529 * still present 1530 1530 */ 1531 1531 if (host->bus_ops && host->bus_ops->detect && !host->bus_dead 1532 - && mmc_card_is_removable(host)) 1532 + && !(host->caps & MMC_CAP_NONREMOVABLE)) 1533 1533 host->bus_ops->detect(host); 1534 1534 1535 1535 /*
+1 -2
drivers/mmc/core/sdio.c
··· 792 792 */ 793 793 mmc_release_host(host); 794 794 err = mmc_add_card(host->card); 795 - mmc_claim_host(host); 796 795 if (err) 797 796 goto remove_added; 798 797 ··· 804 805 goto remove_added; 805 806 } 806 807 808 + mmc_claim_host(host); 807 809 return 0; 808 810 809 811 810 812 remove_added: 811 813 /* Remove without lock if the device has been added. */ 812 - mmc_release_host(host); 813 814 mmc_sdio_remove(host); 814 815 mmc_claim_host(host); 815 816 remove:
+3 -2
drivers/net/bnx2x/bnx2x.h
··· 1223 1223 /* DCBX Negotation results */ 1224 1224 struct dcbx_features dcbx_local_feat; 1225 1225 u32 dcbx_error; 1226 + u32 pending_max; 1226 1227 }; 1227 1228 1228 1229 /** ··· 1635 1634 /* CMNG constants, as derived from system spec calculations */ 1636 1635 /* default MIN rate in case VNIC min rate is configured to zero - 100Mbps */ 1637 1636 #define DEF_MIN_RATE 100 1638 - /* resolution of the rate shaping timer - 100 usec */ 1639 - #define RS_PERIODIC_TIMEOUT_USEC 100 1637 + /* resolution of the rate shaping timer - 400 usec */ 1638 + #define RS_PERIODIC_TIMEOUT_USEC 400 1640 1639 /* number of bytes in single QM arbitration cycle - 1641 1640 * coefficient for calculating the fairness timer */ 1642 1641 #define QM_ARB_BYTES 160000
+22
drivers/net/bnx2x/bnx2x_cmn.c
··· 993 993 bnx2x_free_rx_skbs(bp); 994 994 } 995 995 996 + void bnx2x_update_max_mf_config(struct bnx2x *bp, u32 value) 997 + { 998 + /* load old values */ 999 + u32 mf_cfg = bp->mf_config[BP_VN(bp)]; 1000 + 1001 + if (value != bnx2x_extract_max_cfg(bp, mf_cfg)) { 1002 + /* leave all but MAX value */ 1003 + mf_cfg &= ~FUNC_MF_CFG_MAX_BW_MASK; 1004 + 1005 + /* set new MAX value */ 1006 + mf_cfg |= (value << FUNC_MF_CFG_MAX_BW_SHIFT) 1007 + & FUNC_MF_CFG_MAX_BW_MASK; 1008 + 1009 + bnx2x_fw_command(bp, DRV_MSG_CODE_SET_MF_BW, mf_cfg); 1010 + } 1011 + } 1012 + 996 1013 static void bnx2x_free_msix_irqs(struct bnx2x *bp) 997 1014 { 998 1015 int i, offset = 1; ··· 1514 1497 1515 1498 /* Clear UC lists configuration */ 1516 1499 bnx2x_invalidate_uc_list(bp); 1500 + 1501 + if (bp->pending_max) { 1502 + bnx2x_update_max_mf_config(bp, bp->pending_max); 1503 + bp->pending_max = 0; 1504 + } 1517 1505 1518 1506 if (bp->port.pmf) 1519 1507 bnx2x_initial_phy_init(bp, load_mode);
+9
drivers/net/bnx2x/bnx2x_cmn.h
··· 341 341 */ 342 342 int bnx2x_set_power_state(struct bnx2x *bp, pci_power_t state); 343 343 344 + /** 345 + * Updates MAX part of MF configuration in HW 346 + * (if required) 347 + * 348 + * @param bp 349 + * @param value 350 + */ 351 + void bnx2x_update_max_mf_config(struct bnx2x *bp, u32 value); 352 + 344 353 /* dev_close main block */ 345 354 int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode); 346 355
+8 -10
drivers/net/bnx2x/bnx2x_ethtool.c
··· 238 238 speed |= (cmd->speed_hi << 16); 239 239 240 240 if (IS_MF_SI(bp)) { 241 - u32 param = 0, part; 241 + u32 part; 242 242 u32 line_speed = bp->link_vars.line_speed; 243 243 244 244 /* use 10G if no link detected */ ··· 251 251 REQ_BC_VER_4_SET_MF_BW); 252 252 return -EINVAL; 253 253 } 254 + 254 255 part = (speed * 100) / line_speed; 256 + 255 257 if (line_speed < speed || !part) { 256 258 BNX2X_DEV_INFO("Speed setting should be in a range " 257 259 "from 1%% to 100%% " 258 260 "of actual line speed\n"); 259 261 return -EINVAL; 260 262 } 261 - /* load old values */ 262 - param = bp->mf_config[BP_VN(bp)]; 263 263 264 - /* leave only MIN value */ 265 - param &= FUNC_MF_CFG_MIN_BW_MASK; 264 + if (bp->state != BNX2X_STATE_OPEN) 265 + /* store value for following "load" */ 266 + bp->pending_max = part; 267 + else 268 + bnx2x_update_max_mf_config(bp, part); 266 269 267 - /* set new MAX value */ 268 - param |= (part << FUNC_MF_CFG_MAX_BW_SHIFT) 269 - & FUNC_MF_CFG_MAX_BW_MASK; 270 - 271 - bnx2x_fw_command(bp, DRV_MSG_CODE_SET_MF_BW, param); 272 270 return 0; 273 271 } 274 272
+10 -9
drivers/net/bnx2x/bnx2x_main.c
··· 2092 2092 bnx2x_calc_vn_weight_sum(bp); 2093 2093 2094 2094 /* calculate and set min-max rate for each vn */ 2095 - for (vn = VN_0; vn < E1HVN_MAX; vn++) 2096 - bnx2x_init_vn_minmax(bp, vn); 2095 + if (bp->port.pmf) 2096 + for (vn = VN_0; vn < E1HVN_MAX; vn++) 2097 + bnx2x_init_vn_minmax(bp, vn); 2097 2098 2098 2099 /* always enable rate shaping and fairness */ 2099 2100 bp->cmng.flags.cmng_enables |= ··· 2163 2162 bnx2x_stats_handle(bp, STATS_EVENT_LINK_UP); 2164 2163 } 2165 2164 2166 - /* indicate link status only if link status actually changed */ 2167 - if (prev_link_status != bp->link_vars.link_status) 2168 - bnx2x_link_report(bp); 2169 - 2170 - if (IS_MF(bp)) 2171 - bnx2x_link_sync_notify(bp); 2172 - 2173 2165 if (bp->link_vars.link_up && bp->link_vars.line_speed) { 2174 2166 int cmng_fns = bnx2x_get_cmng_fns_mode(bp); 2175 2167 ··· 2174 2180 DP(NETIF_MSG_IFUP, 2175 2181 "single function mode without fairness\n"); 2176 2182 } 2183 + 2184 + if (IS_MF(bp)) 2185 + bnx2x_link_sync_notify(bp); 2186 + 2187 + /* indicate link status only if link status actually changed */ 2188 + if (prev_link_status != bp->link_vars.link_status) 2189 + bnx2x_link_report(bp); 2177 2190 } 2178 2191 2179 2192 void bnx2x__link_status_update(struct bnx2x *bp)
+19 -13
drivers/net/bonding/bond_3ad.c
··· 281 281 } 282 282 283 283 /** 284 - * __get_rx_machine_lock - lock the port's RX machine 284 + * __get_state_machine_lock - lock the port's state machines 285 285 * @port: the port we're looking at 286 286 * 287 287 */ 288 - static inline void __get_rx_machine_lock(struct port *port) 288 + static inline void __get_state_machine_lock(struct port *port) 289 289 { 290 - spin_lock_bh(&(SLAVE_AD_INFO(port->slave).rx_machine_lock)); 290 + spin_lock_bh(&(SLAVE_AD_INFO(port->slave).state_machine_lock)); 291 291 } 292 292 293 293 /** 294 - * __release_rx_machine_lock - unlock the port's RX machine 294 + * __release_state_machine_lock - unlock the port's state machines 295 295 * @port: the port we're looking at 296 296 * 297 297 */ 298 - static inline void __release_rx_machine_lock(struct port *port) 298 + static inline void __release_state_machine_lock(struct port *port) 299 299 { 300 - spin_unlock_bh(&(SLAVE_AD_INFO(port->slave).rx_machine_lock)); 300 + spin_unlock_bh(&(SLAVE_AD_INFO(port->slave).state_machine_lock)); 301 301 } 302 302 303 303 /** ··· 388 388 } 389 389 390 390 /** 391 - * __initialize_port_locks - initialize a port's RX machine spinlock 391 + * __initialize_port_locks - initialize a port's STATE machine spinlock 392 392 * @port: the port we're looking at 393 393 * 394 394 */ 395 395 static inline void __initialize_port_locks(struct port *port) 396 396 { 397 397 // make sure it isn't called twice 398 - spin_lock_init(&(SLAVE_AD_INFO(port->slave).rx_machine_lock)); 398 + spin_lock_init(&(SLAVE_AD_INFO(port->slave).state_machine_lock)); 399 399 } 400 400 401 401 //conversions ··· 1025 1025 { 1026 1026 rx_states_t last_state; 1027 1027 1028 - // Lock to prevent 2 instances of this function to run simultaneously(rx interrupt and periodic machine callback) 1029 - __get_rx_machine_lock(port); 1030 - 1031 1028 // keep current State Machine state to compare later if it was changed 1032 1029 last_state = port->sm_rx_state; 1033 1030 ··· 1130 1133 pr_err("%s: An illegal loopback occurred on adapter (%s).\n" 1131 1134 "Check the configuration to verify that all adapters are connected to 802.3ad compliant switch ports\n", 1132 1135 port->slave->dev->master->name, port->slave->dev->name); 1133 - __release_rx_machine_lock(port); 1134 1136 return; 1135 1137 } 1136 1138 __update_selected(lacpdu, port); ··· 1149 1153 break; 1150 1154 } 1151 1155 } 1152 - __release_rx_machine_lock(port); 1153 1156 } 1154 1157 1155 1158 /** ··· 2150 2155 goto re_arm; 2151 2156 } 2152 2157 2158 + /* Lock around state machines to protect data accessed 2159 + * by all (e.g., port->sm_vars). ad_rx_machine may run 2160 + * concurrently due to incoming LACPDU. 2161 + */ 2162 + __get_state_machine_lock(port); 2163 + 2153 2164 ad_rx_machine(NULL, port); 2154 2165 ad_periodic_machine(port); 2155 2166 ad_port_selection_logic(port); ··· 2165 2164 // turn off the BEGIN bit, since we already handled it 2166 2165 if (port->sm_vars & AD_PORT_BEGIN) 2167 2166 port->sm_vars &= ~AD_PORT_BEGIN; 2167 + 2168 + __release_state_machine_lock(port); 2168 2169 } 2169 2170 2170 2171 re_arm: ··· 2203 2200 case AD_TYPE_LACPDU: 2204 2201 pr_debug("Received LACPDU on port %d\n", 2205 2202 port->actor_port_number); 2203 + /* Protect against concurrent state machines */ 2204 + __get_state_machine_lock(port); 2206 2205 ad_rx_machine(lacpdu, port); 2206 + __release_state_machine_lock(port); 2207 2207 break; 2208 2208 2209 2209 case AD_TYPE_MARKER:
+2 -1
drivers/net/bonding/bond_3ad.h
··· 264 264 struct ad_slave_info { 265 265 struct aggregator aggregator; // 802.3ad aggregator structure 266 266 struct port port; // 802.3ad port structure 267 - spinlock_t rx_machine_lock; // To avoid race condition between callback and receive interrupt 267 + spinlock_t state_machine_lock; /* mutex state machines vs. 268 + incoming LACPDU */ 268 269 u16 id; 269 270 }; 270 271
+2 -1
drivers/net/macvtap.c
··· 530 530 vnet_hdr_len = q->vnet_hdr_sz; 531 531 532 532 err = -EINVAL; 533 - if ((len -= vnet_hdr_len) < 0) 533 + if (len < vnet_hdr_len) 534 534 goto err; 535 + len -= vnet_hdr_len; 535 536 536 537 err = memcpy_fromiovecend((void *)&vnet_hdr, iv, 0, 537 538 sizeof(vnet_hdr));
+5
drivers/net/smsc911x.c
··· 1178 1178 smsc911x_reg_write(pdata, HW_CFG, 0x00050000); 1179 1179 smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740); 1180 1180 1181 + /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */ 1182 + spin_lock_irq(&pdata->mac_lock); 1183 + smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q); 1184 + spin_unlock_irq(&pdata->mac_lock); 1185 + 1181 1186 /* Make sure EEPROM has finished loading before setting GPIO_CFG */ 1182 1187 timeout = 50; 1183 1188 while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) &&
+3
drivers/pcmcia/pxa2xx_colibri.c
··· 181 181 { 182 182 int ret; 183 183 184 + if (!machine_is_colibri() && !machine_is_colibri320()) 185 + return -ENODEV; 186 + 184 187 colibri_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); 185 188 if (!colibri_pcmcia_device) 186 189 return -ENOMEM;
+1 -1
drivers/pps/generators/Kconfig
··· 6 6 7 7 config PPS_GENERATOR_PARPORT 8 8 tristate "Parallel port PPS signal generator" 9 - depends on PARPORT 9 + depends on PARPORT && BROKEN 10 10 help 11 11 If you say yes here you get support for a PPS signal generator which 12 12 utilizes STROBE pin of a parallel port to send PPS signals. It uses
+7 -5
drivers/rtc/rtc-s3c.c
··· 77 77 } 78 78 79 79 /* Update control registers */ 80 - static void s3c_rtc_setaie(int to) 80 + static int s3c_rtc_setaie(struct device *dev, unsigned int enabled) 81 81 { 82 82 unsigned int tmp; 83 83 84 - pr_debug("%s: aie=%d\n", __func__, to); 84 + pr_debug("%s: aie=%d\n", __func__, enabled); 85 85 86 86 tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN; 87 87 88 - if (to) 88 + if (enabled) 89 89 tmp |= S3C2410_RTCALM_ALMEN; 90 90 91 91 writeb(tmp, s3c_rtc_base + S3C2410_RTCALM); 92 + 93 + return 0; 92 94 } 93 95 94 96 static int s3c_rtc_setpie(struct device *dev, int enabled) ··· 310 308 311 309 writeb(alrm_en, base + S3C2410_RTCALM); 312 310 313 - s3c_rtc_setaie(alrm->enabled); 311 + s3c_rtc_setaie(dev, alrm->enabled); 314 312 315 313 return 0; 316 314 } ··· 442 440 rtc_device_unregister(rtc); 443 441 444 442 s3c_rtc_setpie(&dev->dev, 0); 445 - s3c_rtc_setaie(0); 443 + s3c_rtc_setaie(&dev->dev, 0); 446 444 447 445 clk_disable(rtc_clk); 448 446 clk_put(rtc_clk);
+2 -2
drivers/s390/block/xpram.c
··· 62 62 /* 63 63 * Parameter parsing functions. 64 64 */ 65 - static int __initdata devs = XPRAM_DEVS; 66 - static char __initdata *sizes[XPRAM_MAX_DEVS]; 65 + static int devs = XPRAM_DEVS; 66 + static char *sizes[XPRAM_MAX_DEVS]; 67 67 68 68 module_param(devs, int, 0); 69 69 module_param_array(sizes, charp, NULL, 0);
+2 -1
drivers/s390/char/keyboard.c
··· 460 460 unsigned int cmd, unsigned long arg) 461 461 { 462 462 void __user *argp; 463 - int ct, perm; 463 + unsigned int ct; 464 + int perm; 464 465 465 466 argp = (void __user *)arg; 466 467
+8
drivers/s390/char/tape.h
··· 280 280 return rc; 281 281 } 282 282 283 + static inline void 284 + tape_do_io_async_free(struct tape_device *device, struct tape_request *request) 285 + { 286 + request->callback = (void *) tape_free_request; 287 + request->callback_data = NULL; 288 + tape_do_io_async(device, request); 289 + } 290 + 283 291 extern int tape_oper_handler(int irq, int status); 284 292 extern void tape_noper_handler(int irq, int status); 285 293 extern int tape_open(struct tape_device *);
+41 -18
drivers/s390/char/tape_34xx.c
··· 53 53 * Medium sense for 34xx tapes. There is no 'real' medium sense call. 54 54 * So we just do a normal sense. 55 55 */ 56 - static int 57 - tape_34xx_medium_sense(struct tape_device *device) 56 + static void __tape_34xx_medium_sense(struct tape_request *request) 58 57 { 59 - struct tape_request *request; 60 - unsigned char *sense; 61 - int rc; 58 + struct tape_device *device = request->device; 59 + unsigned char *sense; 62 60 63 - request = tape_alloc_request(1, 32); 64 - if (IS_ERR(request)) { 65 - DBF_EXCEPTION(6, "MSEN fail\n"); 66 - return PTR_ERR(request); 67 - } 68 - 69 - request->op = TO_MSEN; 70 - tape_ccw_end(request->cpaddr, SENSE, 32, request->cpdata); 71 - 72 - rc = tape_do_io_interruptible(device, request); 73 61 if (request->rc == 0) { 74 62 sense = request->cpdata; 75 63 ··· 76 88 device->tape_generic_status |= GMT_WR_PROT(~0); 77 89 else 78 90 device->tape_generic_status &= ~GMT_WR_PROT(~0); 79 - } else { 91 + } else 80 92 DBF_EVENT(4, "tape_34xx: medium sense failed with rc=%d\n", 81 93 request->rc); 82 - } 83 94 tape_free_request(request); 95 + } 84 96 97 + static int tape_34xx_medium_sense(struct tape_device *device) 98 + { 99 + struct tape_request *request; 100 + int rc; 101 + 102 + request = tape_alloc_request(1, 32); 103 + if (IS_ERR(request)) { 104 + DBF_EXCEPTION(6, "MSEN fail\n"); 105 + return PTR_ERR(request); 106 + } 107 + 108 + request->op = TO_MSEN; 109 + tape_ccw_end(request->cpaddr, SENSE, 32, request->cpdata); 110 + rc = tape_do_io_interruptible(device, request); 111 + __tape_34xx_medium_sense(request); 85 112 return rc; 113 + } 114 + 115 + static void tape_34xx_medium_sense_async(struct tape_device *device) 116 + { 117 + struct tape_request *request; 118 + 119 + request = tape_alloc_request(1, 32); 120 + if (IS_ERR(request)) { 121 + DBF_EXCEPTION(6, "MSEN fail\n"); 122 + return; 123 + } 124 + 125 + request->op = TO_MSEN; 126 + tape_ccw_end(request->cpaddr, SENSE, 32, request->cpdata); 127 + request->callback = (void *) __tape_34xx_medium_sense; 128 + request->callback_data = NULL; 129 + tape_do_io_async(device, request); 86 130 } 87 131 88 132 struct tape_34xx_work { ··· 129 109 * is inserted but cannot call tape_do_io* from an interrupt context. 130 110 * Maybe that's useful for other actions we want to start from the 131 111 * interrupt handler. 112 + * Note: the work handler is called by the system work queue. The tape 113 + * commands started by the handler need to be asynchrounous, otherwise 114 + * a deadlock can occur e.g. in case of a deferred cc=1 (see __tape_do_irq). 132 115 */ 133 116 static void 134 117 tape_34xx_work_handler(struct work_struct *work) ··· 142 119 143 120 switch(p->op) { 144 121 case TO_MSEN: 145 - tape_34xx_medium_sense(device); 122 + tape_34xx_medium_sense_async(device); 146 123 break; 147 124 default: 148 125 DBF_EVENT(3, "T34XX: internal error: unknown work\n");
+67 -16
drivers/s390/char/tape_3590.c
··· 329 329 /* 330 330 * Enable encryption 331 331 */ 332 - static int tape_3592_enable_crypt(struct tape_device *device) 332 + static struct tape_request *__tape_3592_enable_crypt(struct tape_device *device) 333 333 { 334 334 struct tape_request *request; 335 335 char *data; 336 336 337 337 DBF_EVENT(6, "tape_3592_enable_crypt\n"); 338 338 if (!crypt_supported(device)) 339 - return -ENOSYS; 339 + return ERR_PTR(-ENOSYS); 340 340 request = tape_alloc_request(2, 72); 341 341 if (IS_ERR(request)) 342 - return PTR_ERR(request); 342 + return request; 343 343 data = request->cpdata; 344 344 memset(data,0,72); 345 345 ··· 354 354 request->op = TO_CRYPT_ON; 355 355 tape_ccw_cc(request->cpaddr, MODE_SET_CB, 36, data); 356 356 tape_ccw_end(request->cpaddr + 1, MODE_SET_CB, 36, data + 36); 357 + return request; 358 + } 359 + 360 + static int tape_3592_enable_crypt(struct tape_device *device) 361 + { 362 + struct tape_request *request; 363 + 364 + request = __tape_3592_enable_crypt(device); 365 + if (IS_ERR(request)) 366 + return PTR_ERR(request); 357 367 return tape_do_io_free(device, request); 368 + } 369 + 370 + static void tape_3592_enable_crypt_async(struct tape_device *device) 371 + { 372 + struct tape_request *request; 373 + 374 + request = __tape_3592_enable_crypt(device); 375 + if (!IS_ERR(request)) 376 + tape_do_io_async_free(device, request); 358 377 } 359 378 360 379 /* 361 380 * Disable encryption 362 381 */ 363 - static int tape_3592_disable_crypt(struct tape_device *device) 382 + static struct tape_request *__tape_3592_disable_crypt(struct tape_device *device) 364 383 { 365 384 struct tape_request *request; 366 385 char *data; 367 386 368 387 DBF_EVENT(6, "tape_3592_disable_crypt\n"); 369 388 if (!crypt_supported(device)) 370 - return -ENOSYS; 389 + return ERR_PTR(-ENOSYS); 371 390 request = tape_alloc_request(2, 72); 372 391 if (IS_ERR(request)) 373 - return PTR_ERR(request); 392 + return request; 374 393 data = request->cpdata; 375 394 memset(data,0,72); 376 395 ··· 402 383 tape_ccw_cc(request->cpaddr, MODE_SET_CB, 36, data); 403 384 tape_ccw_end(request->cpaddr + 1, MODE_SET_CB, 36, data + 36); 404 385 386 + return request; 387 + } 388 + 389 + static int tape_3592_disable_crypt(struct tape_device *device) 390 + { 391 + struct tape_request *request; 392 + 393 + request = __tape_3592_disable_crypt(device); 394 + if (IS_ERR(request)) 395 + return PTR_ERR(request); 405 396 return tape_do_io_free(device, request); 397 + } 398 + 399 + static void tape_3592_disable_crypt_async(struct tape_device *device) 400 + { 401 + struct tape_request *request; 402 + 403 + request = __tape_3592_disable_crypt(device); 404 + if (!IS_ERR(request)) 405 + tape_do_io_async_free(device, request); 406 406 } 407 407 408 408 /* ··· 495 457 /* 496 458 * SENSE Medium: Get Sense data about medium state 497 459 */ 498 - static int 499 - tape_3590_sense_medium(struct tape_device *device) 460 + static int tape_3590_sense_medium(struct tape_device *device) 500 461 { 501 462 struct tape_request *request; 502 463 ··· 505 468 request->op = TO_MSEN; 506 469 tape_ccw_end(request->cpaddr, MEDIUM_SENSE, 128, request->cpdata); 507 470 return tape_do_io_free(device, request); 471 + } 472 + 473 + static void tape_3590_sense_medium_async(struct tape_device *device) 474 + { 475 + struct tape_request *request; 476 + 477 + request = tape_alloc_request(1, 128); 478 + if (IS_ERR(request)) 479 + return; 480 + request->op = TO_MSEN; 481 + tape_ccw_end(request->cpaddr, MEDIUM_SENSE, 128, request->cpdata); 482 + tape_do_io_async_free(device, request); 508 483 } 509 484 510 485 /* ··· 595 546 * 2. The attention msg is written to the "read subsystem data" buffer. 596 547 * In this case we probably should print it to the console. 597 548 */ 598 - static int 599 - tape_3590_read_attmsg(struct tape_device *device) 549 + static void tape_3590_read_attmsg_async(struct tape_device *device) 600 550 { 601 551 struct tape_request *request; 602 552 char *buf; 603 553 604 554 request = tape_alloc_request(3, 4096); 605 555 if (IS_ERR(request)) 606 - return PTR_ERR(request); 556 + return; 607 557 request->op = TO_READ_ATTMSG; 608 558 buf = request->cpdata; 609 559 buf[0] = PREP_RD_SS_DATA; ··· 610 562 tape_ccw_cc(request->cpaddr, PERFORM_SS_FUNC, 12, buf); 611 563 tape_ccw_cc(request->cpaddr + 1, READ_SS_DATA, 4096 - 12, buf + 12); 612 564 tape_ccw_end(request->cpaddr + 2, NOP, 0, NULL); 613 - return tape_do_io_free(device, request); 565 + tape_do_io_async_free(device, request); 614 566 } 615 567 616 568 /* 617 569 * These functions are used to schedule follow-up actions from within an 618 570 * interrupt context (like unsolicited interrupts). 571 + * Note: the work handler is called by the system work queue. The tape 572 + * commands started by the handler need to be asynchrounous, otherwise 573 + * a deadlock can occur e.g. in case of a deferred cc=1 (see __tape_do_irq). 619 574 */ 620 575 struct work_handler_data { 621 576 struct tape_device *device; ··· 634 583 635 584 switch (p->op) { 636 585 case TO_MSEN: 637 - tape_3590_sense_medium(p->device); 586 + tape_3590_sense_medium_async(p->device); 638 587 break; 639 588 case TO_READ_ATTMSG: 640 - tape_3590_read_attmsg(p->device); 589 + tape_3590_read_attmsg_async(p->device); 641 590 break; 642 591 case TO_CRYPT_ON: 643 - tape_3592_enable_crypt(p->device); 592 + tape_3592_enable_crypt_async(p->device); 644 593 break; 645 594 case TO_CRYPT_OFF: 646 - tape_3592_disable_crypt(p->device); 595 + tape_3592_disable_crypt_async(p->device); 647 596 break; 648 597 default: 649 598 DBF_EVENT(3, "T3590: work handler undefined for "
+8 -1
drivers/video/backlight/ltv350qv.c
··· 239 239 lcd->spi = spi; 240 240 lcd->power = FB_BLANK_POWERDOWN; 241 241 lcd->buffer = kzalloc(8, GFP_KERNEL); 242 + if (!lcd->buffer) { 243 + ret = -ENOMEM; 244 + goto out_free_lcd; 245 + } 242 246 243 247 ld = lcd_device_register("ltv350qv", &spi->dev, lcd, &ltv_ops); 244 248 if (IS_ERR(ld)) { 245 249 ret = PTR_ERR(ld); 246 - goto out_free_lcd; 250 + goto out_free_buffer; 247 251 } 248 252 lcd->ld = ld; 249 253 ··· 261 257 262 258 out_unregister: 263 259 lcd_device_unregister(ld); 260 + out_free_buffer: 261 + kfree(lcd->buffer); 264 262 out_free_lcd: 265 263 kfree(lcd); 266 264 return ret; ··· 274 268 275 269 ltv350qv_power(lcd, FB_BLANK_POWERDOWN); 276 270 lcd_device_unregister(lcd->ld); 271 + kfree(lcd->buffer); 277 272 kfree(lcd); 278 273 279 274 return 0;
+5 -2
drivers/watchdog/sbc_fitpc2_wdt.c
··· 201 201 static int __init fitpc2_wdt_init(void) 202 202 { 203 203 int err; 204 + const char *brd_name; 204 205 205 - if (!strstr(dmi_get_system_info(DMI_BOARD_NAME), "SBC-FITPC2")) 206 + brd_name = dmi_get_system_info(DMI_BOARD_NAME); 207 + 208 + if (!brd_name || !strstr(brd_name, "SBC-FITPC2")) 206 209 return -ENODEV; 207 210 208 - pr_info("%s found\n", dmi_get_system_info(DMI_BOARD_NAME)); 211 + pr_info("%s found\n", brd_name); 209 212 210 213 if (!request_region(COMMAND_PORT, 1, WATCHDOG_NAME)) { 211 214 pr_err("I/O address 0x%04x already in use\n", COMMAND_PORT);
+4 -26
fs/ceph/dir.c
··· 60 60 } 61 61 di->dentry = dentry; 62 62 di->lease_session = NULL; 63 - di->parent_inode = igrab(dentry->d_parent->d_inode); 64 63 dentry->d_fsdata = di; 65 64 dentry->d_time = jiffies; 66 65 ceph_dentry_lru_add(dentry); ··· 409 410 spin_lock(&inode->i_lock); 410 411 if (ci->i_release_count == fi->dir_release_count) { 411 412 dout(" marking %p complete\n", inode); 412 - ci->i_ceph_flags |= CEPH_I_COMPLETE; 413 + /* ci->i_ceph_flags |= CEPH_I_COMPLETE; */ 413 414 ci->i_max_offset = filp->f_pos; 414 415 } 415 416 spin_unlock(&inode->i_lock); ··· 496 497 497 498 /* .snap dir? */ 498 499 if (err == -ENOENT && 500 + ceph_snap(parent) == CEPH_NOSNAP && 499 501 strcmp(dentry->d_name.name, 500 502 fsc->mount_options->snapdir_name) == 0) { 501 503 struct inode *inode = ceph_get_snapdir(parent); ··· 993 993 { 994 994 struct inode *dir; 995 995 996 - if (nd->flags & LOOKUP_RCU) 996 + if (nd && nd->flags & LOOKUP_RCU) 997 997 return -ECHILD; 998 998 999 999 dir = dentry->d_parent->d_inode; ··· 1030 1030 static void ceph_dentry_release(struct dentry *dentry) 1031 1031 { 1032 1032 struct ceph_dentry_info *di = ceph_dentry(dentry); 1033 - struct inode *parent_inode = NULL; 1034 - u64 snapid = CEPH_NOSNAP; 1035 1033 1036 - if (!IS_ROOT(dentry)) { 1037 - parent_inode = di->parent_inode; 1038 - if (parent_inode) 1039 - snapid = ceph_snap(parent_inode); 1040 - } 1041 - dout("dentry_release %p parent %p\n", dentry, parent_inode); 1042 - if (parent_inode && snapid != CEPH_SNAPDIR) { 1043 - struct ceph_inode_info *ci = ceph_inode(parent_inode); 1044 - 1045 - spin_lock(&parent_inode->i_lock); 1046 - if (ci->i_shared_gen == di->lease_shared_gen || 1047 - snapid <= CEPH_MAXSNAP) { 1048 - dout(" clearing %p complete (d_release)\n", 1049 - parent_inode); 1050 - ci->i_ceph_flags &= ~CEPH_I_COMPLETE; 1051 - ci->i_release_count++; 1052 - } 1053 - spin_unlock(&parent_inode->i_lock); 1054 - } 1034 + dout("dentry_release %p\n", dentry); 1055 1035 if (di) { 1056 1036 ceph_dentry_lru_del(dentry); 1057 1037 if (di->lease_session) ··· 1039 1059 kmem_cache_free(ceph_dentry_cachep, di); 1040 1060 dentry->d_fsdata = NULL; 1041 1061 } 1042 - if (parent_inode) 1043 - iput(parent_inode); 1044 1062 } 1045 1063 1046 1064 static int ceph_snapdir_d_revalidate(struct dentry *dentry,
+1 -1
fs/ceph/inode.c
··· 707 707 (issued & CEPH_CAP_FILE_EXCL) == 0 && 708 708 (ci->i_ceph_flags & CEPH_I_COMPLETE) == 0) { 709 709 dout(" marking %p complete (empty)\n", inode); 710 - ci->i_ceph_flags |= CEPH_I_COMPLETE; 710 + /* ci->i_ceph_flags |= CEPH_I_COMPLETE; */ 711 711 ci->i_max_offset = 2; 712 712 } 713 713 break;
-1
fs/ceph/super.h
··· 207 207 struct dentry *dentry; 208 208 u64 time; 209 209 u64 offset; 210 - struct inode *parent_inode; 211 210 }; 212 211 213 212 struct ceph_inode_xattrs_info {
+24 -2
fs/dcache.c
··· 1523 1523 } 1524 1524 EXPORT_SYMBOL(d_alloc_root); 1525 1525 1526 + static struct dentry * __d_find_any_alias(struct inode *inode) 1527 + { 1528 + struct dentry *alias; 1529 + 1530 + if (list_empty(&inode->i_dentry)) 1531 + return NULL; 1532 + alias = list_first_entry(&inode->i_dentry, struct dentry, d_alias); 1533 + __dget(alias); 1534 + return alias; 1535 + } 1536 + 1537 + static struct dentry * d_find_any_alias(struct inode *inode) 1538 + { 1539 + struct dentry *de; 1540 + 1541 + spin_lock(&inode->i_lock); 1542 + de = __d_find_any_alias(inode); 1543 + spin_unlock(&inode->i_lock); 1544 + return de; 1545 + } 1546 + 1547 + 1526 1548 /** 1527 1549 * d_obtain_alias - find or allocate a dentry for a given inode 1528 1550 * @inode: inode to allocate the dentry for ··· 1574 1552 if (IS_ERR(inode)) 1575 1553 return ERR_CAST(inode); 1576 1554 1577 - res = d_find_alias(inode); 1555 + res = d_find_any_alias(inode); 1578 1556 if (res) 1579 1557 goto out_iput; 1580 1558 ··· 1587 1565 1588 1566 1589 1567 spin_lock(&inode->i_lock); 1590 - res = __d_find_alias(inode, 0); 1568 + res = __d_find_any_alias(inode); 1591 1569 if (res) { 1592 1570 spin_unlock(&inode->i_lock); 1593 1571 dput(tmp);
+2 -2
fs/fat/namei_vfat.c
··· 43 43 44 44 static int vfat_revalidate(struct dentry *dentry, struct nameidata *nd) 45 45 { 46 - if (nd->flags & LOOKUP_RCU) 46 + if (nd && nd->flags & LOOKUP_RCU) 47 47 return -ECHILD; 48 48 49 49 /* This is not negative dentry. Always valid. */ ··· 54 54 55 55 static int vfat_revalidate_ci(struct dentry *dentry, struct nameidata *nd) 56 56 { 57 - if (nd->flags & LOOKUP_RCU) 57 + if (nd && nd->flags & LOOKUP_RCU) 58 58 return -ECHILD; 59 59 60 60 /*
+1 -1
fs/fuse/dir.c
··· 158 158 { 159 159 struct inode *inode; 160 160 161 - if (nd->flags & LOOKUP_RCU) 161 + if (nd && nd->flags & LOOKUP_RCU) 162 162 return -ECHILD; 163 163 164 164 inode = entry->d_inode;
+1 -1
fs/gfs2/dentry.c
··· 44 44 int error; 45 45 int had_lock = 0; 46 46 47 - if (nd->flags & LOOKUP_RCU) 47 + if (nd && nd->flags & LOOKUP_RCU) 48 48 return -ECHILD; 49 49 50 50 parent = dget_parent(dentry);
+1 -1
fs/jfs/namei.c
··· 1600 1600 1601 1601 static int jfs_ci_revalidate(struct dentry *dentry, struct nameidata *nd) 1602 1602 { 1603 - if (nd->flags & LOOKUP_RCU) 1603 + if (nd && nd->flags & LOOKUP_RCU) 1604 1604 return -ECHILD; 1605 1605 /* 1606 1606 * This is not negative dentry. Always valid.
+11 -3
fs/namei.c
··· 1546 1546 /* nd->path had been dropped */ 1547 1547 current->total_link_count = 0; 1548 1548 nd->path = save; 1549 + nd->inode = save.dentry->d_inode; 1549 1550 path_get(&nd->path); 1550 1551 nd->flags |= LOOKUP_REVAL; 1551 1552 result = link_path_walk(name, nd); ··· 2456 2455 /* !O_CREAT, simple open */ 2457 2456 error = do_path_lookup(dfd, pathname, flags, &nd); 2458 2457 if (unlikely(error)) 2459 - goto out_filp; 2458 + goto out_filp2; 2460 2459 error = -ELOOP; 2461 2460 if (!(nd.flags & LOOKUP_FOLLOW)) { 2462 2461 if (nd.inode->i_op->follow_link) 2463 - goto out_path; 2462 + goto out_path2; 2464 2463 } 2465 2464 error = -ENOTDIR; 2466 2465 if (nd.flags & LOOKUP_DIRECTORY) { 2467 2466 if (!nd.inode->i_op->lookup) 2468 - goto out_path; 2467 + goto out_path2; 2469 2468 } 2470 2469 audit_inode(pathname, nd.path.dentry); 2471 2470 filp = finish_open(&nd, open_flag, acc_mode); 2471 + out2: 2472 2472 release_open_intent(&nd); 2473 2473 return filp; 2474 + 2475 + out_path2: 2476 + path_put(&nd.path); 2477 + out_filp2: 2478 + filp = ERR_PTR(error); 2479 + goto out2; 2474 2480 2475 2481 creat: 2476 2482 /* OK, have to create the file. Find the parent. */
+42 -2
fs/nfs/nfs4proc.c
··· 51 51 #include <linux/sunrpc/bc_xprt.h> 52 52 #include <linux/xattr.h> 53 53 #include <linux/utsname.h> 54 + #include <linux/mm.h> 54 55 55 56 #include "nfs4_fs.h" 56 57 #include "delegation.h" ··· 3253 3252 } 3254 3253 } 3255 3254 3255 + static int buf_to_pages_noslab(const void *buf, size_t buflen, 3256 + struct page **pages, unsigned int *pgbase) 3257 + { 3258 + struct page *newpage, **spages; 3259 + int rc = 0; 3260 + size_t len; 3261 + spages = pages; 3262 + 3263 + do { 3264 + len = min(PAGE_CACHE_SIZE, buflen); 3265 + newpage = alloc_page(GFP_KERNEL); 3266 + 3267 + if (newpage == NULL) 3268 + goto unwind; 3269 + memcpy(page_address(newpage), buf, len); 3270 + buf += len; 3271 + buflen -= len; 3272 + *pages++ = newpage; 3273 + rc++; 3274 + } while (buflen != 0); 3275 + 3276 + return rc; 3277 + 3278 + unwind: 3279 + for(; rc > 0; rc--) 3280 + __free_page(spages[rc-1]); 3281 + return -ENOMEM; 3282 + } 3283 + 3256 3284 struct nfs4_cached_acl { 3257 3285 int cached; 3258 3286 size_t len; ··· 3450 3420 .rpc_argp = &arg, 3451 3421 .rpc_resp = &res, 3452 3422 }; 3453 - int ret; 3423 + int ret, i; 3454 3424 3455 3425 if (!nfs4_server_supports_acls(server)) 3456 3426 return -EOPNOTSUPP; 3427 + i = buf_to_pages_noslab(buf, buflen, arg.acl_pages, &arg.acl_pgbase); 3428 + if (i < 0) 3429 + return i; 3457 3430 nfs_inode_return_delegation(inode); 3458 - buf_to_pages(buf, buflen, arg.acl_pages, &arg.acl_pgbase); 3459 3431 ret = nfs4_call_sync(server, &msg, &arg, &res, 1); 3432 + 3433 + /* 3434 + * Free each page after tx, so the only ref left is 3435 + * held by the network stack 3436 + */ 3437 + for (; i > 0; i--) 3438 + put_page(pages[i-1]); 3439 + 3460 3440 /* 3461 3441 * Acl update can result in inode attribute update. 3462 3442 * so mark the attribute cache invalid.
+1 -1
fs/nfsd/nfs4callback.c
··· 432 432 * If the server returns different values for sessionID, slotID or 433 433 * sequence number, the server is looney tunes. 434 434 */ 435 - p = xdr_inline_decode(xdr, NFS4_MAX_SESSIONID_LEN + 4 + 4); 435 + p = xdr_inline_decode(xdr, NFS4_MAX_SESSIONID_LEN + 4 + 4 + 4 + 4); 436 436 if (unlikely(p == NULL)) 437 437 goto out_overflow; 438 438 memcpy(id.data, p, NFS4_MAX_SESSIONID_LEN);
+7 -6
fs/nfsd/nfs4state.c
··· 2445 2445 static struct nfs4_delegation * 2446 2446 find_delegation_file(struct nfs4_file *fp, stateid_t *stid) 2447 2447 { 2448 - struct nfs4_delegation *dp = NULL; 2448 + struct nfs4_delegation *dp; 2449 2449 2450 2450 spin_lock(&recall_lock); 2451 - list_for_each_entry(dp, &fp->fi_delegations, dl_perfile) { 2452 - if (dp->dl_stateid.si_stateownerid == stid->si_stateownerid) 2453 - break; 2454 - } 2451 + list_for_each_entry(dp, &fp->fi_delegations, dl_perfile) 2452 + if (dp->dl_stateid.si_stateownerid == stid->si_stateownerid) { 2453 + spin_unlock(&recall_lock); 2454 + return dp; 2455 + } 2455 2456 spin_unlock(&recall_lock); 2456 - return dp; 2457 + return NULL; 2457 2458 } 2458 2459 2459 2460 int share_access_to_flags(u32 share_access)
+2 -2
fs/nfsd/nfs4xdr.c
··· 1142 1142 1143 1143 u32 dummy; 1144 1144 char *machine_name; 1145 - int i; 1145 + int i, j; 1146 1146 int nr_secflavs; 1147 1147 1148 1148 READ_BUF(16); ··· 1215 1215 READ_BUF(4); 1216 1216 READ32(dummy); 1217 1217 READ_BUF(dummy * 4); 1218 - for (i = 0; i < dummy; ++i) 1218 + for (j = 0; j < dummy; ++j) 1219 1219 READ32(dummy); 1220 1220 break; 1221 1221 case RPC_AUTH_GSS:
+1 -1
fs/ocfs2/dcache.c
··· 56 56 int ret = 0; /* if all else fails, just return false */ 57 57 struct ocfs2_super *osb; 58 58 59 - if (nd->flags & LOOKUP_RCU) 59 + if (nd && nd->flags & LOOKUP_RCU) 60 60 return -ECHILD; 61 61 62 62 inode = dentry->d_inode;
+8
fs/open.c
··· 233 233 234 234 if (!(file->f_mode & FMODE_WRITE)) 235 235 return -EBADF; 236 + 237 + /* It's not possible punch hole on append only file */ 238 + if (mode & FALLOC_FL_PUNCH_HOLE && IS_APPEND(inode)) 239 + return -EPERM; 240 + 241 + if (IS_IMMUTABLE(inode)) 242 + return -EPERM; 243 + 236 244 /* 237 245 * Revalidate the write permissions, in case security policy has 238 246 * changed since the files were opened.
-30
fs/proc/base.c
··· 2620 2620 &proc_self_inode_operations, NULL, {}), 2621 2621 }; 2622 2622 2623 - /* 2624 - * Exceptional case: normally we are not allowed to unhash a busy 2625 - * directory. In this case, however, we can do it - no aliasing problems 2626 - * due to the way we treat inodes. 2627 - */ 2628 - static int proc_base_revalidate(struct dentry *dentry, struct nameidata *nd) 2629 - { 2630 - struct inode *inode; 2631 - struct task_struct *task; 2632 - 2633 - if (nd->flags & LOOKUP_RCU) 2634 - return -ECHILD; 2635 - 2636 - inode = dentry->d_inode; 2637 - task = get_proc_task(inode); 2638 - if (task) { 2639 - put_task_struct(task); 2640 - return 1; 2641 - } 2642 - d_drop(dentry); 2643 - return 0; 2644 - } 2645 - 2646 - static const struct dentry_operations proc_base_dentry_operations = 2647 - { 2648 - .d_revalidate = proc_base_revalidate, 2649 - .d_delete = pid_delete_dentry, 2650 - }; 2651 - 2652 2623 static struct dentry *proc_base_instantiate(struct inode *dir, 2653 2624 struct dentry *dentry, struct task_struct *task, const void *ptr) 2654 2625 { ··· 2656 2685 if (p->fop) 2657 2686 inode->i_fop = p->fop; 2658 2687 ei->op = p->op; 2659 - d_set_d_op(dentry, &proc_base_dentry_operations); 2660 2688 d_add(dentry, inode); 2661 2689 error = NULL; 2662 2690 out:
+6 -2
fs/proc/inode.c
··· 27 27 static void proc_evict_inode(struct inode *inode) 28 28 { 29 29 struct proc_dir_entry *de; 30 + struct ctl_table_header *head; 30 31 31 32 truncate_inode_pages(&inode->i_data, 0); 32 33 end_writeback(inode); ··· 39 38 de = PROC_I(inode)->pde; 40 39 if (de) 41 40 pde_put(de); 42 - if (PROC_I(inode)->sysctl) 43 - sysctl_head_put(PROC_I(inode)->sysctl); 41 + head = PROC_I(inode)->sysctl; 42 + if (head) { 43 + rcu_assign_pointer(PROC_I(inode)->sysctl, NULL); 44 + sysctl_head_put(head); 45 + } 44 46 } 45 47 46 48 struct vfsmount *proc_mnt;
+5 -2
fs/proc/proc_sysctl.c
··· 408 408 const struct dentry *dentry, const struct inode *inode, 409 409 unsigned int len, const char *str, const struct qstr *name) 410 410 { 411 + struct ctl_table_header *head; 411 412 /* Although proc doesn't have negative dentries, rcu-walk means 412 413 * that inode here can be NULL */ 414 + /* AV: can it, indeed? */ 413 415 if (!inode) 414 - return 0; 416 + return 1; 415 417 if (name->len != len) 416 418 return 1; 417 419 if (memcmp(name->name, str, len)) 418 420 return 1; 419 - return !sysctl_is_seen(PROC_I(inode)->sysctl); 421 + head = rcu_dereference(PROC_I(inode)->sysctl); 422 + return !head || !sysctl_is_seen(head); 420 423 } 421 424 422 425 static const struct dentry_operations proc_sys_dentry_operations = {
-2
fs/reiserfs/xattr.c
··· 978 978 979 979 static int xattr_hide_revalidate(struct dentry *dentry, struct nameidata *nd) 980 980 { 981 - if (nd->flags & LOOKUP_RCU) 982 - return -ECHILD; 983 981 return -EPERM; 984 982 } 985 983
+1 -1
include/linux/ceph/messenger.h
··· 123 123 #define SOCK_CLOSED 11 /* socket state changed to closed */ 124 124 #define OPENING 13 /* open connection w/ (possibly new) peer */ 125 125 #define DEAD 14 /* dead, about to kfree */ 126 + #define BACKOFF 15 126 127 127 128 /* 128 129 * A single connection with another host. ··· 161 160 struct list_head out_queue; 162 161 struct list_head out_sent; /* sending or sent but unacked */ 163 162 u64 out_seq; /* last message queued for send */ 164 - bool out_keepalive_pending; 165 163 166 164 u64 in_seq, in_seq_acked; /* last message received, acked */ 167 165
+7 -4
include/linux/gfp.h
··· 332 332 return alloc_pages_current(gfp_mask, order); 333 333 } 334 334 extern struct page *alloc_pages_vma(gfp_t gfp_mask, int order, 335 - struct vm_area_struct *vma, unsigned long addr); 335 + struct vm_area_struct *vma, unsigned long addr, 336 + int node); 336 337 #else 337 338 #define alloc_pages(gfp_mask, order) \ 338 339 alloc_pages_node(numa_node_id(), gfp_mask, order) 339 - #define alloc_pages_vma(gfp_mask, order, vma, addr) \ 340 + #define alloc_pages_vma(gfp_mask, order, vma, addr, node) \ 340 341 alloc_pages(gfp_mask, order) 341 342 #endif 342 343 #define alloc_page(gfp_mask) alloc_pages(gfp_mask, 0) 343 - #define alloc_page_vma(gfp_mask, vma, addr) \ 344 - alloc_pages_vma(gfp_mask, 0, vma, addr) 344 + #define alloc_page_vma(gfp_mask, vma, addr) \ 345 + alloc_pages_vma(gfp_mask, 0, vma, addr, numa_node_id()) 346 + #define alloc_page_vma_node(gfp_mask, vma, addr, node) \ 347 + alloc_pages_vma(gfp_mask, 0, vma, addr, node) 345 348 346 349 extern unsigned long __get_free_pages(gfp_t gfp_mask, unsigned int order); 347 350 extern unsigned long get_zeroed_page(gfp_t gfp_mask);
+3
include/linux/netdevice.h
··· 2557 2557 extern int netdev_info(const struct net_device *dev, const char *format, ...) 2558 2558 __attribute__ ((format (printf, 2, 3))); 2559 2559 2560 + #define MODULE_ALIAS_NETDEV(device) \ 2561 + MODULE_ALIAS("netdev-" device) 2562 + 2560 2563 #if defined(DEBUG) 2561 2564 #define netdev_dbg(__dev, format, args...) \ 2562 2565 netdev_printk(KERN_DEBUG, __dev, format, ##args)
-3
include/linux/ptrace.h
··· 102 102 103 103 extern long arch_ptrace(struct task_struct *child, long request, 104 104 unsigned long addr, unsigned long data); 105 - extern int ptrace_traceme(void); 106 105 extern int ptrace_readdata(struct task_struct *tsk, unsigned long src, char __user *dst, int len); 107 106 extern int ptrace_writedata(struct task_struct *tsk, char __user *src, unsigned long dst, int len); 108 - extern int ptrace_attach(struct task_struct *tsk); 109 - extern int ptrace_detach(struct task_struct *, unsigned int); 110 107 extern void ptrace_disable(struct task_struct *); 111 108 extern int ptrace_check_attach(struct task_struct *task, int kill); 112 109 extern int ptrace_request(struct task_struct *child, long request,
+10 -4
include/linux/sysctl.h
··· 930 930 931 931 #ifdef __KERNEL__ 932 932 #include <linux/list.h> 933 + #include <linux/rcupdate.h> 933 934 934 935 /* For the /proc/sys support */ 935 936 struct ctl_table; ··· 1038 1037 struct ctl_table trees. */ 1039 1038 struct ctl_table_header 1040 1039 { 1041 - struct ctl_table *ctl_table; 1042 - struct list_head ctl_entry; 1043 - int used; 1044 - int count; 1040 + union { 1041 + struct { 1042 + struct ctl_table *ctl_table; 1043 + struct list_head ctl_entry; 1044 + int used; 1045 + int count; 1046 + }; 1047 + struct rcu_head rcu; 1048 + }; 1045 1049 struct completion *unregistering; 1046 1050 struct ctl_table *ctl_table_arg; 1047 1051 struct ctl_table_root *root;
+5 -2
kernel/cpuset.c
··· 1575 1575 return -ENODEV; 1576 1576 1577 1577 trialcs = alloc_trial_cpuset(cs); 1578 - if (!trialcs) 1579 - return -ENOMEM; 1578 + if (!trialcs) { 1579 + retval = -ENOMEM; 1580 + goto out; 1581 + } 1580 1582 1581 1583 switch (cft->private) { 1582 1584 case FILE_CPULIST: ··· 1593 1591 } 1594 1592 1595 1593 free_trial_cpuset(trialcs); 1594 + out: 1596 1595 cgroup_unlock(); 1597 1596 return retval; 1598 1597 }
+3 -3
kernel/ptrace.c
··· 163 163 return !err; 164 164 } 165 165 166 - int ptrace_attach(struct task_struct *task) 166 + static int ptrace_attach(struct task_struct *task) 167 167 { 168 168 int retval; 169 169 ··· 219 219 * Performs checks and sets PT_PTRACED. 220 220 * Should be used by all ptrace implementations for PTRACE_TRACEME. 221 221 */ 222 - int ptrace_traceme(void) 222 + static int ptrace_traceme(void) 223 223 { 224 224 int ret = -EPERM; 225 225 ··· 293 293 return false; 294 294 } 295 295 296 - int ptrace_detach(struct task_struct *child, unsigned int data) 296 + static int ptrace_detach(struct task_struct *child, unsigned int data) 297 297 { 298 298 bool dead = false; 299 299
+9 -5
kernel/sched_rt.c
··· 210 210 211 211 static void sched_rt_rq_enqueue(struct rt_rq *rt_rq) 212 212 { 213 - int this_cpu = smp_processor_id(); 214 213 struct task_struct *curr = rq_of_rt_rq(rt_rq)->curr; 215 214 struct sched_rt_entity *rt_se; 216 215 217 - rt_se = rt_rq->tg->rt_se[this_cpu]; 216 + int cpu = cpu_of(rq_of_rt_rq(rt_rq)); 217 + 218 + rt_se = rt_rq->tg->rt_se[cpu]; 218 219 219 220 if (rt_rq->rt_nr_running) { 220 221 if (rt_se && !on_rt_rq(rt_se)) ··· 227 226 228 227 static void sched_rt_rq_dequeue(struct rt_rq *rt_rq) 229 228 { 230 - int this_cpu = smp_processor_id(); 231 229 struct sched_rt_entity *rt_se; 230 + int cpu = cpu_of(rq_of_rt_rq(rt_rq)); 232 231 233 - rt_se = rt_rq->tg->rt_se[this_cpu]; 232 + rt_se = rt_rq->tg->rt_se[cpu]; 234 233 235 234 if (rt_se && on_rt_rq(rt_se)) 236 235 dequeue_rt_entity(rt_se); ··· 566 565 if (rt_rq->rt_time || rt_rq->rt_nr_running) 567 566 idle = 0; 568 567 raw_spin_unlock(&rt_rq->rt_runtime_lock); 569 - } else if (rt_rq->rt_nr_running) 568 + } else if (rt_rq->rt_nr_running) { 570 569 idle = 0; 570 + if (!rt_rq_throttled(rt_rq)) 571 + enqueue = 1; 572 + } 571 573 572 574 if (enqueue) 573 575 sched_rt_rq_enqueue(rt_rq);
+10 -5
kernel/sysctl.c
··· 194 194 static struct ctl_table root_table[]; 195 195 static struct ctl_table_root sysctl_table_root; 196 196 static struct ctl_table_header root_table_header = { 197 - .count = 1, 197 + {{.count = 1, 198 198 .ctl_table = root_table, 199 - .ctl_entry = LIST_HEAD_INIT(sysctl_table_root.default_set.list), 199 + .ctl_entry = LIST_HEAD_INIT(sysctl_table_root.default_set.list),}}, 200 200 .root = &sysctl_table_root, 201 201 .set = &sysctl_table_root.default_set, 202 202 }; ··· 1567 1567 spin_unlock(&sysctl_lock); 1568 1568 } 1569 1569 1570 + static void free_head(struct rcu_head *rcu) 1571 + { 1572 + kfree(container_of(rcu, struct ctl_table_header, rcu)); 1573 + } 1574 + 1570 1575 void sysctl_head_put(struct ctl_table_header *head) 1571 1576 { 1572 1577 spin_lock(&sysctl_lock); 1573 1578 if (!--head->count) 1574 - kfree(head); 1579 + call_rcu(&head->rcu, free_head); 1575 1580 spin_unlock(&sysctl_lock); 1576 1581 } 1577 1582 ··· 1953 1948 start_unregistering(header); 1954 1949 if (!--header->parent->count) { 1955 1950 WARN_ON(1); 1956 - kfree(header->parent); 1951 + call_rcu(&header->parent->rcu, free_head); 1957 1952 } 1958 1953 if (!--header->count) 1959 - kfree(header); 1954 + call_rcu(&header->rcu, free_head); 1960 1955 spin_unlock(&sysctl_lock); 1961 1956 } 1962 1957
+19 -9
mm/huge_memory.c
··· 650 650 651 651 static inline struct page *alloc_hugepage_vma(int defrag, 652 652 struct vm_area_struct *vma, 653 - unsigned long haddr) 653 + unsigned long haddr, int nd) 654 654 { 655 655 return alloc_pages_vma(alloc_hugepage_gfpmask(defrag), 656 - HPAGE_PMD_ORDER, vma, haddr); 656 + HPAGE_PMD_ORDER, vma, haddr, nd); 657 657 } 658 658 659 659 #ifndef CONFIG_NUMA ··· 678 678 if (unlikely(khugepaged_enter(vma))) 679 679 return VM_FAULT_OOM; 680 680 page = alloc_hugepage_vma(transparent_hugepage_defrag(vma), 681 - vma, haddr); 681 + vma, haddr, numa_node_id()); 682 682 if (unlikely(!page)) 683 683 goto out; 684 684 if (unlikely(mem_cgroup_newpage_charge(page, mm, GFP_KERNEL))) { ··· 799 799 } 800 800 801 801 for (i = 0; i < HPAGE_PMD_NR; i++) { 802 - pages[i] = alloc_page_vma(GFP_HIGHUSER_MOVABLE, 803 - vma, address); 802 + pages[i] = alloc_page_vma_node(GFP_HIGHUSER_MOVABLE, 803 + vma, address, page_to_nid(page)); 804 804 if (unlikely(!pages[i] || 805 805 mem_cgroup_newpage_charge(pages[i], mm, 806 806 GFP_KERNEL))) { ··· 902 902 if (transparent_hugepage_enabled(vma) && 903 903 !transparent_hugepage_debug_cow()) 904 904 new_page = alloc_hugepage_vma(transparent_hugepage_defrag(vma), 905 - vma, haddr); 905 + vma, haddr, numa_node_id()); 906 906 else 907 907 new_page = NULL; 908 908 ··· 1745 1745 static void collapse_huge_page(struct mm_struct *mm, 1746 1746 unsigned long address, 1747 1747 struct page **hpage, 1748 - struct vm_area_struct *vma) 1748 + struct vm_area_struct *vma, 1749 + int node) 1749 1750 { 1750 1751 pgd_t *pgd; 1751 1752 pud_t *pud; ··· 1774 1773 * mmap_sem in read mode is good idea also to allow greater 1775 1774 * scalability. 1776 1775 */ 1777 - new_page = alloc_hugepage_vma(khugepaged_defrag(), vma, address); 1776 + new_page = alloc_hugepage_vma(khugepaged_defrag(), vma, address, 1777 + node); 1778 1778 if (unlikely(!new_page)) { 1779 1779 up_read(&mm->mmap_sem); 1780 1780 *hpage = ERR_PTR(-ENOMEM); ··· 1921 1919 struct page *page; 1922 1920 unsigned long _address; 1923 1921 spinlock_t *ptl; 1922 + int node = -1; 1924 1923 1925 1924 VM_BUG_ON(address & ~HPAGE_PMD_MASK); 1926 1925 ··· 1952 1949 page = vm_normal_page(vma, _address, pteval); 1953 1950 if (unlikely(!page)) 1954 1951 goto out_unmap; 1952 + /* 1953 + * Chose the node of the first page. This could 1954 + * be more sophisticated and look at more pages, 1955 + * but isn't for now. 1956 + */ 1957 + if (node == -1) 1958 + node = page_to_nid(page); 1955 1959 VM_BUG_ON(PageCompound(page)); 1956 1960 if (!PageLRU(page) || PageLocked(page) || !PageAnon(page)) 1957 1961 goto out_unmap; ··· 1975 1965 pte_unmap_unlock(pte, ptl); 1976 1966 if (ret) 1977 1967 /* collapse_huge_page will return with the mmap_sem released */ 1978 - collapse_huge_page(mm, address, hpage, vma); 1968 + collapse_huge_page(mm, address, hpage, vma, node); 1979 1969 out: 1980 1970 return ret; 1981 1971 }
+7 -7
mm/mempolicy.c
··· 1524 1524 } 1525 1525 1526 1526 /* Return a zonelist indicated by gfp for node representing a mempolicy */ 1527 - static struct zonelist *policy_zonelist(gfp_t gfp, struct mempolicy *policy) 1527 + static struct zonelist *policy_zonelist(gfp_t gfp, struct mempolicy *policy, 1528 + int nd) 1528 1529 { 1529 - int nd = numa_node_id(); 1530 - 1531 1530 switch (policy->mode) { 1532 1531 case MPOL_PREFERRED: 1533 1532 if (!(policy->flags & MPOL_F_LOCAL)) ··· 1678 1679 zl = node_zonelist(interleave_nid(*mpol, vma, addr, 1679 1680 huge_page_shift(hstate_vma(vma))), gfp_flags); 1680 1681 } else { 1681 - zl = policy_zonelist(gfp_flags, *mpol); 1682 + zl = policy_zonelist(gfp_flags, *mpol, numa_node_id()); 1682 1683 if ((*mpol)->mode == MPOL_BIND) 1683 1684 *nodemask = &(*mpol)->v.nodes; 1684 1685 } ··· 1819 1820 */ 1820 1821 struct page * 1821 1822 alloc_pages_vma(gfp_t gfp, int order, struct vm_area_struct *vma, 1822 - unsigned long addr) 1823 + unsigned long addr, int node) 1823 1824 { 1824 1825 struct mempolicy *pol = get_vma_policy(current, vma, addr); 1825 1826 struct zonelist *zl; ··· 1835 1836 put_mems_allowed(); 1836 1837 return page; 1837 1838 } 1838 - zl = policy_zonelist(gfp, pol); 1839 + zl = policy_zonelist(gfp, pol, node); 1839 1840 if (unlikely(mpol_needs_cond_ref(pol))) { 1840 1841 /* 1841 1842 * slow path: ref counted shared policy ··· 1891 1892 page = alloc_page_interleave(gfp, order, interleave_nodes(pol)); 1892 1893 else 1893 1894 page = __alloc_pages_nodemask(gfp, order, 1894 - policy_zonelist(gfp, pol), policy_nodemask(gfp, pol)); 1895 + policy_zonelist(gfp, pol, numa_node_id()), 1896 + policy_nodemask(gfp, pol)); 1895 1897 put_mems_allowed(); 1896 1898 return page; 1897 1899 }
+1 -3
net/Makefile
··· 19 19 obj-$(CONFIG_INET) += ipv4/ 20 20 obj-$(CONFIG_XFRM) += xfrm/ 21 21 obj-$(CONFIG_UNIX) += unix/ 22 - ifneq ($(CONFIG_IPV6),) 23 - obj-y += ipv6/ 24 - endif 22 + obj-$(CONFIG_NET) += ipv6/ 25 23 obj-$(CONFIG_PACKET) += packet/ 26 24 obj-$(CONFIG_NET_KEY) += key/ 27 25 obj-$(CONFIG_BRIDGE) += bridge/
+1
net/bridge/Kconfig
··· 6 6 tristate "802.1d Ethernet Bridging" 7 7 select LLC 8 8 select STP 9 + depends on IPV6 || IPV6=n 9 10 ---help--- 10 11 If you say Y here, then your Linux box will be able to act as an 11 12 Ethernet bridge, which means that the different Ethernet segments it
+54 -17
net/ceph/messenger.c
··· 336 336 ceph_msg_put(con->out_msg); 337 337 con->out_msg = NULL; 338 338 } 339 - con->out_keepalive_pending = false; 340 339 con->in_seq = 0; 341 340 con->in_seq_acked = 0; 342 341 } ··· 1247 1248 con->auth_retry); 1248 1249 if (con->auth_retry == 2) { 1249 1250 con->error_msg = "connect authorization failure"; 1250 - reset_connection(con); 1251 - set_bit(CLOSED, &con->state); 1252 1251 return -1; 1253 1252 } 1254 1253 con->auth_retry = 1; ··· 1712 1715 1713 1716 /* open the socket first? */ 1714 1717 if (con->sock == NULL) { 1715 - /* 1716 - * if we were STANDBY and are reconnecting _this_ 1717 - * connection, bump connect_seq now. Always bump 1718 - * global_seq. 1719 - */ 1720 - if (test_and_clear_bit(STANDBY, &con->state)) 1721 - con->connect_seq++; 1722 - 1723 1718 prepare_write_banner(msgr, con); 1724 1719 prepare_write_connect(msgr, con, 1); 1725 1720 prepare_read_banner(con); ··· 1940 1951 work.work); 1941 1952 1942 1953 mutex_lock(&con->mutex); 1954 + if (test_and_clear_bit(BACKOFF, &con->state)) { 1955 + dout("con_work %p backing off\n", con); 1956 + if (queue_delayed_work(ceph_msgr_wq, &con->work, 1957 + round_jiffies_relative(con->delay))) { 1958 + dout("con_work %p backoff %lu\n", con, con->delay); 1959 + mutex_unlock(&con->mutex); 1960 + return; 1961 + } else { 1962 + con->ops->put(con); 1963 + dout("con_work %p FAILED to back off %lu\n", con, 1964 + con->delay); 1965 + } 1966 + } 1943 1967 1968 + if (test_bit(STANDBY, &con->state)) { 1969 + dout("con_work %p STANDBY\n", con); 1970 + goto done; 1971 + } 1944 1972 if (test_bit(CLOSED, &con->state)) { /* e.g. if we are replaced */ 1945 1973 dout("con_work CLOSED\n"); 1946 1974 con_close_socket(con); ··· 2014 2008 /* Requeue anything that hasn't been acked */ 2015 2009 list_splice_init(&con->out_sent, &con->out_queue); 2016 2010 2017 - /* If there are no messages in the queue, place the connection 2018 - * in a STANDBY state (i.e., don't try to reconnect just yet). */ 2019 - if (list_empty(&con->out_queue) && !con->out_keepalive_pending) { 2020 - dout("fault setting STANDBY\n"); 2011 + /* If there are no messages queued or keepalive pending, place 2012 + * the connection in a STANDBY state */ 2013 + if (list_empty(&con->out_queue) && 2014 + !test_bit(KEEPALIVE_PENDING, &con->state)) { 2015 + dout("fault %p setting STANDBY clearing WRITE_PENDING\n", con); 2016 + clear_bit(WRITE_PENDING, &con->state); 2021 2017 set_bit(STANDBY, &con->state); 2022 2018 } else { 2023 2019 /* retry after a delay. */ ··· 2027 2019 con->delay = BASE_DELAY_INTERVAL; 2028 2020 else if (con->delay < MAX_DELAY_INTERVAL) 2029 2021 con->delay *= 2; 2030 - dout("fault queueing %p delay %lu\n", con, con->delay); 2031 2022 con->ops->get(con); 2032 2023 if (queue_delayed_work(ceph_msgr_wq, &con->work, 2033 - round_jiffies_relative(con->delay)) == 0) 2024 + round_jiffies_relative(con->delay))) { 2025 + dout("fault queued %p delay %lu\n", con, con->delay); 2026 + } else { 2034 2027 con->ops->put(con); 2028 + dout("fault failed to queue %p delay %lu, backoff\n", 2029 + con, con->delay); 2030 + /* 2031 + * In many cases we see a socket state change 2032 + * while con_work is running and end up 2033 + * queuing (non-delayed) work, such that we 2034 + * can't backoff with a delay. Set a flag so 2035 + * that when con_work restarts we schedule the 2036 + * delay then. 2037 + */ 2038 + set_bit(BACKOFF, &con->state); 2039 + } 2035 2040 } 2036 2041 2037 2042 out_unlock: ··· 2115 2094 } 2116 2095 EXPORT_SYMBOL(ceph_messenger_destroy); 2117 2096 2097 + static void clear_standby(struct ceph_connection *con) 2098 + { 2099 + /* come back from STANDBY? */ 2100 + if (test_and_clear_bit(STANDBY, &con->state)) { 2101 + mutex_lock(&con->mutex); 2102 + dout("clear_standby %p and ++connect_seq\n", con); 2103 + con->connect_seq++; 2104 + WARN_ON(test_bit(WRITE_PENDING, &con->state)); 2105 + WARN_ON(test_bit(KEEPALIVE_PENDING, &con->state)); 2106 + mutex_unlock(&con->mutex); 2107 + } 2108 + } 2109 + 2118 2110 /* 2119 2111 * Queue up an outgoing message on the given connection. 2120 2112 */ ··· 2160 2126 2161 2127 /* if there wasn't anything waiting to send before, queue 2162 2128 * new work */ 2129 + clear_standby(con); 2163 2130 if (test_and_set_bit(WRITE_PENDING, &con->state) == 0) 2164 2131 queue_con(con); 2165 2132 } ··· 2226 2191 */ 2227 2192 void ceph_con_keepalive(struct ceph_connection *con) 2228 2193 { 2194 + dout("con_keepalive %p\n", con); 2195 + clear_standby(con); 2229 2196 if (test_and_set_bit(KEEPALIVE_PENDING, &con->state) == 0 && 2230 2197 test_and_set_bit(WRITE_PENDING, &con->state) == 0) 2231 2198 queue_con(con);
+13 -5
net/ceph/pagevec.c
··· 16 16 int num_pages, bool write_page) 17 17 { 18 18 struct page **pages; 19 - int rc; 19 + int got = 0; 20 + int rc = 0; 20 21 21 22 pages = kmalloc(sizeof(*pages) * num_pages, GFP_NOFS); 22 23 if (!pages) 23 24 return ERR_PTR(-ENOMEM); 24 25 25 26 down_read(&current->mm->mmap_sem); 26 - rc = get_user_pages(current, current->mm, (unsigned long)data, 27 - num_pages, write_page, 0, pages, NULL); 27 + while (got < num_pages) { 28 + rc = get_user_pages(current, current->mm, 29 + (unsigned long)data + ((unsigned long)got * PAGE_SIZE), 30 + num_pages - got, write_page, 0, pages + got, NULL); 31 + if (rc < 0) 32 + break; 33 + BUG_ON(rc == 0); 34 + got += rc; 35 + } 28 36 up_read(&current->mm->mmap_sem); 29 - if (rc < num_pages) 37 + if (rc < 0) 30 38 goto fail; 31 39 return pages; 32 40 33 41 fail: 34 - ceph_put_page_vector(pages, rc > 0 ? rc : 0, false); 42 + ceph_put_page_vector(pages, got, false); 35 43 return ERR_PTR(rc); 36 44 } 37 45 EXPORT_SYMBOL(ceph_get_direct_page_vector);
+10 -2
net/core/dev.c
··· 1115 1115 void dev_load(struct net *net, const char *name) 1116 1116 { 1117 1117 struct net_device *dev; 1118 + int no_module; 1118 1119 1119 1120 rcu_read_lock(); 1120 1121 dev = dev_get_by_name_rcu(net, name); 1121 1122 rcu_read_unlock(); 1122 1123 1123 - if (!dev && capable(CAP_NET_ADMIN)) 1124 - request_module("%s", name); 1124 + no_module = !dev; 1125 + if (no_module && capable(CAP_NET_ADMIN)) 1126 + no_module = request_module("netdev-%s", name); 1127 + if (no_module && capable(CAP_SYS_MODULE)) { 1128 + if (!request_module("%s", name)) 1129 + pr_err("Loading kernel module for a network device " 1130 + "with CAP_SYS_MODULE (deprecated). Use CAP_NET_ADMIN and alias netdev-%s " 1131 + "instead\n", name); 1132 + } 1125 1133 } 1126 1134 EXPORT_SYMBOL(dev_load); 1127 1135
+1 -1
net/core/pktgen.c
··· 3271 3271 pkt_dev->started_at); 3272 3272 ktime_t idle = ns_to_ktime(pkt_dev->idle_acc); 3273 3273 3274 - p += sprintf(p, "OK: %llu(c%llu+d%llu) nsec, %llu (%dbyte,%dfrags)\n", 3274 + p += sprintf(p, "OK: %llu(c%llu+d%llu) usec, %llu (%dbyte,%dfrags)\n", 3275 3275 (unsigned long long)ktime_to_us(elapsed), 3276 3276 (unsigned long long)ktime_to_us(ktime_sub(elapsed, idle)), 3277 3277 (unsigned long long)ktime_to_us(idle),
+3 -3
net/ipv4/devinet.c
··· 741 741 ifap = &ifa->ifa_next) { 742 742 if (!strcmp(ifr.ifr_name, ifa->ifa_label) && 743 743 sin_orig.sin_addr.s_addr == 744 - ifa->ifa_address) { 744 + ifa->ifa_local) { 745 745 break; /* found */ 746 746 } 747 747 } ··· 1112 1112 return; 1113 1113 1114 1114 arp_send(ARPOP_REQUEST, ETH_P_ARP, 1115 - ifa->ifa_address, dev, 1116 - ifa->ifa_address, NULL, 1115 + ifa->ifa_local, dev, 1116 + ifa->ifa_local, NULL, 1117 1117 dev->dev_addr, NULL); 1118 1118 } 1119 1119
+1 -1
net/ipv4/ip_gre.c
··· 1766 1766 MODULE_LICENSE("GPL"); 1767 1767 MODULE_ALIAS_RTNL_LINK("gre"); 1768 1768 MODULE_ALIAS_RTNL_LINK("gretap"); 1769 - MODULE_ALIAS("gre0"); 1769 + MODULE_ALIAS_NETDEV("gre0");
+1 -1
net/ipv4/ipip.c
··· 914 914 module_init(ipip_init); 915 915 module_exit(ipip_fini); 916 916 MODULE_LICENSE("GPL"); 917 - MODULE_ALIAS("tunl0"); 917 + MODULE_ALIAS_NETDEV("tunl0");
+1
net/ipv6/ip6_tunnel.c
··· 57 57 MODULE_AUTHOR("Ville Nuorvala"); 58 58 MODULE_DESCRIPTION("IPv6 tunneling device"); 59 59 MODULE_LICENSE("GPL"); 60 + MODULE_ALIAS_NETDEV("ip6tnl0"); 60 61 61 62 #ifdef IP6_TNL_DEBUG 62 63 #define IP6_TNL_TRACE(x...) printk(KERN_DEBUG "%s:" x "\n", __func__)
+3 -1
net/ipv6/route.c
··· 783 783 784 784 if (!rt->rt6i_nexthop && !(rt->rt6i_flags & RTF_NONEXTHOP)) 785 785 nrt = rt6_alloc_cow(rt, &fl->fl6_dst, &fl->fl6_src); 786 - else 786 + else if (!(rt->dst.flags & DST_HOST)) 787 787 nrt = rt6_alloc_clone(rt, &fl->fl6_dst); 788 + else 789 + goto out2; 788 790 789 791 dst_release(&rt->dst); 790 792 rt = nrt ? : net->ipv6.ip6_null_entry;
+1 -1
net/ipv6/sit.c
··· 1295 1295 module_init(sit_init); 1296 1296 module_exit(sit_cleanup); 1297 1297 MODULE_LICENSE("GPL"); 1298 - MODULE_ALIAS("sit0"); 1298 + MODULE_ALIAS_NETDEV("sit0");
+4 -1
net/rds/ib_send.c
··· 551 551 if (conn->c_loopback 552 552 && rm->m_inc.i_hdr.h_flags & RDS_FLAG_CONG_BITMAP) { 553 553 rds_cong_map_updated(conn->c_fcong, ~(u64) 0); 554 - return sizeof(struct rds_header) + RDS_CONG_MAP_BYTES; 554 + scat = &rm->data.op_sg[sg]; 555 + ret = sizeof(struct rds_header) + RDS_CONG_MAP_BYTES; 556 + ret = min_t(int, ret, scat->length - conn->c_xmit_data_off); 557 + return ret; 555 558 } 556 559 557 560 /* FIXME we may overallocate here */
+8 -3
net/rds/loop.c
··· 61 61 unsigned int hdr_off, unsigned int sg, 62 62 unsigned int off) 63 63 { 64 + struct scatterlist *sgp = &rm->data.op_sg[sg]; 65 + int ret = sizeof(struct rds_header) + 66 + be32_to_cpu(rm->m_inc.i_hdr.h_len); 67 + 64 68 /* Do not send cong updates to loopback */ 65 69 if (rm->m_inc.i_hdr.h_flags & RDS_FLAG_CONG_BITMAP) { 66 70 rds_cong_map_updated(conn->c_fcong, ~(u64) 0); 67 - return sizeof(struct rds_header) + RDS_CONG_MAP_BYTES; 71 + ret = min_t(int, ret, sgp->length - conn->c_xmit_data_off); 72 + goto out; 68 73 } 69 74 70 75 BUG_ON(hdr_off || sg || off); ··· 85 80 NULL); 86 81 87 82 rds_inc_put(&rm->m_inc); 88 - 89 - return sizeof(struct rds_header) + be32_to_cpu(rm->m_inc.i_hdr.h_len); 83 + out: 84 + return ret; 90 85 } 91 86 92 87 /*
+13 -4
net/unix/af_unix.c
··· 1728 1728 1729 1729 msg->msg_namelen = 0; 1730 1730 1731 - mutex_lock(&u->readlock); 1731 + err = mutex_lock_interruptible(&u->readlock); 1732 + if (err) { 1733 + err = sock_intr_errno(sock_rcvtimeo(sk, noblock)); 1734 + goto out; 1735 + } 1732 1736 1733 1737 skb = skb_recv_datagram(sk, flags, noblock, &err); 1734 1738 if (!skb) { ··· 1872 1868 memset(&tmp_scm, 0, sizeof(tmp_scm)); 1873 1869 } 1874 1870 1875 - mutex_lock(&u->readlock); 1871 + err = mutex_lock_interruptible(&u->readlock); 1872 + if (err) { 1873 + err = sock_intr_errno(timeo); 1874 + goto out; 1875 + } 1876 1876 1877 1877 do { 1878 1878 int chunk; ··· 1907 1899 1908 1900 timeo = unix_stream_data_wait(sk, timeo); 1909 1901 1910 - if (signal_pending(current)) { 1902 + if (signal_pending(current) 1903 + || mutex_lock_interruptible(&u->readlock)) { 1911 1904 err = sock_intr_errno(timeo); 1912 1905 goto out; 1913 1906 } 1914 - mutex_lock(&u->readlock); 1907 + 1915 1908 continue; 1916 1909 unlock: 1917 1910 unix_state_unlock(sk);
+2
sound/pci/hda/patch_cirrus.c
··· 1039 1039 {0x11, AC_VERB_SET_PROC_COEF, 0x0008}, 1040 1040 {0x11, AC_VERB_SET_PROC_STATE, 0x00}, 1041 1041 1042 + #if 0 /* Don't to set to D3 as we are in power-up sequence */ 1042 1043 {0x07, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Rx: D3 */ 1043 1044 {0x08, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Tx: D3 */ 1044 1045 /*{0x01, AC_VERB_SET_POWER_STATE, 0x03},*/ /* AFG: D3 This is already handled */ 1046 + #endif 1045 1047 1046 1048 {} /* terminator */ 1047 1049 };
+5
sound/pci/hda/patch_hdmi.c
··· 1634 1634 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_nvhdmi_8ch_89 }, 1635 1635 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_nvhdmi_8ch_89 }, 1636 1636 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_nvhdmi_8ch_89 }, 1637 + { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_nvhdmi_8ch_89 }, 1638 + { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_nvhdmi_8ch_89 }, 1639 + /* 17 is known to be absent */ 1637 1640 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_nvhdmi_8ch_89 }, 1638 1641 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_nvhdmi_8ch_89 }, 1639 1642 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_nvhdmi_8ch_89 }, ··· 1679 1676 MODULE_ALIAS("snd-hda-codec-id:10de0012"); 1680 1677 MODULE_ALIAS("snd-hda-codec-id:10de0013"); 1681 1678 MODULE_ALIAS("snd-hda-codec-id:10de0014"); 1679 + MODULE_ALIAS("snd-hda-codec-id:10de0015"); 1680 + MODULE_ALIAS("snd-hda-codec-id:10de0016"); 1682 1681 MODULE_ALIAS("snd-hda-codec-id:10de0018"); 1683 1682 MODULE_ALIAS("snd-hda-codec-id:10de0019"); 1684 1683 MODULE_ALIAS("snd-hda-codec-id:10de001a");
+3 -6
sound/pci/hda/patch_realtek.c
··· 1133 1133 nid = spec->autocfg.hp_pins[i]; 1134 1134 if (!nid) 1135 1135 break; 1136 - if (snd_hda_jack_detect(codec, nid)) { 1137 - spec->jack_present = 1; 1138 - break; 1139 - } 1140 - alc_report_jack(codec, spec->autocfg.hp_pins[i]); 1136 + alc_report_jack(codec, nid); 1137 + spec->jack_present |= snd_hda_jack_detect(codec, nid); 1141 1138 } 1142 1139 1143 1140 mute = spec->jack_present ? HDA_AMP_MUTE : 0; ··· 15012 15015 SND_PCI_QUIRK(0x1043, 0x11e3, "ASUS U33Jc", ALC269VB_AMIC), 15013 15016 SND_PCI_QUIRK(0x1043, 0x1273, "ASUS UL80Jt", ALC269VB_AMIC), 15014 15017 SND_PCI_QUIRK(0x1043, 0x1283, "ASUS U53Jc", ALC269_AMIC), 15015 - SND_PCI_QUIRK(0x1043, 0x12b3, "ASUS N82Jv", ALC269_AMIC), 15018 + SND_PCI_QUIRK(0x1043, 0x12b3, "ASUS N82JV", ALC269VB_AMIC), 15016 15019 SND_PCI_QUIRK(0x1043, 0x12d3, "ASUS N61Jv", ALC269_AMIC), 15017 15020 SND_PCI_QUIRK(0x1043, 0x13a3, "ASUS UL30Vt", ALC269_AMIC), 15018 15021 SND_PCI_QUIRK(0x1043, 0x1373, "ASUS G73JX", ALC269_AMIC),
+42 -9
sound/soc/codecs/wm8994.c
··· 110 110 111 111 unsigned int aif1clk_enable:1; 112 112 unsigned int aif2clk_enable:1; 113 + 114 + unsigned int aif1clk_disable:1; 115 + unsigned int aif2clk_disable:1; 113 116 }; 114 117 115 118 static int wm8994_readable(unsigned int reg) ··· 1018 1015 1019 1016 switch (event) { 1020 1017 case SND_SOC_DAPM_PRE_PMU: 1021 - if (wm8994->aif1clk_enable) 1018 + if (wm8994->aif1clk_enable) { 1022 1019 snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1, 1023 1020 WM8994_AIF1CLK_ENA_MASK, 1024 1021 WM8994_AIF1CLK_ENA); 1025 - if (wm8994->aif2clk_enable) 1022 + wm8994->aif1clk_enable = 0; 1023 + } 1024 + if (wm8994->aif2clk_enable) { 1026 1025 snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1, 1027 1026 WM8994_AIF2CLK_ENA_MASK, 1028 1027 WM8994_AIF2CLK_ENA); 1028 + wm8994->aif2clk_enable = 0; 1029 + } 1029 1030 break; 1030 1031 } 1031 1032 ··· 1044 1037 1045 1038 switch (event) { 1046 1039 case SND_SOC_DAPM_POST_PMD: 1047 - if (wm8994->aif1clk_enable) { 1040 + if (wm8994->aif1clk_disable) { 1048 1041 snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1, 1049 1042 WM8994_AIF1CLK_ENA_MASK, 0); 1050 - wm8994->aif1clk_enable = 0; 1043 + wm8994->aif1clk_disable = 0; 1051 1044 } 1052 - if (wm8994->aif2clk_enable) { 1045 + if (wm8994->aif2clk_disable) { 1053 1046 snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1, 1054 1047 WM8994_AIF2CLK_ENA_MASK, 0); 1055 - wm8994->aif2clk_enable = 0; 1048 + wm8994->aif2clk_disable = 0; 1056 1049 } 1057 1050 break; 1058 1051 } ··· 1070 1063 case SND_SOC_DAPM_PRE_PMU: 1071 1064 wm8994->aif1clk_enable = 1; 1072 1065 break; 1066 + case SND_SOC_DAPM_POST_PMD: 1067 + wm8994->aif1clk_disable = 1; 1068 + break; 1073 1069 } 1074 1070 1075 1071 return 0; ··· 1088 1078 case SND_SOC_DAPM_PRE_PMU: 1089 1079 wm8994->aif2clk_enable = 1; 1090 1080 break; 1081 + case SND_SOC_DAPM_POST_PMD: 1082 + wm8994->aif2clk_disable = 1; 1083 + break; 1091 1084 } 1092 1085 1086 + return 0; 1087 + } 1088 + 1089 + static int adc_mux_ev(struct snd_soc_dapm_widget *w, 1090 + struct snd_kcontrol *kcontrol, int event) 1091 + { 1092 + late_enable_ev(w, kcontrol, event); 1093 1093 return 0; 1094 1094 } 1095 1095 ··· 1423 1403 SND_SOC_DAPM_DAC("DAC1R", NULL, WM8994_POWER_MANAGEMENT_5, 0, 0), 1424 1404 }; 1425 1405 1406 + static const struct snd_soc_dapm_widget wm8994_adc_revd_widgets[] = { 1407 + SND_SOC_DAPM_MUX_E("ADCL Mux", WM8994_POWER_MANAGEMENT_4, 1, 0, &adcl_mux, 1408 + adc_mux_ev, SND_SOC_DAPM_PRE_PMU), 1409 + SND_SOC_DAPM_MUX_E("ADCR Mux", WM8994_POWER_MANAGEMENT_4, 0, 0, &adcr_mux, 1410 + adc_mux_ev, SND_SOC_DAPM_PRE_PMU), 1411 + }; 1412 + 1413 + static const struct snd_soc_dapm_widget wm8994_adc_widgets[] = { 1414 + SND_SOC_DAPM_MUX("ADCL Mux", WM8994_POWER_MANAGEMENT_4, 1, 0, &adcl_mux), 1415 + SND_SOC_DAPM_MUX("ADCR Mux", WM8994_POWER_MANAGEMENT_4, 0, 0, &adcr_mux), 1416 + }; 1417 + 1426 1418 static const struct snd_soc_dapm_widget wm8994_dapm_widgets[] = { 1427 1419 SND_SOC_DAPM_INPUT("DMIC1DAT"), 1428 1420 SND_SOC_DAPM_INPUT("DMIC2DAT"), ··· 1528 1496 */ 1529 1497 SND_SOC_DAPM_ADC("ADCL", NULL, SND_SOC_NOPM, 1, 0), 1530 1498 SND_SOC_DAPM_ADC("ADCR", NULL, SND_SOC_NOPM, 0, 0), 1531 - 1532 - SND_SOC_DAPM_MUX("ADCL Mux", WM8994_POWER_MANAGEMENT_4, 1, 0, &adcl_mux), 1533 - SND_SOC_DAPM_MUX("ADCR Mux", WM8994_POWER_MANAGEMENT_4, 0, 0, &adcr_mux), 1534 1499 1535 1500 SND_SOC_DAPM_MUX("Left Headphone Mux", SND_SOC_NOPM, 0, 0, &hpl_mux), 1536 1501 SND_SOC_DAPM_MUX("Right Headphone Mux", SND_SOC_NOPM, 0, 0, &hpr_mux), ··· 3309 3280 if (wm8994->revision < 4) { 3310 3281 snd_soc_dapm_new_controls(dapm, wm8994_lateclk_revd_widgets, 3311 3282 ARRAY_SIZE(wm8994_lateclk_revd_widgets)); 3283 + snd_soc_dapm_new_controls(dapm, wm8994_adc_revd_widgets, 3284 + ARRAY_SIZE(wm8994_adc_revd_widgets)); 3312 3285 snd_soc_dapm_new_controls(dapm, wm8994_dac_revd_widgets, 3313 3286 ARRAY_SIZE(wm8994_dac_revd_widgets)); 3314 3287 } else { 3315 3288 snd_soc_dapm_new_controls(dapm, wm8994_lateclk_widgets, 3316 3289 ARRAY_SIZE(wm8994_lateclk_widgets)); 3290 + snd_soc_dapm_new_controls(dapm, wm8994_adc_widgets, 3291 + ARRAY_SIZE(wm8994_adc_widgets)); 3317 3292 snd_soc_dapm_new_controls(dapm, wm8994_dac_widgets, 3318 3293 ARRAY_SIZE(wm8994_dac_widgets)); 3319 3294 }
+5
sound/soc/codecs/wm9081.c
··· 15 15 #include <linux/moduleparam.h> 16 16 #include <linux/init.h> 17 17 #include <linux/delay.h> 18 + #include <linux/device.h> 18 19 #include <linux/pm.h> 19 20 #include <linux/i2c.h> 20 21 #include <linux/platform_device.h> ··· 1341 1340 i2c_set_clientdata(i2c, wm9081); 1342 1341 wm9081->control_type = SND_SOC_I2C; 1343 1342 wm9081->control_data = i2c; 1343 + 1344 + if (dev_get_platdata(&i2c->dev)) 1345 + memcpy(&wm9081->retune, dev_get_platdata(&i2c->dev), 1346 + sizeof(wm9081->retune)); 1344 1347 1345 1348 ret = snd_soc_register_codec(&i2c->dev, 1346 1349 &soc_codec_dev_wm9081, &wm9081_dai, 1);
+8 -3
tools/perf/util/header.c
··· 270 270 const char *name, bool is_kallsyms) 271 271 { 272 272 const size_t size = PATH_MAX; 273 - char *realname = realpath(name, NULL), 274 - *filename = malloc(size), 273 + char *realname, *filename = malloc(size), 275 274 *linkname = malloc(size), *targetname; 276 275 int len, err = -1; 276 + 277 + if (is_kallsyms) 278 + realname = (char *)name; 279 + else 280 + realname = realpath(name, NULL); 277 281 278 282 if (realname == NULL || filename == NULL || linkname == NULL) 279 283 goto out_free; ··· 310 306 if (symlink(targetname, linkname) == 0) 311 307 err = 0; 312 308 out_free: 313 - free(realname); 309 + if (!is_kallsyms) 310 + free(realname); 314 311 free(filename); 315 312 free(linkname); 316 313 return err;
+1 -1
tools/perf/util/symbol.c
··· 1836 1836 int err = -1, fd; 1837 1837 char symfs_vmlinux[PATH_MAX]; 1838 1838 1839 - snprintf(symfs_vmlinux, sizeof(symfs_vmlinux), "%s/%s", 1839 + snprintf(symfs_vmlinux, sizeof(symfs_vmlinux), "%s%s", 1840 1840 symbol_conf.symfs, vmlinux); 1841 1841 fd = open(symfs_vmlinux, O_RDONLY); 1842 1842 if (fd < 0)