Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

clk: amlogic: move PCLK definition to clkc-utils

clk-regmap was always meant to stay generic, without any amlogic specifics.
The hope was that it could move out of the amlogic directory one day.
Even if this may actually not become true, it should remain generic.

Move the amlogic peripheral clock definition out of clk-regmap header.

Link: https://lore.kernel.org/r/20250825-meson-clk-cleanup-24-v2-5-0f402f01e117@baylibre.com
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>

+21 -20
-20
drivers/clk/meson/clk-regmap.h
··· 118 118 extern const struct clk_ops clk_regmap_mux_ops; 119 119 extern const struct clk_ops clk_regmap_mux_ro_ops; 120 120 121 - #define __MESON_PCLK(_name, _reg, _bit, _ops, _pname) \ 122 - struct clk_regmap _name = { \ 123 - .data = &(struct clk_regmap_gate_data){ \ 124 - .offset = (_reg), \ 125 - .bit_idx = (_bit), \ 126 - }, \ 127 - .hw.init = &(struct clk_init_data) { \ 128 - .name = #_name, \ 129 - .ops = _ops, \ 130 - .parent_hws = (const struct clk_hw *[]) { _pname }, \ 131 - .num_parents = 1, \ 132 - .flags = (CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED), \ 133 - }, \ 134 - } 135 - 136 - #define MESON_PCLK(_name, _reg, _bit, _pname) \ 137 - __MESON_PCLK(_name, _reg, _bit, &clk_regmap_gate_ops, _pname) 138 - 139 - #define MESON_PCLK_RO(_name, _reg, _bit, _pname) \ 140 - __MESON_PCLK(_name, _reg, _bit, &clk_regmap_gate_ro_ops, _pname) 141 121 #endif /* __CLK_REGMAP_H */
+21
drivers/clk/meson/meson-clkc-utils.h
··· 27 27 int meson_clkc_syscon_probe(struct platform_device *pdev); 28 28 int meson_clkc_mmio_probe(struct platform_device *pdev); 29 29 30 + #define __MESON_PCLK(_name, _reg, _bit, _ops, _pname) \ 31 + struct clk_regmap _name = { \ 32 + .data = &(struct clk_regmap_gate_data) { \ 33 + .offset = (_reg), \ 34 + .bit_idx = (_bit), \ 35 + }, \ 36 + .hw.init = &(struct clk_init_data) { \ 37 + .name = #_name, \ 38 + .ops = _ops, \ 39 + .parent_hws = (const struct clk_hw *[]) { _pname }, \ 40 + .num_parents = 1, \ 41 + .flags = (CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED), \ 42 + }, \ 43 + } 44 + 45 + #define MESON_PCLK(_name, _reg, _bit, _pname) \ 46 + __MESON_PCLK(_name, _reg, _bit, &clk_regmap_gate_ops, _pname) 47 + 48 + #define MESON_PCLK_RO(_name, _reg, _bit, _pname) \ 49 + __MESON_PCLK(_name, _reg, _bit, &clk_regmap_gate_ro_ops, _pname) 50 + 30 51 #endif