Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'omap-for-v5.9/ti-sysc-drop-pdata-take2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt

Drop more legacy platform data for omaps for v5.9

A series of changes to drop remaining USB platform data for omap4/5,
and am4, and dra7.

And a patch to drop AES platform data for omap3.

* tag 'omap-for-v5.9/ti-sysc-drop-pdata-take2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Drop legacy platform data for omap5 usb host
ARM: OMAP2+: Drop legacy platform data for omap4 usb
ARM: OMAP2+: Drop legacy platform data for dra7 dwc3
ARM: OMAP2+: Drop legacy platform data for omap5 dwc3
ARM: OMAP2+: Drop legacy platform data for am4 dwc3
bus: ti-sysc: Add missing quirk flags for usb_host_hs
ARM: dts: omap3: Migrate AES from hwmods to sysc-omap2

Link: https://lore.kernel.org/r/pull-1594838111-649880@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

+109 -686
+4
arch/arm/boot/dts/am3517.dtsi
··· 10 10 11 11 #include "omap3.dtsi" 12 12 13 + /* AM3517 doesn't appear to have the crypto engines defined in omap3.dtsi */ 14 + /delete-node/ &aes1_target; 15 + /delete-node/ &aes2_target; 16 + 13 17 / { 14 18 aliases { 15 19 serial3 = &uart4;
-2
arch/arm/boot/dts/am437x-l4.dtsi
··· 2352 2352 2353 2353 target-module@80000 { /* 0x48380000, ap 123 42.0 */ 2354 2354 compatible = "ti,sysc-omap4", "ti,sysc"; 2355 - ti,hwmods = "usb_otg_ss0"; 2356 2355 reg = <0x80000 0x4>, 2357 2356 <0x80010 0x4>; 2358 2357 reg-names = "rev", "sysc"; ··· 2432 2433 2433 2434 target-module@c0000 { /* 0x483c0000, ap 127 7a.0 */ 2434 2435 compatible = "ti,sysc-omap4", "ti,sysc"; 2435 - ti,hwmods = "usb_otg_ss1"; 2436 2436 reg = <0xc0000 0x4>, 2437 2437 <0xc0010 0x4>; 2438 2438 reg-names = "rev", "sysc";
-4
arch/arm/boot/dts/dra7-l4.dtsi
··· 4007 4007 4008 4008 target-module@80000 { /* 0x48880000, ap 83 0e.1 */ 4009 4009 compatible = "ti,sysc-omap4", "ti,sysc"; 4010 - ti,hwmods = "usb_otg_ss1"; 4011 4010 reg = <0x80000 0x4>, 4012 4011 <0x80010 0x4>; 4013 4012 reg-names = "rev", "sysc"; ··· 4056 4057 4057 4058 target-module@c0000 { /* 0x488c0000, ap 79 06.0 */ 4058 4059 compatible = "ti,sysc-omap4", "ti,sysc"; 4059 - ti,hwmods = "usb_otg_ss2"; 4060 4060 reg = <0xc0000 0x4>, 4061 4061 <0xc0010 0x4>; 4062 4062 reg-names = "rev", "sysc"; ··· 4106 4108 4107 4109 usb3_tm: target-module@100000 { /* 0x48900000, ap 85 04.0 */ 4108 4110 compatible = "ti,sysc-omap4", "ti,sysc"; 4109 - ti,hwmods = "usb_otg_ss3"; 4110 4111 reg = <0x100000 0x4>, 4111 4112 <0x100010 0x4>; 4112 4113 reg-names = "rev", "sysc"; ··· 4154 4157 4155 4158 usb4_tm: target-module@140000 { /* 0x48940000, ap 75 3c.0 */ 4156 4159 compatible = "ti,sysc-omap4", "ti,sysc"; 4157 - ti,hwmods = "usb_otg_ss4"; 4158 4160 reg = <0x140000 0x4>, 4159 4161 <0x140010 0x4>; 4160 4162 reg-names = "rev", "sysc";
+39 -19
arch/arm/boot/dts/dra74x.dtsi
··· 49 49 reg = <0x41500000 0x100>; 50 50 }; 51 51 52 - omap_dwc3_4: omap_dwc3_4@48940000 { 53 - compatible = "ti,dwc3"; 54 - ti,hwmods = "usb_otg_ss4"; 55 - reg = <0x48940000 0x10000>; 56 - interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>; 52 + target-module@48940000 { 53 + compatible = "ti,sysc-omap4", "ti,sysc"; 54 + reg = <0x48940000 0x4>, 55 + <0x48940010 0x4>; 56 + reg-names = "rev", "sysc"; 57 + ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>; 58 + ti,sysc-midle = <SYSC_IDLE_FORCE>, 59 + <SYSC_IDLE_NO>, 60 + <SYSC_IDLE_SMART>, 61 + <SYSC_IDLE_SMART_WKUP>; 62 + ti,sysc-sidle = <SYSC_IDLE_FORCE>, 63 + <SYSC_IDLE_NO>, 64 + <SYSC_IDLE_SMART>, 65 + <SYSC_IDLE_SMART_WKUP>; 66 + clocks = <&l3init_clkctrl DRA7_L3INIT_USB_OTG_SS4_CLKCTRL 0>; 67 + clock-names = "fck"; 57 68 #address-cells = <1>; 58 69 #size-cells = <1>; 59 - utmi-mode = <2>; 60 - ranges; 61 - status = "disabled"; 62 - usb4: usb@48950000 { 63 - compatible = "snps,dwc3"; 64 - reg = <0x48950000 0x17000>; 65 - interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 66 - <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 67 - <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>; 68 - interrupt-names = "peripheral", 69 - "host", 70 - "otg"; 71 - maximum-speed = "high-speed"; 72 - dr_mode = "otg"; 70 + ranges = <0x0 0x48940000 0x20000>; 71 + 72 + omap_dwc3_4: omap_dwc3_4@0 { 73 + compatible = "ti,dwc3"; 74 + reg = <0 0x10000>; 75 + interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>; 76 + #address-cells = <1>; 77 + #size-cells = <1>; 78 + utmi-mode = <2>; 79 + ranges; 80 + status = "disabled"; 81 + usb4: usb@10000 { 82 + compatible = "snps,dwc3"; 83 + reg = <0x10000 0x17000>; 84 + interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 85 + <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 86 + <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>; 87 + interrupt-names = "peripheral", 88 + "host", 89 + "otg"; 90 + maximum-speed = "high-speed"; 91 + dr_mode = "otg"; 92 + }; 73 93 }; 74 94 }; 75 95
+5 -1
arch/arm/boot/dts/omap3-n900.dts
··· 19 19 * but it is not widely used and to prevent kernel crash rather AES is disabled. 20 20 * There is also no runtime detection code if AES is disabled in L3 firewall... 21 21 */ 22 - &aes { 22 + &aes1_target { 23 + status = "disabled"; 24 + }; 25 + 26 + &aes2_target { 23 27 status = "disabled"; 24 28 }; 25 29
+5 -1
arch/arm/boot/dts/omap3-tao3530.dtsi
··· 8 8 #include "omap34xx.dtsi" 9 9 10 10 /* Secure omaps have some devices inaccessible depending on the firmware */ 11 - &aes { 11 + &aes1_target { 12 + status = "disabled"; 13 + }; 14 + 15 + &aes2_target { 12 16 status = "disabled"; 13 17 }; 14 18
+50 -7
arch/arm/boot/dts/omap3.dtsi
··· 157 157 }; 158 158 }; 159 159 160 - aes: aes@480c5000 { 161 - compatible = "ti,omap3-aes"; 162 - ti,hwmods = "aes"; 163 - reg = <0x480c5000 0x50>; 164 - interrupts = <0>; 165 - dmas = <&sdma 65 &sdma 66>; 166 - dma-names = "tx", "rx"; 160 + aes1_target: target-module@480a6000 { 161 + compatible = "ti,sysc-omap2", "ti,sysc"; 162 + reg = <0x480a6044 0x4>, 163 + <0x480a6048 0x4>, 164 + <0x480a604c 0x4>; 165 + reg-names = "rev", "sysc", "syss"; 166 + ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>; 167 + ti,sysc-sidle = <SYSC_IDLE_FORCE>, 168 + <SYSC_IDLE_NO>, 169 + <SYSC_IDLE_SMART>; 170 + ti,syss-mask = <1>; 171 + clocks = <&aes1_ick>; 172 + clock-names = "ick"; 173 + #address-cells = <1>; 174 + #size-cells = <1>; 175 + ranges = <0 0x480a6000 0x2000>; 176 + 177 + aes1: aes1@0 { 178 + compatible = "ti,omap3-aes"; 179 + reg = <0 0x50>; 180 + interrupts = <0>; 181 + dmas = <&sdma 9 &sdma 10>; 182 + dma-names = "tx", "rx"; 183 + }; 184 + }; 185 + 186 + aes2_target: target-module@480c5000 { 187 + compatible = "ti,sysc-omap2", "ti,sysc"; 188 + reg = <0x480c5044 0x4>, 189 + <0x480c5048 0x4>, 190 + <0x480c504c 0x4>; 191 + reg-names = "rev", "sysc", "syss"; 192 + ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>; 193 + ti,sysc-sidle = <SYSC_IDLE_FORCE>, 194 + <SYSC_IDLE_NO>, 195 + <SYSC_IDLE_SMART>; 196 + ti,syss-mask = <1>; 197 + clocks = <&aes2_ick>; 198 + clock-names = "ick"; 199 + #address-cells = <1>; 200 + #size-cells = <1>; 201 + ranges = <0 0x480c5000 0x2000>; 202 + 203 + aes2: aes2@0 { 204 + compatible = "ti,omap3-aes"; 205 + reg = <0 0x50>; 206 + interrupts = <0>; 207 + dmas = <&sdma 65 &sdma 66>; 208 + dma-names = "tx", "rx"; 209 + }; 167 210 }; 168 211 169 212 prm: prm@48306000 {
-2
arch/arm/boot/dts/omap4-l4.dtsi
··· 240 240 241 241 target-module@62000 { /* 0x4a062000, ap 11 16.0 */ 242 242 compatible = "ti,sysc-omap2", "ti,sysc"; 243 - ti,hwmods = "usb_tll_hs"; 244 243 reg = <0x62000 0x4>, 245 244 <0x62010 0x4>, 246 245 <0x62014 0x4>; ··· 267 268 268 269 target-module@64000 { /* 0x4a064000, ap 86 1e.0 */ 269 270 compatible = "ti,sysc-omap4", "ti,sysc"; 270 - ti,hwmods = "usb_host_hs"; 271 271 reg = <0x64000 0x4>, 272 272 <0x64010 0x4>, 273 273 <0x64014 0x4>;
-3
arch/arm/boot/dts/omap5-l4.dtsi
··· 167 167 168 168 target-module@20000 { /* 0x4a020000, ap 109 08.0 */ 169 169 compatible = "ti,sysc-omap4", "ti,sysc"; 170 - ti,hwmods = "usb_otg_ss"; 171 170 reg = <0x20000 0x4>, 172 171 <0x20010 0x4>; 173 172 reg-names = "rev", "sysc"; ··· 268 269 269 270 target-module@62000 { /* 0x4a062000, ap 11 0e.0 */ 270 271 compatible = "ti,sysc-omap2", "ti,sysc"; 271 - ti,hwmods = "usb_tll_hs"; 272 272 reg = <0x62000 0x4>, 273 273 <0x62010 0x4>, 274 274 <0x62014 0x4>; ··· 296 298 297 299 target-module@64000 { /* 0x4a064000, ap 71 1e.0 */ 298 300 compatible = "ti,sysc-omap4", "ti,sysc"; 299 - ti,hwmods = "usb_host_hs"; 300 301 reg = <0x64000 0x4>, 301 302 <0x64010 0x4>; 302 303 reg-names = "rev", "sysc";
-61
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
··· 2342 2342 .user = OCP_USER_MPU | OCP_USER_SDMA, 2343 2343 }; 2344 2344 2345 - /* l4_core -> AES */ 2346 - static struct omap_hwmod_class_sysconfig omap3_aes_sysc = { 2347 - .rev_offs = 0x44, 2348 - .sysc_offs = 0x48, 2349 - .syss_offs = 0x4c, 2350 - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | 2351 - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), 2352 - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), 2353 - .sysc_fields = &omap3xxx_aes_sysc_fields, 2354 - }; 2355 - 2356 - static struct omap_hwmod_class omap3xxx_aes_class = { 2357 - .name = "aes", 2358 - .sysc = &omap3_aes_sysc, 2359 - }; 2360 - 2361 - 2362 - static struct omap_hwmod omap3xxx_aes_hwmod = { 2363 - .name = "aes", 2364 - .main_clk = "aes2_ick", 2365 - .prcm = { 2366 - .omap2 = { 2367 - .module_offs = CORE_MOD, 2368 - .idlest_reg_id = 1, 2369 - .idlest_idle_bit = OMAP3430_ST_AES2_SHIFT, 2370 - }, 2371 - }, 2372 - .class = &omap3xxx_aes_class, 2373 - }; 2374 - 2375 - 2376 - static struct omap_hwmod_ocp_if omap3xxx_l4_core__aes = { 2377 - .master = &omap3xxx_l4_core_hwmod, 2378 - .slave = &omap3xxx_aes_hwmod, 2379 - .clk = "aes2_ick", 2380 - .user = OCP_USER_MPU | OCP_USER_SDMA, 2381 - }; 2382 - 2383 2345 /* 2384 2346 * 'ssi' class 2385 2347 * synchronous serial interface (multichannel and full-duplex serial if) ··· 2435 2473 NULL, 2436 2474 }; 2437 2475 2438 - static struct omap_hwmod_ocp_if *omap34xx_aes_hwmod_ocp_ifs[] __initdata = { 2439 - &omap3xxx_l4_core__aes, 2440 - NULL, 2441 - }; 2442 - 2443 2476 static struct omap_hwmod_ocp_if *omap36xx_sham_hwmod_ocp_ifs[] __initdata = { 2444 2477 &omap3xxx_l4_core__sham, 2445 2478 NULL 2446 2479 }; 2447 2480 2448 - static struct omap_hwmod_ocp_if *omap36xx_aes_hwmod_ocp_ifs[] __initdata = { 2449 - &omap3xxx_l4_core__aes, 2450 - NULL 2451 - }; 2452 2481 2453 2482 /* 2454 2483 * Apparently the SHA/MD5 and AES accelerator IP blocks are ··· 2452 2499 static struct omap_hwmod_ocp_if *am35xx_sham_hwmod_ocp_ifs[] __initdata = { 2453 2500 /* &omap3xxx_l4_core__sham, */ 2454 2501 NULL 2455 - }; 2456 - 2457 - static struct omap_hwmod_ocp_if *am35xx_aes_hwmod_ocp_ifs[] __initdata = { 2458 - /* &omap3xxx_l4_core__aes, */ 2459 - NULL, 2460 2502 }; 2461 2503 2462 2504 /* 3430ES1-only hwmod links */ ··· 2589 2641 { 2590 2642 int r; 2591 2643 struct omap_hwmod_ocp_if **h = NULL, **h_sham = NULL; 2592 - struct omap_hwmod_ocp_if **h_aes = NULL; 2593 2644 struct device_node *bus; 2594 2645 unsigned int rev; 2595 2646 ··· 2611 2664 rev == OMAP3430_REV_ES3_1 || rev == OMAP3430_REV_ES3_1_2) { 2612 2665 h = omap34xx_hwmod_ocp_ifs; 2613 2666 h_sham = omap34xx_sham_hwmod_ocp_ifs; 2614 - h_aes = omap34xx_aes_hwmod_ocp_ifs; 2615 2667 } else if (rev == AM35XX_REV_ES1_0 || rev == AM35XX_REV_ES1_1) { 2616 2668 h = am35xx_hwmod_ocp_ifs; 2617 2669 h_sham = am35xx_sham_hwmod_ocp_ifs; 2618 - h_aes = am35xx_aes_hwmod_ocp_ifs; 2619 2670 } else if (rev == OMAP3630_REV_ES1_0 || rev == OMAP3630_REV_ES1_1 || 2620 2671 rev == OMAP3630_REV_ES1_2) { 2621 2672 h = omap36xx_hwmod_ocp_ifs; 2622 2673 h_sham = omap36xx_sham_hwmod_ocp_ifs; 2623 - h_aes = omap36xx_aes_hwmod_ocp_ifs; 2624 2674 } else { 2625 2675 WARN(1, "OMAP3 hwmod family init: unknown chip type\n"); 2626 2676 return -EINVAL; ··· 2640 2696 goto put_node; 2641 2697 } 2642 2698 2643 - if (h_aes && omap3xxx_hwmod_is_hs_ip_block_usable(bus, "aes")) { 2644 - r = omap_hwmod_register_links(h_aes); 2645 - if (r < 0) 2646 - goto put_node; 2647 - } 2648 2699 of_node_put(bus); 2649 2700 2650 2701 /*
-59
arch/arm/mach-omap2/omap_hwmod_43xx_data.c
··· 85 85 }, 86 86 }; 87 87 88 - static struct omap_hwmod_class_sysconfig am43xx_usb_otg_ss_sysc = { 89 - .rev_offs = 0x0000, 90 - .sysc_offs = 0x0010, 91 - .sysc_flags = (SYSC_HAS_DMADISABLE | SYSC_HAS_MIDLEMODE | 92 - SYSC_HAS_SIDLEMODE), 93 - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | 94 - SIDLE_SMART_WKUP | MSTANDBY_FORCE | 95 - MSTANDBY_NO | MSTANDBY_SMART | 96 - MSTANDBY_SMART_WKUP), 97 - .sysc_fields = &omap_hwmod_sysc_type2, 98 - }; 99 - 100 - static struct omap_hwmod_class am43xx_usb_otg_ss_hwmod_class = { 101 - .name = "usb_otg_ss", 102 - .sysc = &am43xx_usb_otg_ss_sysc, 103 - }; 104 - 105 - static struct omap_hwmod am43xx_usb_otg_ss0_hwmod = { 106 - .name = "usb_otg_ss0", 107 - .class = &am43xx_usb_otg_ss_hwmod_class, 108 - .clkdm_name = "l3s_clkdm", 109 - .main_clk = "l3s_gclk", 110 - .prcm = { 111 - .omap4 = { 112 - .clkctrl_offs = AM43XX_CM_PER_USB_OTG_SS0_CLKCTRL_OFFSET, 113 - .modulemode = MODULEMODE_SWCTRL, 114 - }, 115 - }, 116 - }; 117 - 118 - static struct omap_hwmod am43xx_usb_otg_ss1_hwmod = { 119 - .name = "usb_otg_ss1", 120 - .class = &am43xx_usb_otg_ss_hwmod_class, 121 - .clkdm_name = "l3s_clkdm", 122 - .main_clk = "l3s_gclk", 123 - .prcm = { 124 - .omap4 = { 125 - .clkctrl_offs = AM43XX_CM_PER_USB_OTG_SS1_CLKCTRL_OFFSET, 126 - .modulemode = MODULEMODE_SWCTRL, 127 - }, 128 - }, 129 - }; 130 - 131 88 /* Interfaces */ 132 89 static struct omap_hwmod_ocp_if am43xx_l3_main__emif = { 133 90 .master = &am33xx_l3_main_hwmod, ··· 135 178 .user = OCP_USER_MPU, 136 179 }; 137 180 138 - static struct omap_hwmod_ocp_if am43xx_l3_s__usbotgss0 = { 139 - .master = &am33xx_l3_s_hwmod, 140 - .slave = &am43xx_usb_otg_ss0_hwmod, 141 - .clk = "l3s_gclk", 142 - .user = OCP_USER_MPU | OCP_USER_SDMA, 143 - }; 144 - 145 - static struct omap_hwmod_ocp_if am43xx_l3_s__usbotgss1 = { 146 - .master = &am33xx_l3_s_hwmod, 147 - .slave = &am43xx_usb_otg_ss1_hwmod, 148 - .clk = "l3s_gclk", 149 - .user = OCP_USER_MPU | OCP_USER_SDMA, 150 - }; 151 - 152 181 static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = { 153 182 &am33xx_mpu__l3_main, 154 183 &am33xx_mpu__prcm, ··· 154 211 &am43xx_l4_wkup__smartreflex1, 155 212 &am33xx_l3_s__gpmc, 156 213 &am33xx_l3_main__ocmc, 157 - &am43xx_l3_s__usbotgss0, 158 - &am43xx_l3_s__usbotgss1, 159 214 NULL, 160 215 }; 161 216
-193
arch/arm/mach-omap2/omap_hwmod_44xx_data.c
··· 640 640 }; 641 641 642 642 /* 643 - * 'usb_host_fs' class 644 - * full-speed usb host controller 645 - */ 646 - 647 - /* The IP is not compliant to type1 / type2 scheme */ 648 - static struct omap_hwmod_class_sysconfig omap44xx_usb_host_fs_sysc = { 649 - .rev_offs = 0x0000, 650 - .sysc_offs = 0x0210, 651 - .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE | 652 - SYSC_HAS_SOFTRESET), 653 - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | 654 - SIDLE_SMART_WKUP), 655 - .sysc_fields = &omap_hwmod_sysc_type_usb_host_fs, 656 - }; 657 - 658 - static struct omap_hwmod_class omap44xx_usb_host_fs_hwmod_class = { 659 - .name = "usb_host_fs", 660 - .sysc = &omap44xx_usb_host_fs_sysc, 661 - }; 662 - 663 - /* usb_host_fs */ 664 - static struct omap_hwmod omap44xx_usb_host_fs_hwmod = { 665 - .name = "usb_host_fs", 666 - .class = &omap44xx_usb_host_fs_hwmod_class, 667 - .clkdm_name = "l3_init_clkdm", 668 - .main_clk = "usb_host_fs_fck", 669 - .prcm = { 670 - .omap4 = { 671 - .clkctrl_offs = OMAP4_CM_L3INIT_USB_HOST_FS_CLKCTRL_OFFSET, 672 - .context_offs = OMAP4_RM_L3INIT_USB_HOST_FS_CONTEXT_OFFSET, 673 - .modulemode = MODULEMODE_SWCTRL, 674 - }, 675 - }, 676 - }; 677 - 678 - /* 679 - * 'usb_host_hs' class 680 - * high-speed multi-port usb host controller 681 - */ 682 - 683 - static struct omap_hwmod_class_sysconfig omap44xx_usb_host_hs_sysc = { 684 - .rev_offs = 0x0000, 685 - .sysc_offs = 0x0010, 686 - .syss_offs = 0x0014, 687 - .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE | 688 - SYSC_HAS_SOFTRESET | SYSC_HAS_RESET_STATUS), 689 - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | 690 - SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO | 691 - MSTANDBY_SMART | MSTANDBY_SMART_WKUP), 692 - .sysc_fields = &omap_hwmod_sysc_type2, 693 - }; 694 - 695 - static struct omap_hwmod_class omap44xx_usb_host_hs_hwmod_class = { 696 - .name = "usb_host_hs", 697 - .sysc = &omap44xx_usb_host_hs_sysc, 698 - }; 699 - 700 - /* usb_host_hs */ 701 - static struct omap_hwmod omap44xx_usb_host_hs_hwmod = { 702 - .name = "usb_host_hs", 703 - .class = &omap44xx_usb_host_hs_hwmod_class, 704 - .clkdm_name = "l3_init_clkdm", 705 - .main_clk = "usb_host_hs_fck", 706 - .prcm = { 707 - .omap4 = { 708 - .clkctrl_offs = OMAP4_CM_L3INIT_USB_HOST_CLKCTRL_OFFSET, 709 - .context_offs = OMAP4_RM_L3INIT_USB_HOST_CONTEXT_OFFSET, 710 - .modulemode = MODULEMODE_SWCTRL, 711 - }, 712 - }, 713 - 714 - /* 715 - * Errata: USBHOST Configured In Smart-Idle Can Lead To a Deadlock 716 - * id: i660 717 - * 718 - * Description: 719 - * In the following configuration : 720 - * - USBHOST module is set to smart-idle mode 721 - * - PRCM asserts idle_req to the USBHOST module ( This typically 722 - * happens when the system is going to a low power mode : all ports 723 - * have been suspended, the master part of the USBHOST module has 724 - * entered the standby state, and SW has cut the functional clocks) 725 - * - an USBHOST interrupt occurs before the module is able to answer 726 - * idle_ack, typically a remote wakeup IRQ. 727 - * Then the USB HOST module will enter a deadlock situation where it 728 - * is no more accessible nor functional. 729 - * 730 - * Workaround: 731 - * Don't use smart idle; use only force idle, hence HWMOD_SWSUP_SIDLE 732 - */ 733 - 734 - /* 735 - * Errata: USB host EHCI may stall when entering smart-standby mode 736 - * Id: i571 737 - * 738 - * Description: 739 - * When the USBHOST module is set to smart-standby mode, and when it is 740 - * ready to enter the standby state (i.e. all ports are suspended and 741 - * all attached devices are in suspend mode), then it can wrongly assert 742 - * the Mstandby signal too early while there are still some residual OCP 743 - * transactions ongoing. If this condition occurs, the internal state 744 - * machine may go to an undefined state and the USB link may be stuck 745 - * upon the next resume. 746 - * 747 - * Workaround: 748 - * Don't use smart standby; use only force standby, 749 - * hence HWMOD_SWSUP_MSTANDBY 750 - */ 751 - 752 - .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, 753 - }; 754 - 755 - /* 756 - * 'usb_tll_hs' class 757 - * usb_tll_hs module is the adapter on the usb_host_hs ports 758 - */ 759 - 760 - static struct omap_hwmod_class_sysconfig omap44xx_usb_tll_hs_sysc = { 761 - .rev_offs = 0x0000, 762 - .sysc_offs = 0x0010, 763 - .syss_offs = 0x0014, 764 - .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | 765 - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | 766 - SYSC_HAS_AUTOIDLE), 767 - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), 768 - .sysc_fields = &omap_hwmod_sysc_type1, 769 - }; 770 - 771 - static struct omap_hwmod_class omap44xx_usb_tll_hs_hwmod_class = { 772 - .name = "usb_tll_hs", 773 - .sysc = &omap44xx_usb_tll_hs_sysc, 774 - }; 775 - 776 - static struct omap_hwmod omap44xx_usb_tll_hs_hwmod = { 777 - .name = "usb_tll_hs", 778 - .class = &omap44xx_usb_tll_hs_hwmod_class, 779 - .clkdm_name = "l3_init_clkdm", 780 - .main_clk = "usb_tll_hs_ick", 781 - .prcm = { 782 - .omap4 = { 783 - .clkctrl_offs = OMAP4_CM_L3INIT_USB_TLL_CLKCTRL_OFFSET, 784 - .context_offs = OMAP4_RM_L3INIT_USB_TLL_CONTEXT_OFFSET, 785 - .modulemode = MODULEMODE_HWCTRL, 786 - }, 787 - }, 788 - }; 789 - 790 - /* 791 643 * interfaces 792 644 */ 793 645 ··· 744 892 .master = &omap44xx_l4_cfg_hwmod, 745 893 .slave = &omap44xx_l3_main_2_hwmod, 746 894 .clk = "l4_div_ck", 747 - .user = OCP_USER_MPU | OCP_USER_SDMA, 748 - }; 749 - 750 - /* usb_host_fs -> l3_main_2 */ 751 - static struct omap_hwmod_ocp_if __maybe_unused omap44xx_usb_host_fs__l3_main_2 = { 752 - .master = &omap44xx_usb_host_fs_hwmod, 753 - .slave = &omap44xx_l3_main_2_hwmod, 754 - .clk = "l3_div_ck", 755 - .user = OCP_USER_MPU | OCP_USER_SDMA, 756 - }; 757 - 758 - /* usb_host_hs -> l3_main_2 */ 759 - static struct omap_hwmod_ocp_if omap44xx_usb_host_hs__l3_main_2 = { 760 - .master = &omap44xx_usb_host_hs_hwmod, 761 - .slave = &omap44xx_l3_main_2_hwmod, 762 - .clk = "l3_div_ck", 763 895 .user = OCP_USER_MPU | OCP_USER_SDMA, 764 896 }; 765 897 ··· 955 1119 .user = OCP_USER_MPU | OCP_USER_SDMA, 956 1120 }; 957 1121 958 - /* l4_cfg -> usb_host_fs */ 959 - static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l4_cfg__usb_host_fs = { 960 - .master = &omap44xx_l4_cfg_hwmod, 961 - .slave = &omap44xx_usb_host_fs_hwmod, 962 - .clk = "l4_div_ck", 963 - .user = OCP_USER_MPU | OCP_USER_SDMA, 964 - }; 965 - 966 - /* l4_cfg -> usb_host_hs */ 967 - static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_host_hs = { 968 - .master = &omap44xx_l4_cfg_hwmod, 969 - .slave = &omap44xx_usb_host_hs_hwmod, 970 - .clk = "l4_div_ck", 971 - .user = OCP_USER_MPU | OCP_USER_SDMA, 972 - }; 973 - 974 - /* l4_cfg -> usb_tll_hs */ 975 - static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_tll_hs = { 976 - .master = &omap44xx_l4_cfg_hwmod, 977 - .slave = &omap44xx_usb_tll_hs_hwmod, 978 - .clk = "l4_div_ck", 979 - .user = OCP_USER_MPU | OCP_USER_SDMA, 980 - }; 981 - 982 1122 /* mpu -> emif1 */ 983 1123 static struct omap_hwmod_ocp_if omap44xx_mpu__emif1 = { 984 1124 .master = &omap44xx_mpu_hwmod, ··· 985 1173 &omap44xx_iva__l3_main_2, 986 1174 &omap44xx_l3_main_1__l3_main_2, 987 1175 &omap44xx_l4_cfg__l3_main_2, 988 - /* &omap44xx_usb_host_fs__l3_main_2, */ 989 - &omap44xx_usb_host_hs__l3_main_2, 990 1176 &omap44xx_l3_main_1__l3_main_3, 991 1177 &omap44xx_l3_main_2__l3_main_3, 992 1178 &omap44xx_l4_cfg__l3_main_3, ··· 1011 1201 &omap44xx_l4_wkup__prm, 1012 1202 &omap44xx_l4_wkup__scrm, 1013 1203 /* &omap44xx_l3_main_2__sl2if, */ 1014 - /* &omap44xx_l4_cfg__usb_host_fs, */ 1015 - &omap44xx_l4_cfg__usb_host_hs, 1016 - &omap44xx_l4_cfg__usb_tll_hs, 1017 1204 &omap44xx_mpu__emif1, 1018 1205 &omap44xx_mpu__emif2, 1019 1206 NULL,
-179
arch/arm/mach-omap2/omap_hwmod_54xx_data.c
··· 267 267 }; 268 268 269 269 /* 270 - * 'usb_host_hs' class 271 - * high-speed multi-port usb host controller 272 - */ 273 - 274 - static struct omap_hwmod_class_sysconfig omap54xx_usb_host_hs_sysc = { 275 - .rev_offs = 0x0000, 276 - .sysc_offs = 0x0010, 277 - .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_RESET_STATUS | 278 - SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), 279 - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | 280 - SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO | 281 - MSTANDBY_SMART | MSTANDBY_SMART_WKUP), 282 - .sysc_fields = &omap_hwmod_sysc_type2, 283 - }; 284 - 285 - static struct omap_hwmod_class omap54xx_usb_host_hs_hwmod_class = { 286 - .name = "usb_host_hs", 287 - .sysc = &omap54xx_usb_host_hs_sysc, 288 - }; 289 - 290 - static struct omap_hwmod omap54xx_usb_host_hs_hwmod = { 291 - .name = "usb_host_hs", 292 - .class = &omap54xx_usb_host_hs_hwmod_class, 293 - .clkdm_name = "l3init_clkdm", 294 - /* 295 - * Errata: USBHOST Configured In Smart-Idle Can Lead To a Deadlock 296 - * id: i660 297 - * 298 - * Description: 299 - * In the following configuration : 300 - * - USBHOST module is set to smart-idle mode 301 - * - PRCM asserts idle_req to the USBHOST module ( This typically 302 - * happens when the system is going to a low power mode : all ports 303 - * have been suspended, the master part of the USBHOST module has 304 - * entered the standby state, and SW has cut the functional clocks) 305 - * - an USBHOST interrupt occurs before the module is able to answer 306 - * idle_ack, typically a remote wakeup IRQ. 307 - * Then the USB HOST module will enter a deadlock situation where it 308 - * is no more accessible nor functional. 309 - * 310 - * Workaround: 311 - * Don't use smart idle; use only force idle, hence HWMOD_SWSUP_SIDLE 312 - */ 313 - 314 - /* 315 - * Errata: USB host EHCI may stall when entering smart-standby mode 316 - * Id: i571 317 - * 318 - * Description: 319 - * When the USBHOST module is set to smart-standby mode, and when it is 320 - * ready to enter the standby state (i.e. all ports are suspended and 321 - * all attached devices are in suspend mode), then it can wrongly assert 322 - * the Mstandby signal too early while there are still some residual OCP 323 - * transactions ongoing. If this condition occurs, the internal state 324 - * machine may go to an undefined state and the USB link may be stuck 325 - * upon the next resume. 326 - * 327 - * Workaround: 328 - * Don't use smart standby; use only force standby, 329 - * hence HWMOD_SWSUP_MSTANDBY 330 - */ 331 - 332 - .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, 333 - .main_clk = "l3init_60m_fclk", 334 - .prcm = { 335 - .omap4 = { 336 - .clkctrl_offs = OMAP54XX_CM_L3INIT_USB_HOST_HS_CLKCTRL_OFFSET, 337 - .context_offs = OMAP54XX_RM_L3INIT_USB_HOST_HS_CONTEXT_OFFSET, 338 - .modulemode = MODULEMODE_SWCTRL, 339 - }, 340 - }, 341 - }; 342 - 343 - /* 344 - * 'usb_tll_hs' class 345 - * usb_tll_hs module is the adapter on the usb_host_hs ports 346 - */ 347 - 348 - static struct omap_hwmod_class_sysconfig omap54xx_usb_tll_hs_sysc = { 349 - .rev_offs = 0x0000, 350 - .sysc_offs = 0x0010, 351 - .syss_offs = 0x0014, 352 - .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY | 353 - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | 354 - SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS), 355 - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), 356 - .sysc_fields = &omap_hwmod_sysc_type1, 357 - }; 358 - 359 - static struct omap_hwmod_class omap54xx_usb_tll_hs_hwmod_class = { 360 - .name = "usb_tll_hs", 361 - .sysc = &omap54xx_usb_tll_hs_sysc, 362 - }; 363 - 364 - static struct omap_hwmod omap54xx_usb_tll_hs_hwmod = { 365 - .name = "usb_tll_hs", 366 - .class = &omap54xx_usb_tll_hs_hwmod_class, 367 - .clkdm_name = "l3init_clkdm", 368 - .main_clk = "l4_root_clk_div", 369 - .prcm = { 370 - .omap4 = { 371 - .clkctrl_offs = OMAP54XX_CM_L3INIT_USB_TLL_HS_CLKCTRL_OFFSET, 372 - .context_offs = OMAP54XX_RM_L3INIT_USB_TLL_HS_CONTEXT_OFFSET, 373 - .modulemode = MODULEMODE_HWCTRL, 374 - }, 375 - }, 376 - }; 377 - 378 - /* 379 - * 'usb_otg_ss' class 380 - * 2.0 super speed (usb_otg_ss) controller 381 - */ 382 - 383 - static struct omap_hwmod_class_sysconfig omap54xx_usb_otg_ss_sysc = { 384 - .rev_offs = 0x0000, 385 - .sysc_offs = 0x0010, 386 - .sysc_flags = (SYSC_HAS_DMADISABLE | SYSC_HAS_MIDLEMODE | 387 - SYSC_HAS_SIDLEMODE), 388 - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | 389 - SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO | 390 - MSTANDBY_SMART | MSTANDBY_SMART_WKUP), 391 - .sysc_fields = &omap_hwmod_sysc_type2, 392 - }; 393 - 394 - static struct omap_hwmod_class omap54xx_usb_otg_ss_hwmod_class = { 395 - .name = "usb_otg_ss", 396 - .sysc = &omap54xx_usb_otg_ss_sysc, 397 - }; 398 - 399 - /* usb_otg_ss */ 400 - static struct omap_hwmod_opt_clk usb_otg_ss_opt_clks[] = { 401 - { .role = "refclk960m", .clk = "usb_otg_ss_refclk960m" }, 402 - }; 403 - 404 - static struct omap_hwmod omap54xx_usb_otg_ss_hwmod = { 405 - .name = "usb_otg_ss", 406 - .class = &omap54xx_usb_otg_ss_hwmod_class, 407 - .clkdm_name = "l3init_clkdm", 408 - .flags = HWMOD_SWSUP_SIDLE, 409 - .main_clk = "dpll_core_h13x2_ck", 410 - .prcm = { 411 - .omap4 = { 412 - .clkctrl_offs = OMAP54XX_CM_L3INIT_USB_OTG_SS_CLKCTRL_OFFSET, 413 - .context_offs = OMAP54XX_RM_L3INIT_USB_OTG_SS_CONTEXT_OFFSET, 414 - .modulemode = MODULEMODE_HWCTRL, 415 - }, 416 - }, 417 - .opt_clks = usb_otg_ss_opt_clks, 418 - .opt_clks_cnt = ARRAY_SIZE(usb_otg_ss_opt_clks), 419 - }; 420 - 421 - /* 422 270 * 'sata' class 423 271 * sata: serial ata interface gen2 compliant ( 1 rx/ 1 tx) 424 272 */ ··· 467 619 .user = OCP_USER_MPU | OCP_USER_SDMA, 468 620 }; 469 621 470 - /* l4_cfg -> usb_host_hs */ 471 - static struct omap_hwmod_ocp_if omap54xx_l4_cfg__usb_host_hs = { 472 - .master = &omap54xx_l4_cfg_hwmod, 473 - .slave = &omap54xx_usb_host_hs_hwmod, 474 - .clk = "l3_iclk_div", 475 - .user = OCP_USER_MPU | OCP_USER_SDMA, 476 - }; 477 - 478 - /* l4_cfg -> usb_tll_hs */ 479 - static struct omap_hwmod_ocp_if omap54xx_l4_cfg__usb_tll_hs = { 480 - .master = &omap54xx_l4_cfg_hwmod, 481 - .slave = &omap54xx_usb_tll_hs_hwmod, 482 - .clk = "l4_root_clk_div", 483 - .user = OCP_USER_MPU | OCP_USER_SDMA, 484 - }; 485 - 486 - /* l4_cfg -> usb_otg_ss */ 487 - static struct omap_hwmod_ocp_if omap54xx_l4_cfg__usb_otg_ss = { 488 - .master = &omap54xx_l4_cfg_hwmod, 489 - .slave = &omap54xx_usb_otg_ss_hwmod, 490 - .clk = "dpll_core_h13x2_ck", 491 - .user = OCP_USER_MPU | OCP_USER_SDMA, 492 - }; 493 - 494 622 static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = { 495 623 &omap54xx_l3_main_1__dmm, 496 624 &omap54xx_l3_main_3__l3_instr, ··· 487 663 &omap54xx_mpu__emif1, 488 664 &omap54xx_mpu__emif2, 489 665 &omap54xx_l4_cfg__mpu, 490 - &omap54xx_l4_cfg__usb_host_hs, 491 - &omap54xx_l4_cfg__usb_tll_hs, 492 - &omap54xx_l4_cfg__usb_otg_ss, 493 666 &omap54xx_l4_cfg__sata, 494 667 NULL, 495 668 };
+2 -153
arch/arm/mach-omap2/omap_hwmod_7xx_data.c
··· 492 492 }; 493 493 494 494 /* 495 - * 'usb_otg_ss' class 496 - * 497 - */ 498 - 499 - static struct omap_hwmod_class_sysconfig dra7xx_usb_otg_ss_sysc = { 500 - .rev_offs = 0x0000, 501 - .sysc_offs = 0x0010, 502 - .sysc_flags = (SYSC_HAS_DMADISABLE | SYSC_HAS_MIDLEMODE | 503 - SYSC_HAS_SIDLEMODE), 504 - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | 505 - SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO | 506 - MSTANDBY_SMART | MSTANDBY_SMART_WKUP), 507 - .sysc_fields = &omap_hwmod_sysc_type2, 508 - }; 509 - 510 - static struct omap_hwmod_class dra7xx_usb_otg_ss_hwmod_class = { 511 - .name = "usb_otg_ss", 512 - .sysc = &dra7xx_usb_otg_ss_sysc, 513 - }; 514 - 515 - /* usb_otg_ss1 */ 516 - static struct omap_hwmod_opt_clk usb_otg_ss1_opt_clks[] = { 517 - { .role = "refclk960m", .clk = "usb_otg_ss1_refclk960m" }, 518 - }; 519 - 520 - static struct omap_hwmod dra7xx_usb_otg_ss1_hwmod = { 521 - .name = "usb_otg_ss1", 522 - .class = &dra7xx_usb_otg_ss_hwmod_class, 523 - .clkdm_name = "l3init_clkdm", 524 - .main_clk = "dpll_core_h13x2_ck", 525 - .flags = HWMOD_CLKDM_NOAUTO, 526 - .prcm = { 527 - .omap4 = { 528 - .clkctrl_offs = DRA7XX_CM_L3INIT_USB_OTG_SS1_CLKCTRL_OFFSET, 529 - .context_offs = DRA7XX_RM_L3INIT_USB_OTG_SS1_CONTEXT_OFFSET, 530 - .modulemode = MODULEMODE_HWCTRL, 531 - }, 532 - }, 533 - .opt_clks = usb_otg_ss1_opt_clks, 534 - .opt_clks_cnt = ARRAY_SIZE(usb_otg_ss1_opt_clks), 535 - }; 536 - 537 - /* usb_otg_ss2 */ 538 - static struct omap_hwmod_opt_clk usb_otg_ss2_opt_clks[] = { 539 - { .role = "refclk960m", .clk = "usb_otg_ss2_refclk960m" }, 540 - }; 541 - 542 - static struct omap_hwmod dra7xx_usb_otg_ss2_hwmod = { 543 - .name = "usb_otg_ss2", 544 - .class = &dra7xx_usb_otg_ss_hwmod_class, 545 - .clkdm_name = "l3init_clkdm", 546 - .main_clk = "dpll_core_h13x2_ck", 547 - .flags = HWMOD_CLKDM_NOAUTO, 548 - .prcm = { 549 - .omap4 = { 550 - .clkctrl_offs = DRA7XX_CM_L3INIT_USB_OTG_SS2_CLKCTRL_OFFSET, 551 - .context_offs = DRA7XX_RM_L3INIT_USB_OTG_SS2_CONTEXT_OFFSET, 552 - .modulemode = MODULEMODE_HWCTRL, 553 - }, 554 - }, 555 - .opt_clks = usb_otg_ss2_opt_clks, 556 - .opt_clks_cnt = ARRAY_SIZE(usb_otg_ss2_opt_clks), 557 - }; 558 - 559 - /* usb_otg_ss3 */ 560 - static struct omap_hwmod dra7xx_usb_otg_ss3_hwmod = { 561 - .name = "usb_otg_ss3", 562 - .class = &dra7xx_usb_otg_ss_hwmod_class, 563 - .clkdm_name = "l3init_clkdm", 564 - .main_clk = "dpll_core_h13x2_ck", 565 - .prcm = { 566 - .omap4 = { 567 - .clkctrl_offs = DRA7XX_CM_L3INIT_USB_OTG_SS3_CLKCTRL_OFFSET, 568 - .context_offs = DRA7XX_RM_L3INIT_USB_OTG_SS3_CONTEXT_OFFSET, 569 - .modulemode = MODULEMODE_HWCTRL, 570 - }, 571 - }, 572 - }; 573 - 574 - /* usb_otg_ss4 */ 575 - static struct omap_hwmod dra7xx_usb_otg_ss4_hwmod = { 576 - .name = "usb_otg_ss4", 577 - .class = &dra7xx_usb_otg_ss_hwmod_class, 578 - .clkdm_name = "l3init_clkdm", 579 - .main_clk = "dpll_core_h13x2_ck", 580 - .prcm = { 581 - .omap4 = { 582 - .clkctrl_offs = DRA7XX_CM_L3INIT_USB_OTG_SS4_CLKCTRL_OFFSET, 583 - .context_offs = DRA7XX_RM_L3INIT_USB_OTG_SS4_CONTEXT_OFFSET, 584 - .modulemode = MODULEMODE_HWCTRL, 585 - }, 586 - }, 587 - }; 588 - 589 - /* 590 495 * 'vcp' class 591 496 * 592 497 */ ··· 718 813 .user = OCP_USER_MPU | OCP_USER_SDMA, 719 814 }; 720 815 721 - /* l4_per3 -> usb_otg_ss1 */ 722 - static struct omap_hwmod_ocp_if dra7xx_l4_per3__usb_otg_ss1 = { 723 - .master = &dra7xx_l4_per3_hwmod, 724 - .slave = &dra7xx_usb_otg_ss1_hwmod, 725 - .clk = "dpll_core_h13x2_ck", 726 - .user = OCP_USER_MPU | OCP_USER_SDMA, 727 - }; 728 - 729 - /* l4_per3 -> usb_otg_ss2 */ 730 - static struct omap_hwmod_ocp_if dra7xx_l4_per3__usb_otg_ss2 = { 731 - .master = &dra7xx_l4_per3_hwmod, 732 - .slave = &dra7xx_usb_otg_ss2_hwmod, 733 - .clk = "dpll_core_h13x2_ck", 734 - .user = OCP_USER_MPU | OCP_USER_SDMA, 735 - }; 736 - 737 - /* l4_per3 -> usb_otg_ss3 */ 738 - static struct omap_hwmod_ocp_if dra7xx_l4_per3__usb_otg_ss3 = { 739 - .master = &dra7xx_l4_per3_hwmod, 740 - .slave = &dra7xx_usb_otg_ss3_hwmod, 741 - .clk = "dpll_core_h13x2_ck", 742 - .user = OCP_USER_MPU | OCP_USER_SDMA, 743 - }; 744 - 745 - /* l4_per3 -> usb_otg_ss4 */ 746 - static struct omap_hwmod_ocp_if dra7xx_l4_per3__usb_otg_ss4 = { 747 - .master = &dra7xx_l4_per3_hwmod, 748 - .slave = &dra7xx_usb_otg_ss4_hwmod, 749 - .clk = "dpll_core_h13x2_ck", 750 - .user = OCP_USER_MPU | OCP_USER_SDMA, 751 - }; 752 - 753 816 /* l3_main_1 -> vcp1 */ 754 817 static struct omap_hwmod_ocp_if dra7xx_l3_main_1__vcp1 = { 755 818 .master = &dra7xx_l3_main_1_hwmod, ··· 773 900 &dra7xx_l4_cfg__pciess2, 774 901 &dra7xx_l3_main_1__qspi, 775 902 &dra7xx_l4_cfg__sata, 776 - &dra7xx_l4_per3__usb_otg_ss1, 777 - &dra7xx_l4_per3__usb_otg_ss2, 778 - &dra7xx_l4_per3__usb_otg_ss3, 779 903 &dra7xx_l3_main_1__vcp1, 780 904 &dra7xx_l4_per2__vcp1, 781 905 &dra7xx_l3_main_1__vcp2, ··· 781 911 }; 782 912 783 913 /* SoC variant specific hwmod links */ 784 - static struct omap_hwmod_ocp_if *dra76x_hwmod_ocp_ifs[] __initdata = { 785 - &dra7xx_l4_per3__usb_otg_ss4, 786 - NULL, 787 - }; 788 - 789 - static struct omap_hwmod_ocp_if *acd_76x_hwmod_ocp_ifs[] __initdata = { 790 - NULL, 791 - }; 792 - 793 - static struct omap_hwmod_ocp_if *dra74x_hwmod_ocp_ifs[] __initdata = { 794 - &dra7xx_l4_per3__usb_otg_ss4, 795 - NULL, 796 - }; 797 - 798 914 static struct omap_hwmod_ocp_if *dra72x_hwmod_ocp_ifs[] __initdata = { 799 915 NULL, 800 916 }; ··· 798 942 ret = omap_hwmod_register_links(dra7xx_hwmod_ocp_ifs); 799 943 800 944 if (!ret && soc_is_dra74x()) { 801 - ret = omap_hwmod_register_links(dra74x_hwmod_ocp_ifs); 802 - if (!ret) 803 - ret = omap_hwmod_register_links(rtc_hwmod_ocp_ifs); 945 + ret = omap_hwmod_register_links(rtc_hwmod_ocp_ifs); 804 946 } else if (!ret && soc_is_dra72x()) { 805 947 ret = omap_hwmod_register_links(dra72x_hwmod_ocp_ifs); 806 948 if (!ret && !of_machine_is_compatible("ti,dra718")) 807 949 ret = omap_hwmod_register_links(rtc_hwmod_ocp_ifs); 808 950 } else if (!ret && soc_is_dra76x()) { 809 - ret = omap_hwmod_register_links(dra76x_hwmod_ocp_ifs); 810 - 811 - if (!ret && soc_is_dra76x_acd()) { 812 - ret = omap_hwmod_register_links(acd_76x_hwmod_ocp_ifs); 813 - } else if (!ret && soc_is_dra76x_abz()) { 951 + if (!ret && soc_is_dra76x_abz()) 814 952 ret = omap_hwmod_register_links(rtc_hwmod_ocp_ifs); 815 - } 816 953 } 817 954 818 955 return ret;
+4 -2
drivers/bus/ti-sysc.c
··· 1330 1330 SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY), 1331 1331 SYSC_QUIRK("tptc", 0, 0, -ENODEV, -ENODEV, 0x40007c00, 0xffffffff, 1332 1332 SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY), 1333 + SYSC_QUIRK("usb_host_hs", 0, 0, 0x10, 0x14, 0x50700100, 0xffffffff, 1334 + SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY), 1335 + SYSC_QUIRK("usb_host_hs", 0, 0, 0x10, -ENODEV, 0x50700101, 0xffffffff, 1336 + SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY), 1333 1337 SYSC_QUIRK("usb_otg_hs", 0, 0x400, 0x404, 0x408, 0x00000050, 1334 1338 0xffffffff, SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY), 1335 1339 SYSC_QUIRK("usb_otg_hs", 0, 0, 0x10, -ENODEV, 0x4ea2080d, 0xffffffff, ··· 1412 1408 SYSC_QUIRK("tpcc", 0, 0, -ENODEV, -ENODEV, 0x40014c00, 0xffffffff, 0), 1413 1409 SYSC_QUIRK("usbhstll", 0, 0, 0x10, 0x14, 0x00000004, 0xffffffff, 0), 1414 1410 SYSC_QUIRK("usbhstll", 0, 0, 0x10, 0x14, 0x00000008, 0xffffffff, 0), 1415 - SYSC_QUIRK("usb_host_hs", 0, 0, 0x10, 0x14, 0x50700100, 0xffffffff, 0), 1416 - SYSC_QUIRK("usb_host_hs", 0, 0, 0x10, -ENODEV, 0x50700101, 0xffffffff, 0), 1417 1411 SYSC_QUIRK("venc", 0x58003000, 0, -ENODEV, -ENODEV, 0x00000002, 0xffffffff, 0), 1418 1412 SYSC_QUIRK("vfpe", 0, 0, 0x104, -ENODEV, 0x4d001200, 0xffffffff, 0), 1419 1413 #endif