Merge tag 'char-misc-6.12-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull misc driver fixes from Greg KH:
"Here are some small char/misc/iio fixes for 6.12-rc6 that resolve
some reported issues. Included in here are the following:

- small IIO driver fixes for many reported issues

- mei driver fix for a suddenly much reported issue for an "old"
issue.

- MAINTAINERS update for a developer who has moved companies and
forgot to update their old entry.

All of these have been in linux-next this week with no reported
issues"

* tag 'char-misc-6.12-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc:
mei: use kvmalloc for read buffer
MAINTAINERS: add netup_unidvb maintainer
iio: dac: Kconfig: Fix build error for ltc2664
iio: adc: ad7124: fix division by zero in ad7124_set_channel_odr()
staging: iio: frequency: ad9832: fix division by zero in ad9832_calc_freqreg()
docs: iio: ad7380: fix supply for ad7380-4
iio: adc: ad7380: fix supplies for ad7380-4
iio: adc: ad7380: add missing supplies
iio: adc: ad7380: use devm_regulator_get_enable_read_voltage()
dt-bindings: iio: adc: ad7380: fix ad7380-4 reference supply
iio: light: veml6030: fix microlux value calculation
iio: gts-helper: Fix memory leaks for the error path of iio_gts_build_avail_scale_table()
iio: gts-helper: Fix memory leaks in iio_gts_build_avail_scale_table()

+177 -68
+21
Documentation/devicetree/bindings/iio/adc/adi,ad7380.yaml
··· 67 A 2.5V to 3.3V supply for the external reference voltage. When omitted, 68 the internal 2.5V reference is used. 69 70 aina-supply: 71 description: 72 The common mode voltage supply for the AINA- pin on pseudo-differential ··· 138 properties: 139 ainc-supply: false 140 aind-supply: false 141 142 examples: 143 - |
··· 67 A 2.5V to 3.3V supply for the external reference voltage. When omitted, 68 the internal 2.5V reference is used. 69 70 + refin-supply: 71 + description: 72 + A 2.5V to 3.3V supply for external reference voltage, for ad7380-4 only. 73 + 74 aina-supply: 75 description: 76 The common mode voltage supply for the AINA- pin on pseudo-differential ··· 134 properties: 135 ainc-supply: false 136 aind-supply: false 137 + 138 + # ad7380-4 uses refin-supply as external reference. 139 + # All other chips from ad738x family use refio as optional external reference. 140 + # When refio-supply is omitted, internal reference is used. 141 + - if: 142 + properties: 143 + compatible: 144 + enum: 145 + - adi,ad7380-4 146 + then: 147 + properties: 148 + refio-supply: false 149 + required: 150 + - refin-supply 151 + else: 152 + properties: 153 + refin-supply: false 154 155 examples: 156 - |
+11 -2
Documentation/iio/ad7380.rst
··· 41 Reference voltage 42 ----------------- 43 44 - 2 possible reference voltage sources are supported: 45 46 - Internal reference (2.5V) 47 - External reference (2.5V to 3.3V) 48 49 The source is determined by the device tree. If ``refio-supply`` is present, 50 - then the external reference is used, else the internal reference is used. 51 52 Oversampling and resolution boost 53 ---------------------------------
··· 41 Reference voltage 42 ----------------- 43 44 + ad7380-4 45 + ~~~~~~~~ 46 + 47 + ad7380-4 supports only an external reference voltage (2.5V to 3.3V). It must be 48 + declared in the device tree as ``refin-supply``. 49 + 50 + All other devices from ad738x family 51 + ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 52 + 53 + All other devices from ad738x support 2 possible reference voltage sources: 54 55 - Internal reference (2.5V) 56 - External reference (2.5V to 3.3V) 57 58 The source is determined by the device tree. If ``refio-supply`` is present, 59 + then it is used as external reference, else the internal reference is used. 60 61 Oversampling and resolution boost 62 ---------------------------------
+54
MAINTAINERS
··· 14141 T: git git://linuxtv.org/media_tree.git 14142 F: drivers/media/platform/nxp/imx-pxp.[ch] 14143 14144 MEDIA DRIVERS FOR CXD2099AR CI CONTROLLERS 14145 M: Jasmin Jessich <jasmin@anw.at> 14146 L: linux-media@vger.kernel.org ··· 14157 W: https://linuxtv.org 14158 T: git git://linuxtv.org/media_tree.git 14159 F: drivers/media/dvb-frontends/cxd2099* 14160 14161 MEDIA DRIVERS FOR CXD2880 14162 M: Yasunari Takiguchi <Yasunari.Takiguchi@sony.com> ··· 14211 F: drivers/media/platform/nxp/imx7-media-csi.c 14212 F: drivers/media/platform/nxp/imx8mq-mipi-csi2.c 14213 14214 MEDIA DRIVERS FOR MXL5XX TUNER DEMODULATORS 14215 L: linux-media@vger.kernel.org 14216 S: Orphan 14217 W: https://linuxtv.org 14218 T: git git://linuxtv.org/media_tree.git 14219 F: drivers/media/dvb-frontends/mxl5xx* 14220 14221 MEDIA DRIVERS FOR NVIDIA TEGRA - VDE 14222 M: Dmitry Osipenko <digetx@gmail.com>
··· 14141 T: git git://linuxtv.org/media_tree.git 14142 F: drivers/media/platform/nxp/imx-pxp.[ch] 14143 14144 + MEDIA DRIVERS FOR ASCOT2E 14145 + M: Abylay Ospan <aospan@amazon.com> 14146 + L: linux-media@vger.kernel.org 14147 + S: Supported 14148 + W: https://linuxtv.org 14149 + W: http://netup.tv/ 14150 + T: git git://linuxtv.org/media_tree.git 14151 + F: drivers/media/dvb-frontends/ascot2e* 14152 + 14153 MEDIA DRIVERS FOR CXD2099AR CI CONTROLLERS 14154 M: Jasmin Jessich <jasmin@anw.at> 14155 L: linux-media@vger.kernel.org ··· 14148 W: https://linuxtv.org 14149 T: git git://linuxtv.org/media_tree.git 14150 F: drivers/media/dvb-frontends/cxd2099* 14151 + 14152 + MEDIA DRIVERS FOR CXD2841ER 14153 + M: Abylay Ospan <aospan@amazon.com> 14154 + L: linux-media@vger.kernel.org 14155 + S: Supported 14156 + W: https://linuxtv.org 14157 + W: http://netup.tv/ 14158 + T: git git://linuxtv.org/media_tree.git 14159 + F: drivers/media/dvb-frontends/cxd2841er* 14160 14161 MEDIA DRIVERS FOR CXD2880 14162 M: Yasunari Takiguchi <Yasunari.Takiguchi@sony.com> ··· 14193 F: drivers/media/platform/nxp/imx7-media-csi.c 14194 F: drivers/media/platform/nxp/imx8mq-mipi-csi2.c 14195 14196 + MEDIA DRIVERS FOR HELENE 14197 + M: Abylay Ospan <aospan@amazon.com> 14198 + L: linux-media@vger.kernel.org 14199 + S: Supported 14200 + W: https://linuxtv.org 14201 + W: http://netup.tv/ 14202 + T: git git://linuxtv.org/media_tree.git 14203 + F: drivers/media/dvb-frontends/helene* 14204 + 14205 + MEDIA DRIVERS FOR HORUS3A 14206 + M: Abylay Ospan <aospan@amazon.com> 14207 + L: linux-media@vger.kernel.org 14208 + S: Supported 14209 + W: https://linuxtv.org 14210 + W: http://netup.tv/ 14211 + T: git git://linuxtv.org/media_tree.git 14212 + F: drivers/media/dvb-frontends/horus3a* 14213 + 14214 + MEDIA DRIVERS FOR LNBH25 14215 + M: Abylay Ospan <aospan@amazon.com> 14216 + L: linux-media@vger.kernel.org 14217 + S: Supported 14218 + W: https://linuxtv.org 14219 + W: http://netup.tv/ 14220 + T: git git://linuxtv.org/media_tree.git 14221 + F: drivers/media/dvb-frontends/lnbh25* 14222 + 14223 MEDIA DRIVERS FOR MXL5XX TUNER DEMODULATORS 14224 L: linux-media@vger.kernel.org 14225 S: Orphan 14226 W: https://linuxtv.org 14227 T: git git://linuxtv.org/media_tree.git 14228 F: drivers/media/dvb-frontends/mxl5xx* 14229 + 14230 + MEDIA DRIVERS FOR NETUP PCI UNIVERSAL DVB devices 14231 + M: Abylay Ospan <aospan@amazon.com> 14232 + L: linux-media@vger.kernel.org 14233 + S: Supported 14234 + W: https://linuxtv.org 14235 + W: http://netup.tv/ 14236 + T: git git://linuxtv.org/media_tree.git 14237 + F: drivers/media/pci/netup_unidvb/* 14238 14239 MEDIA DRIVERS FOR NVIDIA TEGRA - VDE 14240 M: Dmitry Osipenko <digetx@gmail.com>
+1 -1
drivers/iio/adc/ad7124.c
··· 637 638 switch (info) { 639 case IIO_CHAN_INFO_SAMP_FREQ: 640 - if (val2 != 0) { 641 ret = -EINVAL; 642 break; 643 }
··· 637 638 switch (info) { 639 case IIO_CHAN_INFO_SAMP_FREQ: 640 + if (val2 != 0 || val == 0) { 641 ret = -EINVAL; 642 break; 643 }
+78 -58
drivers/iio/adc/ad7380.c
··· 75 #define T_CONVERT_NS 190 /* conversion time */ 76 #define T_CONVERT_0_NS 10 /* 1st conversion start time (oversampling) */ 77 #define T_CONVERT_X_NS 500 /* xth conversion start time (oversampling) */ 78 79 struct ad7380_timing_specs { 80 const unsigned int t_csh_ns; /* CS minimum high time */ ··· 87 unsigned int num_channels; 88 unsigned int num_simult_channels; 89 bool has_mux; 90 const char * const *vcm_supplies; 91 unsigned int num_vcm_supplies; 92 const unsigned long *available_scan_masks; ··· 247 DEFINE_AD7380_8_CHANNEL(ad7387_4_channels, 14, 0, u); 248 DEFINE_AD7380_8_CHANNEL(ad7388_4_channels, 12, 0, u); 249 250 static const char * const ad7380_2_channel_vcm_supplies[] = { 251 "aina", "ainb", 252 }; ··· 346 .channels = ad7380_channels, 347 .num_channels = ARRAY_SIZE(ad7380_channels), 348 .num_simult_channels = 2, 349 .available_scan_masks = ad7380_2_channel_scan_masks, 350 .timing_specs = &ad7380_timing, 351 }; ··· 357 .channels = ad7381_channels, 358 .num_channels = ARRAY_SIZE(ad7381_channels), 359 .num_simult_channels = 2, 360 .available_scan_masks = ad7380_2_channel_scan_masks, 361 .timing_specs = &ad7380_timing, 362 }; ··· 368 .channels = ad7383_channels, 369 .num_channels = ARRAY_SIZE(ad7383_channels), 370 .num_simult_channels = 2, 371 .vcm_supplies = ad7380_2_channel_vcm_supplies, 372 .num_vcm_supplies = ARRAY_SIZE(ad7380_2_channel_vcm_supplies), 373 .available_scan_masks = ad7380_2_channel_scan_masks, ··· 381 .channels = ad7384_channels, 382 .num_channels = ARRAY_SIZE(ad7384_channels), 383 .num_simult_channels = 2, 384 .vcm_supplies = ad7380_2_channel_vcm_supplies, 385 .num_vcm_supplies = ARRAY_SIZE(ad7380_2_channel_vcm_supplies), 386 .available_scan_masks = ad7380_2_channel_scan_masks, ··· 394 .channels = ad7386_channels, 395 .num_channels = ARRAY_SIZE(ad7386_channels), 396 .num_simult_channels = 2, 397 .has_mux = true, 398 .available_scan_masks = ad7380_2x2_channel_scan_masks, 399 .timing_specs = &ad7380_timing, ··· 406 .channels = ad7387_channels, 407 .num_channels = ARRAY_SIZE(ad7387_channels), 408 .num_simult_channels = 2, 409 .has_mux = true, 410 .available_scan_masks = ad7380_2x2_channel_scan_masks, 411 .timing_specs = &ad7380_timing, ··· 418 .channels = ad7388_channels, 419 .num_channels = ARRAY_SIZE(ad7388_channels), 420 .num_simult_channels = 2, 421 .has_mux = true, 422 .available_scan_masks = ad7380_2x2_channel_scan_masks, 423 .timing_specs = &ad7380_timing, ··· 430 .channels = ad7380_4_channels, 431 .num_channels = ARRAY_SIZE(ad7380_4_channels), 432 .num_simult_channels = 4, 433 .available_scan_masks = ad7380_4_channel_scan_masks, 434 .timing_specs = &ad7380_4_timing, 435 }; ··· 442 .channels = ad7381_4_channels, 443 .num_channels = ARRAY_SIZE(ad7381_4_channels), 444 .num_simult_channels = 4, 445 .available_scan_masks = ad7380_4_channel_scan_masks, 446 .timing_specs = &ad7380_4_timing, 447 }; ··· 453 .channels = ad7383_4_channels, 454 .num_channels = ARRAY_SIZE(ad7383_4_channels), 455 .num_simult_channels = 4, 456 .vcm_supplies = ad7380_4_channel_vcm_supplies, 457 .num_vcm_supplies = ARRAY_SIZE(ad7380_4_channel_vcm_supplies), 458 .available_scan_masks = ad7380_4_channel_scan_masks, ··· 466 .channels = ad7384_4_channels, 467 .num_channels = ARRAY_SIZE(ad7384_4_channels), 468 .num_simult_channels = 4, 469 .vcm_supplies = ad7380_4_channel_vcm_supplies, 470 .num_vcm_supplies = ARRAY_SIZE(ad7380_4_channel_vcm_supplies), 471 .available_scan_masks = ad7380_4_channel_scan_masks, ··· 479 .channels = ad7386_4_channels, 480 .num_channels = ARRAY_SIZE(ad7386_4_channels), 481 .num_simult_channels = 4, 482 .has_mux = true, 483 .available_scan_masks = ad7380_2x4_channel_scan_masks, 484 .timing_specs = &ad7380_4_timing, ··· 491 .channels = ad7387_4_channels, 492 .num_channels = ARRAY_SIZE(ad7387_4_channels), 493 .num_simult_channels = 4, 494 .has_mux = true, 495 .available_scan_masks = ad7380_2x4_channel_scan_masks, 496 .timing_specs = &ad7380_4_timing, ··· 503 .channels = ad7388_4_channels, 504 .num_channels = ARRAY_SIZE(ad7388_4_channels), 505 .num_simult_channels = 4, 506 .has_mux = true, 507 .available_scan_masks = ad7380_2x4_channel_scan_masks, 508 .timing_specs = &ad7380_4_timing, ··· 993 .debugfs_reg_access = &ad7380_debugfs_reg_access, 994 }; 995 996 - static int ad7380_init(struct ad7380_state *st, struct regulator *vref) 997 { 998 int ret; 999 ··· 1005 if (ret < 0) 1006 return ret; 1007 1008 - /* select internal or external reference voltage */ 1009 - ret = regmap_update_bits(st->regmap, AD7380_REG_ADDR_CONFIG1, 1010 - AD7380_CONFIG1_REFSEL, 1011 - FIELD_PREP(AD7380_CONFIG1_REFSEL, 1012 - vref ? 1 : 0)); 1013 - if (ret < 0) 1014 - return ret; 1015 1016 /* This is the default value after reset. */ 1017 st->oversampling_ratio = 1; ··· 1024 FIELD_PREP(AD7380_CONFIG2_SDO, 1)); 1025 } 1026 1027 - static void ad7380_regulator_disable(void *p) 1028 - { 1029 - regulator_disable(p); 1030 - } 1031 - 1032 static int ad7380_probe(struct spi_device *spi) 1033 { 1034 struct iio_dev *indio_dev; 1035 struct ad7380_state *st; 1036 - struct regulator *vref; 1037 int ret, i; 1038 1039 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); ··· 1041 if (!st->chip_info) 1042 return dev_err_probe(&spi->dev, -EINVAL, "missing match data\n"); 1043 1044 - vref = devm_regulator_get_optional(&spi->dev, "refio"); 1045 - if (IS_ERR(vref)) { 1046 - if (PTR_ERR(vref) != -ENODEV) 1047 - return dev_err_probe(&spi->dev, PTR_ERR(vref), 1048 - "Failed to get refio regulator\n"); 1049 1050 - vref = NULL; 1051 - } 1052 1053 - /* 1054 - * If there is no REFIO supply, then it means that we are using 1055 - * the internal 2.5V reference, otherwise REFIO is reference voltage. 1056 - */ 1057 - if (vref) { 1058 - ret = regulator_enable(vref); 1059 - if (ret) 1060 - return ret; 1061 - 1062 - ret = devm_add_action_or_reset(&spi->dev, 1063 - ad7380_regulator_disable, vref); 1064 - if (ret) 1065 - return ret; 1066 - 1067 - ret = regulator_get_voltage(vref); 1068 if (ret < 0) 1069 - return ret; 1070 1071 st->vref_mv = ret / 1000; 1072 } else { 1073 - st->vref_mv = AD7380_INTERNAL_REF_MV; 1074 } 1075 1076 if (st->chip_info->num_vcm_supplies > ARRAY_SIZE(st->vcm_mv)) ··· 1084 * input pin. 1085 */ 1086 for (i = 0; i < st->chip_info->num_vcm_supplies; i++) { 1087 - struct regulator *vcm; 1088 1089 - vcm = devm_regulator_get(&spi->dev, 1090 - st->chip_info->vcm_supplies[i]); 1091 - if (IS_ERR(vcm)) 1092 - return dev_err_probe(&spi->dev, PTR_ERR(vcm), 1093 - "Failed to get %s regulator\n", 1094 - st->chip_info->vcm_supplies[i]); 1095 - 1096 - ret = regulator_enable(vcm); 1097 - if (ret) 1098 - return ret; 1099 - 1100 - ret = devm_add_action_or_reset(&spi->dev, 1101 - ad7380_regulator_disable, vcm); 1102 - if (ret) 1103 - return ret; 1104 - 1105 - ret = regulator_get_voltage(vcm); 1106 if (ret < 0) 1107 - return ret; 1108 1109 st->vcm_mv[i] = ret / 1000; 1110 } ··· 1155 if (ret) 1156 return ret; 1157 1158 - ret = ad7380_init(st, vref); 1159 if (ret) 1160 return ret; 1161
··· 75 #define T_CONVERT_NS 190 /* conversion time */ 76 #define T_CONVERT_0_NS 10 /* 1st conversion start time (oversampling) */ 77 #define T_CONVERT_X_NS 500 /* xth conversion start time (oversampling) */ 78 + #define T_POWERUP_US 5000 /* Power up */ 79 80 struct ad7380_timing_specs { 81 const unsigned int t_csh_ns; /* CS minimum high time */ ··· 86 unsigned int num_channels; 87 unsigned int num_simult_channels; 88 bool has_mux; 89 + const char * const *supplies; 90 + unsigned int num_supplies; 91 + bool external_ref_only; 92 const char * const *vcm_supplies; 93 unsigned int num_vcm_supplies; 94 const unsigned long *available_scan_masks; ··· 243 DEFINE_AD7380_8_CHANNEL(ad7387_4_channels, 14, 0, u); 244 DEFINE_AD7380_8_CHANNEL(ad7388_4_channels, 12, 0, u); 245 246 + static const char * const ad7380_supplies[] = { 247 + "vcc", "vlogic", 248 + }; 249 + 250 static const char * const ad7380_2_channel_vcm_supplies[] = { 251 "aina", "ainb", 252 }; ··· 338 .channels = ad7380_channels, 339 .num_channels = ARRAY_SIZE(ad7380_channels), 340 .num_simult_channels = 2, 341 + .supplies = ad7380_supplies, 342 + .num_supplies = ARRAY_SIZE(ad7380_supplies), 343 .available_scan_masks = ad7380_2_channel_scan_masks, 344 .timing_specs = &ad7380_timing, 345 }; ··· 347 .channels = ad7381_channels, 348 .num_channels = ARRAY_SIZE(ad7381_channels), 349 .num_simult_channels = 2, 350 + .supplies = ad7380_supplies, 351 + .num_supplies = ARRAY_SIZE(ad7380_supplies), 352 .available_scan_masks = ad7380_2_channel_scan_masks, 353 .timing_specs = &ad7380_timing, 354 }; ··· 356 .channels = ad7383_channels, 357 .num_channels = ARRAY_SIZE(ad7383_channels), 358 .num_simult_channels = 2, 359 + .supplies = ad7380_supplies, 360 + .num_supplies = ARRAY_SIZE(ad7380_supplies), 361 .vcm_supplies = ad7380_2_channel_vcm_supplies, 362 .num_vcm_supplies = ARRAY_SIZE(ad7380_2_channel_vcm_supplies), 363 .available_scan_masks = ad7380_2_channel_scan_masks, ··· 367 .channels = ad7384_channels, 368 .num_channels = ARRAY_SIZE(ad7384_channels), 369 .num_simult_channels = 2, 370 + .supplies = ad7380_supplies, 371 + .num_supplies = ARRAY_SIZE(ad7380_supplies), 372 .vcm_supplies = ad7380_2_channel_vcm_supplies, 373 .num_vcm_supplies = ARRAY_SIZE(ad7380_2_channel_vcm_supplies), 374 .available_scan_masks = ad7380_2_channel_scan_masks, ··· 378 .channels = ad7386_channels, 379 .num_channels = ARRAY_SIZE(ad7386_channels), 380 .num_simult_channels = 2, 381 + .supplies = ad7380_supplies, 382 + .num_supplies = ARRAY_SIZE(ad7380_supplies), 383 .has_mux = true, 384 .available_scan_masks = ad7380_2x2_channel_scan_masks, 385 .timing_specs = &ad7380_timing, ··· 388 .channels = ad7387_channels, 389 .num_channels = ARRAY_SIZE(ad7387_channels), 390 .num_simult_channels = 2, 391 + .supplies = ad7380_supplies, 392 + .num_supplies = ARRAY_SIZE(ad7380_supplies), 393 .has_mux = true, 394 .available_scan_masks = ad7380_2x2_channel_scan_masks, 395 .timing_specs = &ad7380_timing, ··· 398 .channels = ad7388_channels, 399 .num_channels = ARRAY_SIZE(ad7388_channels), 400 .num_simult_channels = 2, 401 + .supplies = ad7380_supplies, 402 + .num_supplies = ARRAY_SIZE(ad7380_supplies), 403 .has_mux = true, 404 .available_scan_masks = ad7380_2x2_channel_scan_masks, 405 .timing_specs = &ad7380_timing, ··· 408 .channels = ad7380_4_channels, 409 .num_channels = ARRAY_SIZE(ad7380_4_channels), 410 .num_simult_channels = 4, 411 + .supplies = ad7380_supplies, 412 + .num_supplies = ARRAY_SIZE(ad7380_supplies), 413 + .external_ref_only = true, 414 .available_scan_masks = ad7380_4_channel_scan_masks, 415 .timing_specs = &ad7380_4_timing, 416 }; ··· 417 .channels = ad7381_4_channels, 418 .num_channels = ARRAY_SIZE(ad7381_4_channels), 419 .num_simult_channels = 4, 420 + .supplies = ad7380_supplies, 421 + .num_supplies = ARRAY_SIZE(ad7380_supplies), 422 .available_scan_masks = ad7380_4_channel_scan_masks, 423 .timing_specs = &ad7380_4_timing, 424 }; ··· 426 .channels = ad7383_4_channels, 427 .num_channels = ARRAY_SIZE(ad7383_4_channels), 428 .num_simult_channels = 4, 429 + .supplies = ad7380_supplies, 430 + .num_supplies = ARRAY_SIZE(ad7380_supplies), 431 .vcm_supplies = ad7380_4_channel_vcm_supplies, 432 .num_vcm_supplies = ARRAY_SIZE(ad7380_4_channel_vcm_supplies), 433 .available_scan_masks = ad7380_4_channel_scan_masks, ··· 437 .channels = ad7384_4_channels, 438 .num_channels = ARRAY_SIZE(ad7384_4_channels), 439 .num_simult_channels = 4, 440 + .supplies = ad7380_supplies, 441 + .num_supplies = ARRAY_SIZE(ad7380_supplies), 442 .vcm_supplies = ad7380_4_channel_vcm_supplies, 443 .num_vcm_supplies = ARRAY_SIZE(ad7380_4_channel_vcm_supplies), 444 .available_scan_masks = ad7380_4_channel_scan_masks, ··· 448 .channels = ad7386_4_channels, 449 .num_channels = ARRAY_SIZE(ad7386_4_channels), 450 .num_simult_channels = 4, 451 + .supplies = ad7380_supplies, 452 + .num_supplies = ARRAY_SIZE(ad7380_supplies), 453 .has_mux = true, 454 .available_scan_masks = ad7380_2x4_channel_scan_masks, 455 .timing_specs = &ad7380_4_timing, ··· 458 .channels = ad7387_4_channels, 459 .num_channels = ARRAY_SIZE(ad7387_4_channels), 460 .num_simult_channels = 4, 461 + .supplies = ad7380_supplies, 462 + .num_supplies = ARRAY_SIZE(ad7380_supplies), 463 .has_mux = true, 464 .available_scan_masks = ad7380_2x4_channel_scan_masks, 465 .timing_specs = &ad7380_4_timing, ··· 468 .channels = ad7388_4_channels, 469 .num_channels = ARRAY_SIZE(ad7388_4_channels), 470 .num_simult_channels = 4, 471 + .supplies = ad7380_supplies, 472 + .num_supplies = ARRAY_SIZE(ad7380_supplies), 473 .has_mux = true, 474 .available_scan_masks = ad7380_2x4_channel_scan_masks, 475 .timing_specs = &ad7380_4_timing, ··· 956 .debugfs_reg_access = &ad7380_debugfs_reg_access, 957 }; 958 959 + static int ad7380_init(struct ad7380_state *st, bool external_ref_en) 960 { 961 int ret; 962 ··· 968 if (ret < 0) 969 return ret; 970 971 + if (external_ref_en) { 972 + /* select external reference voltage */ 973 + ret = regmap_set_bits(st->regmap, AD7380_REG_ADDR_CONFIG1, 974 + AD7380_CONFIG1_REFSEL); 975 + if (ret < 0) 976 + return ret; 977 + } 978 979 /* This is the default value after reset. */ 980 st->oversampling_ratio = 1; ··· 987 FIELD_PREP(AD7380_CONFIG2_SDO, 1)); 988 } 989 990 static int ad7380_probe(struct spi_device *spi) 991 { 992 struct iio_dev *indio_dev; 993 struct ad7380_state *st; 994 + bool external_ref_en; 995 int ret, i; 996 997 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); ··· 1009 if (!st->chip_info) 1010 return dev_err_probe(&spi->dev, -EINVAL, "missing match data\n"); 1011 1012 + ret = devm_regulator_bulk_get_enable(&spi->dev, st->chip_info->num_supplies, 1013 + st->chip_info->supplies); 1014 1015 + if (ret) 1016 + return dev_err_probe(&spi->dev, ret, 1017 + "Failed to enable power supplies\n"); 1018 + fsleep(T_POWERUP_US); 1019 1020 + if (st->chip_info->external_ref_only) { 1021 + ret = devm_regulator_get_enable_read_voltage(&spi->dev, 1022 + "refin"); 1023 if (ret < 0) 1024 + return dev_err_probe(&spi->dev, ret, 1025 + "Failed to get refin regulator\n"); 1026 1027 st->vref_mv = ret / 1000; 1028 + 1029 + /* these chips don't have a register bit for this */ 1030 + external_ref_en = false; 1031 } else { 1032 + /* 1033 + * If there is no REFIO supply, then it means that we are using 1034 + * the internal reference, otherwise REFIO is reference voltage. 1035 + */ 1036 + ret = devm_regulator_get_enable_read_voltage(&spi->dev, 1037 + "refio"); 1038 + if (ret < 0 && ret != -ENODEV) 1039 + return dev_err_probe(&spi->dev, ret, 1040 + "Failed to get refio regulator\n"); 1041 + 1042 + external_ref_en = ret != -ENODEV; 1043 + st->vref_mv = external_ref_en ? ret / 1000 : AD7380_INTERNAL_REF_MV; 1044 } 1045 1046 if (st->chip_info->num_vcm_supplies > ARRAY_SIZE(st->vcm_mv)) ··· 1050 * input pin. 1051 */ 1052 for (i = 0; i < st->chip_info->num_vcm_supplies; i++) { 1053 + const char *vcm = st->chip_info->vcm_supplies[i]; 1054 1055 + ret = devm_regulator_get_enable_read_voltage(&spi->dev, vcm); 1056 if (ret < 0) 1057 + return dev_err_probe(&spi->dev, ret, 1058 + "Failed to get %s regulator\n", 1059 + vcm); 1060 1061 st->vcm_mv[i] = ret / 1000; 1062 } ··· 1135 if (ret) 1136 return ret; 1137 1138 + ret = ad7380_init(st, external_ref_en); 1139 if (ret) 1140 return ret; 1141
+1 -1
drivers/iio/dac/Kconfig
··· 380 config LTC2664 381 tristate "Analog Devices LTC2664 and LTC2672 DAC SPI driver" 382 depends on SPI 383 - select REGMAP 384 help 385 Say yes here to build support for Analog Devices 386 LTC2664 and LTC2672 converters (DAC).
··· 380 config LTC2664 381 tristate "Analog Devices LTC2664 and LTC2672 DAC SPI driver" 382 depends on SPI 383 + select REGMAP_SPI 384 help 385 Say yes here to build support for Analog Devices 386 LTC2664 and LTC2672 converters (DAC).
+3 -1
drivers/iio/industrialio-gts-helper.c
··· 307 if (ret) 308 goto err_free_out; 309 310 kfree(per_time_gains); 311 gts->per_time_avail_scale_tables = per_time_scales; 312 313 return 0; 314 315 err_free_out: 316 - for (i--; i; i--) { 317 kfree(per_time_scales[i]); 318 kfree(per_time_gains[i]); 319 }
··· 307 if (ret) 308 goto err_free_out; 309 310 + for (i = 0; i < gts->num_itime; i++) 311 + kfree(per_time_gains[i]); 312 kfree(per_time_gains); 313 gts->per_time_avail_scale_tables = per_time_scales; 314 315 return 0; 316 317 err_free_out: 318 + for (i--; i >= 0; i--) { 319 kfree(per_time_scales[i]); 320 kfree(per_time_gains[i]); 321 }
+1 -1
drivers/iio/light/veml6030.c
··· 522 } 523 if (mask == IIO_CHAN_INFO_PROCESSED) { 524 *val = (reg * data->cur_resolution) / 10000; 525 - *val2 = (reg * data->cur_resolution) % 10000; 526 return IIO_VAL_INT_PLUS_MICRO; 527 } 528 *val = reg;
··· 522 } 523 if (mask == IIO_CHAN_INFO_PROCESSED) { 524 *val = (reg * data->cur_resolution) / 10000; 525 + *val2 = (reg * data->cur_resolution) % 10000 * 100; 526 return IIO_VAL_INT_PLUS_MICRO; 527 } 528 *val = reg;
+2 -2
drivers/misc/mei/client.c
··· 321 return; 322 323 list_del(&cb->list); 324 - kfree(cb->buf.data); 325 kfree(cb->ext_hdr); 326 kfree(cb); 327 } ··· 497 if (length == 0) 498 return cb; 499 500 - cb->buf.data = kmalloc(roundup(length, MEI_SLOT_SIZE), GFP_KERNEL); 501 if (!cb->buf.data) { 502 mei_io_cb_free(cb); 503 return NULL;
··· 321 return; 322 323 list_del(&cb->list); 324 + kvfree(cb->buf.data); 325 kfree(cb->ext_hdr); 326 kfree(cb); 327 } ··· 497 if (length == 0) 498 return cb; 499 500 + cb->buf.data = kvmalloc(roundup(length, MEI_SLOT_SIZE), GFP_KERNEL); 501 if (!cb->buf.data) { 502 mei_io_cb_free(cb); 503 return NULL;
+5 -2
drivers/staging/iio/frequency/ad9832.c
··· 129 static int ad9832_write_frequency(struct ad9832_state *st, 130 unsigned int addr, unsigned long fout) 131 { 132 unsigned long regval; 133 134 - if (fout > (clk_get_rate(st->mclk) / 2)) 135 return -EINVAL; 136 137 - regval = ad9832_calc_freqreg(clk_get_rate(st->mclk), fout); 138 139 st->freq_data[0] = cpu_to_be16((AD9832_CMD_FRE8BITSW << CMD_SHIFT) | 140 (addr << ADD_SHIFT) |
··· 129 static int ad9832_write_frequency(struct ad9832_state *st, 130 unsigned int addr, unsigned long fout) 131 { 132 + unsigned long clk_freq; 133 unsigned long regval; 134 135 + clk_freq = clk_get_rate(st->mclk); 136 + 137 + if (!clk_freq || fout > (clk_freq / 2)) 138 return -EINVAL; 139 140 + regval = ad9832_calc_freqreg(clk_freq, fout); 141 142 st->freq_data[0] = cpu_to_be16((AD9832_CMD_FRE8BITSW << CMD_SHIFT) | 143 (addr << ADD_SHIFT) |