m32r: Rearrange platform-dependent codes

Rearrange platform-dependent codes from arch/m32r/kernel/*.c
to arch/m32r/platforms/{platform}/.

Signed-off-by: Hirokazu Takata <[e-mail]>

arch/m32r/Makefile

···
 libs-y	+= arch/m32r/lib/ $(LIBGCC)
 core-y	+= arch/m32r/kernel/	\
 	   arch/m32r/mm/	\
-	   arch/m32r/boot/
+	   arch/m32r/boot/	\
+	   arch/m32r/platforms/
 
 drivers-$(CONFIG_OPROFILE)	+= arch/m32r/oprofile/
 

arch/m32r/kernel/Makefile

···
 	m32r_ksyms.o sys_m32r.o semaphore.o signal.o ptrace.o
 
 obj-$(CONFIG_SMP)		+= smp.o smpboot.o
-obj-$(CONFIG_PLAT_MAPPI)	+= setup_mappi.o io_mappi.o
-obj-$(CONFIG_PLAT_MAPPI2)	+= setup_mappi2.o io_mappi2.o
-obj-$(CONFIG_PLAT_MAPPI3)	+= setup_mappi3.o io_mappi3.o
-obj-$(CONFIG_PLAT_USRV)		+= setup_usrv.o io_usrv.o
-obj-$(CONFIG_PLAT_M32700UT)	+= setup_m32700ut.o io_m32700ut.o
-obj-$(CONFIG_PLAT_OPSPUT)	+= setup_opsput.o io_opsput.o
 obj-$(CONFIG_MODULES)		+= module.o
-obj-$(CONFIG_PLAT_OAKS32R)	+= setup_oaks32r.o io_oaks32r.o
-obj-$(CONFIG_PLAT_M32104UT)	+= setup_m32104ut.o io_m32104ut.o
 
 EXTRA_AFLAGS	:= -traditional

arch/m32r/kernel/io_m32104ut.c arch/m32r/platforms/opsput/io.c

···
 /*
- *  linux/arch/m32r/kernel/io_m32104ut.c
+ *  linux/arch/m32r/platforms/opsput/io.c
  *
- *  Typical I/O routines for M32104UT board.
+ *  Typical I/O routines for OPSPUT board.
  *
  *  Copyright (c) 2001-2005  Hiroyuki Kondo, Hirokazu Takata,
- *                           Hitoshi Yamamoto, Mamoru Sakugawa,
- *                           Naoto Sugai, Hayato Fujiwara
+ *                           Hitoshi Yamamoto, Takeo Takahashi
+ *
+ *  This file is subject to the terms and conditions of the GNU General
+ *  Public License.  See the file "COPYING" in the main directory of this
+ *  archive for more details.
  */
 
 #include <asm/m32r.h>
···
 extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int);
 #endif /* CONFIG_PCMCIA && CONFIG_M32R_CFC */
 
-#define PORT2ADDR(port)  _port2addr(port)
+#define PORT2ADDR(port)		_port2addr(port)
+#define PORT2ADDR_USB(port)	_port2addr_usb(port)
 
 static inline void *_port2addr(unsigned long port)
 {
···
 #endif
 
 /*
- * M32104T-LAN is located in the extended bus space
- * from 0x01000000 to 0x01ffffff on physical address.
+ * OPSPUT-LAN is located in the extended bus space
+ * from 0x10000000 to 0x13ffffff on physical address.
  * The base address of LAN controller(LAN91C111) is 0x300.
  */
 #define LAN_IOSTART	(0x300 | NONCACHE_OFFSET)
 #define LAN_IOEND	(0x320 | NONCACHE_OFFSET)
 static inline void *_port2addr_ne(unsigned long port)
 {
-	return (void *)(port + NONCACHE_OFFSET + 0x01000000);
+	return (void *)(port + 0x10000000);
+}
+static inline void *_port2addr_usb(unsigned long port)
+{
+	return (void *)((port & 0x0f) + NONCACHE_OFFSET + 0x10303000);
 }
 
 static inline void delay(void)
···
 	if (port >= LAN_IOSTART && port < LAN_IOEND)
 		return _ne_inb(PORT2ADDR_NE(port));
 
+#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
+	else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
+		return *(volatile unsigned char *)__port2addr_ata(port);
+	}
+#endif
+#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
+	else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
+		unsigned char b;
+		pcc_ioread_byte(0, port, &b, sizeof(b), 1, 0);
+		return b;
+	} else
+#endif
+
 	return *(volatile unsigned char *)PORT2ADDR(port);
 }
 
···
 {
 	if (port >= LAN_IOSTART && port < LAN_IOEND)
 		return _ne_inw(PORT2ADDR_NE(port));
-
+#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
+	else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
+		return *(volatile unsigned short *)__port2addr_ata(port);
+	}
+#endif
+#if defined(CONFIG_USB)
+	else if(port >= 0x340 && port < 0x3a0)
+		return *(volatile unsigned short *)PORT2ADDR_USB(port);
+#endif
+#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
+	else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
+		unsigned short w;
+		pcc_ioread_word(0, port, &w, sizeof(w), 1, 0);
+		return w;
+	} else
+#endif
 	return *(volatile unsigned short *)PORT2ADDR(port);
 }
 
 unsigned long _inl(unsigned long port)
 {
+#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
+	if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
+		unsigned long l;
+		pcc_ioread_word(0, port, &l, sizeof(l), 1, 0);
+		return l;
+	} else
+#endif
 	return *(volatile unsigned long *)PORT2ADDR(port);
 }
 
···
 	if (port >= LAN_IOSTART && port < LAN_IOEND)
 		_ne_outb(b, PORT2ADDR_NE(port));
 	else
+#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
+	if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
+		*(volatile unsigned char *)__port2addr_ata(port) = b;
+	} else
+#endif
+#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
+	if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
+		pcc_iowrite_byte(0, port, &b, sizeof(b), 1, 0);
+	} else
+#endif
 		*(volatile unsigned char *)PORT2ADDR(port) = b;
 }
 
···
 	if (port >= LAN_IOSTART && port < LAN_IOEND)
 		_ne_outw(w, PORT2ADDR_NE(port));
 	else
+#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
+	if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
+		*(volatile unsigned short *)__port2addr_ata(port) = w;
+	} else
+#endif
+#if defined(CONFIG_USB)
+	if(port >= 0x340 && port < 0x3a0)
+		*(volatile unsigned short *)PORT2ADDR_USB(port) = w;
+	else
+#endif
+#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
+	if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
+		pcc_iowrite_word(0, port, &w, sizeof(w), 1, 0);
+	} else
+#endif
 		*(volatile unsigned short *)PORT2ADDR(port) = w;
 }
 
 void _outl(unsigned long l, unsigned long port)
 {
+#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
+	if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
+		pcc_iowrite_word(0, port, &l, sizeof(l), 1, 0);
+	} else
+#endif
 	*(volatile unsigned long *)PORT2ADDR(port) = l;
 }
 
···
 {
 	if (port >= LAN_IOSTART && port < LAN_IOEND)
 		_ne_insb(PORT2ADDR_NE(port), addr, count);
+#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
+	else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
+		unsigned char *buf = addr;
+		unsigned char *portp = __port2addr_ata(port);
+		while (count--)
+			*buf++ = *(volatile unsigned char *)portp;
+	}
+#endif
+#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
+	else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
+		pcc_ioread_byte(0, port, (void *)addr, sizeof(unsigned char),
+				count, 1);
+	}
+#endif
 	else {
 		unsigned char *buf = addr;
 		unsigned char *portp = PORT2ADDR(port);
···
 		portp = PORT2ADDR_NE(port);
 		while (count--)
 			_ne_outb(*buf++, portp);
+#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
+	} else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
+		portp = __port2addr_ata(port);
+		while (count--)
+			*(volatile unsigned char *)portp = *buf++;
+#endif
+#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
+	} else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
+		pcc_iowrite_byte(0, port, (void *)addr, sizeof(unsigned char),
+				 count, 1);
+#endif
 	} else {
 		portp = PORT2ADDR(port);
 		while (count--)

arch/m32r/kernel/io_m32700ut.c arch/m32r/platforms/m32700ut/io.c

···
 /*
- *  linux/arch/m32r/kernel/io_m32700ut.c
+ *  linux/arch/m32r/platforms/m32700ut/io.c
  *
  *  Typical I/O routines for M32700UT board.
  *

arch/m32r/kernel/io_mappi.c arch/m32r/platforms/mappi/io.c

···
 /*
- *  linux/arch/m32r/kernel/io_mappi.c
+ *  linux/arch/m32r/platforms/mappi/io.c
  *
  *  Typical I/O routines for Mappi board.
  *

arch/m32r/kernel/io_mappi2.c arch/m32r/platforms/m32104ut/io.c

···
 /*
- *  linux/arch/m32r/kernel/io_mappi2.c
+ *  linux/arch/m32r/platforms/m32104ut/io.c
  *
- *  Typical I/O routines for Mappi2 board.
+ *  Typical I/O routines for M32104UT board.
  *
  *  Copyright (c) 2001-2005  Hiroyuki Kondo, Hirokazu Takata,
- *                           Hitoshi Yamamoto, Mamoru Sakugawa
+ *                           Hitoshi Yamamoto, Mamoru Sakugawa,
+ *                           Naoto Sugai, Hayato Fujiwara
  */
 
 #include <asm/m32r.h>
···
 extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int);
 #endif /* CONFIG_PCMCIA && CONFIG_M32R_CFC */
 
-#define PORT2ADDR(port)      _port2addr(port)
-#define PORT2ADDR_NE(port)   _port2addr_ne(port)
-#define PORT2ADDR_USB(port)  _port2addr_usb(port)
+#define PORT2ADDR(port)  _port2addr(port)
 
 static inline void *_port2addr(unsigned long port)
 {
···
 }
 #endif
 
+/*
+ * M32104T-LAN is located in the extended bus space
+ * from 0x01000000 to 0x01ffffff on physical address.
+ * The base address of LAN controller(LAN91C111) is 0x300.
+ */
 #define LAN_IOSTART	(0x300 | NONCACHE_OFFSET)
 #define LAN_IOEND	(0x320 | NONCACHE_OFFSET)
-#ifdef CONFIG_CHIP_OPSP
 static inline void *_port2addr_ne(unsigned long port)
 {
-	return (void *)(port + 0x10000000);
+	return (void *)(port + NONCACHE_OFFSET + 0x01000000);
 }
-#else
-static inline void *_port2addr_ne(unsigned long port)
-{
-	return (void *)(port + 0x04000000);
-}
-#endif
-static inline void *_port2addr_usb(unsigned long port)
-{
-	return (void *)(port + NONCACHE_OFFSET + 0x14000000);
-}
+
 static inline void delay(void)
 {
 	__asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory");
···
  * NIC I/O function
  */
 
+#define PORT2ADDR_NE(port)  _port2addr_ne(port)
+
 static inline unsigned char _ne_inb(void *portp)
 {
-	return (unsigned char) *(volatile unsigned char *)portp;
+	return *(volatile unsigned char *)portp;
 }
 
 static inline unsigned short _ne_inw(void *portp)
···
 	return (unsigned short)le16_to_cpu(*(volatile unsigned short *)portp);
 }
 
-static inline void _ne_insb(void *portp, void * addr, unsigned long count)
+static inline void _ne_insb(void *portp, void *addr, unsigned long count)
 {
-	unsigned char *buf = addr;
+	unsigned char *buf = (unsigned char *)addr;
 
 	while (count--)
-		*buf++ = *(volatile unsigned char *)portp;
+		*buf++ = _ne_inb(portp);
 }
 
 static inline void _ne_outb(unsigned char b, void *portp)
 {
-	*(volatile unsigned char *)portp = (unsigned char)b;
+	*(volatile unsigned char *)portp = b;
 }
 
 static inline void _ne_outw(unsigned short w, void *portp)
···
 {
 	if (port >= LAN_IOSTART && port < LAN_IOEND)
 		return _ne_inb(PORT2ADDR_NE(port));
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
-	else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
-		return *(volatile unsigned char *)__port2addr_ata(port);
-	}
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
-	else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
-		unsigned char b;
-		pcc_ioread_byte(0, port, &b, sizeof(b), 1, 0);
-		return b;
-	} else
-#endif
 
 	return *(volatile unsigned char *)PORT2ADDR(port);
 }
···
 {
 	if (port >= LAN_IOSTART && port < LAN_IOEND)
 		return _ne_inw(PORT2ADDR_NE(port));
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
-	else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
-		return *(volatile unsigned short *)__port2addr_ata(port);
-	}
-#endif
-#if defined(CONFIG_USB)
-	else if (port >= 0x340 && port < 0x3a0)
-		return *(volatile unsigned short *)PORT2ADDR_USB(port);
-#endif
 
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
-	else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
-		unsigned short w;
-		pcc_ioread_word(0, port, &w, sizeof(w), 1, 0);
-		return w;
-	} else
-#endif
 	return *(volatile unsigned short *)PORT2ADDR(port);
 }
 
 unsigned long _inl(unsigned long port)
 {
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
-	if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
-		unsigned long l;
-		pcc_ioread_word(0, port, &l, sizeof(l), 1, 0);
-		return l;
-	} else
-#endif
 	return *(volatile unsigned long *)PORT2ADDR(port);
 }
 
···
 	if (port >= LAN_IOSTART && port < LAN_IOEND)
 		_ne_outb(b, PORT2ADDR_NE(port));
 	else
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
-	if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
-		*(volatile unsigned char *)__port2addr_ata(port) = b;
-	} else
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
-	if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
-		pcc_iowrite_byte(0, port, &b, sizeof(b), 1, 0);
-	} else
-#endif
 		*(volatile unsigned char *)PORT2ADDR(port) = b;
 }
 
···
 	if (port >= LAN_IOSTART && port < LAN_IOEND)
 		_ne_outw(w, PORT2ADDR_NE(port));
 	else
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
-	if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
-		*(volatile unsigned short *)__port2addr_ata(port) = w;
-	} else
-#endif
-#if defined(CONFIG_USB)
-	if (port >= 0x340 && port < 0x3a0)
-		*(volatile unsigned short *)PORT2ADDR_USB(port) = w;
-	else
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
-	if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
-		pcc_iowrite_word(0, port, &w, sizeof(w), 1, 0);
-	} else
-#endif
 		*(volatile unsigned short *)PORT2ADDR(port) = w;
 }
 
 void _outl(unsigned long l, unsigned long port)
 {
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
-	if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
-		pcc_iowrite_word(0, port, &l, sizeof(l), 1, 0);
-	} else
-#endif
 	*(volatile unsigned long *)PORT2ADDR(port) = l;
 }
 
···
 	delay();
 }
 
-void _insb(unsigned int port, void * addr, unsigned long count)
+void _insb(unsigned int port, void *addr, unsigned long count)
 {
 	if (port >= LAN_IOSTART && port < LAN_IOEND)
 		_ne_insb(PORT2ADDR_NE(port), addr, count);
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
-	else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
-		unsigned char *buf = addr;
-		unsigned char *portp = __port2addr_ata(port);
-		while (count--)
-			*buf++ = *(volatile unsigned char *)portp;
-	}
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
-	else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
-		pcc_ioread_byte(0, port, (void *)addr, sizeof(unsigned char),
-				count, 1);
-	}
-#endif
 	else {
 		unsigned char *buf = addr;
 		unsigned char *portp = PORT2ADDR(port);
···
 	}
 }
 
-void _insw(unsigned int port, void * addr, unsigned long count)
+void _insw(unsigned int port, void *addr, unsigned long count)
 {
 	unsigned short *buf = addr;
 	unsigned short *portp;
 
 	if (port >= LAN_IOSTART && port < LAN_IOEND) {
+		/*
+		 * This portion is only used by smc91111.c to read data
+		 * from the DATA_REG. Do not swap the data.
+		 */
 		portp = PORT2ADDR_NE(port);
 		while (count--)
 			*buf++ = *(volatile unsigned short *)portp;
···
 	}
 }
 
-void _insl(unsigned int port, void * addr, unsigned long count)
+void _insl(unsigned int port, void *addr, unsigned long count)
 {
 	unsigned long *buf = addr;
 	unsigned long *portp;
···
 		*buf++ = *(volatile unsigned long *)portp;
 }
 
-void _outsb(unsigned int port, const void * addr, unsigned long count)
+void _outsb(unsigned int port, const void *addr, unsigned long count)
 {
 	const unsigned char *buf = addr;
 	unsigned char *portp;
···
 		portp = PORT2ADDR_NE(port);
 		while (count--)
 			_ne_outb(*buf++, portp);
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
-	} else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
-		portp = __port2addr_ata(port);
-		while (count--)
-			*(volatile unsigned char *)portp = *buf++;
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
-	} else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
-		pcc_iowrite_byte(0, port, (void *)addr, sizeof(unsigned char),
-				 count, 1);
-#endif
 	} else {
 		portp = PORT2ADDR(port);
 		while (count--)
···
 	}
 }
 
-void _outsw(unsigned int port, const void * addr, unsigned long count)
+void _outsw(unsigned int port, const void *addr, unsigned long count)
 {
 	const unsigned short *buf = addr;
 	unsigned short *portp;
 
 	if (port >= LAN_IOSTART && port < LAN_IOEND) {
+		/*
+		 * This portion is only used by smc91111.c to write data
+		 * into the DATA_REG. Do not swap the data.
+		 */
 		portp = PORT2ADDR_NE(port);
 		while (count--)
 			*(volatile unsigned short *)portp = *buf++;
···
 	}
 }
 
-void _outsl(unsigned int port, const void * addr, unsigned long count)
+void _outsl(unsigned int port, const void *addr, unsigned long count)
 {
 	const unsigned long *buf = addr;
 	unsigned char *portp;

arch/m32r/kernel/io_mappi3.c arch/m32r/platforms/mappi2/io.c

···
 /*
- *  linux/arch/m32r/kernel/io_mappi3.c
+ *  linux/arch/m32r/platforms/mappi2/io.c
  *
- *  Typical I/O routines for Mappi3 board.
+ *  Typical I/O routines for Mappi2 board.
  *
  *  Copyright (c) 2001-2005  Hiroyuki Kondo, Hirokazu Takata,
  *                           Hitoshi Yamamoto, Mamoru Sakugawa
···
 	return (void *)(port | NONCACHE_OFFSET);
 }
 
-#if defined(CONFIG_IDE)
+#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
 static inline void *__port2addr_ata(unsigned long port)
 {
 	static int	dummy_reg;
 
 	switch (port) {
-	  /* IDE0 CF */
-	case 0x1f0:	return (void *)(0x14002000 | NONCACHE_OFFSET);
-	case 0x1f1:	return (void *)(0x14012800 | NONCACHE_OFFSET);
-	case 0x1f2:	return (void *)(0x14012002 | NONCACHE_OFFSET);
-	case 0x1f3:	return (void *)(0x14012802 | NONCACHE_OFFSET);
-	case 0x1f4:	return (void *)(0x14012004 | NONCACHE_OFFSET);
-	case 0x1f5:	return (void *)(0x14012804 | NONCACHE_OFFSET);
-	case 0x1f6:	return (void *)(0x14012006 | NONCACHE_OFFSET);
-	case 0x1f7:	return (void *)(0x14012806 | NONCACHE_OFFSET);
-	case 0x3f6:	return (void *)(0x1401200e | NONCACHE_OFFSET);
-	  /* IDE1 IDE */
-	case 0x170:	/* Data 16bit */
-			return (void *)(0x14810000 | NONCACHE_OFFSET);
-	case 0x171:	/* Features / Error */
-			return (void *)(0x14810002 | NONCACHE_OFFSET);
-	case 0x172:	/* Sector count */
-			return (void *)(0x14810004 | NONCACHE_OFFSET);
-	case 0x173:	/* Sector number */
-			return (void *)(0x14810006 | NONCACHE_OFFSET);
-	case 0x174:	/* Cylinder low */
-			return (void *)(0x14810008 | NONCACHE_OFFSET);
-	case 0x175:	/* Cylinder high */
-			return (void *)(0x1481000a | NONCACHE_OFFSET);
-	case 0x176:	/* Device head */
-			return (void *)(0x1481000c | NONCACHE_OFFSET);
-	case 0x177:	/* Command     */
-			return (void *)(0x1481000e | NONCACHE_OFFSET);
-	case 0x376:	/* Device control / Alt status */
-			return (void *)(0x1480800c | NONCACHE_OFFSET);
-
+	case 0x1f0:	return (void *)(0x0c002000 | NONCACHE_OFFSET);
+	case 0x1f1:	return (void *)(0x0c012800 | NONCACHE_OFFSET);
+	case 0x1f2:	return (void *)(0x0c012002 | NONCACHE_OFFSET);
+	case 0x1f3:	return (void *)(0x0c012802 | NONCACHE_OFFSET);
+	case 0x1f4:	return (void *)(0x0c012004 | NONCACHE_OFFSET);
+	case 0x1f5:	return (void *)(0x0c012804 | NONCACHE_OFFSET);
+	case 0x1f6:	return (void *)(0x0c012006 | NONCACHE_OFFSET);
+	case 0x1f7:	return (void *)(0x0c012806 | NONCACHE_OFFSET);
+	case 0x3f6:	return (void *)(0x0c01200e | NONCACHE_OFFSET);
 	default: 	return (void *)&dummy_reg;
 	}
 }
···
 
 #define LAN_IOSTART	(0x300 | NONCACHE_OFFSET)
 #define LAN_IOEND	(0x320 | NONCACHE_OFFSET)
+#ifdef CONFIG_CHIP_OPSP
 static inline void *_port2addr_ne(unsigned long port)
 {
 	return (void *)(port + 0x10000000);
 }
-
+#else
+static inline void *_port2addr_ne(unsigned long port)
+{
+	return (void *)(port + 0x04000000);
+}
+#endif
 static inline void *_port2addr_usb(unsigned long port)
 {
-	return (void *)(port + NONCACHE_OFFSET + 0x12000000);
+	return (void *)(port + NONCACHE_OFFSET + 0x14000000);
 }
 static inline void delay(void)
 {
···
 {
 	if (port >= LAN_IOSTART && port < LAN_IOEND)
 		return _ne_inb(PORT2ADDR_NE(port));
-#if defined(CONFIG_IDE)
-	else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
-		  ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
+#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
+	else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
 		return *(volatile unsigned char *)__port2addr_ata(port);
 	}
 #endif
···
 		return b;
 	} else
 #endif
+
 	return *(volatile unsigned char *)PORT2ADDR(port);
 }
 
···
 {
 	if (port >= LAN_IOSTART && port < LAN_IOEND)
 		return _ne_inw(PORT2ADDR_NE(port));
-#if defined(CONFIG_IDE)
-	else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
-		  ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
+#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
+	else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
 		return *(volatile unsigned short *)__port2addr_ata(port);
 	}
 #endif
···
 	if (port >= LAN_IOSTART && port < LAN_IOEND)
 		_ne_outb(b, PORT2ADDR_NE(port));
 	else
-#if defined(CONFIG_IDE)
-	if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
-		  ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
+#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
+	if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
 		*(volatile unsigned char *)__port2addr_ata(port) = b;
 	} else
 #endif
···
 	if (port >= LAN_IOSTART && port < LAN_IOEND)
 		_ne_outw(w, PORT2ADDR_NE(port));
 	else
-#if defined(CONFIG_IDE)
-	if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
-		  ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
+#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
+	if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
 		*(volatile unsigned short *)__port2addr_ata(port) = w;
 	} else
 #endif
···
 {
 	if (port >= LAN_IOSTART && port < LAN_IOEND)
 		_ne_insb(PORT2ADDR_NE(port), addr, count);
-#if defined(CONFIG_IDE)
-	else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
-		  ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
+#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
+	else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
 		unsigned char *buf = addr;
 		unsigned char *portp = __port2addr_ata(port);
 		while (count--)
···
 		pcc_ioread_word(9, port, (void *)addr, sizeof(unsigned short),
 				count, 1);
 #endif
-#if defined(CONFIG_IDE)
-	} else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
-		  ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
+#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
+	} else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
 		portp = __port2addr_ata(port);
 		while (count--)
 			*buf++ = *(volatile unsigned short *)portp;
···
 		portp = PORT2ADDR_NE(port);
 		while (count--)
 			_ne_outb(*buf++, portp);
-#if defined(CONFIG_IDE)
-	} else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
-		  ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
+#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
+	} else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
 		portp = __port2addr_ata(port);
 		while (count--)
 			*(volatile unsigned char *)portp = *buf++;
···
 		portp = PORT2ADDR_NE(port);
 		while (count--)
 			*(volatile unsigned short *)portp = *buf++;
-#if defined(CONFIG_IDE)
-	} else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
-		  ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
+#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
+	} else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
 		portp = __port2addr_ata(port);
 		while (count--)
 			*(volatile unsigned short *)portp = *buf++;

arch/m32r/kernel/io_oaks32r.c arch/m32r/platforms/oaks32r/io.c

···
 /*
- *  linux/arch/m32r/kernel/io_oaks32r.c
+ *  linux/arch/m32r/platforms/oaks32r/io.c
  *
  *  Typical I/O routines for OAKS32R board.
  *

arch/m32r/kernel/io_opsput.c arch/m32r/platforms/mappi3/io.c

···
 /*
- *  linux/arch/m32r/kernel/io_opsput.c
+ *  linux/arch/m32r/platforms/mappi3/io.c
  *
- *  Typical I/O routines for OPSPUT board.
+ *  Typical I/O routines for Mappi3 board.
  *
  *  Copyright (c) 2001-2005  Hiroyuki Kondo, Hirokazu Takata,
- *                           Hitoshi Yamamoto, Takeo Takahashi
- *
- *  This file is subject to the terms and conditions of the GNU General
- *  Public License.  See the file "COPYING" in the main directory of this
- *  archive for more details.
+ *                           Hitoshi Yamamoto, Mamoru Sakugawa
  */
 
 #include <asm/m32r.h>
···
 extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int);
 #endif /* CONFIG_PCMCIA && CONFIG_M32R_CFC */
 
-#define PORT2ADDR(port)		_port2addr(port)
-#define PORT2ADDR_USB(port)	_port2addr_usb(port)
+#define PORT2ADDR(port)      _port2addr(port)
+#define PORT2ADDR_NE(port)   _port2addr_ne(port)
+#define PORT2ADDR_USB(port)  _port2addr_usb(port)
 
 static inline void *_port2addr(unsigned long port)
 {
 	return (void *)(port | NONCACHE_OFFSET);
 }
 
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
+#if defined(CONFIG_IDE)
 static inline void *__port2addr_ata(unsigned long port)
 {
 	static int	dummy_reg;
 
 	switch (port) {
-	case 0x1f0:	return (void *)(0x0c002000 | NONCACHE_OFFSET);
-	case 0x1f1:	return (void *)(0x0c012800 | NONCACHE_OFFSET);
-	case 0x1f2:	return (void *)(0x0c012002 | NONCACHE_OFFSET);
-	case 0x1f3:	return (void *)(0x0c012802 | NONCACHE_OFFSET);
-	case 0x1f4:	return (void *)(0x0c012004 | NONCACHE_OFFSET);
-	case 0x1f5:	return (void *)(0x0c012804 | NONCACHE_OFFSET);
-	case 0x1f6:	return (void *)(0x0c012006 | NONCACHE_OFFSET);
-	case 0x1f7:	return (void *)(0x0c012806 | NONCACHE_OFFSET);
-	case 0x3f6:	return (void *)(0x0c01200e | NONCACHE_OFFSET);
+	  /* IDE0 CF */
+	case 0x1f0:	return (void *)(0x14002000 | NONCACHE_OFFSET);
+	case 0x1f1:	return (void *)(0x14012800 | NONCACHE_OFFSET);
+	case 0x1f2:	return (void *)(0x14012002 | NONCACHE_OFFSET);
+	case 0x1f3:	return (void *)(0x14012802 | NONCACHE_OFFSET);
+	case 0x1f4:	return (void *)(0x14012004 | NONCACHE_OFFSET);
+	case 0x1f5:	return (void *)(0x14012804 | NONCACHE_OFFSET);
+	case 0x1f6:	return (void *)(0x14012006 | NONCACHE_OFFSET);
+	case 0x1f7:	return (void *)(0x14012806 | NONCACHE_OFFSET);
+	case 0x3f6:	return (void *)(0x1401200e | NONCACHE_OFFSET);
+	  /* IDE1 IDE */
+	case 0x170:	/* Data 16bit */
+			return (void *)(0x14810000 | NONCACHE_OFFSET);
+	case 0x171:	/* Features / Error */
+			return (void *)(0x14810002 | NONCACHE_OFFSET);
+	case 0x172:	/* Sector count */
+			return (void *)(0x14810004 | NONCACHE_OFFSET);
+	case 0x173:	/* Sector number */
+			return (void *)(0x14810006 | NONCACHE_OFFSET);
+	case 0x174:	/* Cylinder low */
+			return (void *)(0x14810008 | NONCACHE_OFFSET);
+	case 0x175:	/* Cylinder high */
+			return (void *)(0x1481000a | NONCACHE_OFFSET);
+	case 0x176:	/* Device head */
+			return (void *)(0x1481000c | NONCACHE_OFFSET);
+	case 0x177:	/* Command     */
+			return (void *)(0x1481000e | NONCACHE_OFFSET);
+	case 0x376:	/* Device control / Alt status */
+			return (void *)(0x1480800c | NONCACHE_OFFSET);
+
 	default: 	return (void *)&dummy_reg;
 	}
 }
 #endif
 
-/*
- * OPSPUT-LAN is located in the extended bus space
- * from 0x10000000 to 0x13ffffff on physical address.
- * The base address of LAN controller(LAN91C111) is 0x300.
- */
 #define LAN_IOSTART	(0x300 | NONCACHE_OFFSET)
 #define LAN_IOEND	(0x320 | NONCACHE_OFFSET)
 static inline void *_port2addr_ne(unsigned long port)
 {
 	return (void *)(port + 0x10000000);
 }
+
 static inline void *_port2addr_usb(unsigned long port)
 {
-	return (void *)((port & 0x0f) + NONCACHE_OFFSET + 0x10303000);
+	return (void *)(port + NONCACHE_OFFSET + 0x12000000);
 }
-
 static inline void delay(void)
 {
 	__asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory");
···
  * NIC I/O function
  */
 
-#define PORT2ADDR_NE(port)  _port2addr_ne(port)
-
 static inline unsigned char _ne_inb(void *portp)
 {
-	return *(volatile unsigned char *)portp;
+	return (unsigned char) *(volatile unsigned char *)portp;
 }
 
 static inline unsigned short _ne_inw(void *portp)
···
 	return (unsigned short)le16_to_cpu(*(volatile unsigned short *)portp);
 }
 
-static inline void _ne_insb(void *portp, void *addr, unsigned long count)
+static inline void _ne_insb(void *portp, void * addr, unsigned long count)
 {
-	unsigned char *buf = (unsigned char *)addr;
+	unsigned char *buf = addr;
 
 	while (count--)
-		*buf++ = _ne_inb(portp);
+		*buf++ = *(volatile unsigned char *)portp;
 }
 
 static inline void _ne_outb(unsigned char b, void *portp)
 {
-	*(volatile unsigned char *)portp = b;
+	*(volatile unsigned char *)portp = (unsigned char)b;
 }
 
 static inline void _ne_outw(unsigned short w, void *portp)
···
 {
 	if (port >= LAN_IOSTART && port < LAN_IOEND)
 		return _ne_inb(PORT2ADDR_NE(port));
-
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
-	else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
+#if defined(CONFIG_IDE)
+	else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
+		  ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
 		return *(volatile unsigned char *)__port2addr_ata(port);
 	}
 #endif
···
 		return b;
 	} else
 #endif
-
 	return *(volatile unsigned char *)PORT2ADDR(port);
 }
 
···
 {
 	if (port >= LAN_IOSTART && port < LAN_IOEND)
 		return _ne_inw(PORT2ADDR_NE(port));
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
-	else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
+#if defined(CONFIG_IDE)
+	else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
+		  ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
 		return *(volatile unsigned short *)__port2addr_ata(port);
 	}
 #endif
 #if defined(CONFIG_USB)
-	else if(port >= 0x340 && port < 0x3a0)
+	else if (port >= 0x340 && port < 0x3a0)
 		return *(volatile unsigned short *)PORT2ADDR_USB(port);
 #endif
+
 #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
 	else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
 		unsigned short w;
···
 	if (port >= LAN_IOSTART && port < LAN_IOEND)
 		_ne_outb(b, PORT2ADDR_NE(port));
 	else
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
-	if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
+#if defined(CONFIG_IDE)
+	if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
+		  ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
 		*(volatile unsigned char *)__port2addr_ata(port) = b;
 	} else
 #endif
···
 	if (port >= LAN_IOSTART && port < LAN_IOEND)
 		_ne_outw(w, PORT2ADDR_NE(port));
 	else
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
-	if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
+#if defined(CONFIG_IDE)
+	if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
+		  ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
 		*(volatile unsigned short *)__port2addr_ata(port) = w;
 	} else
 #endif
 #if defined(CONFIG_USB)
-	if(port >= 0x340 && port < 0x3a0)
+	if (port >= 0x340 && port < 0x3a0)
 		*(volatile unsigned short *)PORT2ADDR_USB(port) = w;
 	else
 #endif
···
 	delay();
 }
 
-void _insb(unsigned int port, void *addr, unsigned long count)
+void _insb(unsigned int port, void * addr, unsigned long count)
 {
 	if (port >= LAN_IOSTART && port < LAN_IOEND)
 		_ne_insb(PORT2ADDR_NE(port), addr, count);
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
-	else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
+#if defined(CONFIG_IDE)
+	else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
+		  ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
 		unsigned char *buf = addr;
 		unsigned char *portp = __port2addr_ata(port);
 		while (count--)
···
 	}
 }
 
-void _insw(unsigned int port, void *addr, unsigned long count)
+void _insw(unsigned int port, void * addr, unsigned long count)
 {
 	unsigned short *buf = addr;
 	unsigned short *portp;
 
 	if (port >= LAN_IOSTART && port < LAN_IOEND) {
-		/*
-		 * This portion is only used by smc91111.c to read data
-		 * from the DATA_REG. Do not swap the data.
-		 */
 		portp = PORT2ADDR_NE(port);
 		while (count--)
 			*buf++ = *(volatile unsigned short *)portp;
···
 		pcc_ioread_word(9, port, (void *)addr, sizeof(unsigned short),
 				count, 1);
 #endif
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
-	} else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
+#if defined(CONFIG_IDE)
+	} else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
+		  ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
 		portp = __port2addr_ata(port);
 		while (count--)
 			*buf++ = *(volatile unsigned short *)portp;
···
 	}
 }
 
-void _insl(unsigned int port, void *addr, unsigned long count)
+void _insl(unsigned int port, void * addr, unsigned long count)
 {
 	unsigned long *buf = addr;
 	unsigned long *portp;
···
 		*buf++ = *(volatile unsigned long *)portp;
 }
 
-void _outsb(unsigned int port, const void *addr, unsigned long count)
+void _outsb(unsigned int port, const void * addr, unsigned long count)
 {
 	const unsigned char *buf = addr;
 	unsigned char *portp;
···
 		portp = PORT2ADDR_NE(port);
 		while (count--)
 			_ne_outb(*buf++, portp);
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
-	} else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
+#if defined(CONFIG_IDE)
+	} else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
+		  ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
 		portp = __port2addr_ata(port);
 		while (count--)
 			*(volatile unsigned char *)portp = *buf++;
···
 	}
 }
 
-void _outsw(unsigned int port, const void *addr, unsigned long count)
+void _outsw(unsigned int port, const void * addr, unsigned long count)
 {
 	const unsigned short *buf = addr;
 	unsigned short *portp;
 
 	if (port >= LAN_IOSTART && port < LAN_IOEND) {
-		/*
-		 * This portion is only used by smc91111.c to write data
-		 * into the DATA_REG. Do not swap the data.
-		 */
 		portp = PORT2ADDR_NE(port);
 		while (count--)
 			*(volatile unsigned short *)portp = *buf++;
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
-	} else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
+#if defined(CONFIG_IDE)
+	} else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
+		  ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
 		portp = __port2addr_ata(port);
 		while (count--)
 			*(volatile unsigned short *)portp = *buf++;
···
 	}
 }
 
-void _outsl(unsigned int port, const void *addr, unsigned long count)
+void _outsl(unsigned int port, const void * addr, unsigned long count)
 {
 	const unsigned long *buf = addr;
 	unsigned char *portp;

arch/m32r/kernel/io_usrv.c arch/m32r/platforms/usrv/io.c

···
 /*
- *  linux/arch/m32r/kernel/io_usrv.c
+ *  linux/arch/m32r/platforms/usrv/io.c
  *
  *  Typical I/O routines for uServer board.
  *
···
 #include <asm/io.h>
 
 #include <linux/types.h>
-#include "../drivers/m32r_cfc.h"
+#include "../../../../drivers/pcmcia/m32r_cfc.h"
 
 extern void pcc_ioread_byte(int, unsigned long, void *, size_t, size_t, int);
 extern void pcc_ioread_word(int, unsigned long, void *, size_t, size_t, int);

arch/m32r/kernel/setup_m32104ut.c arch/m32r/platforms/m32104ut/setup.c

···
 /*
- *  linux/arch/m32r/kernel/setup_m32104ut.c
+ *  linux/arch/m32r/platforms/m32104ut/setup.c
  *
  *  Setup routines for M32104UT Board
  *

arch/m32r/kernel/setup_m32700ut.c arch/m32r/platforms/opsput/setup.c

···
 /*
- *  linux/arch/m32r/kernel/setup_m32700ut.c
+ *  linux/arch/m32r/platforms/opsput/setup.c
  *
- *  Setup routines for Renesas M32700UT Board
+ *  Setup routines for Renesas OPSPUT Board
  *
- *  Copyright (c) 2002-2005  Hiroyuki Kondo, Hirokazu Takata,
- *                           Hitoshi Yamamoto, Takeo Takahashi
+ *  Copyright (c) 2002-2005
+ * 	Hiroyuki Kondo, Hirokazu Takata,
+ *      Hitoshi Yamamoto, Takeo Takahashi, Mamoru Sakugawa
  *
  *  This file is subject to the terms and conditions of the GNU General
  *  Public License.  See the file "COPYING" in the main directory of this
···
 #include <asm/io.h>
 
 /*
- * M32700 Interrupt Control Unit (Level 1)
+ * OPSP Interrupt Control Unit (Level 1)
  */
 #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
 
-icu_data_t icu_data[M32700UT_NUM_CPU_IRQ];
+icu_data_t icu_data[OPSPUT_NUM_CPU_IRQ];
 
-static void disable_m32700ut_irq(unsigned int irq)
+static void disable_opsput_irq(unsigned int irq)
 {
 	unsigned long port, data;
 
···
 	outl(data, port);
 }
 
-static void enable_m32700ut_irq(unsigned int irq)
+static void enable_opsput_irq(unsigned int irq)
 {
 	unsigned long port, data;
 
···
 	outl(data, port);
 }
 
-static void mask_and_ack_m32700ut(unsigned int irq)
+static void mask_and_ack_opsput(unsigned int irq)
 {
-	disable_m32700ut_irq(irq);
+	disable_opsput_irq(irq);
 }
 
-static void end_m32700ut_irq(unsigned int irq)
+static void end_opsput_irq(unsigned int irq)
 {
-	enable_m32700ut_irq(irq);
+	enable_opsput_irq(irq);
 }
 
-static unsigned int startup_m32700ut_irq(unsigned int irq)
+static unsigned int startup_opsput_irq(unsigned int irq)
 {
-	enable_m32700ut_irq(irq);
+	enable_opsput_irq(irq);
 	return (0);
 }
 
-static void shutdown_m32700ut_irq(unsigned int irq)
+static void shutdown_opsput_irq(unsigned int irq)
 {
 	unsigned long port;
 
···
 	outl(M32R_ICUCR_ILEVEL7, port);
 }
 
-static struct hw_interrupt_type m32700ut_irq_type =
+static struct hw_interrupt_type opsput_irq_type =
 {
-	.typename = "M32700UT-IRQ",
-	.startup = startup_m32700ut_irq,
-	.shutdown = shutdown_m32700ut_irq,
-	.enable = enable_m32700ut_irq,
-	.disable = disable_m32700ut_irq,
-	.ack = mask_and_ack_m32700ut,
-	.end = end_m32700ut_irq
+	.typename = "OPSPUT-IRQ",
+	.startup = startup_opsput_irq,
+	.shutdown = shutdown_opsput_irq,
+	.enable = enable_opsput_irq,
+	.disable = disable_opsput_irq,
+	.ack = mask_and_ack_opsput,
+	.end = end_opsput_irq
 };
 
 /*
- * Interrupt Control Unit of PLD on M32700UT (Level 2)
+ * Interrupt Control Unit of PLD on OPSPUT (Level 2)
  */
-#define irq2pldirq(x)		((x) - M32700UT_PLD_IRQ_BASE)
+#define irq2pldirq(x)		((x) - OPSPUT_PLD_IRQ_BASE)
 #define pldirq2port(x)		(unsigned long)((int)PLD_ICUCR1 + \
 				 (((x) - 1) * sizeof(unsigned short)))
 
···
 	unsigned short icucr;  /* ICU Control Register */
 } pld_icu_data_t;
 
-static pld_icu_data_t pld_icu_data[M32700UT_NUM_PLD_IRQ];
+static pld_icu_data_t pld_icu_data[OPSPUT_NUM_PLD_IRQ];
 
-static void disable_m32700ut_pld_irq(unsigned int irq)
+static void disable_opsput_pld_irq(unsigned int irq)
 {
 	unsigned long port, data;
 	unsigned int pldirq;
 
 	pldirq = irq2pldirq(irq);
-//	disable_m32700ut_irq(M32R_IRQ_INT1);
+//	disable_opsput_irq(M32R_IRQ_INT1);
 	port = pldirq2port(pldirq);
 	data = pld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7;
 	outw(data, port);
 }
 
-static void enable_m32700ut_pld_irq(unsigned int irq)
+static void enable_opsput_pld_irq(unsigned int irq)
 {
 	unsigned long port, data;
 	unsigned int pldirq;
 
 	pldirq = irq2pldirq(irq);
-//	enable_m32700ut_irq(M32R_IRQ_INT1);
+//	enable_opsput_irq(M32R_IRQ_INT1);
 	port = pldirq2port(pldirq);
 	data = pld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6;
 	outw(data, port);
 }
 
-static void mask_and_ack_m32700ut_pld(unsigned int irq)
+static void mask_and_ack_opsput_pld(unsigned int irq)
 {
-	disable_m32700ut_pld_irq(irq);
-//	mask_and_ack_m32700ut(M32R_IRQ_INT1);
+	disable_opsput_pld_irq(irq);
+//	mask_and_ack_opsput(M32R_IRQ_INT1);
 }
 
-static void end_m32700ut_pld_irq(unsigned int irq)
+static void end_opsput_pld_irq(unsigned int irq)
 {
-	enable_m32700ut_pld_irq(irq);
-	end_m32700ut_irq(M32R_IRQ_INT1);
+	enable_opsput_pld_irq(irq);
+	end_opsput_irq(M32R_IRQ_INT1);
 }
 
-static unsigned int startup_m32700ut_pld_irq(unsigned int irq)
+static unsigned int startup_opsput_pld_irq(unsigned int irq)
 {
-	enable_m32700ut_pld_irq(irq);
+	enable_opsput_pld_irq(irq);
 	return (0);
 }
 
-static void shutdown_m32700ut_pld_irq(unsigned int irq)
+static void shutdown_opsput_pld_irq(unsigned int irq)
 {
 	unsigned long port;
 	unsigned int pldirq;
 
 	pldirq = irq2pldirq(irq);
-//	shutdown_m32700ut_irq(M32R_IRQ_INT1);
+//	shutdown_opsput_irq(M32R_IRQ_INT1);
 	port = pldirq2port(pldirq);
 	outw(PLD_ICUCR_ILEVEL7, port);
 }
 
-static struct hw_interrupt_type m32700ut_pld_irq_type =
+static struct hw_interrupt_type opsput_pld_irq_type =
 {
-	.typename = "M32700UT-PLD-IRQ",
-	.startup = startup_m32700ut_pld_irq,
-	.shutdown = shutdown_m32700ut_pld_irq,
-	.enable = enable_m32700ut_pld_irq,
-	.disable = disable_m32700ut_pld_irq,
-	.ack = mask_and_ack_m32700ut_pld,
-	.end = end_m32700ut_pld_irq
+	.typename = "OPSPUT-PLD-IRQ",
+	.startup = startup_opsput_pld_irq,
+	.shutdown = shutdown_opsput_pld_irq,
+	.enable = enable_opsput_pld_irq,
+	.disable = disable_opsput_pld_irq,
+	.ack = mask_and_ack_opsput_pld,
+	.end = end_opsput_pld_irq
 };
 
 /*
- * Interrupt Control Unit of PLD on M32700UT-LAN (Level 2)
+ * Interrupt Control Unit of PLD on OPSPUT-LAN (Level 2)
  */
-#define irq2lanpldirq(x)	((x) - M32700UT_LAN_PLD_IRQ_BASE)
-#define lanpldirq2port(x)	(unsigned long)((int)M32700UT_LAN_ICUCR1 + \
+#define irq2lanpldirq(x)	((x) - OPSPUT_LAN_PLD_IRQ_BASE)
+#define lanpldirq2port(x)	(unsigned long)((int)OPSPUT_LAN_ICUCR1 + \
 				 (((x) - 1) * sizeof(unsigned short)))
 
-static pld_icu_data_t lanpld_icu_data[M32700UT_NUM_LAN_PLD_IRQ];
+static pld_icu_data_t lanpld_icu_data[OPSPUT_NUM_LAN_PLD_IRQ];
 
-static void disable_m32700ut_lanpld_irq(unsigned int irq)
+static void disable_opsput_lanpld_irq(unsigned int irq)
 {
 	unsigned long port, data;
 	unsigned int pldirq;
···
 	outw(data, port);
 }
 
-static void enable_m32700ut_lanpld_irq(unsigned int irq)
+static void enable_opsput_lanpld_irq(unsigned int irq)
 {
 	unsigned long port, data;
 	unsigned int pldirq;
···
 	outw(data, port);
 }
 
-static void mask_and_ack_m32700ut_lanpld(unsigned int irq)
+static void mask_and_ack_opsput_lanpld(unsigned int irq)
 {
-	disable_m32700ut_lanpld_irq(irq);
+	disable_opsput_lanpld_irq(irq);
 }
 
-static void end_m32700ut_lanpld_irq(unsigned int irq)
+static void end_opsput_lanpld_irq(unsigned int irq)
 {
-	enable_m32700ut_lanpld_irq(irq);
-	end_m32700ut_irq(M32R_IRQ_INT0);
+	enable_opsput_lanpld_irq(irq);
+	end_opsput_irq(M32R_IRQ_INT0);
 }
 
-static unsigned int startup_m32700ut_lanpld_irq(unsigned int irq)
+static unsigned int startup_opsput_lanpld_irq(unsigned int irq)
 {
-	enable_m32700ut_lanpld_irq(irq);
+	enable_opsput_lanpld_irq(irq);
 	return (0);
 }
 
-static void shutdown_m32700ut_lanpld_irq(unsigned int irq)
+static void shutdown_opsput_lanpld_irq(unsigned int irq)
 {
 	unsigned long port;
 	unsigned int pldirq;
···
 	outw(PLD_ICUCR_ILEVEL7, port);
 }
 
-static struct hw_interrupt_type m32700ut_lanpld_irq_type =
+static struct hw_interrupt_type opsput_lanpld_irq_type =
 {
-	.typename = "M32700UT-PLD-LAN-IRQ",
-	.startup = startup_m32700ut_lanpld_irq,
-	.shutdown = shutdown_m32700ut_lanpld_irq,
-	.enable = enable_m32700ut_lanpld_irq,
-	.disable = disable_m32700ut_lanpld_irq,
-	.ack = mask_and_ack_m32700ut_lanpld,
-	.end = end_m32700ut_lanpld_irq
+	.typename = "OPSPUT-PLD-LAN-IRQ",
+	.startup = startup_opsput_lanpld_irq,
+	.shutdown = shutdown_opsput_lanpld_irq,
+	.enable = enable_opsput_lanpld_irq,
+	.disable = disable_opsput_lanpld_irq,
+	.ack = mask_and_ack_opsput_lanpld,
+	.end = end_opsput_lanpld_irq
 };
 
 /*
- * Interrupt Control Unit of PLD on M32700UT-LCD (Level 2)
+ * Interrupt Control Unit of PLD on OPSPUT-LCD (Level 2)
  */
-#define irq2lcdpldirq(x)	((x) - M32700UT_LCD_PLD_IRQ_BASE)
-#define lcdpldirq2port(x)	(unsigned long)((int)M32700UT_LCD_ICUCR1 + \
+#define irq2lcdpldirq(x)	((x) - OPSPUT_LCD_PLD_IRQ_BASE)
+#define lcdpldirq2port(x)	(unsigned long)((int)OPSPUT_LCD_ICUCR1 + \
 				 (((x) - 1) * sizeof(unsigned short)))
 
-static pld_icu_data_t lcdpld_icu_data[M32700UT_NUM_LCD_PLD_IRQ];
+static pld_icu_data_t lcdpld_icu_data[OPSPUT_NUM_LCD_PLD_IRQ];
 
-static void disable_m32700ut_lcdpld_irq(unsigned int irq)
+static void disable_opsput_lcdpld_irq(unsigned int irq)
 {
 	unsigned long port, data;
 	unsigned int pldirq;
···
 	outw(data, port);
 }
 
-static void enable_m32700ut_lcdpld_irq(unsigned int irq)
+static void enable_opsput_lcdpld_irq(unsigned int irq)
 {
 	unsigned long port, data;
 	unsigned int pldirq;
···
 	outw(data, port);
 }
 
-static void mask_and_ack_m32700ut_lcdpld(unsigned int irq)
+static void mask_and_ack_opsput_lcdpld(unsigned int irq)
 {
-	disable_m32700ut_lcdpld_irq(irq);
+	disable_opsput_lcdpld_irq(irq);
 }
 
-static void end_m32700ut_lcdpld_irq(unsigned int irq)
+static void end_opsput_lcdpld_irq(unsigned int irq)
 {
-	enable_m32700ut_lcdpld_irq(irq);
-	end_m32700ut_irq(M32R_IRQ_INT2);
+	enable_opsput_lcdpld_irq(irq);
+	end_opsput_irq(M32R_IRQ_INT2);
 }
 
-static unsigned int startup_m32700ut_lcdpld_irq(unsigned int irq)
+static unsigned int startup_opsput_lcdpld_irq(unsigned int irq)
 {
-	enable_m32700ut_lcdpld_irq(irq);
+	enable_opsput_lcdpld_irq(irq);
 	return (0);
 }
 
-static void shutdown_m32700ut_lcdpld_irq(unsigned int irq)
+static void shutdown_opsput_lcdpld_irq(unsigned int irq)
 {
 	unsigned long port;
 	unsigned int pldirq;
···
 	outw(PLD_ICUCR_ILEVEL7, port);
 }
 
-static struct hw_interrupt_type m32700ut_lcdpld_irq_type =
+static struct hw_interrupt_type opsput_lcdpld_irq_type =
 {
-	.typename = "M32700UT-PLD-LCD-IRQ",
-	.startup = startup_m32700ut_lcdpld_irq,
-	.shutdown = shutdown_m32700ut_lcdpld_irq,
-	.enable = enable_m32700ut_lcdpld_irq,
-	.disable = disable_m32700ut_lcdpld_irq,
-	.ack = mask_and_ack_m32700ut_lcdpld,
-	.end = end_m32700ut_lcdpld_irq
+	"OPSPUT-PLD-LCD-IRQ",
+	startup_opsput_lcdpld_irq,
+	shutdown_opsput_lcdpld_irq,
+	enable_opsput_lcdpld_irq,
+	disable_opsput_lcdpld_irq,
+	mask_and_ack_opsput_lcdpld,
+	end_opsput_lcdpld_irq
 };
 
 void __init init_IRQ(void)
 {
 #if defined(CONFIG_SMC91X)
-	/* INT#0: LAN controller on M32700UT-LAN (SMC91C111)*/
-	irq_desc[M32700UT_LAN_IRQ_LAN].status = IRQ_DISABLED;
-	irq_desc[M32700UT_LAN_IRQ_LAN].chip = &m32700ut_lanpld_irq_type;
-	irq_desc[M32700UT_LAN_IRQ_LAN].action = 0;
-	irq_desc[M32700UT_LAN_IRQ_LAN].depth = 1;	/* disable nested irq */
-	lanpld_icu_data[irq2lanpldirq(M32700UT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02;	/* "H" edge sense */
-	disable_m32700ut_lanpld_irq(M32700UT_LAN_IRQ_LAN);
+	/* INT#0: LAN controller on OPSPUT-LAN (SMC91C111)*/
+	irq_desc[OPSPUT_LAN_IRQ_LAN].status = IRQ_DISABLED;
+	irq_desc[OPSPUT_LAN_IRQ_LAN].chip = &opsput_lanpld_irq_type;
+	irq_desc[OPSPUT_LAN_IRQ_LAN].action = 0;
+	irq_desc[OPSPUT_LAN_IRQ_LAN].depth = 1;	/* disable nested irq */
+	lanpld_icu_data[irq2lanpldirq(OPSPUT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02;	/* "H" edge sense */
+	disable_opsput_lanpld_irq(OPSPUT_LAN_IRQ_LAN);
 #endif  /* CONFIG_SMC91X */
 
 	/* MFT2 : system timer */
 	irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-	irq_desc[M32R_IRQ_MFT2].chip = &m32700ut_irq_type;
+	irq_desc[M32R_IRQ_MFT2].chip = &opsput_irq_type;
 	irq_desc[M32R_IRQ_MFT2].action = 0;
 	irq_desc[M32R_IRQ_MFT2].depth = 1;
 	icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
-	disable_m32700ut_irq(M32R_IRQ_MFT2);
+	disable_opsput_irq(M32R_IRQ_MFT2);
 
 	/* SIO0 : receive */
 	irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-	irq_desc[M32R_IRQ_SIO0_R].chip = &m32700ut_irq_type;
+	irq_desc[M32R_IRQ_SIO0_R].chip = &opsput_irq_type;
 	irq_desc[M32R_IRQ_SIO0_R].action = 0;
 	irq_desc[M32R_IRQ_SIO0_R].depth = 1;
 	icu_data[M32R_IRQ_SIO0_R].icucr = 0;
-	disable_m32700ut_irq(M32R_IRQ_SIO0_R);
+	disable_opsput_irq(M32R_IRQ_SIO0_R);
 
 	/* SIO0 : send */
 	irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-	irq_desc[M32R_IRQ_SIO0_S].chip = &m32700ut_irq_type;
+	irq_desc[M32R_IRQ_SIO0_S].chip = &opsput_irq_type;
 	irq_desc[M32R_IRQ_SIO0_S].action = 0;
 	irq_desc[M32R_IRQ_SIO0_S].depth = 1;
 	icu_data[M32R_IRQ_SIO0_S].icucr = 0;
-	disable_m32700ut_irq(M32R_IRQ_SIO0_S);
+	disable_opsput_irq(M32R_IRQ_SIO0_S);
 
 	/* SIO1 : receive */
 	irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-	irq_desc[M32R_IRQ_SIO1_R].chip = &m32700ut_irq_type;
+	irq_desc[M32R_IRQ_SIO1_R].chip = &opsput_irq_type;
 	irq_desc[M32R_IRQ_SIO1_R].action = 0;
 	irq_desc[M32R_IRQ_SIO1_R].depth = 1;
 	icu_data[M32R_IRQ_SIO1_R].icucr = 0;
-	disable_m32700ut_irq(M32R_IRQ_SIO1_R);
+	disable_opsput_irq(M32R_IRQ_SIO1_R);
 
 	/* SIO1 : send */
 	irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-	irq_desc[M32R_IRQ_SIO1_S].chip = &m32700ut_irq_type;
+	irq_desc[M32R_IRQ_SIO1_S].chip = &opsput_irq_type;
 	irq_desc[M32R_IRQ_SIO1_S].action = 0;
 	irq_desc[M32R_IRQ_SIO1_S].depth = 1;
 	icu_data[M32R_IRQ_SIO1_S].icucr = 0;
-	disable_m32700ut_irq(M32R_IRQ_SIO1_S);
+	disable_opsput_irq(M32R_IRQ_SIO1_S);
 
 	/* DMA1 : */
 	irq_desc[M32R_IRQ_DMA1].status = IRQ_DISABLED;
-	irq_desc[M32R_IRQ_DMA1].chip = &m32700ut_irq_type;
+	irq_desc[M32R_IRQ_DMA1].chip = &opsput_irq_type;
 	irq_desc[M32R_IRQ_DMA1].action = 0;
 	irq_desc[M32R_IRQ_DMA1].depth = 1;
 	icu_data[M32R_IRQ_DMA1].icucr = 0;
-	disable_m32700ut_irq(M32R_IRQ_DMA1);
+	disable_opsput_irq(M32R_IRQ_DMA1);
 
 #ifdef CONFIG_SERIAL_M32R_PLDSIO
 	/* INT#1: SIO0 Receive on PLD */
 	irq_desc[PLD_IRQ_SIO0_RCV].status = IRQ_DISABLED;
-	irq_desc[PLD_IRQ_SIO0_RCV].chip = &m32700ut_pld_irq_type;
+	irq_desc[PLD_IRQ_SIO0_RCV].chip = &opsput_pld_irq_type;
 	irq_desc[PLD_IRQ_SIO0_RCV].action = 0;
 	irq_desc[PLD_IRQ_SIO0_RCV].depth = 1;	/* disable nested irq */
 	pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
-	disable_m32700ut_pld_irq(PLD_IRQ_SIO0_RCV);
+	disable_opsput_pld_irq(PLD_IRQ_SIO0_RCV);
 
 	/* INT#1: SIO0 Send on PLD */
 	irq_desc[PLD_IRQ_SIO0_SND].status = IRQ_DISABLED;
-	irq_desc[PLD_IRQ_SIO0_SND].chip = &m32700ut_pld_irq_type;
+	irq_desc[PLD_IRQ_SIO0_SND].chip = &opsput_pld_irq_type;
 	irq_desc[PLD_IRQ_SIO0_SND].action = 0;
 	irq_desc[PLD_IRQ_SIO0_SND].depth = 1;	/* disable nested irq */
 	pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
-	disable_m32700ut_pld_irq(PLD_IRQ_SIO0_SND);
+	disable_opsput_pld_irq(PLD_IRQ_SIO0_SND);
 #endif  /* CONFIG_SERIAL_M32R_PLDSIO */
 
 	/* INT#1: CFC IREQ on PLD */
 	irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
-	irq_desc[PLD_IRQ_CFIREQ].chip = &m32700ut_pld_irq_type;
+	irq_desc[PLD_IRQ_CFIREQ].chip = &opsput_pld_irq_type;
 	irq_desc[PLD_IRQ_CFIREQ].action = 0;
 	irq_desc[PLD_IRQ_CFIREQ].depth = 1;	/* disable nested irq */
 	pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01;	/* 'L' level sense */
-	disable_m32700ut_pld_irq(PLD_IRQ_CFIREQ);
+	disable_opsput_pld_irq(PLD_IRQ_CFIREQ);
 
 	/* INT#1: CFC Insert on PLD */
 	irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
-	irq_desc[PLD_IRQ_CFC_INSERT].chip = &m32700ut_pld_irq_type;
+	irq_desc[PLD_IRQ_CFC_INSERT].chip = &opsput_pld_irq_type;
 	irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
 	irq_desc[PLD_IRQ_CFC_INSERT].depth = 1;	/* disable nested irq */
 	pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00;	/* 'L' edge sense */
-	disable_m32700ut_pld_irq(PLD_IRQ_CFC_INSERT);
+	disable_opsput_pld_irq(PLD_IRQ_CFC_INSERT);
 
 	/* INT#1: CFC Eject on PLD */
 	irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
-	irq_desc[PLD_IRQ_CFC_EJECT].chip = &m32700ut_pld_irq_type;
+	irq_desc[PLD_IRQ_CFC_EJECT].chip = &opsput_pld_irq_type;
 	irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
 	irq_desc[PLD_IRQ_CFC_EJECT].depth = 1;	/* disable nested irq */
 	pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02;	/* 'H' edge sense */
-	disable_m32700ut_pld_irq(PLD_IRQ_CFC_EJECT);
+	disable_opsput_pld_irq(PLD_IRQ_CFC_EJECT);
 
 	/*
 	 * INT0# is used for LAN, DIO
 	 * We enable it here.
 	 */
 	icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
-	enable_m32700ut_irq(M32R_IRQ_INT0);
+	enable_opsput_irq(M32R_IRQ_INT0);
 
 	/*
 	 * INT1# is used for UART, MMC, CF Controller in FPGA.
 	 * We enable it here.
 	 */
 	icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
-	enable_m32700ut_irq(M32R_IRQ_INT1);
+	enable_opsput_irq(M32R_IRQ_INT1);
 
 #if defined(CONFIG_USB)
 	outw(USBCR_OTGS, USBCR); 	/* USBCR: non-OTG */
 
-    irq_desc[M32700UT_LCD_IRQ_USB_INT1].status = IRQ_DISABLED;
-    irq_desc[M32700UT_LCD_IRQ_USB_INT1].chip = &m32700ut_lcdpld_irq_type;
-    irq_desc[M32700UT_LCD_IRQ_USB_INT1].action = 0;
-    irq_desc[M32700UT_LCD_IRQ_USB_INT1].depth = 1;
-    lcdpld_icu_data[irq2lcdpldirq(M32700UT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01;	/* "L" level sense */
-    disable_m32700ut_lcdpld_irq(M32700UT_LCD_IRQ_USB_INT1);
+    irq_desc[OPSPUT_LCD_IRQ_USB_INT1].status = IRQ_DISABLED;
+    irq_desc[OPSPUT_LCD_IRQ_USB_INT1].chip = &opsput_lcdpld_irq_type;
+    irq_desc[OPSPUT_LCD_IRQ_USB_INT1].action = 0;
+    irq_desc[OPSPUT_LCD_IRQ_USB_INT1].depth = 1;
+    lcdpld_icu_data[irq2lcdpldirq(OPSPUT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01;	/* "L" level sense */
+    disable_opsput_lcdpld_irq(OPSPUT_LCD_IRQ_USB_INT1);
 #endif
 	/*
 	 * INT2# is used for BAT, USB, AUDIO
 	 * We enable it here.
 	 */
 	icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
-	enable_m32700ut_irq(M32R_IRQ_INT2);
+	enable_opsput_irq(M32R_IRQ_INT2);
 
 #if defined(CONFIG_VIDEO_M32R_AR)
 	/*
 	 * INT3# is used for AR
 	 */
 	irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED;
-	irq_desc[M32R_IRQ_INT3].chip = &m32700ut_irq_type;
+	irq_desc[M32R_IRQ_INT3].chip = &opsput_irq_type;
 	irq_desc[M32R_IRQ_INT3].action = 0;
 	irq_desc[M32R_IRQ_INT3].depth = 1;
 	icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
-	disable_m32700ut_irq(M32R_IRQ_INT3);
-#endif	/* CONFIG_VIDEO_M32R_AR */
+	disable_opsput_irq(M32R_IRQ_INT3);
+#endif /* CONFIG_VIDEO_M32R_AR */
 }
 
 #if defined(CONFIG_SMC91X)
···
 		.flags  = IORESOURCE_MEM,
 	},
 	[1] = {
-		.start  = M32700UT_LAN_IRQ_LAN,
-		.end    = M32700UT_LAN_IRQ_LAN,
+		.start  = OPSPUT_LAN_IRQ_LAN,
+		.end    = OPSPUT_LAN_IRQ_LAN,
 		.flags  = IORESOURCE_IRQ,
 	}
 };

arch/m32r/kernel/setup_mappi.c arch/m32r/platforms/mappi/setup.c

···
 /*
- *  linux/arch/m32r/kernel/setup_mappi.c
+ *  linux/arch/m32r/platforms/mappi/setup.c
  *
  *  Setup routines for Renesas MAPPI Board
  *

arch/m32r/kernel/setup_mappi2.c arch/m32r/platforms/mappi3/setup.c

···
 /*
- *  linux/arch/m32r/kernel/setup_mappi2.c
+ *  linux/arch/m32r/platforms/mappi3/setup.c
  *
- *  Setup routines for Renesas MAPPI-II(M3A-ZA36) Board
+ *  Setup routines for Renesas MAPPI-III(M3A-2170) Board
  *
  *  Copyright (c) 2001-2005  Hiroyuki Kondo, Hirokazu Takata,
  *                           Hitoshi Yamamoto, Mamoru Sakugawa
···
 
 icu_data_t icu_data[NR_IRQS];
 
-static void disable_mappi2_irq(unsigned int irq)
+static void disable_mappi3_irq(unsigned int irq)
 {
 	unsigned long port, data;
 
···
 	outl(data, port);
 }
 
-static void enable_mappi2_irq(unsigned int irq)
+static void enable_mappi3_irq(unsigned int irq)
 {
 	unsigned long port, data;
 
···
 	outl(data, port);
 }
 
-static void mask_and_ack_mappi2(unsigned int irq)
+static void mask_and_ack_mappi3(unsigned int irq)
 {
-	disable_mappi2_irq(irq);
+	disable_mappi3_irq(irq);
 }
 
-static void end_mappi2_irq(unsigned int irq)
+static void end_mappi3_irq(unsigned int irq)
 {
-	enable_mappi2_irq(irq);
+	enable_mappi3_irq(irq);
 }
 
-static unsigned int startup_mappi2_irq(unsigned int irq)
+static unsigned int startup_mappi3_irq(unsigned int irq)
 {
-	enable_mappi2_irq(irq);
+	enable_mappi3_irq(irq);
 	return (0);
 }
 
-static void shutdown_mappi2_irq(unsigned int irq)
+static void shutdown_mappi3_irq(unsigned int irq)
 {
 	unsigned long port;
 
···
 	outl(M32R_ICUCR_ILEVEL7, port);
 }
 
-static struct hw_interrupt_type mappi2_irq_type =
+static struct hw_interrupt_type mappi3_irq_type =
 {
-	.typename = "MAPPI2-IRQ",
-	.startup = startup_mappi2_irq,
-	.shutdown = shutdown_mappi2_irq,
-	.enable = enable_mappi2_irq,
-	.disable = disable_mappi2_irq,
-	.ack = mask_and_ack_mappi2,
-	.end = end_mappi2_irq
+	.typename = "MAPPI3-IRQ",
+	.startup = startup_mappi3_irq,
+	.shutdown = shutdown_mappi3_irq,
+	.enable = enable_mappi3_irq,
+	.disable = disable_mappi3_irq,
+	.ack = mask_and_ack_mappi3,
+	.end = end_mappi3_irq
 };
 
 void __init init_IRQ(void)
···
 #if defined(CONFIG_SMC91X)
 	/* INT0 : LAN controller (SMC91111) */
 	irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
-	irq_desc[M32R_IRQ_INT0].chip = &mappi2_irq_type;
+	irq_desc[M32R_IRQ_INT0].chip = &mappi3_irq_type;
 	irq_desc[M32R_IRQ_INT0].action = 0;
 	irq_desc[M32R_IRQ_INT0].depth = 1;
 	icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
-	disable_mappi2_irq(M32R_IRQ_INT0);
+	disable_mappi3_irq(M32R_IRQ_INT0);
 #endif  /* CONFIG_SMC91X */
 
 	/* MFT2 : system timer */
 	irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-	irq_desc[M32R_IRQ_MFT2].chip = &mappi2_irq_type;
+	irq_desc[M32R_IRQ_MFT2].chip = &mappi3_irq_type;
 	irq_desc[M32R_IRQ_MFT2].action = 0;
 	irq_desc[M32R_IRQ_MFT2].depth = 1;
 	icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
-	disable_mappi2_irq(M32R_IRQ_MFT2);
+	disable_mappi3_irq(M32R_IRQ_MFT2);
 
 #ifdef CONFIG_SERIAL_M32R_SIO
 	/* SIO0_R : uart receive data */
 	irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-	irq_desc[M32R_IRQ_SIO0_R].chip = &mappi2_irq_type;
+	irq_desc[M32R_IRQ_SIO0_R].chip = &mappi3_irq_type;
 	irq_desc[M32R_IRQ_SIO0_R].action = 0;
 	irq_desc[M32R_IRQ_SIO0_R].depth = 1;
 	icu_data[M32R_IRQ_SIO0_R].icucr = 0;
-	disable_mappi2_irq(M32R_IRQ_SIO0_R);
+	disable_mappi3_irq(M32R_IRQ_SIO0_R);
 
 	/* SIO0_S : uart send data */
 	irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-	irq_desc[M32R_IRQ_SIO0_S].chip = &mappi2_irq_type;
+	irq_desc[M32R_IRQ_SIO0_S].chip = &mappi3_irq_type;
 	irq_desc[M32R_IRQ_SIO0_S].action = 0;
 	irq_desc[M32R_IRQ_SIO0_S].depth = 1;
 	icu_data[M32R_IRQ_SIO0_S].icucr = 0;
-	disable_mappi2_irq(M32R_IRQ_SIO0_S);
+	disable_mappi3_irq(M32R_IRQ_SIO0_S);
 	/* SIO1_R : uart receive data */
 	irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-	irq_desc[M32R_IRQ_SIO1_R].chip = &mappi2_irq_type;
+	irq_desc[M32R_IRQ_SIO1_R].chip = &mappi3_irq_type;
 	irq_desc[M32R_IRQ_SIO1_R].action = 0;
 	irq_desc[M32R_IRQ_SIO1_R].depth = 1;
 	icu_data[M32R_IRQ_SIO1_R].icucr = 0;
-	disable_mappi2_irq(M32R_IRQ_SIO1_R);
+	disable_mappi3_irq(M32R_IRQ_SIO1_R);
 
 	/* SIO1_S : uart send data */
 	irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-	irq_desc[M32R_IRQ_SIO1_S].chip = &mappi2_irq_type;
+	irq_desc[M32R_IRQ_SIO1_S].chip = &mappi3_irq_type;
 	irq_desc[M32R_IRQ_SIO1_S].action = 0;
 	irq_desc[M32R_IRQ_SIO1_S].depth = 1;
 	icu_data[M32R_IRQ_SIO1_S].icucr = 0;
-	disable_mappi2_irq(M32R_IRQ_SIO1_S);
+	disable_mappi3_irq(M32R_IRQ_SIO1_S);
 #endif  /* CONFIG_M32R_USE_DBG_CONSOLE */
 
 #if defined(CONFIG_USB)
 	/* INT1 : USB Host controller interrupt */
 	irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
-	irq_desc[M32R_IRQ_INT1].chip = &mappi2_irq_type;
+	irq_desc[M32R_IRQ_INT1].chip = &mappi3_irq_type;
 	irq_desc[M32R_IRQ_INT1].action = 0;
 	irq_desc[M32R_IRQ_INT1].depth = 1;
 	icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
-	disable_mappi2_irq(M32R_IRQ_INT1);
+	disable_mappi3_irq(M32R_IRQ_INT1);
 #endif /* CONFIG_USB */
 
-	/* ICUCR40: CFC IREQ */
+	/* CFC IREQ */
 	irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
-	irq_desc[PLD_IRQ_CFIREQ].chip = &mappi2_irq_type;
+	irq_desc[PLD_IRQ_CFIREQ].chip = &mappi3_irq_type;
 	irq_desc[PLD_IRQ_CFIREQ].action = 0;
 	irq_desc[PLD_IRQ_CFIREQ].depth = 1;	/* disable nested irq */
 	icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
-	disable_mappi2_irq(PLD_IRQ_CFIREQ);
+	disable_mappi3_irq(PLD_IRQ_CFIREQ);
 
 #if defined(CONFIG_M32R_CFC)
-	/* ICUCR41: CFC Insert */
+	/* ICUCR41: CFC Insert & eject */
 	irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
-	irq_desc[PLD_IRQ_CFC_INSERT].chip = &mappi2_irq_type;
+	irq_desc[PLD_IRQ_CFC_INSERT].chip = &mappi3_irq_type;
 	irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
 	irq_desc[PLD_IRQ_CFC_INSERT].depth = 1;	/* disable nested irq */
 	icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
-	disable_mappi2_irq(PLD_IRQ_CFC_INSERT);
+	disable_mappi3_irq(PLD_IRQ_CFC_INSERT);
 
-	/* ICUCR42: CFC Eject */
-	irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
-	irq_desc[PLD_IRQ_CFC_EJECT].chip = &mappi2_irq_type;
-	irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
-	irq_desc[PLD_IRQ_CFC_EJECT].depth = 1;	/* disable nested irq */
-	icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
-	disable_mappi2_irq(PLD_IRQ_CFC_EJECT);
-#endif /* CONFIG_MAPPI2_CFC */
+#endif /* CONFIG_M32R_CFC */
+
+	/* IDE IREQ */
+	irq_desc[PLD_IRQ_IDEIREQ].status = IRQ_DISABLED;
+	irq_desc[PLD_IRQ_IDEIREQ].chip = &mappi3_irq_type;
+	irq_desc[PLD_IRQ_IDEIREQ].action = 0;
+	irq_desc[PLD_IRQ_IDEIREQ].depth = 1;	/* disable nested irq */
+	icu_data[PLD_IRQ_IDEIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
+	disable_mappi3_irq(PLD_IRQ_IDEIREQ);
+
 }
+
+#if defined(CONFIG_SMC91X)
 
 #define LAN_IOSTART     0x300
 #define LAN_IOEND       0x320
···
 	.resource       = smc91x_resources,
 };
 
+#endif
+
+#if defined(CONFIG_FB_S1D13XXX)
+
+#include <video/s1d13xxxfb.h>
+#include <asm/s1d13806.h>
+
+static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
+	.initregs		= s1d13xxxfb_initregs,
+	.initregssize		= ARRAY_SIZE(s1d13xxxfb_initregs),
+	.platform_init_video	= NULL,
+#ifdef CONFIG_PM
+	.platform_suspend_video	= NULL,
+	.platform_resume_video	= NULL,
+#endif
+};
+
+static struct resource s1d13xxxfb_resources[] = {
+	[0] = {
+		.start  = 0x1d600000UL,
+		.end    = 0x1d73FFFFUL,
+		.flags  = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start  = 0x1d400000UL,
+		.end    = 0x1d4001FFUL,
+		.flags  = IORESOURCE_MEM,
+	}
+};
+
+static struct platform_device s1d13xxxfb_device = {
+	.name		= S1D_DEVICENAME,
+	.id		= 0,
+	.dev            = {
+		.platform_data  = &s1d13xxxfb_data,
+	},
+	.num_resources  = ARRAY_SIZE(s1d13xxxfb_resources),
+	.resource       = s1d13xxxfb_resources,
+};
+#endif
+
 static int __init platform_init(void)
 {
+#if defined(CONFIG_SMC91X)
 	platform_device_register(&smc91x_device);
+#endif
+#if defined(CONFIG_FB_S1D13XXX)
+	platform_device_register(&s1d13xxxfb_device);
+#endif
 	return 0;
 }
 arch_initcall(platform_init);

arch/m32r/kernel/setup_mappi3.c arch/m32r/platforms/mappi2/setup.c

···
 /*
- *  linux/arch/m32r/kernel/setup_mappi3.c
+ *  linux/arch/m32r/platforms/mappi2/setup.c
  *
- *  Setup routines for Renesas MAPPI-III(M3A-2170) Board
+ *  Setup routines for Renesas MAPPI-II(M3A-ZA36) Board
  *
  *  Copyright (c) 2001-2005  Hiroyuki Kondo, Hirokazu Takata,
  *                           Hitoshi Yamamoto, Mamoru Sakugawa
···
 
 icu_data_t icu_data[NR_IRQS];
 
-static void disable_mappi3_irq(unsigned int irq)
+static void disable_mappi2_irq(unsigned int irq)
 {
 	unsigned long port, data;
 
···
 	outl(data, port);
 }
 
-static void enable_mappi3_irq(unsigned int irq)
+static void enable_mappi2_irq(unsigned int irq)
 {
 	unsigned long port, data;
 
···
 	outl(data, port);
 }
 
-static void mask_and_ack_mappi3(unsigned int irq)
+static void mask_and_ack_mappi2(unsigned int irq)
 {
-	disable_mappi3_irq(irq);
+	disable_mappi2_irq(irq);
 }
 
-static void end_mappi3_irq(unsigned int irq)
+static void end_mappi2_irq(unsigned int irq)
 {
-	enable_mappi3_irq(irq);
+	enable_mappi2_irq(irq);
 }
 
-static unsigned int startup_mappi3_irq(unsigned int irq)
+static unsigned int startup_mappi2_irq(unsigned int irq)
 {
-	enable_mappi3_irq(irq);
+	enable_mappi2_irq(irq);
 	return (0);
 }
 
-static void shutdown_mappi3_irq(unsigned int irq)
+static void shutdown_mappi2_irq(unsigned int irq)
 {
 	unsigned long port;
 
···
 	outl(M32R_ICUCR_ILEVEL7, port);
 }
 
-static struct hw_interrupt_type mappi3_irq_type =
+static struct hw_interrupt_type mappi2_irq_type =
 {
-	.typename = "MAPPI3-IRQ",
-	.startup = startup_mappi3_irq,
-	.shutdown = shutdown_mappi3_irq,
-	.enable = enable_mappi3_irq,
-	.disable = disable_mappi3_irq,
-	.ack = mask_and_ack_mappi3,
-	.end = end_mappi3_irq
+	.typename = "MAPPI2-IRQ",
+	.startup = startup_mappi2_irq,
+	.shutdown = shutdown_mappi2_irq,
+	.enable = enable_mappi2_irq,
+	.disable = disable_mappi2_irq,
+	.ack = mask_and_ack_mappi2,
+	.end = end_mappi2_irq
 };
 
 void __init init_IRQ(void)
···
 #if defined(CONFIG_SMC91X)
 	/* INT0 : LAN controller (SMC91111) */
 	irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
-	irq_desc[M32R_IRQ_INT0].chip = &mappi3_irq_type;
+	irq_desc[M32R_IRQ_INT0].chip = &mappi2_irq_type;
 	irq_desc[M32R_IRQ_INT0].action = 0;
 	irq_desc[M32R_IRQ_INT0].depth = 1;
 	icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
-	disable_mappi3_irq(M32R_IRQ_INT0);
+	disable_mappi2_irq(M32R_IRQ_INT0);
 #endif  /* CONFIG_SMC91X */
 
 	/* MFT2 : system timer */
 	irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-	irq_desc[M32R_IRQ_MFT2].chip = &mappi3_irq_type;
+	irq_desc[M32R_IRQ_MFT2].chip = &mappi2_irq_type;
 	irq_desc[M32R_IRQ_MFT2].action = 0;
 	irq_desc[M32R_IRQ_MFT2].depth = 1;
 	icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
-	disable_mappi3_irq(M32R_IRQ_MFT2);
+	disable_mappi2_irq(M32R_IRQ_MFT2);
 
 #ifdef CONFIG_SERIAL_M32R_SIO
 	/* SIO0_R : uart receive data */
 	irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-	irq_desc[M32R_IRQ_SIO0_R].chip = &mappi3_irq_type;
+	irq_desc[M32R_IRQ_SIO0_R].chip = &mappi2_irq_type;
 	irq_desc[M32R_IRQ_SIO0_R].action = 0;
 	irq_desc[M32R_IRQ_SIO0_R].depth = 1;
 	icu_data[M32R_IRQ_SIO0_R].icucr = 0;
-	disable_mappi3_irq(M32R_IRQ_SIO0_R);
+	disable_mappi2_irq(M32R_IRQ_SIO0_R);
 
 	/* SIO0_S : uart send data */
 	irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-	irq_desc[M32R_IRQ_SIO0_S].chip = &mappi3_irq_type;
+	irq_desc[M32R_IRQ_SIO0_S].chip = &mappi2_irq_type;
 	irq_desc[M32R_IRQ_SIO0_S].action = 0;
 	irq_desc[M32R_IRQ_SIO0_S].depth = 1;
 	icu_data[M32R_IRQ_SIO0_S].icucr = 0;
-	disable_mappi3_irq(M32R_IRQ_SIO0_S);
+	disable_mappi2_irq(M32R_IRQ_SIO0_S);
 	/* SIO1_R : uart receive data */
 	irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-	irq_desc[M32R_IRQ_SIO1_R].chip = &mappi3_irq_type;
+	irq_desc[M32R_IRQ_SIO1_R].chip = &mappi2_irq_type;
 	irq_desc[M32R_IRQ_SIO1_R].action = 0;
 	irq_desc[M32R_IRQ_SIO1_R].depth = 1;
 	icu_data[M32R_IRQ_SIO1_R].icucr = 0;
-	disable_mappi3_irq(M32R_IRQ_SIO1_R);
+	disable_mappi2_irq(M32R_IRQ_SIO1_R);
 
 	/* SIO1_S : uart send data */
 	irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-	irq_desc[M32R_IRQ_SIO1_S].chip = &mappi3_irq_type;
+	irq_desc[M32R_IRQ_SIO1_S].chip = &mappi2_irq_type;
 	irq_desc[M32R_IRQ_SIO1_S].action = 0;
 	irq_desc[M32R_IRQ_SIO1_S].depth = 1;
 	icu_data[M32R_IRQ_SIO1_S].icucr = 0;
-	disable_mappi3_irq(M32R_IRQ_SIO1_S);
+	disable_mappi2_irq(M32R_IRQ_SIO1_S);
 #endif  /* CONFIG_M32R_USE_DBG_CONSOLE */
 
 #if defined(CONFIG_USB)
 	/* INT1 : USB Host controller interrupt */
 	irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
-	irq_desc[M32R_IRQ_INT1].chip = &mappi3_irq_type;
+	irq_desc[M32R_IRQ_INT1].chip = &mappi2_irq_type;
 	irq_desc[M32R_IRQ_INT1].action = 0;
 	irq_desc[M32R_IRQ_INT1].depth = 1;
 	icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
-	disable_mappi3_irq(M32R_IRQ_INT1);
+	disable_mappi2_irq(M32R_IRQ_INT1);
 #endif /* CONFIG_USB */
 
-	/* CFC IREQ */
+	/* ICUCR40: CFC IREQ */
 	irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
-	irq_desc[PLD_IRQ_CFIREQ].chip = &mappi3_irq_type;
+	irq_desc[PLD_IRQ_CFIREQ].chip = &mappi2_irq_type;
 	irq_desc[PLD_IRQ_CFIREQ].action = 0;
 	irq_desc[PLD_IRQ_CFIREQ].depth = 1;	/* disable nested irq */
 	icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
-	disable_mappi3_irq(PLD_IRQ_CFIREQ);
+	disable_mappi2_irq(PLD_IRQ_CFIREQ);
 
 #if defined(CONFIG_M32R_CFC)
-	/* ICUCR41: CFC Insert & eject */
+	/* ICUCR41: CFC Insert */
 	irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
-	irq_desc[PLD_IRQ_CFC_INSERT].chip = &mappi3_irq_type;
+	irq_desc[PLD_IRQ_CFC_INSERT].chip = &mappi2_irq_type;
 	irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
 	irq_desc[PLD_IRQ_CFC_INSERT].depth = 1;	/* disable nested irq */
 	icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
-	disable_mappi3_irq(PLD_IRQ_CFC_INSERT);
+	disable_mappi2_irq(PLD_IRQ_CFC_INSERT);
 
-#endif /* CONFIG_M32R_CFC */
-
-	/* IDE IREQ */
-	irq_desc[PLD_IRQ_IDEIREQ].status = IRQ_DISABLED;
-	irq_desc[PLD_IRQ_IDEIREQ].chip = &mappi3_irq_type;
-	irq_desc[PLD_IRQ_IDEIREQ].action = 0;
-	irq_desc[PLD_IRQ_IDEIREQ].depth = 1;	/* disable nested irq */
-	icu_data[PLD_IRQ_IDEIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
-	disable_mappi3_irq(PLD_IRQ_IDEIREQ);
-
+	/* ICUCR42: CFC Eject */
+	irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
+	irq_desc[PLD_IRQ_CFC_EJECT].chip = &mappi2_irq_type;
+	irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
+	irq_desc[PLD_IRQ_CFC_EJECT].depth = 1;	/* disable nested irq */
+	icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
+	disable_mappi2_irq(PLD_IRQ_CFC_EJECT);
+#endif /* CONFIG_MAPPI2_CFC */
 }
-
-#if defined(CONFIG_SMC91X)
 
 #define LAN_IOSTART     0x300
 #define LAN_IOEND       0x320
···
 	.resource       = smc91x_resources,
 };
 
-#endif
-
-#if defined(CONFIG_FB_S1D13XXX)
-
-#include <video/s1d13xxxfb.h>
-#include <asm/s1d13806.h>
-
-static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
-	.initregs		= s1d13xxxfb_initregs,
-	.initregssize		= ARRAY_SIZE(s1d13xxxfb_initregs),
-	.platform_init_video	= NULL,
-#ifdef CONFIG_PM
-	.platform_suspend_video	= NULL,
-	.platform_resume_video	= NULL,
-#endif
-};
-
-static struct resource s1d13xxxfb_resources[] = {
-	[0] = {
-		.start  = 0x1d600000UL,
-		.end    = 0x1d73FFFFUL,
-		.flags  = IORESOURCE_MEM,
-	},
-	[1] = {
-		.start  = 0x1d400000UL,
-		.end    = 0x1d4001FFUL,
-		.flags  = IORESOURCE_MEM,
-	}
-};
-
-static struct platform_device s1d13xxxfb_device = {
-	.name		= S1D_DEVICENAME,
-	.id		= 0,
-	.dev            = {
-		.platform_data  = &s1d13xxxfb_data,
-	},
-	.num_resources  = ARRAY_SIZE(s1d13xxxfb_resources),
-	.resource       = s1d13xxxfb_resources,
-};
-#endif
-
 static int __init platform_init(void)
 {
-#if defined(CONFIG_SMC91X)
 	platform_device_register(&smc91x_device);
-#endif
-#if defined(CONFIG_FB_S1D13XXX)
-	platform_device_register(&s1d13xxxfb_device);
-#endif
 	return 0;
 }
 arch_initcall(platform_init);

arch/m32r/kernel/setup_oaks32r.c arch/m32r/platforms/oaks32r/setup.c

···
 /*
- *  linux/arch/m32r/kernel/setup_oaks32r.c
+ *  linux/arch/m32r/platforms/oaks32r/setup.c
  *
  *  Setup routines for OAKS32R Board
  *

arch/m32r/kernel/setup_opsput.c arch/m32r/platforms/m32700ut/setup.c

···
 /*
- *  linux/arch/m32r/kernel/setup_opsput.c
+ *  linux/arch/m32r/platforms/m32700ut/setup.c
  *
- *  Setup routines for Renesas OPSPUT Board
+ *  Setup routines for Renesas M32700UT Board
  *
- *  Copyright (c) 2002-2005
- * 	Hiroyuki Kondo, Hirokazu Takata,
- *      Hitoshi Yamamoto, Takeo Takahashi, Mamoru Sakugawa
+ *  Copyright (c) 2002-2005  Hiroyuki Kondo, Hirokazu Takata,
+ *                           Hitoshi Yamamoto, Takeo Takahashi
  *
  *  This file is subject to the terms and conditions of the GNU General
  *  Public License.  See the file "COPYING" in the main directory of this
···
 #include <asm/io.h>
 
 /*
- * OPSP Interrupt Control Unit (Level 1)
+ * M32700 Interrupt Control Unit (Level 1)
  */
 #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
 
-icu_data_t icu_data[OPSPUT_NUM_CPU_IRQ];
+icu_data_t icu_data[M32700UT_NUM_CPU_IRQ];
 
-static void disable_opsput_irq(unsigned int irq)
+static void disable_m32700ut_irq(unsigned int irq)
 {
 	unsigned long port, data;
 
···
 	outl(data, port);
 }
 
-static void enable_opsput_irq(unsigned int irq)
+static void enable_m32700ut_irq(unsigned int irq)
 {
 	unsigned long port, data;
 
···
 	outl(data, port);
 }
 
-static void mask_and_ack_opsput(unsigned int irq)
+static void mask_and_ack_m32700ut(unsigned int irq)
 {
-	disable_opsput_irq(irq);
+	disable_m32700ut_irq(irq);
 }
 
-static void end_opsput_irq(unsigned int irq)
+static void end_m32700ut_irq(unsigned int irq)
 {
-	enable_opsput_irq(irq);
+	enable_m32700ut_irq(irq);
 }
 
-static unsigned int startup_opsput_irq(unsigned int irq)
+static unsigned int startup_m32700ut_irq(unsigned int irq)
 {
-	enable_opsput_irq(irq);
+	enable_m32700ut_irq(irq);
 	return (0);
 }
 
-static void shutdown_opsput_irq(unsigned int irq)
+static void shutdown_m32700ut_irq(unsigned int irq)
 {
 	unsigned long port;
 
···
 	outl(M32R_ICUCR_ILEVEL7, port);
 }
 
-static struct hw_interrupt_type opsput_irq_type =
+static struct hw_interrupt_type m32700ut_irq_type =
 {
-	.typename = "OPSPUT-IRQ",
-	.startup = startup_opsput_irq,
-	.shutdown = shutdown_opsput_irq,
-	.enable = enable_opsput_irq,
-	.disable = disable_opsput_irq,
-	.ack = mask_and_ack_opsput,
-	.end = end_opsput_irq
+	.typename = "M32700UT-IRQ",
+	.startup = startup_m32700ut_irq,
+	.shutdown = shutdown_m32700ut_irq,
+	.enable = enable_m32700ut_irq,
+	.disable = disable_m32700ut_irq,
+	.ack = mask_and_ack_m32700ut,
+	.end = end_m32700ut_irq
 };
 
 /*
- * Interrupt Control Unit of PLD on OPSPUT (Level 2)
+ * Interrupt Control Unit of PLD on M32700UT (Level 2)
  */
-#define irq2pldirq(x)		((x) - OPSPUT_PLD_IRQ_BASE)
+#define irq2pldirq(x)		((x) - M32700UT_PLD_IRQ_BASE)
 #define pldirq2port(x)		(unsigned long)((int)PLD_ICUCR1 + \
 				 (((x) - 1) * sizeof(unsigned short)))
 
···
 	unsigned short icucr;  /* ICU Control Register */
 } pld_icu_data_t;
 
-static pld_icu_data_t pld_icu_data[OPSPUT_NUM_PLD_IRQ];
+static pld_icu_data_t pld_icu_data[M32700UT_NUM_PLD_IRQ];
 
-static void disable_opsput_pld_irq(unsigned int irq)
+static void disable_m32700ut_pld_irq(unsigned int irq)
 {
 	unsigned long port, data;
 	unsigned int pldirq;
 
 	pldirq = irq2pldirq(irq);
-//	disable_opsput_irq(M32R_IRQ_INT1);
+//	disable_m32700ut_irq(M32R_IRQ_INT1);
 	port = pldirq2port(pldirq);
 	data = pld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7;
 	outw(data, port);
 }
 
-static void enable_opsput_pld_irq(unsigned int irq)
+static void enable_m32700ut_pld_irq(unsigned int irq)
 {
 	unsigned long port, data;
 	unsigned int pldirq;
 
 	pldirq = irq2pldirq(irq);
-//	enable_opsput_irq(M32R_IRQ_INT1);
+//	enable_m32700ut_irq(M32R_IRQ_INT1);
 	port = pldirq2port(pldirq);
 	data = pld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6;
 	outw(data, port);
 }
 
-static void mask_and_ack_opsput_pld(unsigned int irq)
+static void mask_and_ack_m32700ut_pld(unsigned int irq)
 {
-	disable_opsput_pld_irq(irq);
-//	mask_and_ack_opsput(M32R_IRQ_INT1);
+	disable_m32700ut_pld_irq(irq);
+//	mask_and_ack_m32700ut(M32R_IRQ_INT1);
 }
 
-static void end_opsput_pld_irq(unsigned int irq)
+static void end_m32700ut_pld_irq(unsigned int irq)
 {
-	enable_opsput_pld_irq(irq);
-	end_opsput_irq(M32R_IRQ_INT1);
+	enable_m32700ut_pld_irq(irq);
+	end_m32700ut_irq(M32R_IRQ_INT1);
 }
 
-static unsigned int startup_opsput_pld_irq(unsigned int irq)
+static unsigned int startup_m32700ut_pld_irq(unsigned int irq)
 {
-	enable_opsput_pld_irq(irq);
+	enable_m32700ut_pld_irq(irq);
 	return (0);
 }
 
-static void shutdown_opsput_pld_irq(unsigned int irq)
+static void shutdown_m32700ut_pld_irq(unsigned int irq)
 {
 	unsigned long port;
 	unsigned int pldirq;
 
 	pldirq = irq2pldirq(irq);
-//	shutdown_opsput_irq(M32R_IRQ_INT1);
+//	shutdown_m32700ut_irq(M32R_IRQ_INT1);
 	port = pldirq2port(pldirq);
 	outw(PLD_ICUCR_ILEVEL7, port);
 }
 
-static struct hw_interrupt_type opsput_pld_irq_type =
+static struct hw_interrupt_type m32700ut_pld_irq_type =
 {
-	.typename = "OPSPUT-PLD-IRQ",
-	.startup = startup_opsput_pld_irq,
-	.shutdown = shutdown_opsput_pld_irq,
-	.enable = enable_opsput_pld_irq,
-	.disable = disable_opsput_pld_irq,
-	.ack = mask_and_ack_opsput_pld,
-	.end = end_opsput_pld_irq
+	.typename = "M32700UT-PLD-IRQ",
+	.startup = startup_m32700ut_pld_irq,
+	.shutdown = shutdown_m32700ut_pld_irq,
+	.enable = enable_m32700ut_pld_irq,
+	.disable = disable_m32700ut_pld_irq,
+	.ack = mask_and_ack_m32700ut_pld,
+	.end = end_m32700ut_pld_irq
 };
 
 /*
- * Interrupt Control Unit of PLD on OPSPUT-LAN (Level 2)
+ * Interrupt Control Unit of PLD on M32700UT-LAN (Level 2)
  */
-#define irq2lanpldirq(x)	((x) - OPSPUT_LAN_PLD_IRQ_BASE)
-#define lanpldirq2port(x)	(unsigned long)((int)OPSPUT_LAN_ICUCR1 + \
+#define irq2lanpldirq(x)	((x) - M32700UT_LAN_PLD_IRQ_BASE)
+#define lanpldirq2port(x)	(unsigned long)((int)M32700UT_LAN_ICUCR1 + \
 				 (((x) - 1) * sizeof(unsigned short)))
 
-static pld_icu_data_t lanpld_icu_data[OPSPUT_NUM_LAN_PLD_IRQ];
+static pld_icu_data_t lanpld_icu_data[M32700UT_NUM_LAN_PLD_IRQ];
 
-static void disable_opsput_lanpld_irq(unsigned int irq)
+static void disable_m32700ut_lanpld_irq(unsigned int irq)
 {
 	unsigned long port, data;
 	unsigned int pldirq;
···
 	outw(data, port);
 }
 
-static void enable_opsput_lanpld_irq(unsigned int irq)
+static void enable_m32700ut_lanpld_irq(unsigned int irq)
 {
 	unsigned long port, data;
 	unsigned int pldirq;
···
 	outw(data, port);
 }
 
-static void mask_and_ack_opsput_lanpld(unsigned int irq)
+static void mask_and_ack_m32700ut_lanpld(unsigned int irq)
 {
-	disable_opsput_lanpld_irq(irq);
+	disable_m32700ut_lanpld_irq(irq);
 }
 
-static void end_opsput_lanpld_irq(unsigned int irq)
+static void end_m32700ut_lanpld_irq(unsigned int irq)
 {
-	enable_opsput_lanpld_irq(irq);
-	end_opsput_irq(M32R_IRQ_INT0);
+	enable_m32700ut_lanpld_irq(irq);
+	end_m32700ut_irq(M32R_IRQ_INT0);
 }
 
-static unsigned int startup_opsput_lanpld_irq(unsigned int irq)
+static unsigned int startup_m32700ut_lanpld_irq(unsigned int irq)
 {
-	enable_opsput_lanpld_irq(irq);
+	enable_m32700ut_lanpld_irq(irq);
 	return (0);
 }
 
-static void shutdown_opsput_lanpld_irq(unsigned int irq)
+static void shutdown_m32700ut_lanpld_irq(unsigned int irq)
 {
 	unsigned long port;
 	unsigned int pldirq;
···
 	outw(PLD_ICUCR_ILEVEL7, port);
 }
 
-static struct hw_interrupt_type opsput_lanpld_irq_type =
+static struct hw_interrupt_type m32700ut_lanpld_irq_type =
 {
-	.typename = "OPSPUT-PLD-LAN-IRQ",
-	.startup = startup_opsput_lanpld_irq,
-	.shutdown = shutdown_opsput_lanpld_irq,
-	.enable = enable_opsput_lanpld_irq,
-	.disable = disable_opsput_lanpld_irq,
-	.ack = mask_and_ack_opsput_lanpld,
-	.end = end_opsput_lanpld_irq
+	.typename = "M32700UT-PLD-LAN-IRQ",
+	.startup = startup_m32700ut_lanpld_irq,
+	.shutdown = shutdown_m32700ut_lanpld_irq,
+	.enable = enable_m32700ut_lanpld_irq,
+	.disable = disable_m32700ut_lanpld_irq,
+	.ack = mask_and_ack_m32700ut_lanpld,
+	.end = end_m32700ut_lanpld_irq
 };
 
 /*
- * Interrupt Control Unit of PLD on OPSPUT-LCD (Level 2)
+ * Interrupt Control Unit of PLD on M32700UT-LCD (Level 2)
  */
-#define irq2lcdpldirq(x)	((x) - OPSPUT_LCD_PLD_IRQ_BASE)
-#define lcdpldirq2port(x)	(unsigned long)((int)OPSPUT_LCD_ICUCR1 + \
+#define irq2lcdpldirq(x)	((x) - M32700UT_LCD_PLD_IRQ_BASE)
+#define lcdpldirq2port(x)	(unsigned long)((int)M32700UT_LCD_ICUCR1 + \
 				 (((x) - 1) * sizeof(unsigned short)))
 
-static pld_icu_data_t lcdpld_icu_data[OPSPUT_NUM_LCD_PLD_IRQ];
+static pld_icu_data_t lcdpld_icu_data[M32700UT_NUM_LCD_PLD_IRQ];
 
-static void disable_opsput_lcdpld_irq(unsigned int irq)
+static void disable_m32700ut_lcdpld_irq(unsigned int irq)
 {
 	unsigned long port, data;
 	unsigned int pldirq;
···
 	outw(data, port);
 }
 
-static void enable_opsput_lcdpld_irq(unsigned int irq)
+static void enable_m32700ut_lcdpld_irq(unsigned int irq)
 {
 	unsigned long port, data;
 	unsigned int pldirq;
···
 	outw(data, port);
 }
 
-static void mask_and_ack_opsput_lcdpld(unsigned int irq)
+static void mask_and_ack_m32700ut_lcdpld(unsigned int irq)
 {
-	disable_opsput_lcdpld_irq(irq);
+	disable_m32700ut_lcdpld_irq(irq);
 }
 
-static void end_opsput_lcdpld_irq(unsigned int irq)
+static void end_m32700ut_lcdpld_irq(unsigned int irq)
 {
-	enable_opsput_lcdpld_irq(irq);
-	end_opsput_irq(M32R_IRQ_INT2);
+	enable_m32700ut_lcdpld_irq(irq);
+	end_m32700ut_irq(M32R_IRQ_INT2);
 }
 
-static unsigned int startup_opsput_lcdpld_irq(unsigned int irq)
+static unsigned int startup_m32700ut_lcdpld_irq(unsigned int irq)
 {
-	enable_opsput_lcdpld_irq(irq);
+	enable_m32700ut_lcdpld_irq(irq);
 	return (0);
 }
 
-static void shutdown_opsput_lcdpld_irq(unsigned int irq)
+static void shutdown_m32700ut_lcdpld_irq(unsigned int irq)
 {
 	unsigned long port;
 	unsigned int pldirq;
···
 	outw(PLD_ICUCR_ILEVEL7, port);
 }
 
-static struct hw_interrupt_type opsput_lcdpld_irq_type =
+static struct hw_interrupt_type m32700ut_lcdpld_irq_type =
 {
-	"OPSPUT-PLD-LCD-IRQ",
-	startup_opsput_lcdpld_irq,
-	shutdown_opsput_lcdpld_irq,
-	enable_opsput_lcdpld_irq,
-	disable_opsput_lcdpld_irq,
-	mask_and_ack_opsput_lcdpld,
-	end_opsput_lcdpld_irq
+	.typename = "M32700UT-PLD-LCD-IRQ",
+	.startup = startup_m32700ut_lcdpld_irq,
+	.shutdown = shutdown_m32700ut_lcdpld_irq,
+	.enable = enable_m32700ut_lcdpld_irq,
+	.disable = disable_m32700ut_lcdpld_irq,
+	.ack = mask_and_ack_m32700ut_lcdpld,
+	.end = end_m32700ut_lcdpld_irq
 };
 
 void __init init_IRQ(void)
 {
 #if defined(CONFIG_SMC91X)
-	/* INT#0: LAN controller on OPSPUT-LAN (SMC91C111)*/
-	irq_desc[OPSPUT_LAN_IRQ_LAN].status = IRQ_DISABLED;
-	irq_desc[OPSPUT_LAN_IRQ_LAN].chip = &opsput_lanpld_irq_type;
-	irq_desc[OPSPUT_LAN_IRQ_LAN].action = 0;
-	irq_desc[OPSPUT_LAN_IRQ_LAN].depth = 1;	/* disable nested irq */
-	lanpld_icu_data[irq2lanpldirq(OPSPUT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02;	/* "H" edge sense */
-	disable_opsput_lanpld_irq(OPSPUT_LAN_IRQ_LAN);
+	/* INT#0: LAN controller on M32700UT-LAN (SMC91C111)*/
+	irq_desc[M32700UT_LAN_IRQ_LAN].status = IRQ_DISABLED;
+	irq_desc[M32700UT_LAN_IRQ_LAN].chip = &m32700ut_lanpld_irq_type;
+	irq_desc[M32700UT_LAN_IRQ_LAN].action = 0;
+	irq_desc[M32700UT_LAN_IRQ_LAN].depth = 1;	/* disable nested irq */
+	lanpld_icu_data[irq2lanpldirq(M32700UT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02;	/* "H" edge sense */
+	disable_m32700ut_lanpld_irq(M32700UT_LAN_IRQ_LAN);
 #endif  /* CONFIG_SMC91X */
 
 	/* MFT2 : system timer */
 	irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-	irq_desc[M32R_IRQ_MFT2].chip = &opsput_irq_type;
+	irq_desc[M32R_IRQ_MFT2].chip = &m32700ut_irq_type;
 	irq_desc[M32R_IRQ_MFT2].action = 0;
 	irq_desc[M32R_IRQ_MFT2].depth = 1;
 	icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
-	disable_opsput_irq(M32R_IRQ_MFT2);
+	disable_m32700ut_irq(M32R_IRQ_MFT2);
 
 	/* SIO0 : receive */
 	irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-	irq_desc[M32R_IRQ_SIO0_R].chip = &opsput_irq_type;
+	irq_desc[M32R_IRQ_SIO0_R].chip = &m32700ut_irq_type;
 	irq_desc[M32R_IRQ_SIO0_R].action = 0;
 	irq_desc[M32R_IRQ_SIO0_R].depth = 1;
 	icu_data[M32R_IRQ_SIO0_R].icucr = 0;
-	disable_opsput_irq(M32R_IRQ_SIO0_R);
+	disable_m32700ut_irq(M32R_IRQ_SIO0_R);
 
 	/* SIO0 : send */
 	irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-	irq_desc[M32R_IRQ_SIO0_S].chip = &opsput_irq_type;
+	irq_desc[M32R_IRQ_SIO0_S].chip = &m32700ut_irq_type;
 	irq_desc[M32R_IRQ_SIO0_S].action = 0;
 	irq_desc[M32R_IRQ_SIO0_S].depth = 1;
 	icu_data[M32R_IRQ_SIO0_S].icucr = 0;
-	disable_opsput_irq(M32R_IRQ_SIO0_S);
+	disable_m32700ut_irq(M32R_IRQ_SIO0_S);
 
 	/* SIO1 : receive */
 	irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-	irq_desc[M32R_IRQ_SIO1_R].chip = &opsput_irq_type;
+	irq_desc[M32R_IRQ_SIO1_R].chip = &m32700ut_irq_type;
 	irq_desc[M32R_IRQ_SIO1_R].action = 0;
 	irq_desc[M32R_IRQ_SIO1_R].depth = 1;
 	icu_data[M32R_IRQ_SIO1_R].icucr = 0;
-	disable_opsput_irq(M32R_IRQ_SIO1_R);
+	disable_m32700ut_irq(M32R_IRQ_SIO1_R);
 
 	/* SIO1 : send */
 	irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-	irq_desc[M32R_IRQ_SIO1_S].chip = &opsput_irq_type;
+	irq_desc[M32R_IRQ_SIO1_S].chip = &m32700ut_irq_type;
 	irq_desc[M32R_IRQ_SIO1_S].action = 0;
 	irq_desc[M32R_IRQ_SIO1_S].depth = 1;
 	icu_data[M32R_IRQ_SIO1_S].icucr = 0;
-	disable_opsput_irq(M32R_IRQ_SIO1_S);
+	disable_m32700ut_irq(M32R_IRQ_SIO1_S);
 
 	/* DMA1 : */
 	irq_desc[M32R_IRQ_DMA1].status = IRQ_DISABLED;
-	irq_desc[M32R_IRQ_DMA1].chip = &opsput_irq_type;
+	irq_desc[M32R_IRQ_DMA1].chip = &m32700ut_irq_type;
 	irq_desc[M32R_IRQ_DMA1].action = 0;
 	irq_desc[M32R_IRQ_DMA1].depth = 1;
 	icu_data[M32R_IRQ_DMA1].icucr = 0;
-	disable_opsput_irq(M32R_IRQ_DMA1);
+	disable_m32700ut_irq(M32R_IRQ_DMA1);
 
 #ifdef CONFIG_SERIAL_M32R_PLDSIO
 	/* INT#1: SIO0 Receive on PLD */
 	irq_desc[PLD_IRQ_SIO0_RCV].status = IRQ_DISABLED;
-	irq_desc[PLD_IRQ_SIO0_RCV].chip = &opsput_pld_irq_type;
+	irq_desc[PLD_IRQ_SIO0_RCV].chip = &m32700ut_pld_irq_type;
 	irq_desc[PLD_IRQ_SIO0_RCV].action = 0;
 	irq_desc[PLD_IRQ_SIO0_RCV].depth = 1;	/* disable nested irq */
 	pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
-	disable_opsput_pld_irq(PLD_IRQ_SIO0_RCV);
+	disable_m32700ut_pld_irq(PLD_IRQ_SIO0_RCV);
 
 	/* INT#1: SIO0 Send on PLD */
 	irq_desc[PLD_IRQ_SIO0_SND].status = IRQ_DISABLED;
-	irq_desc[PLD_IRQ_SIO0_SND].chip = &opsput_pld_irq_type;
+	irq_desc[PLD_IRQ_SIO0_SND].chip = &m32700ut_pld_irq_type;
 	irq_desc[PLD_IRQ_SIO0_SND].action = 0;
 	irq_desc[PLD_IRQ_SIO0_SND].depth = 1;	/* disable nested irq */
 	pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
-	disable_opsput_pld_irq(PLD_IRQ_SIO0_SND);
+	disable_m32700ut_pld_irq(PLD_IRQ_SIO0_SND);
 #endif  /* CONFIG_SERIAL_M32R_PLDSIO */
 
 	/* INT#1: CFC IREQ on PLD */
 	irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
-	irq_desc[PLD_IRQ_CFIREQ].chip = &opsput_pld_irq_type;
+	irq_desc[PLD_IRQ_CFIREQ].chip = &m32700ut_pld_irq_type;
 	irq_desc[PLD_IRQ_CFIREQ].action = 0;
 	irq_desc[PLD_IRQ_CFIREQ].depth = 1;	/* disable nested irq */
 	pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01;	/* 'L' level sense */
-	disable_opsput_pld_irq(PLD_IRQ_CFIREQ);
+	disable_m32700ut_pld_irq(PLD_IRQ_CFIREQ);
 
 	/* INT#1: CFC Insert on PLD */
 	irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
-	irq_desc[PLD_IRQ_CFC_INSERT].chip = &opsput_pld_irq_type;
+	irq_desc[PLD_IRQ_CFC_INSERT].chip = &m32700ut_pld_irq_type;
 	irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
 	irq_desc[PLD_IRQ_CFC_INSERT].depth = 1;	/* disable nested irq */
 	pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00;	/* 'L' edge sense */
-	disable_opsput_pld_irq(PLD_IRQ_CFC_INSERT);
+	disable_m32700ut_pld_irq(PLD_IRQ_CFC_INSERT);
 
 	/* INT#1: CFC Eject on PLD */
 	irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
-	irq_desc[PLD_IRQ_CFC_EJECT].chip = &opsput_pld_irq_type;
+	irq_desc[PLD_IRQ_CFC_EJECT].chip = &m32700ut_pld_irq_type;
 	irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
 	irq_desc[PLD_IRQ_CFC_EJECT].depth = 1;	/* disable nested irq */
 	pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02;	/* 'H' edge sense */
-	disable_opsput_pld_irq(PLD_IRQ_CFC_EJECT);
+	disable_m32700ut_pld_irq(PLD_IRQ_CFC_EJECT);
 
 	/*
 	 * INT0# is used for LAN, DIO
 	 * We enable it here.
 	 */
 	icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
-	enable_opsput_irq(M32R_IRQ_INT0);
+	enable_m32700ut_irq(M32R_IRQ_INT0);
 
 	/*
 	 * INT1# is used for UART, MMC, CF Controller in FPGA.
 	 * We enable it here.
 	 */
 	icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
-	enable_opsput_irq(M32R_IRQ_INT1);
+	enable_m32700ut_irq(M32R_IRQ_INT1);
 
 #if defined(CONFIG_USB)
 	outw(USBCR_OTGS, USBCR); 	/* USBCR: non-OTG */
 
-    irq_desc[OPSPUT_LCD_IRQ_USB_INT1].status = IRQ_DISABLED;
-    irq_desc[OPSPUT_LCD_IRQ_USB_INT1].chip = &opsput_lcdpld_irq_type;
-    irq_desc[OPSPUT_LCD_IRQ_USB_INT1].action = 0;
-    irq_desc[OPSPUT_LCD_IRQ_USB_INT1].depth = 1;
-    lcdpld_icu_data[irq2lcdpldirq(OPSPUT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01;	/* "L" level sense */
-    disable_opsput_lcdpld_irq(OPSPUT_LCD_IRQ_USB_INT1);
+    irq_desc[M32700UT_LCD_IRQ_USB_INT1].status = IRQ_DISABLED;
+    irq_desc[M32700UT_LCD_IRQ_USB_INT1].chip = &m32700ut_lcdpld_irq_type;
+    irq_desc[M32700UT_LCD_IRQ_USB_INT1].action = 0;
+    irq_desc[M32700UT_LCD_IRQ_USB_INT1].depth = 1;
+    lcdpld_icu_data[irq2lcdpldirq(M32700UT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01;	/* "L" level sense */
+    disable_m32700ut_lcdpld_irq(M32700UT_LCD_IRQ_USB_INT1);
 #endif
 	/*
 	 * INT2# is used for BAT, USB, AUDIO
 	 * We enable it here.
 	 */
 	icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
-	enable_opsput_irq(M32R_IRQ_INT2);
+	enable_m32700ut_irq(M32R_IRQ_INT2);
 
 #if defined(CONFIG_VIDEO_M32R_AR)
 	/*
 	 * INT3# is used for AR
 	 */
 	irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED;
-	irq_desc[M32R_IRQ_INT3].chip = &opsput_irq_type;
+	irq_desc[M32R_IRQ_INT3].chip = &m32700ut_irq_type;
 	irq_desc[M32R_IRQ_INT3].action = 0;
 	irq_desc[M32R_IRQ_INT3].depth = 1;
 	icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
-	disable_opsput_irq(M32R_IRQ_INT3);
-#endif /* CONFIG_VIDEO_M32R_AR */
+	disable_m32700ut_irq(M32R_IRQ_INT3);
+#endif	/* CONFIG_VIDEO_M32R_AR */
 }
 
 #if defined(CONFIG_SMC91X)
···
 		.flags  = IORESOURCE_MEM,
 	},
 	[1] = {
-		.start  = OPSPUT_LAN_IRQ_LAN,
-		.end    = OPSPUT_LAN_IRQ_LAN,
+		.start  = M32700UT_LAN_IRQ_LAN,
+		.end    = M32700UT_LAN_IRQ_LAN,
 		.flags  = IORESOURCE_IRQ,
 	}
 };

arch/m32r/kernel/setup_usrv.c arch/m32r/platforms/usrv/setup.c

···
 /*
- *  linux/arch/m32r/kernel/setup_usrv.c
+ *  linux/arch/m32r/platforms/usrv/setup.c
  *
  *  Setup routines for MITSUBISHI uServer
  *
···
 #endif  /* CONFIG_SERIAL_M32R_SIO */
 
 	/* INT#67-#71: CFC#0 IREQ on PLD */
-	for (i = 0 ; i < CONFIG_CFC_NUM ; i++ ) {
+	for (i = 0 ; i < CONFIG_M32R_CFC_NUM ; i++ ) {
 		irq_desc[PLD_IRQ_CF0 + i].status = IRQ_DISABLED;
 		irq_desc[PLD_IRQ_CF0 + i].chip = &m32700ut_pld_irq_type;
 		irq_desc[PLD_IRQ_CF0 + i].action = 0;
···
 	icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD11;
 	enable_mappi_irq(M32R_IRQ_INT1);
 }
-

arch/m32r/platforms/Makefile

···
+# arch/m32r/platforms/Makefile
+obj-$(CONFIG_PLAT_M32104UT)	+= m32104ut/
+obj-$(CONFIG_PLAT_M32700UT)	+= m32700ut/
+obj-$(CONFIG_PLAT_MAPPI)	+= mappi/
+obj-$(CONFIG_PLAT_MAPPI2)	+= mappi2/
+obj-$(CONFIG_PLAT_MAPPI3)	+= mappi3/
+obj-$(CONFIG_PLAT_OAKS32R)	+= oaks32r/
+obj-$(CONFIG_PLAT_OPSPUT)	+= opsput/
+obj-$(CONFIG_PLAT_USRV)		+= usrv/

arch/m32r/platforms/m32104ut/Makefile

···
+obj-y	:= setup.o io.o

arch/m32r/platforms/m32700ut/Makefile

···
+obj-y	:= setup.o io.o

arch/m32r/platforms/mappi/Makefile

···
+obj-y	:= setup.o io.o

arch/m32r/platforms/mappi2/Makefile

···
+obj-y	:= setup.o io.o

arch/m32r/platforms/mappi3/Makefile

···
+obj-y	:= setup.o io.o

arch/m32r/platforms/oaks32r/Makefile

···
+obj-y	:= setup.o io.o

arch/m32r/platforms/opsput/Makefile

···
+obj-y	:= setup.o io.o

arch/m32r/platforms/usrv/Makefile

···
+obj-y	:= setup.o io.o