tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

MIPS: Add TLBR and ROTR to uasm.

The soon to follow Read Inhibit/eXecute Inhibit patch needs TLBR and
ROTR support in uasm. We also add a UASM_i_ROTR macro.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/953/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

authored by

David Daney and committed by
Ralf Baechle 32546f38 9fe2e9d6

+11 -2
+4
arch/mips/include/asm/uasm.h
··· 92 92 Ip_u2u1u3(_sll); 93 93 Ip_u2u1u3(_sra); 94 94 Ip_u2u1u3(_srl); 95 + Ip_u2u1u3(_rotr); 95 96 Ip_u3u1u2(_subu); 96 97 Ip_u2s3u1(_sw); 97 98 Ip_0(_tlbp); 99 + Ip_0(_tlbr); 98 100 Ip_0(_tlbwi); 99 101 Ip_0(_tlbwr); 100 102 Ip_u3u1u2(_xor); ··· 131 129 # define UASM_i_SLL(buf, rs, rt, sh) uasm_i_dsll(buf, rs, rt, sh) 132 130 # define UASM_i_SRA(buf, rs, rt, sh) uasm_i_dsra(buf, rs, rt, sh) 133 131 # define UASM_i_SRL(buf, rs, rt, sh) uasm_i_dsrl(buf, rs, rt, sh) 132 + # define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_drotr(buf, rs, rt, sh) 134 133 # define UASM_i_MFC0(buf, rt, rd...) uasm_i_dmfc0(buf, rt, rd) 135 134 # define UASM_i_MTC0(buf, rt, rd...) uasm_i_dmtc0(buf, rt, rd) 136 135 # define UASM_i_ADDIU(buf, rs, rt, val) uasm_i_daddiu(buf, rs, rt, val) ··· 145 142 # define UASM_i_SLL(buf, rs, rt, sh) uasm_i_sll(buf, rs, rt, sh) 146 143 # define UASM_i_SRA(buf, rs, rt, sh) uasm_i_sra(buf, rs, rt, sh) 147 144 # define UASM_i_SRL(buf, rs, rt, sh) uasm_i_srl(buf, rs, rt, sh) 145 + # define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_rotr(buf, rs, rt, sh) 148 146 # define UASM_i_MFC0(buf, rt, rd...) uasm_i_mfc0(buf, rt, rd) 149 147 # define UASM_i_MTC0(buf, rt, rd...) uasm_i_mtc0(buf, rt, rd) 150 148 # define UASM_i_ADDIU(buf, rs, rt, val) uasm_i_addiu(buf, rs, rt, val)
+7 -2
arch/mips/mm/uasm.c
··· 62 62 insn_dsrl32, insn_drotr, insn_dsubu, insn_eret, insn_j, insn_jal, 63 63 insn_jr, insn_ld, insn_ll, insn_lld, insn_lui, insn_lw, insn_mfc0, 64 64 insn_mtc0, insn_ori, insn_pref, insn_rfe, insn_sc, insn_scd, 65 - insn_sd, insn_sll, insn_sra, insn_srl, insn_subu, insn_sw, 66 - insn_tlbp, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori, insn_dins 65 + insn_sd, insn_sll, insn_sra, insn_srl, insn_rotr, insn_subu, insn_sw, 66 + insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori, 67 + insn_dins 67 68 }; 68 69 69 70 struct insn { ··· 126 125 { insn_sll, M(spec_op, 0, 0, 0, 0, sll_op), RT | RD | RE }, 127 126 { insn_sra, M(spec_op, 0, 0, 0, 0, sra_op), RT | RD | RE }, 128 127 { insn_srl, M(spec_op, 0, 0, 0, 0, srl_op), RT | RD | RE }, 128 + { insn_rotr, M(spec_op, 1, 0, 0, 0, srl_op), RT | RD | RE }, 129 129 { insn_subu, M(spec_op, 0, 0, 0, 0, subu_op), RS | RT | RD }, 130 130 { insn_sw, M(sw_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 131 131 { insn_tlbp, M(cop0_op, cop_op, 0, 0, 0, tlbp_op), 0 }, 132 + { insn_tlbr, M(cop0_op, cop_op, 0, 0, 0, tlbr_op), 0 }, 132 133 { insn_tlbwi, M(cop0_op, cop_op, 0, 0, 0, tlbwi_op), 0 }, 133 134 { insn_tlbwr, M(cop0_op, cop_op, 0, 0, 0, tlbwr_op), 0 }, 134 135 { insn_xor, M(spec_op, 0, 0, 0, 0, xor_op), RS | RT | RD }, ··· 381 378 I_u2u1u3(_sll) 382 379 I_u2u1u3(_sra) 383 380 I_u2u1u3(_srl) 381 + I_u2u1u3(_rotr) 384 382 I_u3u1u2(_subu) 385 383 I_u2s3u1(_sw) 386 384 I_0(_tlbp) 385 + I_0(_tlbr) 387 386 I_0(_tlbwi) 388 387 I_0(_tlbwr) 389 388 I_u3u1u2(_xor)