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hwmon: (w83627ehf) remove nct6775 and nct6776 support

The nct6775 and nct6776 are supported by the separate nct6775.c driver,
so remove the code from the w83627ehf driver.

Suggested-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
Link: https://lore.kernel.org/r/20191225023225.2785-2-linux@treblig.org
Signed-off-by: Guenter Roeck <linux@roeck-us.net>

authored by

Dr. David Alan Gilbert and committed by
Guenter Roeck 3207408a 1a1ea120

+41 -441
+2 -3
drivers/hwmon/Kconfig
··· 1915 1915 will be called w83627hf. 1916 1916 1917 1917 config SENSORS_W83627EHF 1918 - tristate "Winbond W83627EHF/EHG/DHG/UHG, W83667HG, NCT6775F, NCT6776F" 1918 + tristate "Winbond W83627EHF/EHG/DHG/UHG, W83667HG" 1919 1919 depends on !PPC 1920 1920 select HWMON_VID 1921 1921 help ··· 1928 1928 the Core 2 Duo. And also the W83627UHG, which is a stripped down 1929 1929 version of the W83627DHG (as far as hardware monitoring goes.) 1930 1930 1931 - This driver also supports Nuvoton W83667HG, W83667HG-B, NCT6775F 1932 - (also known as W83667HG-I), and NCT6776F. 1931 + This driver also supports Nuvoton W83667HG and W83667HG-B. 1933 1932 1934 1933 This driver can also be built as a module. If so, the module 1935 1934 will be called w83627ehf.
+39 -438
drivers/hwmon/w83627ehf.c
··· 28 28 * w83627uhg 8 2 2 3 0xa230 0xc1 0x5ca3 29 29 * w83667hg 9 5 3 3 0xa510 0xc1 0x5ca3 30 30 * w83667hg-b 9 5 3 4 0xb350 0xc1 0x5ca3 31 - * nct6775f 9 4 3 9 0xb470 0xc1 0x5ca3 32 - * nct6776f 9 5 3 9 0xC330 0xc1 0x5ca3 33 31 */ 34 32 35 33 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt ··· 48 50 49 51 enum kinds { 50 52 w83627ehf, w83627dhg, w83627dhg_p, w83627uhg, 51 - w83667hg, w83667hg_b, nct6775, nct6776, 53 + w83667hg, w83667hg_b, 52 54 }; 53 55 54 56 /* used to set data->name = w83627ehf_device_names[data->sio_kind] */ ··· 59 61 "w83627uhg", 60 62 "w83667hg", 61 63 "w83667hg", 62 - "nct6775", 63 - "nct6776", 64 64 }; 65 65 66 66 static unsigned short force_id; ··· 93 97 #define SIO_W83627UHG_ID 0xa230 94 98 #define SIO_W83667HG_ID 0xa510 95 99 #define SIO_W83667HG_B_ID 0xb350 96 - #define SIO_NCT6775_ID 0xb470 97 - #define SIO_NCT6776_ID 0xc330 98 100 #define SIO_ID_MASK 0xFFF0 99 101 100 102 static inline void ··· 181 187 #define W83627EHF_REG_DIODE 0x59 182 188 #define W83627EHF_REG_SMI_OVT 0x4C 183 189 184 - /* NCT6775F has its own fan divider registers */ 185 - #define NCT6775_REG_FANDIV1 0x506 186 - #define NCT6775_REG_FANDIV2 0x507 187 - #define NCT6775_REG_FAN_DEBOUNCE 0xf0 188 - 189 190 #define W83627EHF_REG_ALARM1 0x459 190 191 #define W83627EHF_REG_ALARM2 0x45A 191 192 #define W83627EHF_REG_ALARM3 0x45B ··· 224 235 225 236 static const u16 W83627EHF_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 }; 226 237 227 - static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301 }; 228 - static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302 }; 229 - static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = { 0x105, 0x205, 0x305 }; 230 - static const u16 NCT6775_REG_FAN_START_OUTPUT[] = { 0x106, 0x206, 0x306 }; 231 - static const u16 NCT6775_REG_FAN_STOP_TIME[] = { 0x107, 0x207, 0x307 }; 232 - static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309 }; 233 - static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a }; 234 - static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b }; 235 - static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 }; 236 - static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642}; 237 - 238 - static const u16 NCT6775_REG_TEMP[] 239 - = { 0x27, 0x150, 0x250, 0x73, 0x75, 0x77, 0x62b, 0x62c, 0x62d }; 240 - static const u16 NCT6775_REG_TEMP_CONFIG[] 241 - = { 0, 0x152, 0x252, 0, 0, 0, 0x628, 0x629, 0x62A }; 242 - static const u16 NCT6775_REG_TEMP_HYST[] 243 - = { 0x3a, 0x153, 0x253, 0, 0, 0, 0x673, 0x678, 0x67D }; 244 - static const u16 NCT6775_REG_TEMP_OVER[] 245 - = { 0x39, 0x155, 0x255, 0, 0, 0, 0x672, 0x677, 0x67C }; 246 - static const u16 NCT6775_REG_TEMP_SOURCE[] 247 - = { 0x621, 0x622, 0x623, 0x100, 0x200, 0x300, 0x624, 0x625, 0x626 }; 248 - 249 238 static const char *const w83667hg_b_temp_label[] = { 250 239 "SYSTIN", 251 240 "CPUTIN", ··· 235 268 "PECI Agent 4" 236 269 }; 237 270 238 - static const char *const nct6775_temp_label[] = { 239 - "", 240 - "SYSTIN", 241 - "CPUTIN", 242 - "AUXTIN", 243 - "AMD SB-TSI", 244 - "PECI Agent 0", 245 - "PECI Agent 1", 246 - "PECI Agent 2", 247 - "PECI Agent 3", 248 - "PECI Agent 4", 249 - "PECI Agent 5", 250 - "PECI Agent 6", 251 - "PECI Agent 7", 252 - "PCH_CHIP_CPU_MAX_TEMP", 253 - "PCH_CHIP_TEMP", 254 - "PCH_CPU_TEMP", 255 - "PCH_MCH_TEMP", 256 - "PCH_DIM0_TEMP", 257 - "PCH_DIM1_TEMP", 258 - "PCH_DIM2_TEMP", 259 - "PCH_DIM3_TEMP" 260 - }; 261 - 262 - static const char *const nct6776_temp_label[] = { 263 - "", 264 - "SYSTIN", 265 - "CPUTIN", 266 - "AUXTIN", 267 - "SMBUSMASTER 0", 268 - "SMBUSMASTER 1", 269 - "SMBUSMASTER 2", 270 - "SMBUSMASTER 3", 271 - "SMBUSMASTER 4", 272 - "SMBUSMASTER 5", 273 - "SMBUSMASTER 6", 274 - "SMBUSMASTER 7", 275 - "PECI Agent 0", 276 - "PECI Agent 1", 277 - "PCH_CHIP_CPU_MAX_TEMP", 278 - "PCH_CHIP_TEMP", 279 - "PCH_CPU_TEMP", 280 - "PCH_MCH_TEMP", 281 - "PCH_DIM0_TEMP", 282 - "PCH_DIM1_TEMP", 283 - "PCH_DIM2_TEMP", 284 - "PCH_DIM3_TEMP", 285 - "BYTE_TEMP" 286 - }; 287 - 288 - #define NUM_REG_TEMP ARRAY_SIZE(NCT6775_REG_TEMP) 271 + #define NUM_REG_TEMP ARRAY_SIZE(W83627EHF_REG_TEMP) 289 272 290 273 static int is_word_sized(u16 reg) 291 274 { ··· 272 355 { 273 356 if (reg == 0 || reg == 255) 274 357 return 0; 275 - return 1350000U / (reg << divreg); 276 - } 277 - 278 - static unsigned int fan_from_reg13(u16 reg, unsigned int divreg) 279 - { 280 - if ((reg & 0xff1f) == 0xff1f) 281 - return 0; 282 - 283 - reg = (reg & 0x1f) | ((reg & 0xff00) >> 3); 284 - 285 - if (reg == 0) 286 - return 0; 287 - 288 - return 1350000U / reg; 289 - } 290 - 291 - static unsigned int fan_from_reg16(u16 reg, unsigned int divreg) 292 - { 293 - if (reg == 0 || reg == 0xffff) 294 - return 0; 295 - 296 - /* 297 - * Even though the registers are 16 bit wide, the fan divisor 298 - * still applies. 299 - */ 300 358 return 1350000U / (reg << divreg); 301 359 } 302 360 ··· 477 585 } 478 586 479 587 /* This function assumes that the caller holds data->update_lock */ 480 - static void nct6775_write_fan_div(struct w83627ehf_data *data, int nr) 481 - { 482 - u8 reg; 483 - 484 - switch (nr) { 485 - case 0: 486 - reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV1) & 0x70) 487 - | (data->fan_div[0] & 0x7); 488 - w83627ehf_write_value(data, NCT6775_REG_FANDIV1, reg); 489 - break; 490 - case 1: 491 - reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV1) & 0x7) 492 - | ((data->fan_div[1] << 4) & 0x70); 493 - w83627ehf_write_value(data, NCT6775_REG_FANDIV1, reg); 494 - break; 495 - case 2: 496 - reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV2) & 0x70) 497 - | (data->fan_div[2] & 0x7); 498 - w83627ehf_write_value(data, NCT6775_REG_FANDIV2, reg); 499 - break; 500 - case 3: 501 - reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV2) & 0x7) 502 - | ((data->fan_div[3] << 4) & 0x70); 503 - w83627ehf_write_value(data, NCT6775_REG_FANDIV2, reg); 504 - break; 505 - } 506 - } 507 - 508 - /* This function assumes that the caller holds data->update_lock */ 509 588 static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr) 510 589 { 511 590 u8 reg; ··· 530 667 static void w83627ehf_write_fan_div_common(struct device *dev, 531 668 struct w83627ehf_data *data, int nr) 532 669 { 533 - if (data->kind == nct6776) 534 - ; /* no dividers, do nothing */ 535 - else if (data->kind == nct6775) 536 - nct6775_write_fan_div(data, nr); 537 - else 538 - w83627ehf_write_fan_div(data, nr); 539 - } 540 - 541 - static void nct6775_update_fan_div(struct w83627ehf_data *data) 542 - { 543 - u8 i; 544 - 545 - i = w83627ehf_read_value(data, NCT6775_REG_FANDIV1); 546 - data->fan_div[0] = i & 0x7; 547 - data->fan_div[1] = (i & 0x70) >> 4; 548 - i = w83627ehf_read_value(data, NCT6775_REG_FANDIV2); 549 - data->fan_div[2] = i & 0x7; 550 - if (data->has_fan & (1<<3)) 551 - data->fan_div[3] = (i & 0x70) >> 4; 670 + w83627ehf_write_fan_div(data, nr); 552 671 } 553 672 554 673 static void w83627ehf_update_fan_div(struct w83627ehf_data *data) ··· 561 716 static void w83627ehf_update_fan_div_common(struct device *dev, 562 717 struct w83627ehf_data *data) 563 718 { 564 - if (data->kind == nct6776) 565 - ; /* no dividers, do nothing */ 566 - else if (data->kind == nct6775) 567 - nct6775_update_fan_div(data); 568 - else 569 - w83627ehf_update_fan_div(data); 570 - } 571 - 572 - static void nct6775_update_pwm(struct w83627ehf_data *data) 573 - { 574 - int i; 575 - int pwmcfg, fanmodecfg; 576 - 577 - for (i = 0; i < data->pwm_num; i++) { 578 - pwmcfg = w83627ehf_read_value(data, 579 - W83627EHF_REG_PWM_ENABLE[i]); 580 - fanmodecfg = w83627ehf_read_value(data, 581 - NCT6775_REG_FAN_MODE[i]); 582 - data->pwm_mode[i] = 583 - ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) ? 0 : 1; 584 - data->pwm_enable[i] = ((fanmodecfg >> 4) & 7) + 1; 585 - data->tolerance[i] = fanmodecfg & 0x0f; 586 - data->pwm[i] = w83627ehf_read_value(data, data->REG_PWM[i]); 587 - } 719 + w83627ehf_update_fan_div(data); 588 720 } 589 721 590 722 static void w83627ehf_update_pwm(struct w83627ehf_data *data) ··· 593 771 static void w83627ehf_update_pwm_common(struct device *dev, 594 772 struct w83627ehf_data *data) 595 773 { 596 - struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev); 597 - 598 - if (sio_data->kind == nct6775 || sio_data->kind == nct6776) 599 - nct6775_update_pwm(data); 600 - else 601 - w83627ehf_update_pwm(data); 774 + w83627ehf_update_pwm(data); 602 775 } 603 776 604 777 static struct w83627ehf_data *w83627ehf_update_device(struct device *dev) 605 778 { 606 779 struct w83627ehf_data *data = dev_get_drvdata(dev); 607 - struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev); 608 780 int i; 609 781 610 782 mutex_lock(&data->update_lock); ··· 642 826 * time 643 827 */ 644 828 if (data->has_fan_div 645 - && (reg >= 0xff || (sio_data->kind == nct6775 646 - && reg == 0x00)) 829 + && reg >= 0xff 647 830 && data->fan_div[i] < 0x07) { 648 831 dev_dbg(dev, 649 832 "Increasing fan%d clock divider from %u to %u\n", ··· 876 1061 if (val < 0 || val > 1) 877 1062 return -EINVAL; 878 1063 879 - /* On NCT67766F, DC mode is only supported for pwm1 */ 880 - if (data->kind == nct6776 && channel && val != 1) 881 - return -EINVAL; 882 - 883 1064 mutex_lock(&data->update_lock); 884 1065 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[channel]); 885 1066 data->pwm_mode[channel] = val; ··· 909 1098 if (!val || val < 0 || 910 1099 (val > 4 && val != data->pwm_enable_orig[channel])) 911 1100 return -EINVAL; 912 - /* SmartFan III mode is not supported on NCT6776F */ 913 - if (data->kind == nct6776 && val == 4) 914 - return -EINVAL; 915 1101 916 1102 mutex_lock(&data->update_lock); 917 1103 data->pwm_enable[channel] = val; 918 - if (data->kind == nct6775 || data->kind == nct6776) { 919 - reg = w83627ehf_read_value(data, 920 - NCT6775_REG_FAN_MODE[channel]); 921 - reg &= 0x0f; 922 - reg |= (val - 1) << 4; 923 - w83627ehf_write_value(data, 924 - NCT6775_REG_FAN_MODE[channel], reg); 925 - } else { 926 - reg = w83627ehf_read_value(data, 927 - W83627EHF_REG_PWM_ENABLE[channel]); 928 - reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[channel]); 929 - reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[channel]; 930 - w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[channel], 931 - reg); 932 - } 1104 + reg = w83627ehf_read_value(data, 1105 + W83627EHF_REG_PWM_ENABLE[channel]); 1106 + reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[channel]); 1107 + reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[channel]; 1108 + w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[channel], 1109 + reg); 933 1110 mutex_unlock(&data->update_lock); 934 1111 return 0; 935 1112 } ··· 978 1179 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 15); 979 1180 980 1181 mutex_lock(&data->update_lock); 981 - if (data->kind == nct6775 || data->kind == nct6776) { 982 - /* Limit tolerance further for NCT6776F */ 983 - if (data->kind == nct6776 && val > 7) 984 - val = 7; 985 - reg = w83627ehf_read_value(data, NCT6775_REG_FAN_MODE[nr]); 1182 + reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]); 1183 + if (nr == 1) 1184 + reg = (reg & 0x0f) | (val << 4); 1185 + else 986 1186 reg = (reg & 0xf0) | val; 987 - w83627ehf_write_value(data, NCT6775_REG_FAN_MODE[nr], reg); 988 - } else { 989 - reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]); 990 - if (nr == 1) 991 - reg = (reg & 0x0f) | (val << 4); 992 - else 993 - reg = (reg & 0xf0) | val; 994 - w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg); 995 - } 1187 + w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg); 996 1188 data->tolerance[nr] = val; 997 1189 mutex_unlock(&data->update_lock); 998 1190 return count; ··· 1331 1541 } 1332 1542 } 1333 1543 1334 - static void w82627ehf_swap_tempreg(struct w83627ehf_data *data, 1335 - int r1, int r2) 1336 - { 1337 - swap(data->temp_src[r1], data->temp_src[r2]); 1338 - swap(data->reg_temp[r1], data->reg_temp[r2]); 1339 - swap(data->reg_temp_over[r1], data->reg_temp_over[r2]); 1340 - swap(data->reg_temp_hyst[r1], data->reg_temp_hyst[r2]); 1341 - swap(data->reg_temp_config[r1], data->reg_temp_config[r2]); 1342 - } 1343 - 1344 1544 static void 1345 1545 w83627ehf_set_temp_reg_ehf(struct w83627ehf_data *data, int n_temp) 1346 1546 { ··· 1358 1578 } 1359 1579 1360 1580 /* fan4 and fan5 share some pins with the GPIO and serial flash */ 1361 - if (sio_data->kind == nct6775) { 1362 - /* On NCT6775, fan4 shares pins with the fdc interface */ 1363 - fan3pin = 1; 1364 - fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80); 1365 - fan4min = 0; 1366 - fan5pin = 0; 1367 - } else if (sio_data->kind == nct6776) { 1368 - bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80; 1369 - 1370 - superio_select(sio_data->sioreg, W83627EHF_LD_HWM); 1371 - regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE); 1372 - 1373 - if (regval & 0x80) 1374 - fan3pin = gpok; 1375 - else 1376 - fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40); 1377 - 1378 - if (regval & 0x40) 1379 - fan4pin = gpok; 1380 - else 1381 - fan4pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x01); 1382 - 1383 - if (regval & 0x20) 1384 - fan5pin = gpok; 1385 - else 1386 - fan5pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x02); 1387 - 1388 - fan4min = fan4pin; 1389 - } else if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) { 1581 + if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) { 1390 1582 fan3pin = 1; 1391 1583 fan4pin = superio_inb(sio_data->sioreg, 0x27) & 0x40; 1392 1584 fan5pin = superio_inb(sio_data->sioreg, 0x27) & 0x20; ··· 1374 1622 data->has_fan |= (fan3pin << 2); 1375 1623 data->has_fan_min |= (fan3pin << 2); 1376 1624 1377 - if (sio_data->kind == nct6775 || sio_data->kind == nct6776) { 1378 - /* 1379 - * NCT6775F and NCT6776F don't have the W83627EHF_REG_FANDIV1 1380 - * register 1381 - */ 1382 - data->has_fan |= (fan4pin << 3) | (fan5pin << 4); 1383 - data->has_fan_min |= (fan4min << 3) | (fan5pin << 4); 1384 - } else { 1385 - /* 1386 - * It looks like fan4 and fan5 pins can be alternatively used 1387 - * as fan on/off switches, but fan5 control is write only :/ 1388 - * We assume that if the serial interface is disabled, designers 1389 - * connected fan5 as input unless they are emitting log 1, which 1390 - * is not the default. 1391 - */ 1392 - regval = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1); 1393 - if ((regval & (1 << 2)) && fan4pin) { 1394 - data->has_fan |= (1 << 3); 1395 - data->has_fan_min |= (1 << 3); 1396 - } 1397 - if (!(regval & (1 << 1)) && fan5pin) { 1398 - data->has_fan |= (1 << 4); 1399 - data->has_fan_min |= (1 << 4); 1400 - } 1625 + /* 1626 + * It looks like fan4 and fan5 pins can be alternatively used 1627 + * as fan on/off switches, but fan5 control is write only :/ 1628 + * We assume that if the serial interface is disabled, designers 1629 + * connected fan5 as input unless they are emitting log 1, which 1630 + * is not the default. 1631 + */ 1632 + regval = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1); 1633 + if ((regval & (1 << 2)) && fan4pin) { 1634 + data->has_fan |= (1 << 3); 1635 + data->has_fan_min |= (1 << 3); 1636 + } 1637 + if (!(regval & (1 << 1)) && fan5pin) { 1638 + data->has_fan |= (1 << 4); 1639 + data->has_fan_min |= (1 << 4); 1401 1640 } 1402 1641 } 1403 1642 ··· 1438 1695 if (attr == hwmon_fan_input || attr == hwmon_fan_alarm) 1439 1696 return 0444; 1440 1697 if (attr == hwmon_fan_div) { 1441 - if (data->kind != nct6776) 1442 - return 0444; 1443 - else 1444 - return 0; 1698 + return 0444; 1445 1699 } 1446 1700 if (attr == hwmon_fan_min) { 1447 1701 if (data->has_fan_min & (1 << channel)) ··· 1471 1731 break; 1472 1732 1473 1733 case hwmon_intrusion: 1474 - if (channel == 0 || 1475 - (channel == 1 && data->kind == nct6776)) 1734 + if (channel == 0) 1476 1735 return 0644; 1477 1736 return 0; 1478 1737 ··· 1787 2048 1788 2049 /* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */ 1789 2050 data->in_num = (sio_data->kind == w83627ehf) ? 10 : 9; 1790 - /* 667HG, NCT6775F, and NCT6776F have 3 pwms, and 627UHG has only 2 */ 2051 + /* 667HG has 3 pwms, and 627UHG has only 2 */ 1791 2052 switch (sio_data->kind) { 1792 2053 default: 1793 2054 data->pwm_num = 4; 1794 2055 break; 1795 2056 case w83667hg: 1796 2057 case w83667hg_b: 1797 - case nct6775: 1798 - case nct6776: 1799 2058 data->pwm_num = 3; 1800 2059 break; 1801 2060 case w83627uhg: ··· 1805 2068 data->have_temp = 0x07; 1806 2069 1807 2070 /* Deal with temperature register setup first. */ 1808 - if (sio_data->kind == nct6775 || sio_data->kind == nct6776) { 1809 - int mask = 0; 1810 - 1811 - /* 1812 - * Display temperature sensor output only if it monitors 1813 - * a source other than one already reported. Always display 1814 - * first three temperature registers, though. 1815 - */ 1816 - for (i = 0; i < NUM_REG_TEMP; i++) { 1817 - u8 src; 1818 - 1819 - data->reg_temp[i] = NCT6775_REG_TEMP[i]; 1820 - data->reg_temp_over[i] = NCT6775_REG_TEMP_OVER[i]; 1821 - data->reg_temp_hyst[i] = NCT6775_REG_TEMP_HYST[i]; 1822 - data->reg_temp_config[i] = NCT6775_REG_TEMP_CONFIG[i]; 1823 - 1824 - src = w83627ehf_read_value(data, 1825 - NCT6775_REG_TEMP_SOURCE[i]); 1826 - src &= 0x1f; 1827 - if (src && !(mask & (1 << src))) { 1828 - data->have_temp |= 1 << i; 1829 - mask |= 1 << src; 1830 - } 1831 - 1832 - data->temp_src[i] = src; 1833 - 1834 - /* 1835 - * Now do some register swapping if index 0..2 don't 1836 - * point to SYSTIN(1), CPUIN(2), and AUXIN(3). 1837 - * Idea is to have the first three attributes 1838 - * report SYSTIN, CPUIN, and AUXIN if possible 1839 - * without overriding the basic system configuration. 1840 - */ 1841 - if (i > 0 && data->temp_src[0] != 1 1842 - && data->temp_src[i] == 1) 1843 - w82627ehf_swap_tempreg(data, 0, i); 1844 - if (i > 1 && data->temp_src[1] != 2 1845 - && data->temp_src[i] == 2) 1846 - w82627ehf_swap_tempreg(data, 1, i); 1847 - if (i > 2 && data->temp_src[2] != 3 1848 - && data->temp_src[i] == 3) 1849 - w82627ehf_swap_tempreg(data, 2, i); 1850 - } 1851 - if (sio_data->kind == nct6776) { 1852 - /* 1853 - * On NCT6776, AUXTIN and VIN3 pins are shared. 1854 - * Only way to detect it is to check if AUXTIN is used 1855 - * as a temperature source, and if that source is 1856 - * enabled. 1857 - * 1858 - * If that is the case, disable in6, which reports VIN3. 1859 - * Otherwise disable temp3. 1860 - */ 1861 - if (data->temp_src[2] == 3) { 1862 - u8 reg; 1863 - 1864 - if (data->reg_temp_config[2]) 1865 - reg = w83627ehf_read_value(data, 1866 - data->reg_temp_config[2]); 1867 - else 1868 - reg = 0; /* Assume AUXTIN is used */ 1869 - 1870 - if (reg & 0x01) 1871 - data->have_temp &= ~(1 << 2); 1872 - else 1873 - data->in6_skip = 1; 1874 - } 1875 - data->temp_label = nct6776_temp_label; 1876 - } else { 1877 - data->temp_label = nct6775_temp_label; 1878 - } 1879 - data->have_temp_offset = data->have_temp & 0x07; 1880 - for (i = 0; i < 3; i++) { 1881 - if (data->temp_src[i] > 3) 1882 - data->have_temp_offset &= ~(1 << i); 1883 - } 1884 - } else if (sio_data->kind == w83667hg_b) { 2071 + if (sio_data->kind == w83667hg_b) { 1885 2072 u8 reg; 1886 2073 1887 2074 w83627ehf_set_temp_reg_ehf(data, 4); ··· 1915 2254 data->have_temp_offset = data->have_temp & 0x07; 1916 2255 } 1917 2256 1918 - if (sio_data->kind == nct6775) { 1919 - data->has_fan_div = true; 1920 - data->fan_from_reg = fan_from_reg16; 1921 - data->fan_from_reg_min = fan_from_reg8; 1922 - data->REG_PWM = NCT6775_REG_PWM; 1923 - data->REG_TARGET = NCT6775_REG_TARGET; 1924 - data->REG_FAN = NCT6775_REG_FAN; 1925 - data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN; 1926 - data->REG_FAN_START_OUTPUT = NCT6775_REG_FAN_START_OUTPUT; 1927 - data->REG_FAN_STOP_OUTPUT = NCT6775_REG_FAN_STOP_OUTPUT; 1928 - data->REG_FAN_STOP_TIME = NCT6775_REG_FAN_STOP_TIME; 1929 - data->REG_FAN_MAX_OUTPUT = NCT6775_REG_FAN_MAX_OUTPUT; 1930 - data->REG_FAN_STEP_OUTPUT = NCT6775_REG_FAN_STEP_OUTPUT; 1931 - } else if (sio_data->kind == nct6776) { 1932 - data->has_fan_div = false; 1933 - data->fan_from_reg = fan_from_reg13; 1934 - data->fan_from_reg_min = fan_from_reg13; 1935 - data->REG_PWM = NCT6775_REG_PWM; 1936 - data->REG_TARGET = NCT6775_REG_TARGET; 1937 - data->REG_FAN = NCT6775_REG_FAN; 1938 - data->REG_FAN_MIN = NCT6776_REG_FAN_MIN; 1939 - data->REG_FAN_START_OUTPUT = NCT6775_REG_FAN_START_OUTPUT; 1940 - data->REG_FAN_STOP_OUTPUT = NCT6775_REG_FAN_STOP_OUTPUT; 1941 - data->REG_FAN_STOP_TIME = NCT6775_REG_FAN_STOP_TIME; 1942 - } else if (sio_data->kind == w83667hg_b) { 2257 + if (sio_data->kind == w83667hg_b) { 1943 2258 data->has_fan_div = true; 1944 2259 data->fan_from_reg = fan_from_reg8; 1945 2260 data->fan_from_reg_min = fan_from_reg8; ··· 1963 2326 goto exit_release; 1964 2327 1965 2328 /* Read VID value */ 1966 - if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b || 1967 - sio_data->kind == nct6775 || sio_data->kind == nct6776) { 2329 + if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) { 1968 2330 /* 1969 2331 * W83667HG has different pins for VID input and output, so 1970 2332 * we can get the VID input values directly at logical device D ··· 2012 2376 } 2013 2377 } 2014 2378 2015 - if (fan_debounce && 2016 - (sio_data->kind == nct6775 || sio_data->kind == nct6776)) { 2017 - u8 tmp; 2018 - 2019 - superio_select(sio_data->sioreg, W83627EHF_LD_HWM); 2020 - tmp = superio_inb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE); 2021 - if (sio_data->kind == nct6776) 2022 - superio_outb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE, 2023 - 0x3e | tmp); 2024 - else 2025 - superio_outb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE, 2026 - 0x1e | tmp); 2027 - pr_info("Enabled fan debounce for chip %s\n", data->name); 2028 - } 2029 - 2030 2379 w83627ehf_check_fan_inputs(sio_data, data); 2031 2380 2032 2381 superio_exit(sio_data->sioreg); ··· 2051 2430 static int w83627ehf_suspend(struct device *dev) 2052 2431 { 2053 2432 struct w83627ehf_data *data = w83627ehf_update_device(dev); 2054 - struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev); 2055 2433 2056 2434 mutex_lock(&data->update_lock); 2057 2435 data->vbat = w83627ehf_read_value(data, W83627EHF_REG_VBAT); 2058 - if (sio_data->kind == nct6775) { 2059 - data->fandiv1 = w83627ehf_read_value(data, NCT6775_REG_FANDIV1); 2060 - data->fandiv2 = w83627ehf_read_value(data, NCT6775_REG_FANDIV2); 2061 - } 2062 2436 mutex_unlock(&data->update_lock); 2063 2437 2064 2438 return 0; ··· 2062 2446 static int w83627ehf_resume(struct device *dev) 2063 2447 { 2064 2448 struct w83627ehf_data *data = dev_get_drvdata(dev); 2065 - struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev); 2066 2449 int i; 2067 2450 2068 2451 mutex_lock(&data->update_lock); ··· 2106 2491 2107 2492 /* Restore other settings */ 2108 2493 w83627ehf_write_value(data, W83627EHF_REG_VBAT, data->vbat); 2109 - if (sio_data->kind == nct6775) { 2110 - w83627ehf_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1); 2111 - w83627ehf_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2); 2112 - } 2113 2494 2114 2495 /* Force re-reading all values */ 2115 2496 data->valid = 0; ··· 2146 2535 static const char sio_name_W83627UHG[] __initconst = "W83627UHG"; 2147 2536 static const char sio_name_W83667HG[] __initconst = "W83667HG"; 2148 2537 static const char sio_name_W83667HG_B[] __initconst = "W83667HG-B"; 2149 - static const char sio_name_NCT6775[] __initconst = "NCT6775F"; 2150 - static const char sio_name_NCT6776[] __initconst = "NCT6776F"; 2151 2538 2152 2539 u16 val; 2153 2540 const char *sio_name; ··· 2188 2579 case SIO_W83667HG_B_ID: 2189 2580 sio_data->kind = w83667hg_b; 2190 2581 sio_name = sio_name_W83667HG_B; 2191 - break; 2192 - case SIO_NCT6775_ID: 2193 - sio_data->kind = nct6775; 2194 - sio_name = sio_name_NCT6775; 2195 - break; 2196 - case SIO_NCT6776_ID: 2197 - sio_data->kind = nct6776; 2198 - sio_name = sio_name_NCT6776; 2199 2582 break; 2200 2583 default: 2201 2584 if (val != 0xffff)