tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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[AVR32] Implement irqflags trace and lockdep support

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>

Haavard Skinnemoen 320516b7 2f026037

+43 -19
unified split
+6
arch/avr32/Kconfig
··· 27 config STACKTRACE_SUPPORT 28 def_bool y 29 30 config HARDIRQS_SW_RESEND 31 def_bool y 32
··· 27 config STACKTRACE_SUPPORT 28 def_bool y 29 30 + config LOCKDEP_SUPPORT 31 + def_bool y 32 + 33 + config TRACE_IRQFLAGS_SUPPORT 34 + def_bool y 35 + 36 config HARDIRQS_SW_RESEND 37 def_bool y 38
+35 -19
arch/avr32/kernel/entry-avr32b.S
··· 527 528 /* If we get a debug trap from privileged context we end up here */ 529 handle_debug_priv: 530 - /* Fix up LR and SP in regs. r11 contains the mode we came from */ 531 - mfsr r8, SYSREG_SR 532 - mov r9, r8 533 - andh r8, hi(~MODE_MASK) 534 - or r8, r11 535 - mtsr SYSREG_SR, r8 536 sub pc, -2 537 stdsp sp[REG_LR], lr 538 - mtsr SYSREG_SR, r9 539 sub pc, -2 540 sub r10, sp, -FRAME_SIZE_FULL 541 stdsp sp[REG_SP], r10 ··· 546 popm r10, r11 547 mtsr SYSREG_RAR_DBG, r10 548 mtsr SYSREG_RSR_DBG, r11 549 - mfsr r8, SYSREG_SR 550 - mov r9, r8 551 - andh r8, hi(~MODE_MASK) 552 - andh r11, hi(MODE_MASK) 553 - or r8, r11 554 - mtsr SYSREG_SR, r8 555 sub pc, -2 556 popm lr 557 - mtsr SYSREG_SR, r9 558 sub pc, -2 559 sub sp, -4 /* skip SP */ 560 popm r0-r12 ··· 575 handle_debug: 576 sub sp, 4 /* r12_orig */ 577 stmts --sp, r0-lr 578 - mfsr r10, SYSREG_RAR_DBG 579 - mfsr r11, SYSREG_RSR_DBG 580 unmask_exceptions 581 - pushm r10,r11 582 - andh r11, (MODE_MASK >> 16), COH 583 brne handle_debug_priv 584 585 mov r12, sp ··· 597 mask_exceptions 598 mtsr SYSREG_RSR_DBG, r11 599 mtsr SYSREG_RAR_DBG, r10 600 ldmts sp++, r0-lr 601 sub sp, -4 602 retd ··· 687 andl r1, _TIF_WORK_MASK, COH 688 brne irq_exit_work 689 690 - 1: popm r8-r9 691 mtsr rar_int\level, r8 692 mtsr rsr_int\level, r9 693 ldmts sp++,r0-lr
··· 527 528 /* If we get a debug trap from privileged context we end up here */ 529 handle_debug_priv: 530 + /* Fix up LR and SP in regs. r1 contains the mode we came from */ 531 + mfsr r2, SYSREG_SR 532 + mov r3, r2 533 + bfins r2, r1, SYSREG_MODE_OFFSET, SYSREG_MODE_SIZE 534 + mtsr SYSREG_SR, r2 535 sub pc, -2 536 stdsp sp[REG_LR], lr 537 + mtsr SYSREG_SR, r3 538 sub pc, -2 539 sub r10, sp, -FRAME_SIZE_FULL 540 stdsp sp[REG_SP], r10 ··· 547 popm r10, r11 548 mtsr SYSREG_RAR_DBG, r10 549 mtsr SYSREG_RSR_DBG, r11 550 + #ifdef CONFIG_TRACE_IRQFLAGS 551 + bld r11, SYSREG_GM_OFFSET 552 + brcc 1f 553 + rcall trace_hardirqs_on 554 + 1: 555 + #endif 556 + mfsr r2, SYSREG_SR 557 + mov r3, r2 558 + bfins r2, r1, SYSREG_MODE_OFFSET, SYSREG_MODE_SIZE 559 + mtsr SYSREG_SR, r2 560 sub pc, -2 561 popm lr 562 + mtsr SYSREG_SR, r3 563 sub pc, -2 564 sub sp, -4 /* skip SP */ 565 popm r0-r12 ··· 572 handle_debug: 573 sub sp, 4 /* r12_orig */ 574 stmts --sp, r0-lr 575 + mfsr r0, SYSREG_RAR_DBG 576 + mfsr r1, SYSREG_RSR_DBG 577 + #ifdef CONFIG_TRACE_IRQFLAGS 578 + rcall trace_hardirqs_off 579 + #endif 580 unmask_exceptions 581 + stm --sp, r0, r1 582 + bfextu r1, r1, SYSREG_MODE_OFFSET, SYSREG_MODE_SIZE 583 brne handle_debug_priv 584 585 mov r12, sp ··· 591 mask_exceptions 592 mtsr SYSREG_RSR_DBG, r11 593 mtsr SYSREG_RAR_DBG, r10 594 + #ifdef CONFIG_TRACE_IRQFLAGS 595 + bld r11, SYSREG_GM_OFFSET 596 + brcc 1f 597 + rcall trace_hardirqs_on 598 + 1: 599 + #endif 600 ldmts sp++, r0-lr 601 sub sp, -4 602 retd ··· 675 andl r1, _TIF_WORK_MASK, COH 676 brne irq_exit_work 677 678 + 1: 679 + #ifdef CONFIG_TRACE_IRQFLAGS 680 + rcall trace_hardirqs_on 681 + #endif 682 + popm r8-r9 683 mtsr rar_int\level, r8 684 mtsr rsr_int\level, r9 685 ldmts sp++,r0-lr
+2
include/asm-avr32/sysreg.h
··· 93 #define SYSREG_I3M_SIZE 1 94 #define SYSREG_EM_OFFSET 21 95 #define SYSREG_EM_SIZE 1 96 #define SYSREG_M0_OFFSET 22 97 #define SYSREG_M0_SIZE 1 98 #define SYSREG_M1_OFFSET 23
··· 93 #define SYSREG_I3M_SIZE 1 94 #define SYSREG_EM_OFFSET 21 95 #define SYSREG_EM_SIZE 1 96 + #define SYSREG_MODE_OFFSET 22 97 + #define SYSREG_MODE_SIZE 3 98 #define SYSREG_M0_OFFSET 22 99 #define SYSREG_M0_SIZE 1 100 #define SYSREG_M1_OFFSET 23