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media: dt-bindings: media: add TI DS90UB960 FPD-Link III Deserializer

Add DT bindings for TI DS90UB960 FPD-Link III Deserializer.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>

authored by

Tomi Valkeinen and committed by
Mauro Carvalho Chehab
313e8b32 236a0aab

+427
+427
Documentation/devicetree/bindings/media/i2c/ti,ds90ub960.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/media/i2c/ti,ds90ub960.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Texas Instruments DS90UB9XX Family FPD-Link Deserializer Hubs 8 + 9 + maintainers: 10 + - Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> 11 + 12 + description: 13 + The TI DS90UB9XX devices are FPD-Link video deserializers with I2C and GPIO 14 + forwarding. 15 + 16 + allOf: 17 + - $ref: /schemas/i2c/i2c-atr.yaml# 18 + 19 + properties: 20 + compatible: 21 + enum: 22 + - ti,ds90ub960-q1 23 + - ti,ds90ub9702-q1 24 + 25 + reg: 26 + maxItems: 1 27 + 28 + clocks: 29 + maxItems: 1 30 + description: 31 + Reference clock connected to the REFCLK pin. 32 + 33 + clock-names: 34 + items: 35 + - const: refclk 36 + 37 + powerdown-gpios: 38 + maxItems: 1 39 + description: 40 + Specifier for the GPIO connected to the PDB pin. 41 + 42 + i2c-alias-pool: 43 + minItems: 1 44 + maxItems: 32 45 + 46 + links: 47 + type: object 48 + additionalProperties: false 49 + 50 + properties: 51 + '#address-cells': 52 + const: 1 53 + 54 + '#size-cells': 55 + const: 0 56 + 57 + ti,manual-strobe: 58 + type: boolean 59 + description: 60 + Enable manual strobe position and EQ level 61 + 62 + patternProperties: 63 + '^link@[0-3]$': 64 + type: object 65 + additionalProperties: false 66 + properties: 67 + reg: 68 + description: The link number 69 + maxItems: 1 70 + 71 + i2c-alias: 72 + description: 73 + The I2C address used for the serializer. Transactions to this 74 + address on the I2C bus where the deserializer resides are 75 + forwarded to the serializer. 76 + 77 + ti,rx-mode: 78 + $ref: /schemas/types.yaml#/definitions/uint32 79 + enum: 80 + - 0 # RAW10 81 + - 1 # RAW12 HF 82 + - 2 # RAW12 LF 83 + - 3 # CSI2 SYNC 84 + - 4 # CSI2 NON-SYNC 85 + description: 86 + FPD-Link Input Mode. This should reflect the hardware and the 87 + default mode of the connected device. 88 + 89 + ti,cdr-mode: 90 + $ref: /schemas/types.yaml#/definitions/uint32 91 + enum: 92 + - 0 # FPD-Link III 93 + - 1 # FPD-Link IV 94 + description: 95 + FPD-Link CDR Mode. This should reflect the hardware and the 96 + default mode of the connected device. 97 + 98 + ti,strobe-pos: 99 + $ref: /schemas/types.yaml#/definitions/int32 100 + minimum: -13 101 + maximum: 13 102 + description: Manual strobe position 103 + 104 + ti,eq-level: 105 + $ref: /schemas/types.yaml#/definitions/uint32 106 + maximum: 14 107 + description: Manual EQ level 108 + 109 + serializer: 110 + type: object 111 + description: FPD-Link Serializer node 112 + 113 + required: 114 + - reg 115 + - i2c-alias 116 + - ti,rx-mode 117 + - serializer 118 + 119 + ports: 120 + $ref: /schemas/graph.yaml#/properties/ports 121 + 122 + properties: 123 + port@0: 124 + $ref: /schemas/graph.yaml#/$defs/port-base 125 + unevaluatedProperties: false 126 + description: FPD-Link input 0 127 + 128 + properties: 129 + endpoint: 130 + $ref: /schemas/media/video-interfaces.yaml# 131 + unevaluatedProperties: false 132 + description: 133 + Endpoint for FPD-Link port. If the RX mode for this port is RAW, 134 + hsync-active and vsync-active must be defined. 135 + 136 + port@1: 137 + $ref: /schemas/graph.yaml#/$defs/port-base 138 + unevaluatedProperties: false 139 + description: FPD-Link input 1 140 + 141 + properties: 142 + endpoint: 143 + $ref: /schemas/media/video-interfaces.yaml# 144 + unevaluatedProperties: false 145 + description: 146 + Endpoint for FPD-Link port. If the RX mode for this port is RAW, 147 + hsync-active and vsync-active must be defined. 148 + 149 + port@2: 150 + $ref: /schemas/graph.yaml#/$defs/port-base 151 + unevaluatedProperties: false 152 + description: FPD-Link input 2 153 + 154 + properties: 155 + endpoint: 156 + $ref: /schemas/media/video-interfaces.yaml# 157 + unevaluatedProperties: false 158 + description: 159 + Endpoint for FPD-Link port. If the RX mode for this port is RAW, 160 + hsync-active and vsync-active must be defined. 161 + 162 + port@3: 163 + $ref: /schemas/graph.yaml#/$defs/port-base 164 + unevaluatedProperties: false 165 + description: FPD-Link input 3 166 + 167 + properties: 168 + endpoint: 169 + $ref: /schemas/media/video-interfaces.yaml# 170 + unevaluatedProperties: false 171 + description: 172 + Endpoint for FPD-Link port. If the RX mode for this port is RAW, 173 + hsync-active and vsync-active must be defined. 174 + 175 + port@4: 176 + $ref: /schemas/graph.yaml#/$defs/port-base 177 + unevaluatedProperties: false 178 + description: CSI-2 Output 0 179 + 180 + properties: 181 + endpoint: 182 + $ref: /schemas/media/video-interfaces.yaml# 183 + unevaluatedProperties: false 184 + 185 + properties: 186 + data-lanes: 187 + minItems: 1 188 + maxItems: 4 189 + link-frequencies: 190 + maxItems: 1 191 + 192 + required: 193 + - data-lanes 194 + - link-frequencies 195 + 196 + port@5: 197 + $ref: /schemas/graph.yaml#/$defs/port-base 198 + unevaluatedProperties: false 199 + description: CSI-2 Output 1 200 + 201 + properties: 202 + endpoint: 203 + $ref: /schemas/media/video-interfaces.yaml# 204 + unevaluatedProperties: false 205 + 206 + properties: 207 + data-lanes: 208 + minItems: 1 209 + maxItems: 4 210 + link-frequencies: 211 + maxItems: 1 212 + 213 + required: 214 + - data-lanes 215 + - link-frequencies 216 + 217 + required: 218 + - port@0 219 + - port@1 220 + - port@2 221 + - port@3 222 + - port@4 223 + - port@5 224 + 225 + required: 226 + - compatible 227 + - reg 228 + - clocks 229 + - clock-names 230 + - ports 231 + 232 + unevaluatedProperties: false 233 + 234 + examples: 235 + - | 236 + #include <dt-bindings/gpio/gpio.h> 237 + 238 + i2c { 239 + clock-frequency = <400000>; 240 + #address-cells = <1>; 241 + #size-cells = <0>; 242 + 243 + deser@3d { 244 + compatible = "ti,ds90ub960-q1"; 245 + reg = <0x3d>; 246 + 247 + clock-names = "refclk"; 248 + clocks = <&fixed_clock>; 249 + 250 + powerdown-gpios = <&pca9555 7 GPIO_ACTIVE_LOW>; 251 + 252 + i2c-alias-pool = <0x4a 0x4b 0x4c 0x4d 0x4e 0x4f>; 253 + 254 + ports { 255 + #address-cells = <1>; 256 + #size-cells = <0>; 257 + 258 + /* Port 0, Camera 0 */ 259 + port@0 { 260 + reg = <0>; 261 + 262 + ub960_fpd3_1_in: endpoint { 263 + remote-endpoint = <&ub953_1_out>; 264 + }; 265 + }; 266 + 267 + /* Port 1, Camera 1 */ 268 + port@1 { 269 + reg = <1>; 270 + 271 + ub960_fpd3_2_in: endpoint { 272 + remote-endpoint = <&ub913_2_out>; 273 + hsync-active = <0>; 274 + vsync-active = <1>; 275 + }; 276 + }; 277 + 278 + /* Port 2, unconnected */ 279 + port@2 { 280 + reg = <2>; 281 + }; 282 + 283 + /* Port 3, unconnected */ 284 + port@3 { 285 + reg = <3>; 286 + }; 287 + 288 + /* Port 4, CSI-2 TX */ 289 + port@4 { 290 + reg = <4>; 291 + ds90ub960_0_csi_out: endpoint { 292 + data-lanes = <1 2 3 4>; 293 + link-frequencies = /bits/ 64 <800000000>; 294 + remote-endpoint = <&csi2_phy0>; 295 + }; 296 + }; 297 + 298 + /* Port 5, unconnected */ 299 + port@5 { 300 + reg = <5>; 301 + }; 302 + }; 303 + 304 + links { 305 + #address-cells = <1>; 306 + #size-cells = <0>; 307 + 308 + /* Link 0 has DS90UB953 serializer and IMX274 sensor */ 309 + 310 + link@0 { 311 + reg = <0>; 312 + i2c-alias = <0x44>; 313 + 314 + ti,rx-mode = <3>; 315 + 316 + serializer1: serializer { 317 + compatible = "ti,ds90ub953-q1"; 318 + 319 + gpio-controller; 320 + #gpio-cells = <2>; 321 + 322 + #clock-cells = <0>; 323 + 324 + ports { 325 + #address-cells = <1>; 326 + #size-cells = <0>; 327 + 328 + port@0 { 329 + reg = <0>; 330 + ub953_1_in: endpoint { 331 + data-lanes = <1 2 3 4>; 332 + remote-endpoint = <&sensor_1_out>; 333 + }; 334 + }; 335 + 336 + port@1 { 337 + reg = <1>; 338 + 339 + ub953_1_out: endpoint { 340 + remote-endpoint = <&ub960_fpd3_1_in>; 341 + }; 342 + }; 343 + }; 344 + 345 + i2c { 346 + #address-cells = <1>; 347 + #size-cells = <0>; 348 + 349 + sensor@1a { 350 + compatible = "sony,imx274"; 351 + reg = <0x1a>; 352 + 353 + reset-gpios = <&serializer1 0 GPIO_ACTIVE_LOW>; 354 + 355 + port { 356 + sensor_1_out: endpoint { 357 + remote-endpoint = <&ub953_1_in>; 358 + }; 359 + }; 360 + }; 361 + }; 362 + }; 363 + }; /* End of link@0 */ 364 + 365 + /* Link 1 has DS90UB913 serializer and MT9V111 sensor */ 366 + 367 + link@1 { 368 + reg = <1>; 369 + i2c-alias = <0x45>; 370 + 371 + ti,rx-mode = <0>; 372 + 373 + serializer2: serializer { 374 + compatible = "ti,ds90ub913a-q1"; 375 + 376 + gpio-controller; 377 + #gpio-cells = <2>; 378 + 379 + clocks = <&clk_cam_48M>; 380 + clock-names = "clkin"; 381 + 382 + #clock-cells = <0>; 383 + 384 + ports { 385 + #address-cells = <1>; 386 + #size-cells = <0>; 387 + 388 + port@0 { 389 + reg = <0>; 390 + ub913_2_in: endpoint { 391 + remote-endpoint = <&sensor_2_out>; 392 + pclk-sample = <1>; 393 + }; 394 + }; 395 + 396 + port@1 { 397 + reg = <1>; 398 + 399 + ub913_2_out: endpoint { 400 + remote-endpoint = <&ub960_fpd3_2_in>; 401 + }; 402 + }; 403 + }; 404 + 405 + i2c { 406 + #address-cells = <1>; 407 + #size-cells = <0>; 408 + 409 + sensor@48 { 410 + compatible = "aptina,mt9v111"; 411 + reg = <0x48>; 412 + 413 + clocks = <&serializer2>; 414 + 415 + port { 416 + sensor_2_out: endpoint { 417 + remote-endpoint = <&ub913_2_in>; 418 + }; 419 + }; 420 + }; 421 + }; 422 + }; 423 + }; /* End of link@1 */ 424 + }; 425 + }; 426 + }; 427 + ...