tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
[ARM] msm: core platform support for ARCH_MSM7X00A
- core header files for arch-msm
- Kconfig and Makefiles to enable ARCH_MSM7X00A builds
- MSM7X00A specific arch_idle
- peripheral iomap and irq number definitions
Signed-off-by: Brian Swetland <swetland@google.com>
authored by
Brian Swetland
and committed by
Russell King
3042102a
9b73e76f
+628
-1
+11
arch/arm/Kconfig
+11
arch/arm/Kconfig
···
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409
help
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Support for TI's OMAP platform (OMAP1 and OMAP2).
411
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config ARCH_MSM7X00A
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bool "Qualcomm MSM7X00A"
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select GENERIC_TIME
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select GENERIC_CLOCKEVENTS
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help
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Support for Qualcomm MSM7X00A based systems. This runs on the ARM11
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apps processor of the MSM7X00A and depends on a shared memory
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interface to the ARM9 modem processor which runs the baseband stack
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and controls some vital subsystems (clock and power control, etc).
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<http://www.cdmatech.com/products/msm7200_chipset_solution.jsp>
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endchoice
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source "arch/arm/mach-clps711x/Kconfig"
+1
arch/arm/Makefile
+1
arch/arm/Makefile
+3
arch/arm/mach-msm/Makefile.boot
+3
arch/arm/mach-msm/Makefile.boot
+36
arch/arm/mach-msm/idle.S
+36
arch/arm/mach-msm/idle.S
···
1
+
/* linux/include/asm-arm/arch-msm/idle.S
2
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*
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* Idle processing for MSM7K - work around bugs with SWFI.
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*
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* Copyright (c) 2007 QUALCOMM Incorporated.
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* Copyright (C) 2007 Google, Inc.
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*
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* This software is licensed under the terms of the GNU General Public
9
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* License version 2, as published by the Free Software Foundation, and
10
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
13
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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+
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ENTRY(arch_idle)
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#ifdef CONFIG_MSM7X00A_IDLE
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mrc p15, 0, r1, c1, c0, 0 /* read current CR */
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bic r0, r1, #(1 << 2) /* clear dcache bit */
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bic r0, r0, #(1 << 12) /* clear icache bit */
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mcr p15, 0, r0, c1, c0, 0 /* disable d/i cache */
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mov r0, #0 /* prepare wfi value */
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mcr p15, 0, r0, c7, c10, 0 /* flush the cache */
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mcr p15, 0, r0, c7, c10, 4 /* memory barrier */
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mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */
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+
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mcr p15, 0, r1, c1, c0, 0 /* restore d/i cache */
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#endif
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mov pc, lr
+85
arch/arm/mach-msm/io.c
+85
arch/arm/mach-msm/io.c
···
1
+
/* arch/arm/mach-msm/io.c
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*
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* MSM7K io support
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*
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* Copyright (C) 2007 Google, Inc.
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* Author: Brian Swetland <swetland@google.com>
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*
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* This software is licensed under the terms of the GNU General Public
9
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* License version 2, as published by the Free Software Foundation, and
10
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
13
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
14
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15
+
* GNU General Public License for more details.
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*
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*/
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+
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <asm/hardware.h>
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#include <asm/io.h>
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#include <asm/page.h>
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#include <asm/arch/msm_iomap.h>
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#include <asm/mach/map.h>
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+
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#include <asm/arch/board.h>
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+
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#define MSM_DEVICE(name) { \
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.virtual = MSM_##name##_BASE, \
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.pfn = __phys_to_pfn(MSM_##name##_PHYS), \
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.length = MSM_##name##_SIZE, \
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.type = MT_DEVICE_NONSHARED, \
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}
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+
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static struct map_desc msm_io_desc[] __initdata = {
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MSM_DEVICE(VIC),
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MSM_DEVICE(CSR),
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MSM_DEVICE(GPT),
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MSM_DEVICE(DMOV),
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MSM_DEVICE(UART1),
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MSM_DEVICE(UART2),
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MSM_DEVICE(UART3),
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MSM_DEVICE(I2C),
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MSM_DEVICE(GPIO1),
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MSM_DEVICE(GPIO2),
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MSM_DEVICE(HSUSB),
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MSM_DEVICE(CLK_CTL),
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MSM_DEVICE(PMDH),
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MSM_DEVICE(EMDH),
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MSM_DEVICE(MDP),
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{
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.virtual = MSM_SHARED_RAM_BASE,
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.pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
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.length = MSM_SHARED_RAM_SIZE,
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.type = MT_DEVICE,
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},
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};
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+
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void __init msm_map_common_io(void)
62
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{
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/* Make sure the peripheral register window is closed, since
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* we will use PTE flags (TEX[1]=1,B=0,C=1) to determine which
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* pages are peripheral interface or not.
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*/
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asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0));
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+
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iotable_init(msm_io_desc, ARRAY_SIZE(msm_io_desc));
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}
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+
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void __iomem *
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__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
74
+
{
75
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if (mtype == MT_DEVICE) {
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/* The peripherals in the 88000000 - D0000000 range
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* are only accessable by type MT_DEVICE_NONSHARED.
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* Adjust mtype as necessary to make this "just work."
79
+
*/
80
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if ((phys_addr >= 0x88000000) && (phys_addr < 0xD0000000))
81
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mtype = MT_DEVICE_NONSHARED;
82
+
}
83
+
84
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return __arm_ioremap(phys_addr, size, mtype);
85
+
}
+2
-1
arch/arm/mm/Kconfig
+2
-1
arch/arm/mm/Kconfig
···
345
345
# ARMv6
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config CPU_V6
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bool "Support ARM V6 processor"
348
-
depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP2 || ARCH_MX3
348
+
depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP2 || ARCH_MX3 || ARCH_MSM7X00A
349
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default y if ARCH_MX3
350
+
default y if ARCH_MSM7X00A
350
351
select CPU_32v6
351
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select CPU_ABRT_EV6
352
353
select CPU_CACHE_V6
+37
include/asm-arm/arch-msm/board.h
+37
include/asm-arm/arch-msm/board.h
···
1
+
/* linux/include/asm-arm/arch-msm/board.h
2
+
*
3
+
* Copyright (C) 2007 Google, Inc.
4
+
* Author: Brian Swetland <swetland@google.com>
5
+
*
6
+
* This software is licensed under the terms of the GNU General Public
7
+
* License version 2, as published by the Free Software Foundation, and
8
+
* may be copied, distributed, and modified under those terms.
9
+
*
10
+
* This program is distributed in the hope that it will be useful,
11
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
12
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13
+
* GNU General Public License for more details.
14
+
*
15
+
*/
16
+
17
+
#ifndef __ASM_ARCH_MSM_BOARD_H
18
+
#define __ASM_ARCH_MSM_BOARD_H
19
+
20
+
#include <linux/types.h>
21
+
22
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/* platform device data structures */
23
+
24
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struct msm_mddi_platform_data
25
+
{
26
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void (*panel_power)(int on);
27
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unsigned has_vsync_irq:1;
28
+
};
29
+
30
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/* common init routines for use by arch/arm/mach-msm/board-*.c */
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+
32
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void __init msm_add_devices(void);
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void __init msm_map_common_io(void);
34
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void __init msm_init_irq(void);
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void __init msm_init_gpio(void);
36
+
37
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#endif
+40
include/asm-arm/arch-msm/debug-macro.S
+40
include/asm-arm/arch-msm/debug-macro.S
···
1
+
/* include/asm-arm/arch-msm7200/debug-macro.S
2
+
*
3
+
* Copyright (C) 2007 Google, Inc.
4
+
* Author: Brian Swetland <swetland@google.com>
5
+
*
6
+
* This software is licensed under the terms of the GNU General Public
7
+
* License version 2, as published by the Free Software Foundation, and
8
+
* may be copied, distributed, and modified under those terms.
9
+
*
10
+
* This program is distributed in the hope that it will be useful,
11
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
12
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13
+
* GNU General Public License for more details.
14
+
*
15
+
*/
16
+
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#include <asm/hardware.h>
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#include <asm/arch/msm_iomap.h>
19
+
20
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.macro addruart,rx
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@ see if the MMU is enabled and select appropriate base address
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mrc p15, 0, \rx, c1, c0
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tst \rx, #1
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ldreq \rx, =MSM_UART1_PHYS
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ldrne \rx, =MSM_UART1_BASE
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.endm
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+
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.macro senduart,rd,rx
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str \rd, [\rx, #0x0C]
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.endm
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+
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.macro waituart,rd,rx
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@ wait for TX_READY
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1: ldr \rd, [\rx, #0x08]
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tst \rd, #0x04
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beq 1b
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.endm
38
+
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.macro busyuart,rd,rx
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.endm
+1
include/asm-arm/arch-msm/dma.h
+1
include/asm-arm/arch-msm/dma.h
···
1
+
+38
include/asm-arm/arch-msm/entry-macro.S
+38
include/asm-arm/arch-msm/entry-macro.S
···
1
+
/* include/asm-arm/arch-msm7200/entry-macro.S
2
+
*
3
+
* Copyright (C) 2007 Google, Inc.
4
+
* Author: Brian Swetland <swetland@google.com>
5
+
*
6
+
* This software is licensed under the terms of the GNU General Public
7
+
* License version 2, as published by the Free Software Foundation, and
8
+
* may be copied, distributed, and modified under those terms.
9
+
*
10
+
* This program is distributed in the hope that it will be useful,
11
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
12
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13
+
* GNU General Public License for more details.
14
+
*
15
+
*/
16
+
17
+
#include <asm/arch/msm_iomap.h>
18
+
19
+
.macro disable_fiq
20
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.endm
21
+
22
+
.macro get_irqnr_preamble, base, tmp
23
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@ enable imprecise aborts
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cpsie a
25
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mov \base, #MSM_VIC_BASE
26
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.endm
27
+
28
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.macro arch_ret_to_user, tmp1, tmp2
29
+
.endm
30
+
31
+
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
32
+
@ 0xD0 has irq# or old irq# if the irq has been handled
33
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@ 0xD4 has irq# or -1 if none pending *but* if you just
34
+
@ read 0xD4 you never get the first irq for some reason
35
+
ldr \irqnr, [\base, #0xD0]
36
+
ldr \irqnr, [\base, #0xD4]
37
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cmp \irqnr, #0xffffffff
38
+
.endm
+18
include/asm-arm/arch-msm/hardware.h
+18
include/asm-arm/arch-msm/hardware.h
···
1
+
/* linux/include/asm-arm/arch-msm/hardware.h
2
+
*
3
+
* Copyright (C) 2007 Google, Inc.
4
+
*
5
+
* This software is licensed under the terms of the GNU General Public
6
+
* License version 2, as published by the Free Software Foundation, and
7
+
* may be copied, distributed, and modified under those terms.
8
+
*
9
+
* This program is distributed in the hope that it will be useful,
10
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
11
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12
+
* GNU General Public License for more details.
13
+
*
14
+
*/
15
+
16
+
#ifndef __ASM_ARCH_MSM_HARDWARE_H
17
+
18
+
#endif
+33
include/asm-arm/arch-msm/io.h
+33
include/asm-arm/arch-msm/io.h
···
1
+
/* include/asm-arm/arch-msm/io.h
2
+
*
3
+
* Copyright (C) 2007 Google, Inc.
4
+
*
5
+
* This software is licensed under the terms of the GNU General Public
6
+
* License version 2, as published by the Free Software Foundation, and
7
+
* may be copied, distributed, and modified under those terms.
8
+
*
9
+
* This program is distributed in the hope that it will be useful,
10
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
11
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12
+
* GNU General Public License for more details.
13
+
*
14
+
*/
15
+
16
+
#ifndef __ASM_ARM_ARCH_IO_H
17
+
#define __ASM_ARM_ARCH_IO_H
18
+
19
+
#define IO_SPACE_LIMIT 0xffffffff
20
+
21
+
#define __arch_ioremap __msm_ioremap
22
+
#define __arch_iounmap __iounmap
23
+
24
+
void __iomem *__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype);
25
+
26
+
static inline void __iomem *__io(unsigned long addr)
27
+
{
28
+
return (void __iomem *)addr;
29
+
}
30
+
#define __io(a) __io(a)
31
+
#define __mem_pci(a) (a)
32
+
33
+
#endif
+89
include/asm-arm/arch-msm/irqs.h
+89
include/asm-arm/arch-msm/irqs.h
···
1
+
/* linux/include/asm-arm/arch-msm/irqs.h
2
+
*
3
+
* Copyright (C) 2007 Google, Inc.
4
+
* Author: Brian Swetland <swetland@google.com>
5
+
*
6
+
* This software is licensed under the terms of the GNU General Public
7
+
* License version 2, as published by the Free Software Foundation, and
8
+
* may be copied, distributed, and modified under those terms.
9
+
*
10
+
* This program is distributed in the hope that it will be useful,
11
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
12
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13
+
* GNU General Public License for more details.
14
+
*
15
+
*/
16
+
17
+
#ifndef __ASM_ARCH_MSM_IRQS_H
18
+
19
+
/* MSM ARM11 Interrupt Numbers */
20
+
/* See 80-VE113-1 A, pp219-221 */
21
+
22
+
#define INT_A9_M2A_0 0
23
+
#define INT_A9_M2A_1 1
24
+
#define INT_A9_M2A_2 2
25
+
#define INT_A9_M2A_3 3
26
+
#define INT_A9_M2A_4 4
27
+
#define INT_A9_M2A_5 5
28
+
#define INT_A9_M2A_6 6
29
+
#define INT_GP_TIMER_EXP 7
30
+
#define INT_DEBUG_TIMER_EXP 8
31
+
#define INT_UART1 9
32
+
#define INT_UART2 10
33
+
#define INT_UART3 11
34
+
#define INT_UART1_RX 12
35
+
#define INT_UART2_RX 13
36
+
#define INT_UART3_RX 14
37
+
#define INT_USB_OTG 15
38
+
#define INT_MDDI_PRI 16
39
+
#define INT_MDDI_EXT 17
40
+
#define INT_MDDI_CLIENT 18
41
+
#define INT_MDP 19
42
+
#define INT_GRAPHICS 20
43
+
#define INT_ADM_AARM 21
44
+
#define INT_ADSP_A11 22
45
+
#define INT_ADSP_A9_A11 23
46
+
#define INT_SDC1_0 24
47
+
#define INT_SDC1_1 25
48
+
#define INT_SDC2_0 26
49
+
#define INT_SDC2_1 27
50
+
#define INT_KEYSENSE 28
51
+
#define INT_TCHSCRN_SSBI 29
52
+
#define INT_TCHSCRN1 30
53
+
#define INT_TCHSCRN2 31
54
+
55
+
#define INT_GPIO_GROUP1 (32 + 0)
56
+
#define INT_GPIO_GROUP2 (32 + 1)
57
+
#define INT_PWB_I2C (32 + 2)
58
+
#define INT_SOFTRESET (32 + 3)
59
+
#define INT_NAND_WR_ER_DONE (32 + 4)
60
+
#define INT_NAND_OP_DONE (32 + 5)
61
+
#define INT_PBUS_ARM11 (32 + 6)
62
+
#define INT_AXI_MPU_SMI (32 + 7)
63
+
#define INT_AXI_MPU_EBI1 (32 + 8)
64
+
#define INT_AD_HSSD (32 + 9)
65
+
#define INT_ARM11_PMU (32 + 10)
66
+
#define INT_ARM11_DMA (32 + 11)
67
+
#define INT_TSIF_IRQ (32 + 12)
68
+
#define INT_UART1DM_IRQ (32 + 13)
69
+
#define INT_UART1DM_RX (32 + 14)
70
+
#define INT_USB_HS (32 + 15)
71
+
#define INT_SDC3_0 (32 + 16)
72
+
#define INT_SDC3_1 (32 + 17)
73
+
#define INT_SDC4_0 (32 + 18)
74
+
#define INT_SDC4_1 (32 + 19)
75
+
#define INT_UART2DM_RX (32 + 20)
76
+
#define INT_UART2DM_IRQ (32 + 21)
77
+
78
+
/* 22-31 are reserved */
79
+
80
+
#define MSM_IRQ_BIT(irq) (1 << ((irq) & 31))
81
+
82
+
#define NR_MSM_IRQS 64
83
+
#define NR_GPIO_IRQS 122
84
+
#define NR_BOARD_IRQS 64
85
+
#define NR_IRQS (NR_MSM_IRQS + NR_GPIO_IRQS + NR_BOARD_IRQS)
86
+
87
+
#define MSM_GPIO_TO_INT(n) (NR_MSM_IRQS + (n))
88
+
89
+
#endif
+27
include/asm-arm/arch-msm/memory.h
+27
include/asm-arm/arch-msm/memory.h
···
1
+
/* linux/include/asm-arm/arch-msm/memory.h
2
+
*
3
+
* Copyright (C) 2007 Google, Inc.
4
+
*
5
+
* This software is licensed under the terms of the GNU General Public
6
+
* License version 2, as published by the Free Software Foundation, and
7
+
* may be copied, distributed, and modified under those terms.
8
+
*
9
+
* This program is distributed in the hope that it will be useful,
10
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
11
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12
+
* GNU General Public License for more details.
13
+
*
14
+
*/
15
+
16
+
#ifndef __ASM_ARCH_MEMORY_H
17
+
#define __ASM_ARCH_MEMORY_H
18
+
19
+
/* physical offset of RAM */
20
+
#define PHYS_OFFSET UL(0x10000000)
21
+
22
+
/* bus address and physical addresses are identical */
23
+
#define __virt_to_bus(x) __virt_to_phys(x)
24
+
#define __bus_to_virt(x) __phys_to_virt(x)
25
+
26
+
#endif
27
+
+104
include/asm-arm/arch-msm/msm_iomap.h
+104
include/asm-arm/arch-msm/msm_iomap.h
···
1
+
/* linux/include/asm-arm/arch-msm/msm_iomap.h
2
+
*
3
+
* Copyright (C) 2007 Google, Inc.
4
+
* Author: Brian Swetland <swetland@google.com>
5
+
*
6
+
* This software is licensed under the terms of the GNU General Public
7
+
* License version 2, as published by the Free Software Foundation, and
8
+
* may be copied, distributed, and modified under those terms.
9
+
*
10
+
* This program is distributed in the hope that it will be useful,
11
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
12
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13
+
* GNU General Public License for more details.
14
+
*
15
+
*
16
+
* The MSM peripherals are spread all over across 768MB of physical
17
+
* space, which makes just having a simple IO_ADDRESS macro to slide
18
+
* them into the right virtual location rough. Instead, we will
19
+
* provide a master phys->virt mapping for peripherals here.
20
+
*
21
+
*/
22
+
23
+
#ifndef __ASM_ARCH_MSM_IOMAP_H
24
+
#define __ASM_ARCH_MSM_IOMAP_H
25
+
26
+
#include <asm/sizes.h>
27
+
28
+
/* Physical base address and size of peripherals.
29
+
* Ordered by the virtual base addresses they will be mapped at.
30
+
*
31
+
* MSM_VIC_BASE must be an value that can be loaded via a "mov"
32
+
* instruction, otherwise entry-macro.S will not compile.
33
+
*
34
+
* If you add or remove entries here, you'll want to edit the
35
+
* msm_io_desc array in arch/arm/mach-msm/io.c to reflect your
36
+
* changes.
37
+
*
38
+
*/
39
+
40
+
#define MSM_VIC_BASE 0xE0000000
41
+
#define MSM_VIC_PHYS 0xC0000000
42
+
#define MSM_VIC_SIZE SZ_4K
43
+
44
+
#define MSM_CSR_BASE 0xE0001000
45
+
#define MSM_CSR_PHYS 0xC0100000
46
+
#define MSM_CSR_SIZE SZ_4K
47
+
48
+
#define MSM_GPT_PHYS MSM_CSR_PHYS
49
+
#define MSM_GPT_BASE MSM_CSR_BASE
50
+
#define MSM_GPT_SIZE SZ_4K
51
+
52
+
#define MSM_DMOV_BASE 0xE0002000
53
+
#define MSM_DMOV_PHYS 0xA9700000
54
+
#define MSM_DMOV_SIZE SZ_4K
55
+
56
+
#define MSM_UART1_BASE 0xE0003000
57
+
#define MSM_UART1_PHYS 0xA9A00000
58
+
#define MSM_UART1_SIZE SZ_4K
59
+
60
+
#define MSM_UART2_BASE 0xE0004000
61
+
#define MSM_UART2_PHYS 0xA9B00000
62
+
#define MSM_UART2_SIZE SZ_4K
63
+
64
+
#define MSM_UART3_BASE 0xE0005000
65
+
#define MSM_UART3_PHYS 0xA9C00000
66
+
#define MSM_UART3_SIZE SZ_4K
67
+
68
+
#define MSM_I2C_BASE 0xE0006000
69
+
#define MSM_I2C_PHYS 0xA9900000
70
+
#define MSM_I2C_SIZE SZ_4K
71
+
72
+
#define MSM_GPIO1_BASE 0xE0007000
73
+
#define MSM_GPIO1_PHYS 0xA9200000
74
+
#define MSM_GPIO1_SIZE SZ_4K
75
+
76
+
#define MSM_GPIO2_BASE 0xE0008000
77
+
#define MSM_GPIO2_PHYS 0xA9300000
78
+
#define MSM_GPIO2_SIZE SZ_4K
79
+
80
+
#define MSM_HSUSB_BASE 0xE0009000
81
+
#define MSM_HSUSB_PHYS 0xA0800000
82
+
#define MSM_HSUSB_SIZE SZ_4K
83
+
84
+
#define MSM_CLK_CTL_BASE 0xE000A000
85
+
#define MSM_CLK_CTL_PHYS 0xA8600000
86
+
#define MSM_CLK_CTL_SIZE SZ_4K
87
+
88
+
#define MSM_PMDH_BASE 0xE000B000
89
+
#define MSM_PMDH_PHYS 0xAA600000
90
+
#define MSM_PMDH_SIZE SZ_4K
91
+
92
+
#define MSM_EMDH_BASE 0xE000C000
93
+
#define MSM_EMDH_PHYS 0xAA700000
94
+
#define MSM_EMDH_SIZE SZ_4K
95
+
96
+
#define MSM_MDP_BASE 0xE0010000
97
+
#define MSM_MDP_PHYS 0xAA200000
98
+
#define MSM_MDP_SIZE 0x000F0000
99
+
100
+
#define MSM_SHARED_RAM_BASE 0xE0100000
101
+
#define MSM_SHARED_RAM_PHYS 0x01F00000
102
+
#define MSM_SHARED_RAM_SIZE SZ_1M
103
+
104
+
#endif
+23
include/asm-arm/arch-msm/system.h
+23
include/asm-arm/arch-msm/system.h
···
1
+
/* linux/include/asm-arm/arch-msm/system.h
2
+
*
3
+
* Copyright (C) 2007 Google, Inc.
4
+
*
5
+
* This software is licensed under the terms of the GNU General Public
6
+
* License version 2, as published by the Free Software Foundation, and
7
+
* may be copied, distributed, and modified under those terms.
8
+
*
9
+
* This program is distributed in the hope that it will be useful,
10
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
11
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12
+
* GNU General Public License for more details.
13
+
*
14
+
*/
15
+
16
+
#include <asm/hardware.h>
17
+
18
+
void arch_idle(void);
19
+
20
+
static inline void arch_reset(char mode)
21
+
{
22
+
for (;;) ; /* depends on IPC w/ other core */
23
+
}
+20
include/asm-arm/arch-msm/timex.h
+20
include/asm-arm/arch-msm/timex.h
···
1
+
/* linux/include/asm-arm/arch-msm/timex.h
2
+
*
3
+
* Copyright (C) 2007 Google, Inc.
4
+
*
5
+
* This software is licensed under the terms of the GNU General Public
6
+
* License version 2, as published by the Free Software Foundation, and
7
+
* may be copied, distributed, and modified under those terms.
8
+
*
9
+
* This program is distributed in the hope that it will be useful,
10
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
11
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12
+
* GNU General Public License for more details.
13
+
*
14
+
*/
15
+
16
+
#ifndef __ASM_ARCH_MSM_TIMEX_H
17
+
18
+
#define CLOCK_TICK_RATE 1000000
19
+
20
+
#endif
+36
include/asm-arm/arch-msm/uncompress.h
+36
include/asm-arm/arch-msm/uncompress.h
···
1
+
/* linux/include/asm-arm/arch-msm/uncompress.h
2
+
*
3
+
* Copyright (C) 2007 Google, Inc.
4
+
*
5
+
* This software is licensed under the terms of the GNU General Public
6
+
* License version 2, as published by the Free Software Foundation, and
7
+
* may be copied, distributed, and modified under those terms.
8
+
*
9
+
* This program is distributed in the hope that it will be useful,
10
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
11
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12
+
* GNU General Public License for more details.
13
+
*
14
+
*/
15
+
16
+
#ifndef __ASM_ARCH_MSM_UNCOMPRESS_H
17
+
18
+
#include "hardware.h"
19
+
20
+
static void putc(int c)
21
+
{
22
+
}
23
+
24
+
static inline void flush(void)
25
+
{
26
+
}
27
+
28
+
static inline void arch_decomp_setup(void)
29
+
{
30
+
}
31
+
32
+
static inline void arch_decomp_wdog(void)
33
+
{
34
+
}
35
+
36
+
#endif
+22
include/asm-arm/arch-msm/vmalloc.h
+22
include/asm-arm/arch-msm/vmalloc.h
···
1
+
/* linux/include/asm-arm/arch-msm/vmalloc.h
2
+
*
3
+
* Copyright (C) 2007 Google, Inc.
4
+
*
5
+
* This software is licensed under the terms of the GNU General Public
6
+
* License version 2, as published by the Free Software Foundation, and
7
+
* may be copied, distributed, and modified under those terms.
8
+
*
9
+
* This program is distributed in the hope that it will be useful,
10
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
11
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12
+
* GNU General Public License for more details.
13
+
*
14
+
*/
15
+
16
+
#ifndef __ASM_ARCH_MSM_VMALLOC_H
17
+
#define __ASM_ARCH_MSM_VMALLOC_H
18
+
19
+
#define VMALLOC_END (PAGE_OFFSET + 0x10000000)
20
+
21
+
#endif
22
+