Merge branch 'x86/apic-cleanups' into x86/urgent

Merge reason: Topic is ready for upstream.

Signed-off-by: Ingo Molnar <mingo@elte.hu>

+75 -228
+1 -1
arch/x86/include/asm/apic.h
··· 234 extern void setup_local_APIC(void); 235 extern void end_local_APIC_setup(void); 236 extern void init_apic_mappings(void); 237 extern void setup_boot_APIC_clock(void); 238 extern void setup_secondary_APIC_clock(void); 239 extern int APIC_init_uniprocessor(void); ··· 245 * On 32bit this is mach-xxx local 246 */ 247 #ifdef CONFIG_X86_64 248 - extern void early_init_lapic_mapping(void); 249 extern int apic_is_clustered_box(void); 250 #else 251 static inline int apic_is_clustered_box(void)
··· 234 extern void setup_local_APIC(void); 235 extern void end_local_APIC_setup(void); 236 extern void init_apic_mappings(void); 237 + void register_lapic_address(unsigned long address); 238 extern void setup_boot_APIC_clock(void); 239 extern void setup_secondary_APIC_clock(void); 240 extern int APIC_init_uniprocessor(void); ··· 244 * On 32bit this is mach-xxx local 245 */ 246 #ifdef CONFIG_X86_64 247 extern int apic_is_clustered_box(void); 248 #else 249 static inline int apic_is_clustered_box(void)
+3
arch/x86/include/asm/io_apic.h
··· 169 extern int restore_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries); 170 171 extern int get_nr_irqs_gsi(void); 172 extern void setup_ioapic_ids_from_mpc(void); 173 extern void setup_ioapic_ids_from_mpc_nocheck(void); 174 ··· 183 int mp_find_ioapic_pin(int ioapic, u32 gsi); 184 void __init mp_register_ioapic(int id, u32 address, u32 gsi_base); 185 extern void __init pre_init_apic_IRQ0(void); 186 187 #else /* !CONFIG_X86_IO_APIC */ 188
··· 169 extern int restore_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries); 170 171 extern int get_nr_irqs_gsi(void); 172 + 173 extern void setup_ioapic_ids_from_mpc(void); 174 extern void setup_ioapic_ids_from_mpc_nocheck(void); 175 ··· 182 int mp_find_ioapic_pin(int ioapic, u32 gsi); 183 void __init mp_register_ioapic(int id, u32 address, u32 gsi_base); 184 extern void __init pre_init_apic_IRQ0(void); 185 + 186 + extern void mp_save_irq(struct mpc_intsrc *m); 187 188 #else /* !CONFIG_X86_IO_APIC */ 189
+5 -43
arch/x86/kernel/acpi/boot.c
··· 852 * returns 0 on success, < 0 on error 853 */ 854 855 - static void __init acpi_register_lapic_address(unsigned long address) 856 - { 857 - mp_lapic_addr = address; 858 - 859 - set_fixmap_nocache(FIX_APIC_BASE, address); 860 - if (boot_cpu_physical_apicid == -1U) { 861 - boot_cpu_physical_apicid = read_apic_id(); 862 - apic_version[boot_cpu_physical_apicid] = 863 - GET_APIC_VERSION(apic_read(APIC_LVR)); 864 - } 865 - } 866 - 867 static int __init early_acpi_parse_madt_lapic_addr_ovr(void) 868 { 869 int count; ··· 873 return count; 874 } 875 876 - acpi_register_lapic_address(acpi_lapic_addr); 877 878 return count; 879 } ··· 900 return count; 901 } 902 903 - acpi_register_lapic_address(acpi_lapic_addr); 904 905 count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_SAPIC, 906 acpi_parse_sapic, MAX_LOCAL_APIC); ··· 942 extern int es7000_plat; 943 #endif 944 945 - static void assign_to_mp_irq(struct mpc_intsrc *m, 946 - struct mpc_intsrc *mp_irq) 947 - { 948 - memcpy(mp_irq, m, sizeof(struct mpc_intsrc)); 949 - } 950 - 951 - static int mp_irq_cmp(struct mpc_intsrc *mp_irq, 952 - struct mpc_intsrc *m) 953 - { 954 - return memcmp(mp_irq, m, sizeof(struct mpc_intsrc)); 955 - } 956 - 957 - static void save_mp_irq(struct mpc_intsrc *m) 958 - { 959 - int i; 960 - 961 - for (i = 0; i < mp_irq_entries; i++) { 962 - if (!mp_irq_cmp(&mp_irqs[i], m)) 963 - return; 964 - } 965 - 966 - assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]); 967 - if (++mp_irq_entries == MAX_IRQ_SOURCES) 968 - panic("Max # of irq sources exceeded!!\n"); 969 - } 970 - 971 void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi) 972 { 973 int ioapic; ··· 972 mp_irq.dstapic = mp_ioapics[ioapic].apicid; /* APIC ID */ 973 mp_irq.dstirq = pin; /* INTIN# */ 974 975 - save_mp_irq(&mp_irq); 976 977 isa_irq_to_gsi[bus_irq] = gsi; 978 } ··· 1047 mp_irq.srcbusirq = i; /* Identity mapped */ 1048 mp_irq.dstirq = pin; 1049 1050 - save_mp_irq(&mp_irq); 1051 } 1052 } 1053 ··· 1084 mp_irq.dstapic = mp_ioapics[ioapic].apicid; 1085 mp_irq.dstirq = mp_find_ioapic_pin(ioapic, gsi); 1086 1087 - save_mp_irq(&mp_irq); 1088 #endif 1089 return 0; 1090 }
··· 852 * returns 0 on success, < 0 on error 853 */ 854 855 static int __init early_acpi_parse_madt_lapic_addr_ovr(void) 856 { 857 int count; ··· 885 return count; 886 } 887 888 + register_lapic_address(acpi_lapic_addr); 889 890 return count; 891 } ··· 912 return count; 913 } 914 915 + register_lapic_address(acpi_lapic_addr); 916 917 count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_SAPIC, 918 acpi_parse_sapic, MAX_LOCAL_APIC); ··· 954 extern int es7000_plat; 955 #endif 956 957 void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi) 958 { 959 int ioapic; ··· 1010 mp_irq.dstapic = mp_ioapics[ioapic].apicid; /* APIC ID */ 1011 mp_irq.dstirq = pin; /* INTIN# */ 1012 1013 + mp_save_irq(&mp_irq); 1014 1015 isa_irq_to_gsi[bus_irq] = gsi; 1016 } ··· 1085 mp_irq.srcbusirq = i; /* Identity mapped */ 1086 mp_irq.dstirq = pin; 1087 1088 + mp_save_irq(&mp_irq); 1089 } 1090 } 1091 ··· 1122 mp_irq.dstapic = mp_ioapics[ioapic].apicid; 1123 mp_irq.dstirq = mp_find_ioapic_pin(ioapic, gsi); 1124 1125 + mp_save_irq(&mp_irq); 1126 #endif 1127 return 0; 1128 }
+26 -38
arch/x86/kernel/apic/apic.c
··· 1191 oldvalue, value); 1192 } 1193 1194 - 1195 /** 1196 * setup_local_APIC - setup the local APIC 1197 */ 1198 void __cpuinit setup_local_APIC(void) 1199 { 1200 unsigned int value, queued; 1201 int i, j, acked = 0; 1202 unsigned long long tsc = 0, ntsc; ··· 1223 } 1224 #endif 1225 perf_events_lapic_init(); 1226 - 1227 - preempt_disable(); 1228 1229 /* 1230 * Double-check whether this APIC is really registered. ··· 1339 * TODO: set up through-local-APIC from through-I/O-APIC? --macro 1340 */ 1341 value = apic_read(APIC_LVT0) & APIC_LVT_MASKED; 1342 - if (!smp_processor_id() && (pic_mode || !value)) { 1343 value = APIC_DM_EXTINT; 1344 - apic_printk(APIC_VERBOSE, "enabled ExtINT on CPU#%d\n", 1345 - smp_processor_id()); 1346 } else { 1347 value = APIC_DM_EXTINT | APIC_LVT_MASKED; 1348 - apic_printk(APIC_VERBOSE, "masked ExtINT on CPU#%d\n", 1349 - smp_processor_id()); 1350 } 1351 apic_write(APIC_LVT0, value); 1352 1353 /* 1354 * only the BP should see the LINT1 NMI signal, obviously. 1355 */ 1356 - if (!smp_processor_id()) 1357 value = APIC_DM_NMI; 1358 else 1359 value = APIC_DM_NMI | APIC_LVT_MASKED; ··· 1359 value |= APIC_LVT_LEVEL_TRIGGER; 1360 apic_write(APIC_LVT1, value); 1361 1362 - preempt_enable(); 1363 - 1364 #ifdef CONFIG_X86_MCE_INTEL 1365 /* Recheck CMCI information after local APIC is up on CPU #0 */ 1366 - if (smp_processor_id() == 0) 1367 cmci_recheck(); 1368 #endif 1369 } ··· 1630 } 1631 #endif 1632 1633 - #ifdef CONFIG_X86_64 1634 - void __init early_init_lapic_mapping(void) 1635 - { 1636 - /* 1637 - * If no local APIC can be found then go out 1638 - * : it means there is no mpatable and MADT 1639 - */ 1640 - if (!smp_found_config) 1641 - return; 1642 - 1643 - set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr); 1644 - apic_printk(APIC_VERBOSE, "mapped APIC to %16lx (%16lx)\n", 1645 - APIC_BASE, mp_lapic_addr); 1646 - 1647 - /* 1648 - * Fetch the APIC ID of the BSP in case we have a 1649 - * default configuration (or the MP table is broken). 1650 - */ 1651 - boot_cpu_physical_apicid = read_apic_id(); 1652 - } 1653 - #endif 1654 - 1655 /** 1656 * init_apic_mappings - initialize APIC mappings 1657 */ ··· 1655 * acpi_register_lapic_address() 1656 */ 1657 if (!acpi_lapic && !smp_found_config) 1658 - set_fixmap_nocache(FIX_APIC_BASE, apic_phys); 1659 - 1660 - apic_printk(APIC_VERBOSE, "mapped APIC to %08lx (%08lx)\n", 1661 - APIC_BASE, apic_phys); 1662 } 1663 1664 /* ··· 1673 * and disable smp mode 1674 */ 1675 apic_version[new_apicid] = 1676 GET_APIC_VERSION(apic_read(APIC_LVR)); 1677 } 1678 }
··· 1191 oldvalue, value); 1192 } 1193 1194 /** 1195 * setup_local_APIC - setup the local APIC 1196 + * 1197 + * Used to setup local APIC while initializing BSP or bringin up APs. 1198 + * Always called with preemption disabled. 1199 */ 1200 void __cpuinit setup_local_APIC(void) 1201 { 1202 + int cpu = smp_processor_id(); 1203 unsigned int value, queued; 1204 int i, j, acked = 0; 1205 unsigned long long tsc = 0, ntsc; ··· 1220 } 1221 #endif 1222 perf_events_lapic_init(); 1223 1224 /* 1225 * Double-check whether this APIC is really registered. ··· 1338 * TODO: set up through-local-APIC from through-I/O-APIC? --macro 1339 */ 1340 value = apic_read(APIC_LVT0) & APIC_LVT_MASKED; 1341 + if (!cpu && (pic_mode || !value)) { 1342 value = APIC_DM_EXTINT; 1343 + apic_printk(APIC_VERBOSE, "enabled ExtINT on CPU#%d\n", cpu); 1344 } else { 1345 value = APIC_DM_EXTINT | APIC_LVT_MASKED; 1346 + apic_printk(APIC_VERBOSE, "masked ExtINT on CPU#%d\n", cpu); 1347 } 1348 apic_write(APIC_LVT0, value); 1349 1350 /* 1351 * only the BP should see the LINT1 NMI signal, obviously. 1352 */ 1353 + if (!cpu) 1354 value = APIC_DM_NMI; 1355 else 1356 value = APIC_DM_NMI | APIC_LVT_MASKED; ··· 1360 value |= APIC_LVT_LEVEL_TRIGGER; 1361 apic_write(APIC_LVT1, value); 1362 1363 #ifdef CONFIG_X86_MCE_INTEL 1364 /* Recheck CMCI information after local APIC is up on CPU #0 */ 1365 + if (!cpu) 1366 cmci_recheck(); 1367 #endif 1368 } ··· 1633 } 1634 #endif 1635 1636 /** 1637 * init_apic_mappings - initialize APIC mappings 1638 */ ··· 1680 * acpi_register_lapic_address() 1681 */ 1682 if (!acpi_lapic && !smp_found_config) 1683 + register_lapic_address(apic_phys); 1684 } 1685 1686 /* ··· 1701 * and disable smp mode 1702 */ 1703 apic_version[new_apicid] = 1704 + GET_APIC_VERSION(apic_read(APIC_LVR)); 1705 + } 1706 + } 1707 + 1708 + void __init register_lapic_address(unsigned long address) 1709 + { 1710 + mp_lapic_addr = address; 1711 + 1712 + if (!x2apic_mode) { 1713 + set_fixmap_nocache(FIX_APIC_BASE, address); 1714 + apic_printk(APIC_VERBOSE, "mapped APIC to %16lx (%16lx)\n", 1715 + APIC_BASE, mp_lapic_addr); 1716 + } 1717 + if (boot_cpu_physical_apicid == -1U) { 1718 + boot_cpu_physical_apicid = read_apic_id(); 1719 + apic_version[boot_cpu_physical_apicid] = 1720 GET_APIC_VERSION(apic_read(APIC_LVR)); 1721 } 1722 }
+26 -2
arch/x86/kernel/apic/io_apic.c
··· 125 } 126 early_param("noapic", parse_noapic); 127 128 struct irq_pin_list { 129 int apic, pin; 130 struct irq_pin_list *next; ··· 154 { 155 return kzalloc_node(sizeof(struct irq_pin_list), GFP_KERNEL, node); 156 } 157 158 /* irq_cfg is indexed by the sum of all RTEs in all I/O APICs. */ 159 #ifdef CONFIG_SPARSE_IRQ ··· 2027 = mp_ioapics[apic_id].apicid; 2028 2029 /* 2030 - * Read the right value from the MPC table and 2031 - * write it into the ID register. 2032 */ 2033 apic_printk(APIC_VERBOSE, KERN_INFO 2034 "...changing IO-APIC physical APIC ID to %d ...", 2035 mp_ioapics[apic_id].apicid);
··· 125 } 126 early_param("noapic", parse_noapic); 127 128 + /* Will be called in mpparse/acpi/sfi codes for saving IRQ info */ 129 + void mp_save_irq(struct mpc_intsrc *m) 130 + { 131 + int i; 132 + 133 + apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x," 134 + " IRQ %02x, APIC ID %x, APIC INT %02x\n", 135 + m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus, 136 + m->srcbusirq, m->dstapic, m->dstirq); 137 + 138 + for (i = 0; i < mp_irq_entries; i++) { 139 + if (!memcmp(&mp_irqs[i], m, sizeof(*m))) 140 + return; 141 + } 142 + 143 + memcpy(&mp_irqs[mp_irq_entries], m, sizeof(*m)); 144 + if (++mp_irq_entries == MAX_IRQ_SOURCES) 145 + panic("Max # of irq sources exceeded!!\n"); 146 + } 147 + 148 struct irq_pin_list { 149 int apic, pin; 150 struct irq_pin_list *next; ··· 134 { 135 return kzalloc_node(sizeof(struct irq_pin_list), GFP_KERNEL, node); 136 } 137 + 138 139 /* irq_cfg is indexed by the sum of all RTEs in all I/O APICs. */ 140 #ifdef CONFIG_SPARSE_IRQ ··· 2006 = mp_ioapics[apic_id].apicid; 2007 2008 /* 2009 + * Update the ID register according to the right value 2010 + * from the MPC table if they are different. 2011 */ 2012 + if (mp_ioapics[apic_id].apicid == reg_00.bits.ID) 2013 + continue; 2014 + 2015 apic_printk(APIC_VERBOSE, KERN_INFO 2016 "...changing IO-APIC physical APIC ID to %d ...", 2017 mp_ioapics[apic_id].apicid);
+11 -103
arch/x86/kernel/mpparse.c
··· 118 119 static void __init MP_ioapic_info(struct mpc_ioapic *m) 120 { 121 - if (!(m->flags & MPC_APIC_USABLE)) 122 - return; 123 - 124 - printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n", 125 - m->apicid, m->apicver, m->apicaddr); 126 - 127 - mp_register_ioapic(m->apicid, m->apicaddr, gsi_top); 128 - } 129 - 130 - static void print_MP_intsrc_info(struct mpc_intsrc *m) 131 - { 132 - apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x," 133 - " IRQ %02x, APIC ID %x, APIC INT %02x\n", 134 - m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus, 135 - m->srcbusirq, m->dstapic, m->dstirq); 136 } 137 138 static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq) ··· 131 mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq); 132 } 133 134 - static void __init assign_to_mp_irq(struct mpc_intsrc *m, 135 - struct mpc_intsrc *mp_irq) 136 - { 137 - mp_irq->dstapic = m->dstapic; 138 - mp_irq->type = m->type; 139 - mp_irq->irqtype = m->irqtype; 140 - mp_irq->irqflag = m->irqflag; 141 - mp_irq->srcbus = m->srcbus; 142 - mp_irq->srcbusirq = m->srcbusirq; 143 - mp_irq->dstirq = m->dstirq; 144 - } 145 - 146 - static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq, 147 - struct mpc_intsrc *m) 148 - { 149 - m->dstapic = mp_irq->dstapic; 150 - m->type = mp_irq->type; 151 - m->irqtype = mp_irq->irqtype; 152 - m->irqflag = mp_irq->irqflag; 153 - m->srcbus = mp_irq->srcbus; 154 - m->srcbusirq = mp_irq->srcbusirq; 155 - m->dstirq = mp_irq->dstirq; 156 - } 157 - 158 - static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq, 159 - struct mpc_intsrc *m) 160 - { 161 - if (mp_irq->dstapic != m->dstapic) 162 - return 1; 163 - if (mp_irq->type != m->type) 164 - return 2; 165 - if (mp_irq->irqtype != m->irqtype) 166 - return 3; 167 - if (mp_irq->irqflag != m->irqflag) 168 - return 4; 169 - if (mp_irq->srcbus != m->srcbus) 170 - return 5; 171 - if (mp_irq->srcbusirq != m->srcbusirq) 172 - return 6; 173 - if (mp_irq->dstirq != m->dstirq) 174 - return 7; 175 - 176 - return 0; 177 - } 178 - 179 - static void __init MP_intsrc_info(struct mpc_intsrc *m) 180 - { 181 - int i; 182 - 183 - print_MP_intsrc_info(m); 184 - 185 - for (i = 0; i < mp_irq_entries; i++) { 186 - if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m)) 187 - return; 188 - } 189 - 190 - assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]); 191 - if (++mp_irq_entries == MAX_IRQ_SOURCES) 192 - panic("Max # of irq sources exceeded!!\n"); 193 - } 194 #else /* CONFIG_X86_IO_APIC */ 195 static inline void __init MP_bus_info(struct mpc_bus *m) {} 196 static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {} 197 - static inline void __init MP_intsrc_info(struct mpc_intsrc *m) {} 198 #endif /* CONFIG_X86_IO_APIC */ 199 - 200 201 static void __init MP_lintsrc_info(struct mpc_lintsrc *m) 202 { ··· 147 /* 148 * Read/parse the MPC 149 */ 150 - 151 static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str) 152 { 153 ··· 199 200 void __init default_smp_read_mpc_oem(struct mpc_table *mpc) { } 201 202 - static void __init smp_register_lapic_address(unsigned long address) 203 - { 204 - mp_lapic_addr = address; 205 - 206 - set_fixmap_nocache(FIX_APIC_BASE, address); 207 - if (boot_cpu_physical_apicid == -1U) { 208 - boot_cpu_physical_apicid = read_apic_id(); 209 - apic_version[boot_cpu_physical_apicid] = 210 - GET_APIC_VERSION(apic_read(APIC_LVR)); 211 - } 212 - } 213 - 214 static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early) 215 { 216 char str[16]; ··· 213 #ifdef CONFIG_X86_32 214 generic_mps_oem_check(mpc, oem, str); 215 #endif 216 - /* save the local APIC address, it might be non-default */ 217 if (!acpi_lapic) 218 - mp_lapic_addr = mpc->lapic; 219 220 if (early) 221 return 1; 222 - 223 - /* Initialize the lapic mapping */ 224 - if (!acpi_lapic) 225 - smp_register_lapic_address(mpc->lapic); 226 227 if (mpc->oemptr) 228 x86_init.mpparse.smp_read_mpc_oem(mpc); ··· 245 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic)); 246 break; 247 case MP_INTSRC: 248 - MP_intsrc_info((struct mpc_intsrc *)mpt); 249 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc)); 250 break; 251 case MP_LINTSRC: ··· 337 338 intsrc.srcbusirq = i; 339 intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */ 340 - MP_intsrc_info(&intsrc); 341 } 342 343 intsrc.irqtype = mp_ExtINT; 344 intsrc.srcbusirq = 0; 345 intsrc.dstirq = 0; /* 8259A to INTIN0 */ 346 - MP_intsrc_info(&intsrc); 347 } 348 349 ··· 692 int i; 693 694 apic_printk(APIC_VERBOSE, "OLD "); 695 - print_MP_intsrc_info(m); 696 697 i = get_MP_intsrc_index(m); 698 if (i > 0) { 699 - assign_to_mpc_intsrc(&mp_irqs[i], m); 700 apic_printk(APIC_VERBOSE, "NEW "); 701 print_mp_irq_info(&mp_irqs[i]); 702 return; ··· 783 if (nr_m_spare > 0) { 784 apic_printk(APIC_VERBOSE, "*NEW* found\n"); 785 nr_m_spare--; 786 - assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]); 787 m_spare[nr_m_spare] = NULL; 788 } else { 789 struct mpc_intsrc *m = (struct mpc_intsrc *)mpt; 790 count += sizeof(struct mpc_intsrc); 791 if (check_slot(mpc_new_phys, mpc_new_length, count) < 0) 792 goto out; 793 - assign_to_mpc_intsrc(&mp_irqs[i], m); 794 mpc->length = count; 795 mpt += sizeof(struct mpc_intsrc); 796 }
··· 118 119 static void __init MP_ioapic_info(struct mpc_ioapic *m) 120 { 121 + if (m->flags & MPC_APIC_USABLE) 122 + mp_register_ioapic(m->apicid, m->apicaddr, gsi_top); 123 } 124 125 static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq) ··· 144 mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq); 145 } 146 147 #else /* CONFIG_X86_IO_APIC */ 148 static inline void __init MP_bus_info(struct mpc_bus *m) {} 149 static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {} 150 #endif /* CONFIG_X86_IO_APIC */ 151 152 static void __init MP_lintsrc_info(struct mpc_lintsrc *m) 153 { ··· 222 /* 223 * Read/parse the MPC 224 */ 225 static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str) 226 { 227 ··· 275 276 void __init default_smp_read_mpc_oem(struct mpc_table *mpc) { } 277 278 static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early) 279 { 280 char str[16]; ··· 301 #ifdef CONFIG_X86_32 302 generic_mps_oem_check(mpc, oem, str); 303 #endif 304 + /* Initialize the lapic mapping */ 305 if (!acpi_lapic) 306 + register_lapic_address(mpc->lapic); 307 308 if (early) 309 return 1; 310 311 if (mpc->oemptr) 312 x86_init.mpparse.smp_read_mpc_oem(mpc); ··· 337 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic)); 338 break; 339 case MP_INTSRC: 340 + mp_save_irq((struct mpc_intsrc *)mpt); 341 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc)); 342 break; 343 case MP_LINTSRC: ··· 429 430 intsrc.srcbusirq = i; 431 intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */ 432 + mp_save_irq(&intsrc); 433 } 434 435 intsrc.irqtype = mp_ExtINT; 436 intsrc.srcbusirq = 0; 437 intsrc.dstirq = 0; /* 8259A to INTIN0 */ 438 + mp_save_irq(&intsrc); 439 } 440 441 ··· 784 int i; 785 786 apic_printk(APIC_VERBOSE, "OLD "); 787 + print_mp_irq_info(m); 788 789 i = get_MP_intsrc_index(m); 790 if (i > 0) { 791 + memcpy(m, &mp_irqs[i], sizeof(*m)); 792 apic_printk(APIC_VERBOSE, "NEW "); 793 print_mp_irq_info(&mp_irqs[i]); 794 return; ··· 875 if (nr_m_spare > 0) { 876 apic_printk(APIC_VERBOSE, "*NEW* found\n"); 877 nr_m_spare--; 878 + memcpy(m_spare[nr_m_spare], &mp_irqs[i], sizeof(mp_irqs[i])); 879 m_spare[nr_m_spare] = NULL; 880 } else { 881 struct mpc_intsrc *m = (struct mpc_intsrc *)mpt; 882 count += sizeof(struct mpc_intsrc); 883 if (check_slot(mpc_new_phys, mpc_new_length, count) < 0) 884 goto out; 885 + memcpy(m, &mp_irqs[i], sizeof(*m)); 886 mpc->length = count; 887 mpt += sizeof(struct mpc_intsrc); 888 }
-1
arch/x86/mm/amdtopology_64.c
··· 66 if (smp_found_config) 67 early_get_smp_config(); 68 #endif 69 - early_init_lapic_mapping(); 70 } 71 72 int __init amd_get_nodes(struct bootnode *physnodes)
··· 66 if (smp_found_config) 67 early_get_smp_config(); 68 #endif 69 } 70 71 int __init amd_get_nodes(struct bootnode *physnodes)
+2 -28
arch/x86/platform/mrst/mrst.c
··· 71 EXPORT_SYMBOL_GPL(sfi_mrtc_array); 72 int sfi_mrtc_num; 73 74 - static inline void assign_to_mp_irq(struct mpc_intsrc *m, 75 - struct mpc_intsrc *mp_irq) 76 - { 77 - memcpy(mp_irq, m, sizeof(struct mpc_intsrc)); 78 - } 79 - 80 - static inline int mp_irq_cmp(struct mpc_intsrc *mp_irq, 81 - struct mpc_intsrc *m) 82 - { 83 - return memcmp(mp_irq, m, sizeof(struct mpc_intsrc)); 84 - } 85 - 86 - static void save_mp_irq(struct mpc_intsrc *m) 87 - { 88 - int i; 89 - 90 - for (i = 0; i < mp_irq_entries; i++) { 91 - if (!mp_irq_cmp(&mp_irqs[i], m)) 92 - return; 93 - } 94 - 95 - assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]); 96 - if (++mp_irq_entries == MAX_IRQ_SOURCES) 97 - panic("Max # of irq sources exceeded!!\n"); 98 - } 99 - 100 /* parse all the mtimer info to a static mtimer array */ 101 static int __init sfi_parse_mtmr(struct sfi_table_header *table) 102 { ··· 104 mp_irq.srcbusirq = pentry->irq; /* IRQ */ 105 mp_irq.dstapic = MP_APIC_ALL; 106 mp_irq.dstirq = pentry->irq; 107 - save_mp_irq(&mp_irq); 108 } 109 110 return 0; ··· 174 mp_irq.srcbusirq = pentry->irq; /* IRQ */ 175 mp_irq.dstapic = MP_APIC_ALL; 176 mp_irq.dstirq = pentry->irq; 177 - save_mp_irq(&mp_irq); 178 } 179 return 0; 180 }
··· 71 EXPORT_SYMBOL_GPL(sfi_mrtc_array); 72 int sfi_mrtc_num; 73 74 /* parse all the mtimer info to a static mtimer array */ 75 static int __init sfi_parse_mtmr(struct sfi_table_header *table) 76 { ··· 130 mp_irq.srcbusirq = pentry->irq; /* IRQ */ 131 mp_irq.dstapic = MP_APIC_ALL; 132 mp_irq.dstirq = pentry->irq; 133 + mp_save_irq(&mp_irq); 134 } 135 136 return 0; ··· 200 mp_irq.srcbusirq = pentry->irq; /* IRQ */ 201 mp_irq.dstapic = MP_APIC_ALL; 202 mp_irq.dstirq = pentry->irq; 203 + mp_save_irq(&mp_irq); 204 } 205 return 0; 206 }
+1 -12
arch/x86/platform/sfi/sfi.c
··· 34 #ifdef CONFIG_X86_LOCAL_APIC 35 static unsigned long sfi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE; 36 37 - static void __init mp_sfi_register_lapic_address(unsigned long address) 38 - { 39 - mp_lapic_addr = address; 40 - 41 - set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr); 42 - if (boot_cpu_physical_apicid == -1U) 43 - boot_cpu_physical_apicid = read_apic_id(); 44 - 45 - pr_info("Boot CPU = %d\n", boot_cpu_physical_apicid); 46 - } 47 - 48 /* All CPUs enumerated by SFI must be present and enabled */ 49 static void __cpuinit mp_sfi_register_lapic(u8 id) 50 { ··· 99 int __init sfi_platform_init(void) 100 { 101 #ifdef CONFIG_X86_LOCAL_APIC 102 - mp_sfi_register_lapic_address(sfi_lapic_addr); 103 sfi_table_parse(SFI_SIG_CPUS, NULL, NULL, sfi_parse_cpus); 104 #endif 105 #ifdef CONFIG_X86_IO_APIC
··· 34 #ifdef CONFIG_X86_LOCAL_APIC 35 static unsigned long sfi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE; 36 37 /* All CPUs enumerated by SFI must be present and enabled */ 38 static void __cpuinit mp_sfi_register_lapic(u8 id) 39 { ··· 110 int __init sfi_platform_init(void) 111 { 112 #ifdef CONFIG_X86_LOCAL_APIC 113 + register_lapic_address(sfi_lapic_addr); 114 sfi_table_parse(SFI_SIG_CPUS, NULL, NULL, sfi_parse_cpus); 115 #endif 116 #ifdef CONFIG_X86_IO_APIC