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ARM: dts: stm32: Fix IRQ_TYPE_NONE warnings on stm32mp157c

Since commit 83a86fbb5b56 ("irqchip/gic: Loudly complain about
the use of IRQ_TYPE_NONE"), a warning is raised if IRQ_TYPE_NONE is used.
So we use IRQ_TYPE_LEVEL_HIGH for usart nodes instead of IRQ_TYPE_NONE.

Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Tested-by: Fabrice Gasnier <fabrice.gasnier@st.com>

Alexandre Torgue 2ff04d0f 20ab2d88

+8 -8
+8 -8
arch/arm/boot/dts/stm32mp157c.dtsi
··· 314 314 usart2: serial@4000e000 { 315 315 compatible = "st,stm32h7-uart"; 316 316 reg = <0x4000e000 0x400>; 317 - interrupts = <GIC_SPI 38 IRQ_TYPE_NONE>; 317 + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 318 318 clocks = <&rcc USART2_K>; 319 319 status = "disabled"; 320 320 }; ··· 322 322 usart3: serial@4000f000 { 323 323 compatible = "st,stm32h7-uart"; 324 324 reg = <0x4000f000 0x400>; 325 - interrupts = <GIC_SPI 39 IRQ_TYPE_NONE>; 325 + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 326 326 clocks = <&rcc USART3_K>; 327 327 status = "disabled"; 328 328 }; ··· 330 330 uart4: serial@40010000 { 331 331 compatible = "st,stm32h7-uart"; 332 332 reg = <0x40010000 0x400>; 333 - interrupts = <GIC_SPI 52 IRQ_TYPE_NONE>; 333 + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; 334 334 clocks = <&rcc UART4_K>; 335 335 status = "disabled"; 336 336 }; ··· 338 338 uart5: serial@40011000 { 339 339 compatible = "st,stm32h7-uart"; 340 340 reg = <0x40011000 0x400>; 341 - interrupts = <GIC_SPI 53 IRQ_TYPE_NONE>; 341 + interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; 342 342 clocks = <&rcc UART5_K>; 343 343 status = "disabled"; 344 344 }; ··· 431 431 uart7: serial@40018000 { 432 432 compatible = "st,stm32h7-uart"; 433 433 reg = <0x40018000 0x400>; 434 - interrupts = <GIC_SPI 82 IRQ_TYPE_NONE>; 434 + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; 435 435 clocks = <&rcc UART7_K>; 436 436 status = "disabled"; 437 437 }; ··· 439 439 uart8: serial@40019000 { 440 440 compatible = "st,stm32h7-uart"; 441 441 reg = <0x40019000 0x400>; 442 - interrupts = <GIC_SPI 83 IRQ_TYPE_NONE>; 442 + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 443 443 clocks = <&rcc UART8_K>; 444 444 status = "disabled"; 445 445 }; ··· 489 489 usart6: serial@44003000 { 490 490 compatible = "st,stm32h7-uart"; 491 491 reg = <0x44003000 0x400>; 492 - interrupts = <GIC_SPI 71 IRQ_TYPE_NONE>; 492 + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 493 493 clocks = <&rcc USART6_K>; 494 494 status = "disabled"; 495 495 }; ··· 800 800 usart1: serial@5c000000 { 801 801 compatible = "st,stm32h7-uart"; 802 802 reg = <0x5c000000 0x400>; 803 - interrupts = <GIC_SPI 37 IRQ_TYPE_NONE>; 803 + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 804 804 clocks = <&rcc USART1_K>; 805 805 status = "disabled"; 806 806 };