···515::516517 void *518- dma_alloc_noncoherent(struct device *dev, size_t size,519- dma_addr_t *dma_handle, gfp_t flag)520521-Identical to dma_alloc_coherent() except that the platform will522-choose to return either consistent or non-consistent memory as it sees523-fit. By using this API, you are guaranteeing to the platform that you524-have all the correct and necessary sync points for this memory in the525-driver should it choose to return non-consistent memory.0526527Note: where the platform can return consistent memory, it will528guarantee that the sync points become nops.···536::537538 void539- dma_free_noncoherent(struct device *dev, size_t size, void *cpu_addr,540- dma_addr_t dma_handle)541542-Free memory allocated by the nonconsistent API. All parameters must543-be identical to those passed in (and returned by544-dma_alloc_noncoherent()).0545546::547···566 dma_cache_sync(struct device *dev, void *vaddr, size_t size,567 enum dma_data_direction direction)568569-Do a partial sync of memory that was allocated by570-dma_alloc_noncoherent(), starting at virtual address vaddr and571continuing on for size. Again, you *must* observe the cache line572boundaries when doing this.573
···515::516517 void *518+ dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,519+ gfp_t flag, unsigned long attrs)520521+Identical to dma_alloc_coherent() except that when the522+DMA_ATTR_NON_CONSISTENT flags is passed in the attrs argument, the523+platform will choose to return either consistent or non-consistent memory524+as it sees fit. By using this API, you are guaranteeing to the platform525+that you have all the correct and necessary sync points for this memory526+in the driver should it choose to return non-consistent memory.527528Note: where the platform can return consistent memory, it will529guarantee that the sync points become nops.···535::536537 void538+ dma_free_attrs(struct device *dev, size_t size, void *cpu_addr,539+ dma_addr_t dma_handle, unsigned long attrs)540541+Free memory allocated by the dma_alloc_attrs(). All parameters common542+parameters must identical to those otherwise passed to dma_fre_coherent,543+and the attrs argument must be identical to the attrs passed to544+dma_alloc_attrs().545546::547···564 dma_cache_sync(struct device *dev, void *vaddr, size_t size,565 enum dma_data_direction direction)566567+Do a partial sync of memory that was allocated by dma_alloc_attrs() with568+the DMA_ATTR_NON_CONSISTENT flag starting at virtual address vaddr and569continuing on for size. Again, you *must* observe the cache line570boundaries when doing this.571
+1-1
arch/metag/include/asm/dma-mapping.h
···9}1011/*12- * dma_alloc_noncoherent() returns non-cacheable memory, so there's no need to13 * do any flushing here.14 */15static inline void
···9}1011/*12+ * dma_alloc_attrs() always returns non-cacheable memory, so there's no need to13 * do any flushing here.14 */15static inline void
+1-1
arch/nios2/include/asm/dma-mapping.h
···18}1920/*21- * dma_alloc_noncoherent() returns non-cacheable memory, so there's no need to22 * do any flushing here.23 */24static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
···18}1920/*21+ * dma_alloc_attrs() always returns non-cacheable memory, so there's no need to22 * do any flushing here.23 */24static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
+2-2
arch/tile/include/asm/dma-mapping.h
···68int dma_set_mask(struct device *dev, u64 mask);6970/*71- * dma_alloc_noncoherent() is #defined to return coherent memory,72- * so there's no need to do any flushing here.73 */74static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,75 enum dma_data_direction direction)
···68int dma_set_mask(struct device *dev, u64 mask);6970/*71+ * dma_alloc_attrs() always returns non-cacheable memory, so there's no need to72+ * do any flushing here.73 */74static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,75 enum dma_data_direction direction)