Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ASoC: Support TI Isabelle Audio driver

ASoC: Support TI Isabelle Audio driver

The Isabelle Audio IC is a complete low power high fidelity CODEC with integrated
ADCs, DACs, decimation and interpolation filters, PLL, and power providers. This
device supports 2 analog and 2 digital microphone channels, a mono earpiece driver,
stereo class G headphone drivers with ultra low power and best SNR in the industry,
stereo Class D speaker drivers, and 2 high performance Line drivers.

The below patch is a basic driver code for TI Isabelle audio codec. The
functionalities like headset detection, etc., will be included incrementally
in the up-coming patches.

Signed-off-by: Vishwas A Deshpande <vishwas.a.deshpande@ti.com>
Signed-off-by: M R Swami Reddy <mr.swami.reddy@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>

authored by

M R Swami Reddy and committed by
Mark Brown
2f989f7e 2bce133c

+1328
+4
sound/soc/codecs/Kconfig
··· 36 36 select SND_SOC_CX20442 37 37 select SND_SOC_DA7210 if I2C 38 38 select SND_SOC_DFBMCS320 39 + select SND_SOC_ISABELLE if I2C 39 40 select SND_SOC_JZ4740_CODEC 40 41 select SND_SOC_LM4857 if I2C 41 42 select SND_SOC_LM49453 if I2C ··· 225 224 226 225 config SND_SOC_DMIC 227 226 tristate 227 + 228 + config SND_SOC_ISABELLE 229 + tristate 228 230 229 231 config SND_SOC_LM49453 230 232 tristate
+2
sound/soc/codecs/Makefile
··· 23 23 snd-soc-da7210-objs := da7210.o 24 24 snd-soc-dfbmcs320-objs := dfbmcs320.o 25 25 snd-soc-dmic-objs := dmic.o 26 + snd-soc-isabelle-objs := isabelle.o 26 27 snd-soc-jz4740-codec-objs := jz4740.o 27 28 snd-soc-l3-objs := l3.o 28 29 snd-soc-lm4857-objs := lm4857.o ··· 135 134 obj-$(CONFIG_SND_SOC_DA7210) += snd-soc-da7210.o 136 135 obj-$(CONFIG_SND_SOC_DFBMCS320) += snd-soc-dfbmcs320.o 137 136 obj-$(CONFIG_SND_SOC_DMIC) += snd-soc-dmic.o 137 + obj-$(CONFIG_SND_SOC_ISABELLE) += snd-soc-isabelle.o 138 138 obj-$(CONFIG_SND_SOC_JZ4740_CODEC) += snd-soc-jz4740-codec.o 139 139 obj-$(CONFIG_SND_SOC_L3) += snd-soc-l3.o 140 140 obj-$(CONFIG_SND_SOC_LM4857) += snd-soc-lm4857.o
+1179
sound/soc/codecs/isabelle.c
··· 1 + /* 2 + * isabelle.c - Low power high fidelity audio codec driver 3 + * 4 + * Copyright (c) 2012 Texas Instruments, Inc 5 + * 6 + * This program is free software; you can redistribute it and/or modify 7 + * it under the terms of the GNU General Public License as published by 8 + * the Free Software Foundation; version 2 of the License. 9 + * 10 + * 11 + * Initially based on sound/soc/codecs/twl6040.c 12 + * 13 + */ 14 + #include <linux/module.h> 15 + #include <linux/moduleparam.h> 16 + #include <linux/version.h> 17 + #include <linux/kernel.h> 18 + #include <linux/init.h> 19 + #include <linux/delay.h> 20 + #include <linux/pm.h> 21 + #include <linux/regmap.h> 22 + #include <linux/i2c.h> 23 + #include <linux/slab.h> 24 + #include <sound/core.h> 25 + #include <sound/pcm.h> 26 + #include <sound/pcm_params.h> 27 + #include <sound/soc.h> 28 + #include <sound/soc-dapm.h> 29 + #include <sound/tlv.h> 30 + #include <sound/jack.h> 31 + #include <sound/initval.h> 32 + #include <asm/div64.h> 33 + #include "isabelle.h" 34 + 35 + 36 + /* Register default values for ISABELLE driver. */ 37 + static struct reg_default isabelle_reg_defs[] = { 38 + { 0, 0x00 }, 39 + { 1, 0x00 }, 40 + { 2, 0x00 }, 41 + { 3, 0x00 }, 42 + { 4, 0x00 }, 43 + { 5, 0x00 }, 44 + { 6, 0x00 }, 45 + { 7, 0x00 }, 46 + { 8, 0x00 }, 47 + { 9, 0x00 }, 48 + { 10, 0x00 }, 49 + { 11, 0x00 }, 50 + { 12, 0x00 }, 51 + { 13, 0x00 }, 52 + { 14, 0x00 }, 53 + { 15, 0x00 }, 54 + { 16, 0x00 }, 55 + { 17, 0x00 }, 56 + { 18, 0x00 }, 57 + { 19, 0x00 }, 58 + { 20, 0x00 }, 59 + { 21, 0x02 }, 60 + { 22, 0x02 }, 61 + { 23, 0x02 }, 62 + { 24, 0x02 }, 63 + { 25, 0x0F }, 64 + { 26, 0x8F }, 65 + { 27, 0x0F }, 66 + { 28, 0x8F }, 67 + { 29, 0x00 }, 68 + { 30, 0x00 }, 69 + { 31, 0x00 }, 70 + { 32, 0x00 }, 71 + { 33, 0x00 }, 72 + { 34, 0x00 }, 73 + { 35, 0x00 }, 74 + { 36, 0x00 }, 75 + { 37, 0x00 }, 76 + { 38, 0x00 }, 77 + { 39, 0x00 }, 78 + { 40, 0x00 }, 79 + { 41, 0x00 }, 80 + { 42, 0x00 }, 81 + { 43, 0x00 }, 82 + { 44, 0x00 }, 83 + { 45, 0x00 }, 84 + { 46, 0x00 }, 85 + { 47, 0x00 }, 86 + { 48, 0x00 }, 87 + { 49, 0x00 }, 88 + { 50, 0x00 }, 89 + { 51, 0x00 }, 90 + { 52, 0x00 }, 91 + { 53, 0x00 }, 92 + { 54, 0x00 }, 93 + { 55, 0x00 }, 94 + { 56, 0x00 }, 95 + { 57, 0x00 }, 96 + { 58, 0x00 }, 97 + { 59, 0x00 }, 98 + { 60, 0x00 }, 99 + { 61, 0x00 }, 100 + { 62, 0x00 }, 101 + { 63, 0x00 }, 102 + { 64, 0x00 }, 103 + { 65, 0x00 }, 104 + { 66, 0x00 }, 105 + { 67, 0x00 }, 106 + { 68, 0x00 }, 107 + { 69, 0x90 }, 108 + { 70, 0x90 }, 109 + { 71, 0x90 }, 110 + { 72, 0x00 }, 111 + { 73, 0x00 }, 112 + { 74, 0x00 }, 113 + { 75, 0x00 }, 114 + { 76, 0x00 }, 115 + { 77, 0x00 }, 116 + { 78, 0x00 }, 117 + { 79, 0x00 }, 118 + { 80, 0x00 }, 119 + { 81, 0x00 }, 120 + { 82, 0x00 }, 121 + { 83, 0x00 }, 122 + { 84, 0x00 }, 123 + { 85, 0x07 }, 124 + { 86, 0x00 }, 125 + { 87, 0x00 }, 126 + { 88, 0x00 }, 127 + { 89, 0x07 }, 128 + { 90, 0x80 }, 129 + { 91, 0x07 }, 130 + { 92, 0x07 }, 131 + { 93, 0x00 }, 132 + { 94, 0x00 }, 133 + { 95, 0x00 }, 134 + { 96, 0x00 }, 135 + { 97, 0x00 }, 136 + { 98, 0x00 }, 137 + { 99, 0x00 }, 138 + }; 139 + 140 + static const char *isabelle_rx1_texts[] = {"VRX1", "ARX1"}; 141 + static const char *isabelle_rx2_texts[] = {"VRX2", "ARX2"}; 142 + 143 + static const struct soc_enum isabelle_rx1_enum[] = { 144 + SOC_ENUM_SINGLE(ISABELLE_VOICE_HPF_CFG_REG, 3, 1, isabelle_rx1_texts), 145 + SOC_ENUM_SINGLE(ISABELLE_AUDIO_HPF_CFG_REG, 5, 1, isabelle_rx1_texts), 146 + }; 147 + 148 + static const struct soc_enum isabelle_rx2_enum[] = { 149 + SOC_ENUM_SINGLE(ISABELLE_VOICE_HPF_CFG_REG, 2, 1, isabelle_rx2_texts), 150 + SOC_ENUM_SINGLE(ISABELLE_AUDIO_HPF_CFG_REG, 4, 1, isabelle_rx2_texts), 151 + }; 152 + 153 + /* Headset DAC playback switches */ 154 + static const struct snd_kcontrol_new rx1_mux_controls = 155 + SOC_DAPM_ENUM("Route", isabelle_rx1_enum); 156 + 157 + static const struct snd_kcontrol_new rx2_mux_controls = 158 + SOC_DAPM_ENUM("Route", isabelle_rx2_enum); 159 + 160 + /* TX input selection */ 161 + static const char *isabelle_atx_texts[] = {"AMIC1", "DMIC"}; 162 + static const char *isabelle_vtx_texts[] = {"AMIC2", "DMIC"}; 163 + 164 + static const struct soc_enum isabelle_atx_enum[] = { 165 + SOC_ENUM_SINGLE(ISABELLE_AMIC_CFG_REG, 7, 1, isabelle_atx_texts), 166 + SOC_ENUM_SINGLE(ISABELLE_DMIC_CFG_REG, 0, 1, isabelle_atx_texts), 167 + }; 168 + 169 + static const struct soc_enum isabelle_vtx_enum[] = { 170 + SOC_ENUM_SINGLE(ISABELLE_AMIC_CFG_REG, 6, 1, isabelle_vtx_texts), 171 + SOC_ENUM_SINGLE(ISABELLE_DMIC_CFG_REG, 0, 1, isabelle_vtx_texts), 172 + }; 173 + 174 + static const struct snd_kcontrol_new atx_mux_controls = 175 + SOC_DAPM_ENUM("Route", isabelle_atx_enum); 176 + 177 + static const struct snd_kcontrol_new vtx_mux_controls = 178 + SOC_DAPM_ENUM("Route", isabelle_vtx_enum); 179 + 180 + /* Left analog microphone selection */ 181 + static const char *isabelle_amic1_texts[] = { 182 + "Main Mic", "Headset Mic", "Aux/FM Left"}; 183 + 184 + /* Left analog microphone selection */ 185 + static const char *isabelle_amic2_texts[] = {"Sub Mic", "Aux/FM Right"}; 186 + 187 + static const struct soc_enum isabelle_amic1_enum[] = { 188 + SOC_ENUM_SINGLE(ISABELLE_AMIC_CFG_REG, 5, 189 + ARRAY_SIZE(isabelle_amic1_texts), 190 + isabelle_amic1_texts), 191 + }; 192 + 193 + static const struct soc_enum isabelle_amic2_enum[] = { 194 + SOC_ENUM_SINGLE(ISABELLE_AMIC_CFG_REG, 4, 195 + ARRAY_SIZE(isabelle_amic2_texts), 196 + isabelle_amic2_texts), 197 + }; 198 + 199 + static const struct snd_kcontrol_new amic1_control = 200 + SOC_DAPM_ENUM("Route", isabelle_amic1_enum); 201 + 202 + static const struct snd_kcontrol_new amic2_control = 203 + SOC_DAPM_ENUM("Route", isabelle_amic2_enum); 204 + 205 + static const char *isabelle_st_audio_texts[] = {"ATX1", "ATX2"}; 206 + 207 + static const char *isabelle_st_voice_texts[] = {"VTX1", "VTX2"}; 208 + 209 + static const struct soc_enum isabelle_st_audio_enum[] = { 210 + SOC_ENUM_SINGLE(ISABELLE_ATX_STPGA1_CFG_REG, 7, 1, 211 + isabelle_st_audio_texts), 212 + SOC_ENUM_SINGLE(ISABELLE_ATX_STPGA2_CFG_REG, 7, 1, 213 + isabelle_st_audio_texts), 214 + }; 215 + 216 + static const struct soc_enum isabelle_st_voice_enum[] = { 217 + SOC_ENUM_SINGLE(ISABELLE_VTX_STPGA1_CFG_REG, 7, 1, 218 + isabelle_st_voice_texts), 219 + SOC_ENUM_SINGLE(ISABELLE_VTX2_STPGA2_CFG_REG, 7, 1, 220 + isabelle_st_voice_texts), 221 + }; 222 + 223 + static const struct snd_kcontrol_new st_audio_control = 224 + SOC_DAPM_ENUM("Route", isabelle_st_audio_enum); 225 + 226 + static const struct snd_kcontrol_new st_voice_control = 227 + SOC_DAPM_ENUM("Route", isabelle_st_voice_enum); 228 + 229 + /* Mixer controls */ 230 + static const struct snd_kcontrol_new isabelle_hs_left_mixer_controls[] = { 231 + SOC_DAPM_SINGLE("DAC1L Playback Switch", ISABELLE_HSDRV_CFG1_REG, 7, 1, 0), 232 + SOC_DAPM_SINGLE("APGA1 Playback Switch", ISABELLE_HSDRV_CFG1_REG, 6, 1, 0), 233 + }; 234 + 235 + static const struct snd_kcontrol_new isabelle_hs_right_mixer_controls[] = { 236 + SOC_DAPM_SINGLE("DAC1R Playback Switch", ISABELLE_HSDRV_CFG1_REG, 5, 1, 0), 237 + SOC_DAPM_SINGLE("APGA2 Playback Switch", ISABELLE_HSDRV_CFG1_REG, 4, 1, 0), 238 + }; 239 + 240 + static const struct snd_kcontrol_new isabelle_hf_left_mixer_controls[] = { 241 + SOC_DAPM_SINGLE("DAC2L Playback Switch", ISABELLE_HFLPGA_CFG_REG, 7, 1, 0), 242 + SOC_DAPM_SINGLE("APGA1 Playback Switch", ISABELLE_HFLPGA_CFG_REG, 6, 1, 0), 243 + }; 244 + 245 + static const struct snd_kcontrol_new isabelle_hf_right_mixer_controls[] = { 246 + SOC_DAPM_SINGLE("DAC2R Playback Switch", ISABELLE_HFRPGA_CFG_REG, 7, 1, 0), 247 + SOC_DAPM_SINGLE("APGA2 Playback Switch", ISABELLE_HFRPGA_CFG_REG, 6, 1, 0), 248 + }; 249 + 250 + static const struct snd_kcontrol_new isabelle_ep_mixer_controls[] = { 251 + SOC_DAPM_SINGLE("DAC2L Playback Switch", ISABELLE_EARDRV_CFG1_REG, 7, 1, 0), 252 + SOC_DAPM_SINGLE("APGA1 Playback Switch", ISABELLE_EARDRV_CFG1_REG, 6, 1, 0), 253 + }; 254 + 255 + static const struct snd_kcontrol_new isabelle_aux_left_mixer_controls[] = { 256 + SOC_DAPM_SINGLE("DAC3L Playback Switch", ISABELLE_LINEAMP_CFG_REG, 7, 1, 0), 257 + SOC_DAPM_SINGLE("APGA1 Playback Switch", ISABELLE_LINEAMP_CFG_REG, 6, 1, 0), 258 + }; 259 + 260 + static const struct snd_kcontrol_new isabelle_aux_right_mixer_controls[] = { 261 + SOC_DAPM_SINGLE("DAC3R Playback Switch", ISABELLE_LINEAMP_CFG_REG, 5, 1, 0), 262 + SOC_DAPM_SINGLE("APGA2 Playback Switch", ISABELLE_LINEAMP_CFG_REG, 4, 1, 0), 263 + }; 264 + 265 + static const struct snd_kcontrol_new isabelle_dpga1_left_mixer_controls[] = { 266 + SOC_DAPM_SINGLE("RX1 Playback Switch", ISABELLE_DPGA1LR_IN_SEL_REG, 7, 1, 0), 267 + SOC_DAPM_SINGLE("RX3 Playback Switch", ISABELLE_DPGA1LR_IN_SEL_REG, 6, 1, 0), 268 + SOC_DAPM_SINGLE("RX5 Playback Switch", ISABELLE_DPGA1LR_IN_SEL_REG, 5, 1, 0), 269 + }; 270 + 271 + static const struct snd_kcontrol_new isabelle_dpga1_right_mixer_controls[] = { 272 + SOC_DAPM_SINGLE("RX2 Playback Switch", ISABELLE_DPGA1LR_IN_SEL_REG, 3, 1, 0), 273 + SOC_DAPM_SINGLE("RX4 Playback Switch", ISABELLE_DPGA1LR_IN_SEL_REG, 2, 1, 0), 274 + SOC_DAPM_SINGLE("RX6 Playback Switch", ISABELLE_DPGA1LR_IN_SEL_REG, 1, 1, 0), 275 + }; 276 + 277 + static const struct snd_kcontrol_new isabelle_dpga2_left_mixer_controls[] = { 278 + SOC_DAPM_SINGLE("RX1 Playback Switch", ISABELLE_DPGA2L_IN_SEL_REG, 7, 1, 0), 279 + SOC_DAPM_SINGLE("RX2 Playback Switch", ISABELLE_DPGA2L_IN_SEL_REG, 6, 1, 0), 280 + SOC_DAPM_SINGLE("RX3 Playback Switch", ISABELLE_DPGA2L_IN_SEL_REG, 5, 1, 0), 281 + SOC_DAPM_SINGLE("RX4 Playback Switch", ISABELLE_DPGA2L_IN_SEL_REG, 4, 1, 0), 282 + SOC_DAPM_SINGLE("RX5 Playback Switch", ISABELLE_DPGA2L_IN_SEL_REG, 3, 1, 0), 283 + SOC_DAPM_SINGLE("RX6 Playback Switch", ISABELLE_DPGA2L_IN_SEL_REG, 2, 1, 0), 284 + }; 285 + 286 + static const struct snd_kcontrol_new isabelle_dpga2_right_mixer_controls[] = { 287 + SOC_DAPM_SINGLE("USNC Playback Switch", ISABELLE_DPGA2R_IN_SEL_REG, 7, 1, 0), 288 + SOC_DAPM_SINGLE("RX2 Playback Switch", ISABELLE_DPGA2R_IN_SEL_REG, 3, 1, 0), 289 + SOC_DAPM_SINGLE("RX4 Playback Switch", ISABELLE_DPGA2R_IN_SEL_REG, 2, 1, 0), 290 + SOC_DAPM_SINGLE("RX6 Playback Switch", ISABELLE_DPGA2R_IN_SEL_REG, 1, 1, 0), 291 + }; 292 + 293 + static const struct snd_kcontrol_new isabelle_dpga3_left_mixer_controls[] = { 294 + SOC_DAPM_SINGLE("RX1 Playback Switch", ISABELLE_DPGA3LR_IN_SEL_REG, 7, 1, 0), 295 + SOC_DAPM_SINGLE("RX3 Playback Switch", ISABELLE_DPGA3LR_IN_SEL_REG, 6, 1, 0), 296 + SOC_DAPM_SINGLE("RX5 Playback Switch", ISABELLE_DPGA3LR_IN_SEL_REG, 5, 1, 0), 297 + }; 298 + 299 + static const struct snd_kcontrol_new isabelle_dpga3_right_mixer_controls[] = { 300 + SOC_DAPM_SINGLE("RX2 Playback Switch", ISABELLE_DPGA3LR_IN_SEL_REG, 3, 1, 0), 301 + SOC_DAPM_SINGLE("RX4 Playback Switch", ISABELLE_DPGA3LR_IN_SEL_REG, 2, 1, 0), 302 + SOC_DAPM_SINGLE("RX6 Playback Switch", ISABELLE_DPGA3LR_IN_SEL_REG, 1, 1, 0), 303 + }; 304 + 305 + static const struct snd_kcontrol_new isabelle_rx1_mixer_controls[] = { 306 + SOC_DAPM_SINGLE("ST1 Playback Switch", ISABELLE_RX_INPUT_CFG_REG, 7, 1, 0), 307 + SOC_DAPM_SINGLE("DL1 Playback Switch", ISABELLE_RX_INPUT_CFG_REG, 6, 1, 0), 308 + }; 309 + 310 + static const struct snd_kcontrol_new isabelle_rx2_mixer_controls[] = { 311 + SOC_DAPM_SINGLE("ST2 Playback Switch", ISABELLE_RX_INPUT_CFG_REG, 5, 1, 0), 312 + SOC_DAPM_SINGLE("DL2 Playback Switch", ISABELLE_RX_INPUT_CFG_REG, 4, 1, 0), 313 + }; 314 + 315 + static const struct snd_kcontrol_new isabelle_rx3_mixer_controls[] = { 316 + SOC_DAPM_SINGLE("ST1 Playback Switch", ISABELLE_RX_INPUT_CFG_REG, 3, 1, 0), 317 + SOC_DAPM_SINGLE("DL3 Playback Switch", ISABELLE_RX_INPUT_CFG_REG, 2, 1, 0), 318 + }; 319 + 320 + static const struct snd_kcontrol_new isabelle_rx4_mixer_controls[] = { 321 + SOC_DAPM_SINGLE("ST2 Playback Switch", ISABELLE_RX_INPUT_CFG_REG, 1, 1, 0), 322 + SOC_DAPM_SINGLE("DL4 Playback Switch", ISABELLE_RX_INPUT_CFG_REG, 0, 1, 0), 323 + }; 324 + 325 + static const struct snd_kcontrol_new isabelle_rx5_mixer_controls[] = { 326 + SOC_DAPM_SINGLE("ST1 Playback Switch", ISABELLE_RX_INPUT_CFG2_REG, 7, 1, 0), 327 + SOC_DAPM_SINGLE("DL5 Playback Switch", ISABELLE_RX_INPUT_CFG2_REG, 6, 1, 0), 328 + }; 329 + 330 + static const struct snd_kcontrol_new isabelle_rx6_mixer_controls[] = { 331 + SOC_DAPM_SINGLE("ST2 Playback Switch", ISABELLE_RX_INPUT_CFG2_REG, 5, 1, 0), 332 + SOC_DAPM_SINGLE("DL6 Playback Switch", ISABELLE_RX_INPUT_CFG2_REG, 4, 1, 0), 333 + }; 334 + 335 + static const struct snd_kcontrol_new ep_path_enable_control = 336 + SOC_DAPM_SINGLE("Switch", ISABELLE_EARDRV_CFG2_REG, 0, 1, 0); 337 + 338 + /* TLV Declarations */ 339 + static const DECLARE_TLV_DB_SCALE(mic_amp_tlv, 0, 100, 0); 340 + static const DECLARE_TLV_DB_SCALE(afm_amp_tlv, -3300, 300, 0); 341 + static const DECLARE_TLV_DB_SCALE(dac_tlv, -1200, 200, 0); 342 + static const DECLARE_TLV_DB_SCALE(hf_tlv, -5000, 200, 0); 343 + 344 + /* from -63 to 0 dB in 1 dB steps */ 345 + static const DECLARE_TLV_DB_SCALE(dpga_tlv, -6300, 100, 1); 346 + 347 + /* from -63 to 9 dB in 1 dB steps */ 348 + static const DECLARE_TLV_DB_SCALE(rx_tlv, -6300, 100, 1); 349 + 350 + static const DECLARE_TLV_DB_SCALE(st_tlv, -2700, 300, 1); 351 + static const DECLARE_TLV_DB_SCALE(tx_tlv, -600, 100, 0); 352 + 353 + static const struct snd_kcontrol_new isabelle_snd_controls[] = { 354 + SOC_DOUBLE_TLV("Headset Playback Volume", ISABELLE_HSDRV_GAIN_REG, 355 + 4, 0, 0xF, 0, dac_tlv), 356 + SOC_DOUBLE_R_TLV("Handsfree Playback Volume", 357 + ISABELLE_HFLPGA_CFG_REG, ISABELLE_HFRPGA_CFG_REG, 358 + 0, 0x1F, 0, hf_tlv), 359 + SOC_DOUBLE_TLV("Aux Playback Volume", ISABELLE_LINEAMP_GAIN_REG, 360 + 4, 0, 0xF, 0, dac_tlv), 361 + SOC_SINGLE_TLV("Earpiece Playback Volume", ISABELLE_EARDRV_CFG1_REG, 362 + 0, 0xF, 0, dac_tlv), 363 + 364 + SOC_DOUBLE_TLV("Aux FM Volume", ISABELLE_APGA_GAIN_REG, 4, 0, 0xF, 0, 365 + afm_amp_tlv), 366 + SOC_SINGLE_TLV("Mic1 Capture Volume", ISABELLE_MIC1_GAIN_REG, 3, 0x1F, 367 + 0, mic_amp_tlv), 368 + SOC_SINGLE_TLV("Mic2 Capture Volume", ISABELLE_MIC2_GAIN_REG, 3, 0x1F, 369 + 0, mic_amp_tlv), 370 + 371 + SOC_DOUBLE_R_TLV("DPGA1 Volume", ISABELLE_DPGA1L_GAIN_REG, 372 + ISABELLE_DPGA1R_GAIN_REG, 0, 0x3F, 0, dpga_tlv), 373 + SOC_DOUBLE_R_TLV("DPGA2 Volume", ISABELLE_DPGA2L_GAIN_REG, 374 + ISABELLE_DPGA2R_GAIN_REG, 0, 0x3F, 0, dpga_tlv), 375 + SOC_DOUBLE_R_TLV("DPGA3 Volume", ISABELLE_DPGA3L_GAIN_REG, 376 + ISABELLE_DPGA3R_GAIN_REG, 0, 0x3F, 0, dpga_tlv), 377 + 378 + SOC_SINGLE_TLV("Sidetone Audio TX1 Volume", 379 + ISABELLE_ATX_STPGA1_CFG_REG, 0, 0xF, 0, st_tlv), 380 + SOC_SINGLE_TLV("Sidetone Audio TX2 Volume", 381 + ISABELLE_ATX_STPGA2_CFG_REG, 0, 0xF, 0, st_tlv), 382 + SOC_SINGLE_TLV("Sidetone Voice TX1 Volume", 383 + ISABELLE_VTX_STPGA1_CFG_REG, 0, 0xF, 0, st_tlv), 384 + SOC_SINGLE_TLV("Sidetone Voice TX2 Volume", 385 + ISABELLE_VTX2_STPGA2_CFG_REG, 0, 0xF, 0, st_tlv), 386 + 387 + SOC_SINGLE_TLV("Audio TX1 Volume", ISABELLE_ATX1_DPGA_REG, 4, 0xF, 0, 388 + tx_tlv), 389 + SOC_SINGLE_TLV("Audio TX2 Volume", ISABELLE_ATX2_DPGA_REG, 4, 0xF, 0, 390 + tx_tlv), 391 + SOC_SINGLE_TLV("Voice TX1 Volume", ISABELLE_VTX1_DPGA_REG, 4, 0xF, 0, 392 + tx_tlv), 393 + SOC_SINGLE_TLV("Voice TX2 Volume", ISABELLE_VTX2_DPGA_REG, 4, 0xF, 0, 394 + tx_tlv), 395 + 396 + SOC_SINGLE_TLV("RX1 DPGA Volume", ISABELLE_RX1_DPGA_REG, 0, 0x3F, 0, 397 + rx_tlv), 398 + SOC_SINGLE_TLV("RX2 DPGA Volume", ISABELLE_RX2_DPGA_REG, 0, 0x3F, 0, 399 + rx_tlv), 400 + SOC_SINGLE_TLV("RX3 DPGA Volume", ISABELLE_RX3_DPGA_REG, 0, 0x3F, 0, 401 + rx_tlv), 402 + SOC_SINGLE_TLV("RX4 DPGA Volume", ISABELLE_RX4_DPGA_REG, 0, 0x3F, 0, 403 + rx_tlv), 404 + SOC_SINGLE_TLV("RX5 DPGA Volume", ISABELLE_RX5_DPGA_REG, 0, 0x3F, 0, 405 + rx_tlv), 406 + SOC_SINGLE_TLV("RX6 DPGA Volume", ISABELLE_RX6_DPGA_REG, 0, 0x3F, 0, 407 + rx_tlv), 408 + 409 + SOC_SINGLE("Headset Noise Gate", ISABELLE_HS_NG_CFG1_REG, 7, 1, 0), 410 + SOC_SINGLE("Handsfree Noise Gate", ISABELLE_HF_NG_CFG1_REG, 7, 1, 0), 411 + 412 + SOC_SINGLE("ATX1 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG, 413 + 7, 1, 0), 414 + SOC_SINGLE("ATX2 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG, 415 + 6, 1, 0), 416 + SOC_SINGLE("ARX1 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG, 417 + 5, 1, 0), 418 + SOC_SINGLE("ARX2 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG, 419 + 4, 1, 0), 420 + SOC_SINGLE("ARX3 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG, 421 + 3, 1, 0), 422 + SOC_SINGLE("ARX4 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG, 423 + 2, 1, 0), 424 + SOC_SINGLE("ARX5 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG, 425 + 1, 1, 0), 426 + SOC_SINGLE("ARX6 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG, 427 + 0, 1, 0), 428 + SOC_SINGLE("VRX1 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG, 429 + 3, 1, 0), 430 + SOC_SINGLE("VRX2 Filter Bypass Switch", ISABELLE_AUDIO_HPF_CFG_REG, 431 + 2, 1, 0), 432 + 433 + SOC_SINGLE("ATX1 Filter Enable Switch", ISABELLE_ALU_TX_EN_REG, 434 + 7, 1, 0), 435 + SOC_SINGLE("ATX2 Filter Enable Switch", ISABELLE_ALU_TX_EN_REG, 436 + 6, 1, 0), 437 + SOC_SINGLE("VTX1 Filter Enable Switch", ISABELLE_ALU_TX_EN_REG, 438 + 5, 1, 0), 439 + SOC_SINGLE("VTX2 Filter Enable Switch", ISABELLE_ALU_TX_EN_REG, 440 + 4, 1, 0), 441 + SOC_SINGLE("RX1 Filter Enable Switch", ISABELLE_ALU_RX_EN_REG, 442 + 5, 1, 0), 443 + SOC_SINGLE("RX2 Filter Enable Switch", ISABELLE_ALU_RX_EN_REG, 444 + 4, 1, 0), 445 + SOC_SINGLE("RX3 Filter Enable Switch", ISABELLE_ALU_RX_EN_REG, 446 + 3, 1, 0), 447 + SOC_SINGLE("RX4 Filter Enable Switch", ISABELLE_ALU_RX_EN_REG, 448 + 2, 1, 0), 449 + SOC_SINGLE("RX5 Filter Enable Switch", ISABELLE_ALU_RX_EN_REG, 450 + 1, 1, 0), 451 + SOC_SINGLE("RX6 Filter Enable Switch", ISABELLE_ALU_RX_EN_REG, 452 + 0, 1, 0), 453 + 454 + SOC_SINGLE("ULATX12 Capture Switch", ISABELLE_ULATX12_INTF_CFG_REG, 455 + 7, 1, 0), 456 + 457 + SOC_SINGLE("DL12 Playback Switch", ISABELLE_DL12_INTF_CFG_REG, 458 + 7, 1, 0), 459 + SOC_SINGLE("DL34 Playback Switch", ISABELLE_DL34_INTF_CFG_REG, 460 + 7, 1, 0), 461 + SOC_SINGLE("DL56 Playback Switch", ISABELLE_DL56_INTF_CFG_REG, 462 + 7, 1, 0), 463 + 464 + /* DMIC Switch */ 465 + SOC_SINGLE("DMIC Switch", ISABELLE_DMIC_CFG_REG, 0, 1, 0), 466 + }; 467 + 468 + static const struct snd_soc_dapm_widget isabelle_dapm_widgets[] = { 469 + /* Inputs */ 470 + SND_SOC_DAPM_INPUT("MAINMIC"), 471 + SND_SOC_DAPM_INPUT("HSMIC"), 472 + SND_SOC_DAPM_INPUT("SUBMIC"), 473 + SND_SOC_DAPM_INPUT("LINEIN1"), 474 + SND_SOC_DAPM_INPUT("LINEIN2"), 475 + SND_SOC_DAPM_INPUT("DMICDAT"), 476 + 477 + /* Outputs */ 478 + SND_SOC_DAPM_OUTPUT("HSOL"), 479 + SND_SOC_DAPM_OUTPUT("HSOR"), 480 + SND_SOC_DAPM_OUTPUT("HFL"), 481 + SND_SOC_DAPM_OUTPUT("HFR"), 482 + SND_SOC_DAPM_OUTPUT("EP"), 483 + SND_SOC_DAPM_OUTPUT("LINEOUT1"), 484 + SND_SOC_DAPM_OUTPUT("LINEOUT2"), 485 + 486 + SND_SOC_DAPM_PGA("DL1", SND_SOC_NOPM, 0, 0, NULL, 0), 487 + SND_SOC_DAPM_PGA("DL2", SND_SOC_NOPM, 0, 0, NULL, 0), 488 + SND_SOC_DAPM_PGA("DL3", SND_SOC_NOPM, 0, 0, NULL, 0), 489 + SND_SOC_DAPM_PGA("DL4", SND_SOC_NOPM, 0, 0, NULL, 0), 490 + SND_SOC_DAPM_PGA("DL5", SND_SOC_NOPM, 0, 0, NULL, 0), 491 + SND_SOC_DAPM_PGA("DL6", SND_SOC_NOPM, 0, 0, NULL, 0), 492 + 493 + /* Analog input muxes for the capture amplifiers */ 494 + SND_SOC_DAPM_MUX("Analog Left Capture Route", 495 + SND_SOC_NOPM, 0, 0, &amic1_control), 496 + SND_SOC_DAPM_MUX("Analog Right Capture Route", 497 + SND_SOC_NOPM, 0, 0, &amic2_control), 498 + 499 + SND_SOC_DAPM_MUX("Sidetone Audio Playback", SND_SOC_NOPM, 0, 0, 500 + &st_audio_control), 501 + SND_SOC_DAPM_MUX("Sidetone Voice Playback", SND_SOC_NOPM, 0, 0, 502 + &st_voice_control), 503 + 504 + /* AIF */ 505 + SND_SOC_DAPM_AIF_IN("INTF1_SDI", NULL, 0, ISABELLE_INTF_EN_REG, 7, 0), 506 + SND_SOC_DAPM_AIF_IN("INTF2_SDI", NULL, 0, ISABELLE_INTF_EN_REG, 6, 0), 507 + 508 + SND_SOC_DAPM_AIF_OUT("INTF1_SDO", NULL, 0, ISABELLE_INTF_EN_REG, 5, 0), 509 + SND_SOC_DAPM_AIF_OUT("INTF2_SDO", NULL, 0, ISABELLE_INTF_EN_REG, 4, 0), 510 + 511 + SND_SOC_DAPM_OUT_DRV("ULATX1", SND_SOC_NOPM, 0, 0, NULL, 0), 512 + SND_SOC_DAPM_OUT_DRV("ULATX2", SND_SOC_NOPM, 0, 0, NULL, 0), 513 + SND_SOC_DAPM_OUT_DRV("ULVTX1", SND_SOC_NOPM, 0, 0, NULL, 0), 514 + SND_SOC_DAPM_OUT_DRV("ULVTX2", SND_SOC_NOPM, 0, 0, NULL, 0), 515 + 516 + /* Analog Capture PGAs */ 517 + SND_SOC_DAPM_PGA("MicAmp1", ISABELLE_AMIC_CFG_REG, 5, 0, NULL, 0), 518 + SND_SOC_DAPM_PGA("MicAmp2", ISABELLE_AMIC_CFG_REG, 4, 0, NULL, 0), 519 + 520 + /* Auxiliary FM PGAs */ 521 + SND_SOC_DAPM_PGA("APGA1", ISABELLE_APGA_CFG_REG, 7, 0, NULL, 0), 522 + SND_SOC_DAPM_PGA("APGA2", ISABELLE_APGA_CFG_REG, 6, 0, NULL, 0), 523 + 524 + /* ADCs */ 525 + SND_SOC_DAPM_ADC("ADC1", "Left Front Capture", 526 + ISABELLE_AMIC_CFG_REG, 7, 0), 527 + SND_SOC_DAPM_ADC("ADC2", "Right Front Capture", 528 + ISABELLE_AMIC_CFG_REG, 6, 0), 529 + 530 + /* Microphone Bias */ 531 + SND_SOC_DAPM_SUPPLY("Headset Mic Bias", ISABELLE_ABIAS_CFG_REG, 532 + 3, 0, NULL, 0), 533 + SND_SOC_DAPM_SUPPLY("Main Mic Bias", ISABELLE_ABIAS_CFG_REG, 534 + 2, 0, NULL, 0), 535 + SND_SOC_DAPM_SUPPLY("Digital Mic1 Bias", 536 + ISABELLE_DBIAS_CFG_REG, 3, 0, NULL, 0), 537 + SND_SOC_DAPM_SUPPLY("Digital Mic2 Bias", 538 + ISABELLE_DBIAS_CFG_REG, 2, 0, NULL, 0), 539 + 540 + /* Mixers */ 541 + SND_SOC_DAPM_MIXER("Headset Left Mixer", SND_SOC_NOPM, 0, 0, 542 + isabelle_hs_left_mixer_controls, 543 + ARRAY_SIZE(isabelle_hs_left_mixer_controls)), 544 + SND_SOC_DAPM_MIXER("Headset Right Mixer", SND_SOC_NOPM, 0, 0, 545 + isabelle_hs_right_mixer_controls, 546 + ARRAY_SIZE(isabelle_hs_right_mixer_controls)), 547 + SND_SOC_DAPM_MIXER("Handsfree Left Mixer", SND_SOC_NOPM, 0, 0, 548 + isabelle_hf_left_mixer_controls, 549 + ARRAY_SIZE(isabelle_hf_left_mixer_controls)), 550 + SND_SOC_DAPM_MIXER("Handsfree Right Mixer", SND_SOC_NOPM, 0, 0, 551 + isabelle_hf_right_mixer_controls, 552 + ARRAY_SIZE(isabelle_hf_right_mixer_controls)), 553 + SND_SOC_DAPM_MIXER("LINEOUT1 Mixer", SND_SOC_NOPM, 0, 0, 554 + isabelle_aux_left_mixer_controls, 555 + ARRAY_SIZE(isabelle_aux_left_mixer_controls)), 556 + SND_SOC_DAPM_MIXER("LINEOUT2 Mixer", SND_SOC_NOPM, 0, 0, 557 + isabelle_aux_right_mixer_controls, 558 + ARRAY_SIZE(isabelle_aux_right_mixer_controls)), 559 + SND_SOC_DAPM_MIXER("Earphone Mixer", SND_SOC_NOPM, 0, 0, 560 + isabelle_ep_mixer_controls, 561 + ARRAY_SIZE(isabelle_ep_mixer_controls)), 562 + 563 + SND_SOC_DAPM_MIXER("DPGA1L Mixer", SND_SOC_NOPM, 0, 0, 564 + isabelle_dpga1_left_mixer_controls, 565 + ARRAY_SIZE(isabelle_dpga1_left_mixer_controls)), 566 + SND_SOC_DAPM_MIXER("DPGA1R Mixer", SND_SOC_NOPM, 0, 0, 567 + isabelle_dpga1_right_mixer_controls, 568 + ARRAY_SIZE(isabelle_dpga1_right_mixer_controls)), 569 + SND_SOC_DAPM_MIXER("DPGA2L Mixer", SND_SOC_NOPM, 0, 0, 570 + isabelle_dpga2_left_mixer_controls, 571 + ARRAY_SIZE(isabelle_dpga2_left_mixer_controls)), 572 + SND_SOC_DAPM_MIXER("DPGA2R Mixer", SND_SOC_NOPM, 0, 0, 573 + isabelle_dpga2_right_mixer_controls, 574 + ARRAY_SIZE(isabelle_dpga2_right_mixer_controls)), 575 + SND_SOC_DAPM_MIXER("DPGA3L Mixer", SND_SOC_NOPM, 0, 0, 576 + isabelle_dpga3_left_mixer_controls, 577 + ARRAY_SIZE(isabelle_dpga3_left_mixer_controls)), 578 + SND_SOC_DAPM_MIXER("DPGA3R Mixer", SND_SOC_NOPM, 0, 0, 579 + isabelle_dpga3_right_mixer_controls, 580 + ARRAY_SIZE(isabelle_dpga3_right_mixer_controls)), 581 + 582 + SND_SOC_DAPM_MIXER("RX1 Mixer", SND_SOC_NOPM, 0, 0, 583 + isabelle_rx1_mixer_controls, 584 + ARRAY_SIZE(isabelle_rx1_mixer_controls)), 585 + SND_SOC_DAPM_MIXER("RX2 Mixer", SND_SOC_NOPM, 0, 0, 586 + isabelle_rx2_mixer_controls, 587 + ARRAY_SIZE(isabelle_rx2_mixer_controls)), 588 + SND_SOC_DAPM_MIXER("RX3 Mixer", SND_SOC_NOPM, 0, 0, 589 + isabelle_rx3_mixer_controls, 590 + ARRAY_SIZE(isabelle_rx3_mixer_controls)), 591 + SND_SOC_DAPM_MIXER("RX4 Mixer", SND_SOC_NOPM, 0, 0, 592 + isabelle_rx4_mixer_controls, 593 + ARRAY_SIZE(isabelle_rx4_mixer_controls)), 594 + SND_SOC_DAPM_MIXER("RX5 Mixer", SND_SOC_NOPM, 0, 0, 595 + isabelle_rx5_mixer_controls, 596 + ARRAY_SIZE(isabelle_rx5_mixer_controls)), 597 + SND_SOC_DAPM_MIXER("RX6 Mixer", SND_SOC_NOPM, 0, 0, 598 + isabelle_rx6_mixer_controls, 599 + ARRAY_SIZE(isabelle_rx6_mixer_controls)), 600 + 601 + /* DACs */ 602 + SND_SOC_DAPM_DAC("DAC1L", "Headset Playback", ISABELLE_DAC_CFG_REG, 603 + 5, 0), 604 + SND_SOC_DAPM_DAC("DAC1R", "Headset Playback", ISABELLE_DAC_CFG_REG, 605 + 4, 0), 606 + SND_SOC_DAPM_DAC("DAC2L", "Handsfree Playback", ISABELLE_DAC_CFG_REG, 607 + 3, 0), 608 + SND_SOC_DAPM_DAC("DAC2R", "Handsfree Playback", ISABELLE_DAC_CFG_REG, 609 + 2, 0), 610 + SND_SOC_DAPM_DAC("DAC3L", "Lineout Playback", ISABELLE_DAC_CFG_REG, 611 + 1, 0), 612 + SND_SOC_DAPM_DAC("DAC3R", "Lineout Playback", ISABELLE_DAC_CFG_REG, 613 + 0, 0), 614 + 615 + /* Analog Playback PGAs */ 616 + SND_SOC_DAPM_PGA("Sidetone Audio PGA", SND_SOC_NOPM, 0, 0, NULL, 0), 617 + SND_SOC_DAPM_PGA("Sidetone Voice PGA", SND_SOC_NOPM, 0, 0, NULL, 0), 618 + SND_SOC_DAPM_PGA("HF Left PGA", SND_SOC_NOPM, 0, 0, NULL, 0), 619 + SND_SOC_DAPM_PGA("HF Right PGA", SND_SOC_NOPM, 0, 0, NULL, 0), 620 + SND_SOC_DAPM_PGA("DPGA1L", SND_SOC_NOPM, 0, 0, NULL, 0), 621 + SND_SOC_DAPM_PGA("DPGA1R", SND_SOC_NOPM, 0, 0, NULL, 0), 622 + SND_SOC_DAPM_PGA("DPGA2L", SND_SOC_NOPM, 0, 0, NULL, 0), 623 + SND_SOC_DAPM_PGA("DPGA2R", SND_SOC_NOPM, 0, 0, NULL, 0), 624 + SND_SOC_DAPM_PGA("DPGA3L", SND_SOC_NOPM, 0, 0, NULL, 0), 625 + SND_SOC_DAPM_PGA("DPGA3R", SND_SOC_NOPM, 0, 0, NULL, 0), 626 + 627 + /* Analog Playback Mux */ 628 + SND_SOC_DAPM_MUX("RX1 Playback", ISABELLE_ALU_RX_EN_REG, 5, 0, 629 + &rx1_mux_controls), 630 + SND_SOC_DAPM_MUX("RX2 Playback", ISABELLE_ALU_RX_EN_REG, 4, 0, 631 + &rx2_mux_controls), 632 + 633 + /* TX Select */ 634 + SND_SOC_DAPM_MUX("ATX Select", ISABELLE_TX_INPUT_CFG_REG, 635 + 7, 0, &atx_mux_controls), 636 + SND_SOC_DAPM_MUX("VTX Select", ISABELLE_TX_INPUT_CFG_REG, 637 + 6, 0, &vtx_mux_controls), 638 + 639 + SND_SOC_DAPM_SWITCH("Earphone Playback", SND_SOC_NOPM, 0, 0, 640 + &ep_path_enable_control), 641 + 642 + /* Output Drivers */ 643 + SND_SOC_DAPM_OUT_DRV("HS Left Driver", ISABELLE_HSDRV_CFG2_REG, 644 + 1, 0, NULL, 0), 645 + SND_SOC_DAPM_OUT_DRV("HS Right Driver", ISABELLE_HSDRV_CFG2_REG, 646 + 0, 0, NULL, 0), 647 + SND_SOC_DAPM_OUT_DRV("LINEOUT1 Left Driver", ISABELLE_LINEAMP_CFG_REG, 648 + 1, 0, NULL, 0), 649 + SND_SOC_DAPM_OUT_DRV("LINEOUT2 Right Driver", ISABELLE_LINEAMP_CFG_REG, 650 + 0, 0, NULL, 0), 651 + SND_SOC_DAPM_OUT_DRV("Earphone Driver", ISABELLE_EARDRV_CFG2_REG, 652 + 1, 0, NULL, 0), 653 + 654 + SND_SOC_DAPM_OUT_DRV("HF Left Driver", ISABELLE_HFDRV_CFG_REG, 655 + 1, 0, NULL, 0), 656 + SND_SOC_DAPM_OUT_DRV("HF Right Driver", ISABELLE_HFDRV_CFG_REG, 657 + 0, 0, NULL, 0), 658 + }; 659 + 660 + static const struct snd_soc_dapm_route isabelle_intercon[] = { 661 + /* Interface mapping */ 662 + { "DL1", "DL12 Playback Switch", "INTF1_SDI" }, 663 + { "DL2", "DL12 Playback Switch", "INTF1_SDI" }, 664 + { "DL3", "DL34 Playback Switch", "INTF1_SDI" }, 665 + { "DL4", "DL34 Playback Switch", "INTF1_SDI" }, 666 + { "DL5", "DL56 Playback Switch", "INTF1_SDI" }, 667 + { "DL6", "DL56 Playback Switch", "INTF1_SDI" }, 668 + 669 + { "DL1", "DL12 Playback Switch", "INTF2_SDI" }, 670 + { "DL2", "DL12 Playback Switch", "INTF2_SDI" }, 671 + { "DL3", "DL34 Playback Switch", "INTF2_SDI" }, 672 + { "DL4", "DL34 Playback Switch", "INTF2_SDI" }, 673 + { "DL5", "DL56 Playback Switch", "INTF2_SDI" }, 674 + { "DL6", "DL56 Playback Switch", "INTF2_SDI" }, 675 + 676 + /* Input side mapping */ 677 + { "Sidetone Audio PGA", NULL, "Sidetone Audio Playback" }, 678 + { "Sidetone Voice PGA", NULL, "Sidetone Voice Playback" }, 679 + 680 + { "RX1 Mixer", "ST1 Playback Switch", "Sidetone Audio PGA" }, 681 + 682 + { "RX1 Mixer", "ST1 Playback Switch", "Sidetone Voice PGA" }, 683 + { "RX1 Mixer", "DL1 Playback Switch", "DL1" }, 684 + 685 + { "RX2 Mixer", "ST2 Playback Switch", "Sidetone Audio PGA" }, 686 + 687 + { "RX2 Mixer", "ST2 Playback Switch", "Sidetone Voice PGA" }, 688 + { "RX2 Mixer", "DL2 Playback Switch", "DL2" }, 689 + 690 + { "RX3 Mixer", "ST1 Playback Switch", "Sidetone Voice PGA" }, 691 + { "RX3 Mixer", "DL3 Playback Switch", "DL3" }, 692 + 693 + { "RX4 Mixer", "ST2 Playback Switch", "Sidetone Voice PGA" }, 694 + { "RX4 Mixer", "DL4 Playback Switch", "DL4" }, 695 + 696 + { "RX5 Mixer", "ST1 Playback Switch", "Sidetone Voice PGA" }, 697 + { "RX5 Mixer", "DL5 Playback Switch", "DL5" }, 698 + 699 + { "RX6 Mixer", "ST2 Playback Switch", "Sidetone Voice PGA" }, 700 + { "RX6 Mixer", "DL6 Playback Switch", "DL6" }, 701 + 702 + /* Capture path */ 703 + { "Analog Left Capture Route", "Headset Mic", "HSMIC" }, 704 + { "Analog Left Capture Route", "Main Mic", "MAINMIC" }, 705 + { "Analog Left Capture Route", "Aux/FM Left", "LINEIN1" }, 706 + 707 + { "Analog Right Capture Route", "Sub Mic", "SUBMIC" }, 708 + { "Analog Right Capture Route", "Aux/FM Right", "LINEIN2" }, 709 + 710 + { "MicAmp1", NULL, "Analog Left Capture Route" }, 711 + { "MicAmp2", NULL, "Analog Right Capture Route" }, 712 + 713 + { "ADC1", NULL, "MicAmp1" }, 714 + { "ADC2", NULL, "MicAmp2" }, 715 + 716 + { "ATX Select", "AMIC1", "ADC1" }, 717 + { "ATX Select", "DMIC", "DMICDAT" }, 718 + { "ATX Select", "AMIC2", "ADC2" }, 719 + 720 + { "VTX Select", "AMIC1", "ADC1" }, 721 + { "VTX Select", "DMIC", "DMICDAT" }, 722 + { "VTX Select", "AMIC2", "ADC2" }, 723 + 724 + { "ULATX1", "ATX1 Filter Enable Switch", "ATX Select" }, 725 + { "ULATX1", "ATX1 Filter Bypass Switch", "ATX Select" }, 726 + { "ULATX2", "ATX2 Filter Enable Switch", "ATX Select" }, 727 + { "ULATX2", "ATX2 Filter Bypass Switch", "ATX Select" }, 728 + 729 + { "ULVTX1", "VTX1 Filter Enable Switch", "VTX Select" }, 730 + { "ULVTX1", "VTX1 Filter Bypass Switch", "VTX Select" }, 731 + { "ULVTX2", "VTX2 Filter Enable Switch", "VTX Select" }, 732 + { "ULVTX2", "VTX2 Filter Bypass Switch", "VTX Select" }, 733 + 734 + { "INTF1_SDO", "ULATX12 Capture Switch", "ULATX1" }, 735 + { "INTF1_SDO", "ULATX12 Capture Switch", "ULATX2" }, 736 + { "INTF2_SDO", "ULATX12 Capture Switch", "ULATX1" }, 737 + { "INTF2_SDO", "ULATX12 Capture Switch", "ULATX2" }, 738 + 739 + { "INTF1_SDO", NULL, "ULVTX1" }, 740 + { "INTF1_SDO", NULL, "ULVTX2" }, 741 + { "INTF2_SDO", NULL, "ULVTX1" }, 742 + { "INTF2_SDO", NULL, "ULVTX2" }, 743 + 744 + /* AFM Path */ 745 + { "APGA1", NULL, "LINEIN1" }, 746 + { "APGA2", NULL, "LINEIN2" }, 747 + 748 + { "RX1 Playback", "VRX1 Filter Bypass Switch", "RX1 Mixer" }, 749 + { "RX1 Playback", "ARX1 Filter Bypass Switch", "RX1 Mixer" }, 750 + { "RX1 Playback", "RX1 Filter Enable Switch", "RX1 Mixer" }, 751 + 752 + { "RX2 Playback", "VRX2 Filter Bypass Switch", "RX2 Mixer" }, 753 + { "RX2 Playback", "ARX2 Filter Bypass Switch", "RX2 Mixer" }, 754 + { "RX2 Playback", "RX2 Filter Enable Switch", "RX2 Mixer" }, 755 + 756 + { "RX3 Playback", "ARX3 Filter Bypass Switch", "RX3 Mixer" }, 757 + { "RX3 Playback", "RX3 Filter Enable Switch", "RX3 Mixer" }, 758 + 759 + { "RX4 Playback", "ARX4 Filter Bypass Switch", "RX4 Mixer" }, 760 + { "RX4 Playback", "RX4 Filter Enable Switch", "RX4 Mixer" }, 761 + 762 + { "RX5 Playback", "ARX5 Filter Bypass Switch", "RX5 Mixer" }, 763 + { "RX5 Playback", "RX5 Filter Enable Switch", "RX5 Mixer" }, 764 + 765 + { "RX6 Playback", "ARX6 Filter Bypass Switch", "RX6 Mixer" }, 766 + { "RX6 Playback", "RX6 Filter Enable Switch", "RX6 Mixer" }, 767 + 768 + { "DPGA1L Mixer", "RX1 Playback Switch", "RX1 Playback" }, 769 + { "DPGA1L Mixer", "RX3 Playback Switch", "RX3 Playback" }, 770 + { "DPGA1L Mixer", "RX5 Playback Switch", "RX5 Playback" }, 771 + 772 + { "DPGA1R Mixer", "RX2 Playback Switch", "RX2 Playback" }, 773 + { "DPGA1R Mixer", "RX4 Playback Switch", "RX4 Playback" }, 774 + { "DPGA1R Mixer", "RX6 Playback Switch", "RX6 Playback" }, 775 + 776 + { "DPGA1L", NULL, "DPGA1L Mixer" }, 777 + { "DPGA1R", NULL, "DPGA1R Mixer" }, 778 + 779 + { "DAC1L", NULL, "DPGA1L" }, 780 + { "DAC1R", NULL, "DPGA1R" }, 781 + 782 + { "DPGA2L Mixer", "RX1 Playback Switch", "RX1 Playback" }, 783 + { "DPGA2L Mixer", "RX2 Playback Switch", "RX2 Playback" }, 784 + { "DPGA2L Mixer", "RX3 Playback Switch", "RX3 Playback" }, 785 + { "DPGA2L Mixer", "RX4 Playback Switch", "RX4 Playback" }, 786 + { "DPGA2L Mixer", "RX5 Playback Switch", "RX5 Playback" }, 787 + { "DPGA2L Mixer", "RX6 Playback Switch", "RX6 Playback" }, 788 + 789 + { "DPGA2R Mixer", "RX2 Playback Switch", "RX2 Playback" }, 790 + { "DPGA2R Mixer", "RX4 Playback Switch", "RX4 Playback" }, 791 + { "DPGA2R Mixer", "RX6 Playback Switch", "RX6 Playback" }, 792 + 793 + { "DPGA2L", NULL, "DPGA2L Mixer" }, 794 + { "DPGA2R", NULL, "DPGA2R Mixer" }, 795 + 796 + { "DAC2L", NULL, "DPGA2L" }, 797 + { "DAC2R", NULL, "DPGA2R" }, 798 + 799 + { "DPGA3L Mixer", "RX1 Playback Switch", "RX1 Playback" }, 800 + { "DPGA3L Mixer", "RX3 Playback Switch", "RX3 Playback" }, 801 + { "DPGA3L Mixer", "RX5 Playback Switch", "RX5 Playback" }, 802 + 803 + { "DPGA3R Mixer", "RX2 Playback Switch", "RX2 Playback" }, 804 + { "DPGA3R Mixer", "RX4 Playback Switch", "RX4 Playback" }, 805 + { "DPGA3R Mixer", "RX6 Playback Switch", "RX6 Playback" }, 806 + 807 + { "DPGA3L", NULL, "DPGA3L Mixer" }, 808 + { "DPGA3R", NULL, "DPGA3R Mixer" }, 809 + 810 + { "DAC3L", NULL, "DPGA3L" }, 811 + { "DAC3R", NULL, "DPGA3R" }, 812 + 813 + { "Headset Left Mixer", "DAC1L Playback Switch", "DAC1L" }, 814 + { "Headset Left Mixer", "APGA1 Playback Switch", "APGA1" }, 815 + 816 + { "Headset Right Mixer", "DAC1R Playback Switch", "DAC1R" }, 817 + { "Headset Right Mixer", "APGA2 Playback Switch", "APGA2" }, 818 + 819 + { "HS Left Driver", NULL, "Headset Left Mixer" }, 820 + { "HS Right Driver", NULL, "Headset Right Mixer" }, 821 + 822 + { "HSOL", NULL, "HS Left Driver" }, 823 + { "HSOR", NULL, "HS Right Driver" }, 824 + 825 + /* Earphone playback path */ 826 + { "Earphone Mixer", "DAC2L Playback Switch", "DAC2L" }, 827 + { "Earphone Mixer", "APGA1 Playback Switch", "APGA1" }, 828 + 829 + { "Earphone Playback", "Switch", "Earphone Mixer" }, 830 + { "Earphone Driver", NULL, "Earphone Playback" }, 831 + { "EP", NULL, "Earphone Driver" }, 832 + 833 + { "Handsfree Left Mixer", "DAC2L Playback Switch", "DAC2L" }, 834 + { "Handsfree Left Mixer", "APGA1 Playback Switch", "APGA1" }, 835 + 836 + { "Handsfree Right Mixer", "DAC2R Playback Switch", "DAC2R" }, 837 + { "Handsfree Right Mixer", "APGA2 Playback Switch", "APGA2" }, 838 + 839 + { "HF Left PGA", NULL, "Handsfree Left Mixer" }, 840 + { "HF Right PGA", NULL, "Handsfree Right Mixer" }, 841 + 842 + { "HF Left Driver", NULL, "HF Left PGA" }, 843 + { "HF Right Driver", NULL, "HF Right PGA" }, 844 + 845 + { "HFL", NULL, "HF Left Driver" }, 846 + { "HFR", NULL, "HF Right Driver" }, 847 + 848 + { "LINEOUT1 Mixer", "DAC3L Playback Switch", "DAC3L" }, 849 + { "LINEOUT1 Mixer", "APGA1 Playback Switch", "APGA1" }, 850 + 851 + { "LINEOUT2 Mixer", "DAC3R Playback Switch", "DAC3R" }, 852 + { "LINEOUT2 Mixer", "APGA2 Playback Switch", "APGA2" }, 853 + 854 + { "LINEOUT1 Driver", NULL, "LINEOUT1 Mixer" }, 855 + { "LINEOUT2 Driver", NULL, "LINEOUT2 Mixer" }, 856 + 857 + { "LINEOUT1", NULL, "LINEOUT1 Driver" }, 858 + { "LINEOUT2", NULL, "LINEOUT2 Driver" }, 859 + }; 860 + 861 + static int isabelle_hs_mute(struct snd_soc_dai *dai, int mute) 862 + { 863 + snd_soc_update_bits(dai->codec, ISABELLE_DAC1_SOFTRAMP_REG, 864 + BIT(4), (mute ? BIT(4) : 0)); 865 + 866 + return 0; 867 + } 868 + 869 + static int isabelle_hf_mute(struct snd_soc_dai *dai, int mute) 870 + { 871 + snd_soc_update_bits(dai->codec, ISABELLE_DAC2_SOFTRAMP_REG, 872 + BIT(4), (mute ? BIT(4) : 0)); 873 + 874 + return 0; 875 + } 876 + 877 + static int isabelle_line_mute(struct snd_soc_dai *dai, int mute) 878 + { 879 + snd_soc_update_bits(dai->codec, ISABELLE_DAC3_SOFTRAMP_REG, 880 + BIT(4), (mute ? BIT(4) : 0)); 881 + 882 + return 0; 883 + } 884 + 885 + static int isabelle_set_bias_level(struct snd_soc_codec *codec, 886 + enum snd_soc_bias_level level) 887 + { 888 + switch (level) { 889 + case SND_SOC_BIAS_ON: 890 + break; 891 + case SND_SOC_BIAS_PREPARE: 892 + break; 893 + 894 + case SND_SOC_BIAS_STANDBY: 895 + snd_soc_update_bits(codec, ISABELLE_PWR_EN_REG, 896 + ISABELLE_CHIP_EN, BIT(0)); 897 + break; 898 + 899 + case SND_SOC_BIAS_OFF: 900 + snd_soc_update_bits(codec, ISABELLE_PWR_EN_REG, 901 + ISABELLE_CHIP_EN, 0); 902 + break; 903 + } 904 + 905 + codec->dapm.bias_level = level; 906 + 907 + return 0; 908 + } 909 + 910 + static int isabelle_hw_params(struct snd_pcm_substream *substream, 911 + struct snd_pcm_hw_params *params, 912 + struct snd_soc_dai *dai) 913 + { 914 + struct snd_soc_pcm_runtime *rtd = substream->private_data; 915 + struct snd_soc_codec *codec = rtd->codec; 916 + u16 aif = 0; 917 + unsigned int fs_val = 0; 918 + 919 + switch (params_rate(params)) { 920 + case 8000: 921 + fs_val = ISABELLE_FS_RATE_8; 922 + break; 923 + case 11025: 924 + fs_val = ISABELLE_FS_RATE_11; 925 + break; 926 + case 12000: 927 + fs_val = ISABELLE_FS_RATE_12; 928 + break; 929 + case 16000: 930 + fs_val = ISABELLE_FS_RATE_16; 931 + break; 932 + case 22050: 933 + fs_val = ISABELLE_FS_RATE_22; 934 + break; 935 + case 24000: 936 + fs_val = ISABELLE_FS_RATE_24; 937 + break; 938 + case 32000: 939 + fs_val = ISABELLE_FS_RATE_32; 940 + break; 941 + case 44100: 942 + fs_val = ISABELLE_FS_RATE_44; 943 + break; 944 + case 48000: 945 + fs_val = ISABELLE_FS_RATE_48; 946 + break; 947 + default: 948 + return -EINVAL; 949 + } 950 + 951 + snd_soc_update_bits(codec, ISABELLE_FS_RATE_CFG_REG, 952 + ISABELLE_FS_RATE_MASK, fs_val); 953 + 954 + /* bit size */ 955 + switch (params_format(params)) { 956 + case SNDRV_PCM_FORMAT_S20_3LE: 957 + aif |= ISABELLE_AIF_LENGTH_20; 958 + break; 959 + case SNDRV_PCM_FORMAT_S32_LE: 960 + aif |= ISABELLE_AIF_LENGTH_32; 961 + break; 962 + default: 963 + return -EINVAL; 964 + } 965 + 966 + snd_soc_update_bits(codec, ISABELLE_INTF_CFG_REG, 967 + ISABELLE_AIF_LENGTH_MASK, aif); 968 + 969 + return 0; 970 + } 971 + 972 + static int isabelle_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) 973 + { 974 + struct snd_soc_codec *codec = codec_dai->codec; 975 + unsigned int aif_val = 0; 976 + 977 + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 978 + case SND_SOC_DAIFMT_CBS_CFS: 979 + aif_val &= ~ISABELLE_AIF_MS; 980 + break; 981 + case SND_SOC_DAIFMT_CBM_CFM: 982 + aif_val |= ISABELLE_AIF_MS; 983 + break; 984 + default: 985 + return -EINVAL; 986 + } 987 + 988 + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 989 + case SND_SOC_DAIFMT_I2S: 990 + aif_val |= ISABELLE_I2S_MODE; 991 + break; 992 + case SND_SOC_DAIFMT_LEFT_J: 993 + aif_val |= ISABELLE_LEFT_J_MODE; 994 + break; 995 + case SND_SOC_DAIFMT_PDM: 996 + aif_val |= ISABELLE_PDM_MODE; 997 + break; 998 + default: 999 + return -EINVAL; 1000 + } 1001 + 1002 + snd_soc_update_bits(codec, ISABELLE_INTF_CFG_REG, 1003 + (ISABELLE_AIF_MS | ISABELLE_AIF_FMT_MASK), aif_val); 1004 + 1005 + return 0; 1006 + } 1007 + 1008 + /* Rates supported by Isabelle driver */ 1009 + #define ISABELLE_RATES SNDRV_PCM_RATE_8000_48000 1010 + 1011 + /* Formates supported by Isabelle driver. */ 1012 + #define ISABELLE_FORMATS (SNDRV_PCM_FMTBIT_S20_3LE |\ 1013 + SNDRV_PCM_FMTBIT_S32_LE) 1014 + 1015 + static struct snd_soc_dai_ops isabelle_hs_dai_ops = { 1016 + .hw_params = isabelle_hw_params, 1017 + .set_fmt = isabelle_set_dai_fmt, 1018 + .digital_mute = isabelle_hs_mute, 1019 + }; 1020 + 1021 + static struct snd_soc_dai_ops isabelle_hf_dai_ops = { 1022 + .hw_params = isabelle_hw_params, 1023 + .set_fmt = isabelle_set_dai_fmt, 1024 + .digital_mute = isabelle_hf_mute, 1025 + }; 1026 + 1027 + static struct snd_soc_dai_ops isabelle_line_dai_ops = { 1028 + .hw_params = isabelle_hw_params, 1029 + .set_fmt = isabelle_set_dai_fmt, 1030 + .digital_mute = isabelle_line_mute, 1031 + }; 1032 + 1033 + static struct snd_soc_dai_ops isabelle_ul_dai_ops = { 1034 + .hw_params = isabelle_hw_params, 1035 + .set_fmt = isabelle_set_dai_fmt, 1036 + }; 1037 + 1038 + /* ISABELLE dai structure */ 1039 + struct snd_soc_dai_driver isabelle_dai[] = { 1040 + { 1041 + .name = "isabelle-dl1", 1042 + .playback = { 1043 + .stream_name = "Headset Playback", 1044 + .channels_min = 1, 1045 + .channels_max = 2, 1046 + .rates = ISABELLE_RATES, 1047 + .formats = ISABELLE_FORMATS, 1048 + }, 1049 + .ops = &isabelle_hs_dai_ops, 1050 + }, 1051 + { 1052 + .name = "isabelle-dl2", 1053 + .playback = { 1054 + .stream_name = "Handsfree Playback", 1055 + .channels_min = 1, 1056 + .channels_max = 2, 1057 + .rates = ISABELLE_RATES, 1058 + .formats = ISABELLE_FORMATS, 1059 + }, 1060 + .ops = &isabelle_hf_dai_ops, 1061 + }, 1062 + { 1063 + .name = "isabelle-lineout", 1064 + .playback = { 1065 + .stream_name = "Lineout Playback", 1066 + .channels_min = 1, 1067 + .channels_max = 2, 1068 + .rates = ISABELLE_RATES, 1069 + .formats = ISABELLE_FORMATS, 1070 + }, 1071 + .ops = &isabelle_line_dai_ops, 1072 + }, 1073 + { 1074 + .name = "isabelle-ul", 1075 + .capture = { 1076 + .stream_name = "Capture", 1077 + .channels_min = 1, 1078 + .channels_max = 2, 1079 + .rates = ISABELLE_RATES, 1080 + .formats = ISABELLE_FORMATS, 1081 + }, 1082 + .ops = &isabelle_ul_dai_ops, 1083 + }, 1084 + }; 1085 + 1086 + static int isabelle_probe(struct snd_soc_codec *codec) 1087 + { 1088 + int ret = 0; 1089 + 1090 + codec->control_data = dev_get_regmap(codec->dev, NULL); 1091 + 1092 + ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP); 1093 + if (ret < 0) { 1094 + dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); 1095 + return ret; 1096 + } 1097 + 1098 + return 0; 1099 + } 1100 + 1101 + static struct snd_soc_codec_driver soc_codec_dev_isabelle = { 1102 + .probe = isabelle_probe, 1103 + .set_bias_level = isabelle_set_bias_level, 1104 + .controls = isabelle_snd_controls, 1105 + .num_controls = ARRAY_SIZE(isabelle_snd_controls), 1106 + .dapm_widgets = isabelle_dapm_widgets, 1107 + .num_dapm_widgets = ARRAY_SIZE(isabelle_dapm_widgets), 1108 + .dapm_routes = isabelle_intercon, 1109 + .num_dapm_routes = ARRAY_SIZE(isabelle_intercon), 1110 + .idle_bias_off = true, 1111 + }; 1112 + 1113 + static const struct regmap_config isabelle_regmap_config = { 1114 + .reg_bits = 8, 1115 + .val_bits = 8, 1116 + 1117 + .max_register = ISABELLE_MAX_REGISTER, 1118 + .reg_defaults = isabelle_reg_defs, 1119 + .num_reg_defaults = ARRAY_SIZE(isabelle_reg_defs), 1120 + .cache_type = REGCACHE_RBTREE, 1121 + }; 1122 + 1123 + static int __devinit isabelle_i2c_probe(struct i2c_client *i2c, 1124 + const struct i2c_device_id *id) 1125 + { 1126 + struct regmap *isabelle_regmap; 1127 + int ret = 0; 1128 + 1129 + i2c_set_clientdata(i2c, isabelle_regmap); 1130 + 1131 + isabelle_regmap = devm_regmap_init_i2c(i2c, &isabelle_regmap_config); 1132 + if (IS_ERR(isabelle_regmap)) { 1133 + ret = PTR_ERR(isabelle_regmap); 1134 + dev_err(&i2c->dev, "Failed to allocate register map: %d\n", 1135 + ret); 1136 + return ret; 1137 + } 1138 + 1139 + ret = snd_soc_register_codec(&i2c->dev, 1140 + &soc_codec_dev_isabelle, isabelle_dai, 1141 + ARRAY_SIZE(isabelle_dai)); 1142 + if (ret < 0) { 1143 + dev_err(&i2c->dev, "Failed to register codec: %d\n", ret); 1144 + regmap_exit(dev_get_regmap(&i2c->dev, NULL)); 1145 + return ret; 1146 + } 1147 + 1148 + return ret; 1149 + } 1150 + 1151 + static int __devexit isabelle_i2c_remove(struct i2c_client *client) 1152 + { 1153 + snd_soc_unregister_codec(&client->dev); 1154 + regmap_exit(dev_get_regmap(&client->dev, NULL)); 1155 + return 0; 1156 + } 1157 + 1158 + static const struct i2c_device_id isabelle_i2c_id[] = { 1159 + { "isabelle", 0 }, 1160 + { } 1161 + }; 1162 + MODULE_DEVICE_TABLE(i2c, isabelle_i2c_id); 1163 + 1164 + static struct i2c_driver isabelle_i2c_driver = { 1165 + .driver = { 1166 + .name = "isabelle", 1167 + .owner = THIS_MODULE, 1168 + }, 1169 + .probe = isabelle_i2c_probe, 1170 + .remove = __devexit_p(isabelle_i2c_remove), 1171 + .id_table = isabelle_i2c_id, 1172 + }; 1173 + 1174 + module_i2c_driver(isabelle_i2c_driver); 1175 + 1176 + MODULE_DESCRIPTION("ASoC ISABELLE driver"); 1177 + MODULE_AUTHOR("Vishwas A Deshpande <vishwas.a.deshpande@ti.com>"); 1178 + MODULE_AUTHOR("M R Swami Reddy <MR.Swami.Reddy@ti.com>"); 1179 + MODULE_LICENSE("GPL v2");
+143
sound/soc/codecs/isabelle.h
··· 1 + /* 2 + * isabelle.h - Low power high fidelity audio codec driver header file 3 + * 4 + * Copyright (c) 2012 Texas Instruments, Inc 5 + * 6 + * This program is free software; you can redistribute it and/or modify 7 + * it under the terms of the GNU General Public License as published by 8 + * the Free Software Foundation; version 2 of the License. 9 + * 10 + */ 11 + 12 + #ifndef _ISABELLE_H 13 + #define _ISABELLE_H 14 + 15 + #include <linux/bitops.h> 16 + 17 + /* ISABELLE REGISTERS */ 18 + 19 + #define ISABELLE_PWR_CFG_REG 0x01 20 + #define ISABELLE_PWR_EN_REG 0x02 21 + #define ISABELLE_PS_EN1_REG 0x03 22 + #define ISABELLE_INT1_STATUS_REG 0x04 23 + #define ISABELLE_INT1_MASK_REG 0x05 24 + #define ISABELLE_INT2_STATUS_REG 0x06 25 + #define ISABELLE_INT2_MASK_REG 0x07 26 + #define ISABELLE_HKCTL1_REG 0x08 27 + #define ISABELLE_HKCTL2_REG 0x09 28 + #define ISABELLE_HKCTL3_REG 0x0A 29 + #define ISABELLE_ACCDET_STATUS_REG 0x0B 30 + #define ISABELLE_BUTTON_ID_REG 0x0C 31 + #define ISABELLE_PLL_CFG_REG 0x10 32 + #define ISABELLE_PLL_EN_REG 0x11 33 + #define ISABELLE_FS_RATE_CFG_REG 0x12 34 + #define ISABELLE_INTF_CFG_REG 0x13 35 + #define ISABELLE_INTF_EN_REG 0x14 36 + #define ISABELLE_ULATX12_INTF_CFG_REG 0x15 37 + #define ISABELLE_DL12_INTF_CFG_REG 0x16 38 + #define ISABELLE_DL34_INTF_CFG_REG 0x17 39 + #define ISABELLE_DL56_INTF_CFG_REG 0x18 40 + #define ISABELLE_ATX_STPGA1_CFG_REG 0x19 41 + #define ISABELLE_ATX_STPGA2_CFG_REG 0x1A 42 + #define ISABELLE_VTX_STPGA1_CFG_REG 0x1B 43 + #define ISABELLE_VTX2_STPGA2_CFG_REG 0x1C 44 + #define ISABELLE_ATX1_DPGA_REG 0x1D 45 + #define ISABELLE_ATX2_DPGA_REG 0x1E 46 + #define ISABELLE_VTX1_DPGA_REG 0x1F 47 + #define ISABELLE_VTX2_DPGA_REG 0x20 48 + #define ISABELLE_TX_INPUT_CFG_REG 0x21 49 + #define ISABELLE_RX_INPUT_CFG_REG 0x22 50 + #define ISABELLE_RX_INPUT_CFG2_REG 0x23 51 + #define ISABELLE_VOICE_HPF_CFG_REG 0x24 52 + #define ISABELLE_AUDIO_HPF_CFG_REG 0x25 53 + #define ISABELLE_RX1_DPGA_REG 0x26 54 + #define ISABELLE_RX2_DPGA_REG 0x27 55 + #define ISABELLE_RX3_DPGA_REG 0x28 56 + #define ISABELLE_RX4_DPGA_REG 0x29 57 + #define ISABELLE_RX5_DPGA_REG 0x2A 58 + #define ISABELLE_RX6_DPGA_REG 0x2B 59 + #define ISABELLE_ALU_TX_EN_REG 0x2C 60 + #define ISABELLE_ALU_RX_EN_REG 0x2D 61 + #define ISABELLE_IIR_RESYNC_REG 0x2E 62 + #define ISABELLE_ABIAS_CFG_REG 0x30 63 + #define ISABELLE_DBIAS_CFG_REG 0x31 64 + #define ISABELLE_MIC1_GAIN_REG 0x32 65 + #define ISABELLE_MIC2_GAIN_REG 0x33 66 + #define ISABELLE_AMIC_CFG_REG 0x34 67 + #define ISABELLE_DMIC_CFG_REG 0x35 68 + #define ISABELLE_APGA_GAIN_REG 0x36 69 + #define ISABELLE_APGA_CFG_REG 0x37 70 + #define ISABELLE_TX_GAIN_DLY_REG 0x38 71 + #define ISABELLE_RX_GAIN_DLY_REG 0x39 72 + #define ISABELLE_RX_PWR_CTRL_REG 0x3A 73 + #define ISABELLE_DPGA1LR_IN_SEL_REG 0x3B 74 + #define ISABELLE_DPGA1L_GAIN_REG 0x3C 75 + #define ISABELLE_DPGA1R_GAIN_REG 0x3D 76 + #define ISABELLE_DPGA2L_IN_SEL_REG 0x3E 77 + #define ISABELLE_DPGA2R_IN_SEL_REG 0x3F 78 + #define ISABELLE_DPGA2L_GAIN_REG 0x40 79 + #define ISABELLE_DPGA2R_GAIN_REG 0x41 80 + #define ISABELLE_DPGA3LR_IN_SEL_REG 0x42 81 + #define ISABELLE_DPGA3L_GAIN_REG 0x43 82 + #define ISABELLE_DPGA3R_GAIN_REG 0x44 83 + #define ISABELLE_DAC1_SOFTRAMP_REG 0x45 84 + #define ISABELLE_DAC2_SOFTRAMP_REG 0x46 85 + #define ISABELLE_DAC3_SOFTRAMP_REG 0x47 86 + #define ISABELLE_DAC_CFG_REG 0x48 87 + #define ISABELLE_EARDRV_CFG1_REG 0x49 88 + #define ISABELLE_EARDRV_CFG2_REG 0x4A 89 + #define ISABELLE_HSDRV_GAIN_REG 0x4B 90 + #define ISABELLE_HSDRV_CFG1_REG 0x4C 91 + #define ISABELLE_HSDRV_CFG2_REG 0x4D 92 + #define ISABELLE_HS_NG_CFG1_REG 0x4E 93 + #define ISABELLE_HS_NG_CFG2_REG 0x4F 94 + #define ISABELLE_LINEAMP_GAIN_REG 0x50 95 + #define ISABELLE_LINEAMP_CFG_REG 0x51 96 + #define ISABELLE_HFL_VOL_CTRL_REG 0x52 97 + #define ISABELLE_HFL_SFTVOL_CTRL_REG 0x53 98 + #define ISABELLE_HFL_LIM_CTRL_1_REG 0x54 99 + #define ISABELLE_HFL_LIM_CTRL_2_REG 0x55 100 + #define ISABELLE_HFR_VOL_CTRL_REG 0x56 101 + #define ISABELLE_HFR_SFTVOL_CTRL_REG 0x57 102 + #define ISABELLE_HFR_LIM_CTRL_1_REG 0x58 103 + #define ISABELLE_HFR_LIM_CTRL_2_REG 0x59 104 + #define ISABELLE_HF_MODE_REG 0x5A 105 + #define ISABELLE_HFLPGA_CFG_REG 0x5B 106 + #define ISABELLE_HFRPGA_CFG_REG 0x5C 107 + #define ISABELLE_HFDRV_CFG_REG 0x5D 108 + #define ISABELLE_PDMOUT_CFG1_REG 0x5E 109 + #define ISABELLE_PDMOUT_CFG2_REG 0x5F 110 + #define ISABELLE_PDMOUT_L_WM_REG 0x60 111 + #define ISABELLE_PDMOUT_R_WM_REG 0x61 112 + #define ISABELLE_HF_NG_CFG1_REG 0x62 113 + #define ISABELLE_HF_NG_CFG2_REG 0x63 114 + 115 + /* ISABELLE_PWR_EN_REG (0x02h) */ 116 + #define ISABELLE_CHIP_EN BIT(0) 117 + 118 + /* ISABELLE DAI FORMATS */ 119 + #define ISABELLE_AIF_FMT_MASK 0x70 120 + #define ISABELLE_I2S_MODE 0x0 121 + #define ISABELLE_LEFT_J_MODE 0x1 122 + #define ISABELLE_PDM_MODE 0x2 123 + 124 + #define ISABELLE_AIF_LENGTH_MASK 0x30 125 + #define ISABELLE_AIF_LENGTH_20 0x00 126 + #define ISABELLE_AIF_LENGTH_32 0x10 127 + 128 + #define ISABELLE_AIF_MS 0x80 129 + 130 + #define ISABELLE_FS_RATE_MASK 0xF 131 + #define ISABELLE_FS_RATE_8 0x0 132 + #define ISABELLE_FS_RATE_11 0x1 133 + #define ISABELLE_FS_RATE_12 0x2 134 + #define ISABELLE_FS_RATE_16 0x4 135 + #define ISABELLE_FS_RATE_22 0x5 136 + #define ISABELLE_FS_RATE_24 0x6 137 + #define ISABELLE_FS_RATE_32 0x8 138 + #define ISABELLE_FS_RATE_44 0x9 139 + #define ISABELLE_FS_RATE_48 0xA 140 + 141 + #define ISABELLE_MAX_REGISTER 0xFF 142 + 143 + #endif