Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

gpu: drm: bridge: analogix: analogix_dp_reg: Remove unused function 'analogix_dp_write_byte_to_dpcd'

Fixes the following W=1 kernel build warning(s):

drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c:571:5: warning: no previous prototype for ‘analogix_dp_write_byte_to_dpcd’ [-Wmissing-prototypes]

Cc: Andrzej Hajda <a.hajda@samsung.com>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
Cc: Jonas Karlman <jonas@kwiboo.se>
Cc: Jernej Skrabec <jernej.skrabec@siol.net>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Jason Yan <yanaijie@huawei.com>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: Jingoo Han <jg1.han@samsung.com>
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20201105144517.1826692-13-lee.jones@linaro.org

authored by

Lee Jones and committed by
Sam Ravnborg
2f62f499 5d89045b

-88
-88
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
··· 524 524 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1); 525 525 } 526 526 527 - static int analogix_dp_start_aux_transaction(struct analogix_dp_device *dp) 528 - { 529 - int reg; 530 - int retval = 0; 531 - int timeout_loop = 0; 532 - 533 - /* Enable AUX CH operation */ 534 - reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2); 535 - reg |= AUX_EN; 536 - writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2); 537 - 538 - /* Is AUX CH command reply received? */ 539 - reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA); 540 - while (!(reg & RPLY_RECEIV)) { 541 - timeout_loop++; 542 - if (DP_TIMEOUT_LOOP_COUNT < timeout_loop) { 543 - dev_err(dp->dev, "AUX CH command reply failed!\n"); 544 - return -ETIMEDOUT; 545 - } 546 - reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA); 547 - usleep_range(10, 11); 548 - } 549 - 550 - /* Clear interrupt source for AUX CH command reply */ 551 - writel(RPLY_RECEIV, dp->reg_base + ANALOGIX_DP_INT_STA); 552 - 553 - /* Clear interrupt source for AUX CH access error */ 554 - reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA); 555 - if (reg & AUX_ERR) { 556 - writel(AUX_ERR, dp->reg_base + ANALOGIX_DP_INT_STA); 557 - return -EREMOTEIO; 558 - } 559 - 560 - /* Check AUX CH error access status */ 561 - reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_STA); 562 - if ((reg & AUX_STATUS_MASK) != 0) { 563 - dev_err(dp->dev, "AUX CH error happens: %d\n\n", 564 - reg & AUX_STATUS_MASK); 565 - return -EREMOTEIO; 566 - } 567 - 568 - return retval; 569 - } 570 - 571 - int analogix_dp_write_byte_to_dpcd(struct analogix_dp_device *dp, 572 - unsigned int reg_addr, 573 - unsigned char data) 574 - { 575 - u32 reg; 576 - int i; 577 - int retval; 578 - 579 - for (i = 0; i < 3; i++) { 580 - /* Clear AUX CH data buffer */ 581 - reg = BUF_CLR; 582 - writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL); 583 - 584 - /* Select DPCD device address */ 585 - reg = AUX_ADDR_7_0(reg_addr); 586 - writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0); 587 - reg = AUX_ADDR_15_8(reg_addr); 588 - writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8); 589 - reg = AUX_ADDR_19_16(reg_addr); 590 - writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16); 591 - 592 - /* Write data buffer */ 593 - reg = (unsigned int)data; 594 - writel(reg, dp->reg_base + ANALOGIX_DP_BUF_DATA_0); 595 - 596 - /* 597 - * Set DisplayPort transaction and write 1 byte 598 - * If bit 3 is 1, DisplayPort transaction. 599 - * If Bit 3 is 0, I2C transaction. 600 - */ 601 - reg = AUX_TX_COMM_DP_TRANSACTION | AUX_TX_COMM_WRITE; 602 - writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1); 603 - 604 - /* Start AUX transaction */ 605 - retval = analogix_dp_start_aux_transaction(dp); 606 - if (retval == 0) 607 - break; 608 - 609 - dev_dbg(dp->dev, "%s: Aux Transaction fail!\n", __func__); 610 - } 611 - 612 - return retval; 613 - } 614 - 615 527 void analogix_dp_set_link_bandwidth(struct analogix_dp_device *dp, u32 bwtype) 616 528 { 617 529 u32 reg;