+25
drivers/mmc/host/sdhci-pci-core.c
+25
drivers/mmc/host/sdhci-pci-core.c
···
390
390
slot->cd_idx = 0;
391
391
slot->cd_override_level = true;
392
392
if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BXT_SD ||
393
+
slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BXTM_SD ||
393
394
slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_APL_SD)
394
395
slot->host->mmc_host_ops.get_cd = bxt_get_cd;
395
396
···
1167
1166
{
1168
1167
.vendor = PCI_VENDOR_ID_INTEL,
1169
1168
.device = PCI_DEVICE_ID_INTEL_BXT_SD,
1169
+
.subvendor = PCI_ANY_ID,
1170
+
.subdevice = PCI_ANY_ID,
1171
+
.driver_data = (kernel_ulong_t)&sdhci_intel_byt_sd,
1172
+
},
1173
+
1174
+
{
1175
+
.vendor = PCI_VENDOR_ID_INTEL,
1176
+
.device = PCI_DEVICE_ID_INTEL_BXTM_EMMC,
1177
+
.subvendor = PCI_ANY_ID,
1178
+
.subdevice = PCI_ANY_ID,
1179
+
.driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1180
+
},
1181
+
1182
+
{
1183
+
.vendor = PCI_VENDOR_ID_INTEL,
1184
+
.device = PCI_DEVICE_ID_INTEL_BXTM_SDIO,
1185
+
.subvendor = PCI_ANY_ID,
1186
+
.subdevice = PCI_ANY_ID,
1187
+
.driver_data = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1188
+
},
1189
+
1190
+
{
1191
+
.vendor = PCI_VENDOR_ID_INTEL,
1192
+
.device = PCI_DEVICE_ID_INTEL_BXTM_SD,
1170
1193
.subvendor = PCI_ANY_ID,
1171
1194
.subdevice = PCI_ANY_ID,
1172
1195
.driver_data = (kernel_ulong_t)&sdhci_intel_byt_sd,
+3
drivers/mmc/host/sdhci-pci.h
+3
drivers/mmc/host/sdhci-pci.h
···
28
28
#define PCI_DEVICE_ID_INTEL_BXT_SD 0x0aca
29
29
#define PCI_DEVICE_ID_INTEL_BXT_EMMC 0x0acc
30
30
#define PCI_DEVICE_ID_INTEL_BXT_SDIO 0x0ad0
31
+
#define PCI_DEVICE_ID_INTEL_BXTM_SD 0x1aca
32
+
#define PCI_DEVICE_ID_INTEL_BXTM_EMMC 0x1acc
33
+
#define PCI_DEVICE_ID_INTEL_BXTM_SDIO 0x1ad0
31
34
#define PCI_DEVICE_ID_INTEL_APL_SD 0x5aca
32
35
#define PCI_DEVICE_ID_INTEL_APL_EMMC 0x5acc
33
36
#define PCI_DEVICE_ID_INTEL_APL_SDIO 0x5ad0
+22
drivers/mmc/host/sdhci-pxav3.c
+22
drivers/mmc/host/sdhci-pxav3.c
···
309
309
__func__, uhs, ctrl_2);
310
310
}
311
311
312
+
static void pxav3_set_power(struct sdhci_host *host, unsigned char mode,
313
+
unsigned short vdd)
314
+
{
315
+
struct mmc_host *mmc = host->mmc;
316
+
u8 pwr = host->pwr;
317
+
318
+
sdhci_set_power(host, mode, vdd);
319
+
320
+
if (host->pwr == pwr)
321
+
return;
322
+
323
+
if (host->pwr == 0)
324
+
vdd = 0;
325
+
326
+
if (!IS_ERR(mmc->supply.vmmc)) {
327
+
spin_unlock_irq(&host->lock);
328
+
mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
329
+
spin_lock_irq(&host->lock);
330
+
}
331
+
}
332
+
312
333
static const struct sdhci_ops pxav3_sdhci_ops = {
313
334
.set_clock = sdhci_set_clock,
335
+
.set_power = pxav3_set_power,
314
336
.platform_send_init_74_clocks = pxav3_gen_init_74_clocks,
315
337
.get_max_clock = sdhci_pltfm_clk_get_max_clock,
316
338
.set_bus_width = sdhci_set_bus_width,
+30
-9
drivers/mmc/host/sdhci.c
+30
-9
drivers/mmc/host/sdhci.c
···
1210
1210
}
1211
1211
EXPORT_SYMBOL_GPL(sdhci_set_clock);
1212
1212
1213
-
static void sdhci_set_power(struct sdhci_host *host, unsigned char mode,
1214
-
unsigned short vdd)
1213
+
static void sdhci_set_power_reg(struct sdhci_host *host, unsigned char mode,
1214
+
unsigned short vdd)
1215
1215
{
1216
1216
struct mmc_host *mmc = host->mmc;
1217
+
1218
+
spin_unlock_irq(&host->lock);
1219
+
mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
1220
+
spin_lock_irq(&host->lock);
1221
+
1222
+
if (mode != MMC_POWER_OFF)
1223
+
sdhci_writeb(host, SDHCI_POWER_ON, SDHCI_POWER_CONTROL);
1224
+
else
1225
+
sdhci_writeb(host, 0, SDHCI_POWER_CONTROL);
1226
+
}
1227
+
1228
+
void sdhci_set_power(struct sdhci_host *host, unsigned char mode,
1229
+
unsigned short vdd)
1230
+
{
1217
1231
u8 pwr = 0;
1218
1232
1219
1233
if (mode != MMC_POWER_OFF) {
···
1259
1245
sdhci_writeb(host, 0, SDHCI_POWER_CONTROL);
1260
1246
if (host->quirks2 & SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON)
1261
1247
sdhci_runtime_pm_bus_off(host);
1262
-
vdd = 0;
1263
1248
} else {
1264
1249
/*
1265
1250
* Spec says that we should clear the power reg before setting
···
1289
1276
if (host->quirks & SDHCI_QUIRK_DELAY_AFTER_POWER)
1290
1277
mdelay(10);
1291
1278
}
1279
+
}
1280
+
EXPORT_SYMBOL_GPL(sdhci_set_power);
1292
1281
1293
-
if (!IS_ERR(mmc->supply.vmmc)) {
1294
-
spin_unlock_irq(&host->lock);
1295
-
mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
1296
-
spin_lock_irq(&host->lock);
1297
-
}
1282
+
static void __sdhci_set_power(struct sdhci_host *host, unsigned char mode,
1283
+
unsigned short vdd)
1284
+
{
1285
+
struct mmc_host *mmc = host->mmc;
1286
+
1287
+
if (host->ops->set_power)
1288
+
host->ops->set_power(host, mode, vdd);
1289
+
else if (!IS_ERR(mmc->supply.vmmc))
1290
+
sdhci_set_power_reg(host, mode, vdd);
1291
+
else
1292
+
sdhci_set_power(host, mode, vdd);
1298
1293
}
1299
1294
1300
1295
/*****************************************************************************\
···
1452
1431
}
1453
1432
}
1454
1433
1455
-
sdhci_set_power(host, ios->power_mode, ios->vdd);
1434
+
__sdhci_set_power(host, ios->power_mode, ios->vdd);
1456
1435
1457
1436
if (host->ops->platform_send_init_74_clocks)
1458
1437
host->ops->platform_send_init_74_clocks(host, ios->power_mode);
+4
drivers/mmc/host/sdhci.h
+4
drivers/mmc/host/sdhci.h
···
529
529
#endif
530
530
531
531
void (*set_clock)(struct sdhci_host *host, unsigned int clock);
532
+
void (*set_power)(struct sdhci_host *host, unsigned char mode,
533
+
unsigned short vdd);
532
534
533
535
int (*enable_dma)(struct sdhci_host *host);
534
536
unsigned int (*get_max_clock)(struct sdhci_host *host);
···
662
660
}
663
661
664
662
void sdhci_set_clock(struct sdhci_host *host, unsigned int clock);
663
+
void sdhci_set_power(struct sdhci_host *host, unsigned char mode,
664
+
unsigned short vdd);
665
665
void sdhci_set_bus_width(struct sdhci_host *host, int width);
666
666
void sdhci_reset(struct sdhci_host *host, u8 mask);
667
667
void sdhci_set_uhs_signaling(struct sdhci_host *host, unsigned timing);