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drm/i915: move modeset checks out of save/restore_modeset_reg

That way the control flow is clearer, and it prepares the stage
to extract these ums functions and hide them somewhere.

There's still tons of display stuff outside of these, but that
requires more work.

Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

Daniel Vetter 2e9723a3 41c0b3a8

+15 -23
+15 -23
drivers/gpu/drm/i915/i915_suspend.c
··· 240 240 struct drm_i915_private *dev_priv = dev->dev_private; 241 241 int i; 242 242 243 - if (drm_core_check_feature(dev, DRIVER_MODESET)) 244 - return; 245 - 246 243 /* Cursor state */ 247 244 dev_priv->regfile.saveCURACNTR = I915_READ(_CURACNTR); 248 245 dev_priv->regfile.saveCURAPOS = I915_READ(_CURAPOS); ··· 407 410 int dpll_b_reg, fpb0_reg, fpb1_reg; 408 411 int i; 409 412 410 - if (drm_core_check_feature(dev, DRIVER_MODESET)) 411 - return; 413 + /* Display port ratios (must be done before clock is set) */ 414 + if (SUPPORTS_INTEGRATED_DP(dev)) { 415 + I915_WRITE(_PIPEA_GMCH_DATA_M, dev_priv->regfile.savePIPEA_GMCH_DATA_M); 416 + I915_WRITE(_PIPEB_GMCH_DATA_M, dev_priv->regfile.savePIPEB_GMCH_DATA_M); 417 + I915_WRITE(_PIPEA_GMCH_DATA_N, dev_priv->regfile.savePIPEA_GMCH_DATA_N); 418 + I915_WRITE(_PIPEB_GMCH_DATA_N, dev_priv->regfile.savePIPEB_GMCH_DATA_N); 419 + I915_WRITE(_PIPEA_DP_LINK_M, dev_priv->regfile.savePIPEA_DP_LINK_M); 420 + I915_WRITE(_PIPEB_DP_LINK_M, dev_priv->regfile.savePIPEB_DP_LINK_M); 421 + I915_WRITE(_PIPEA_DP_LINK_N, dev_priv->regfile.savePIPEA_DP_LINK_N); 422 + I915_WRITE(_PIPEB_DP_LINK_N, dev_priv->regfile.savePIPEB_DP_LINK_N); 423 + } 412 424 413 425 /* Fences */ 414 426 switch (INTEL_INFO(dev)->gen) { ··· 631 625 632 626 /* This is only meaningful in non-KMS mode */ 633 627 /* Don't regfile.save them in KMS mode */ 634 - i915_save_modeset_reg(dev); 628 + if (!drm_core_check_feature(dev, DRIVER_MODESET)) 629 + i915_save_modeset_reg(dev); 635 630 636 631 /* LVDS state */ 637 632 if (HAS_PCH_SPLIT(dev)) { ··· 718 711 if (INTEL_INFO(dev)->gen <= 4) 719 712 I915_WRITE(DSPARB, dev_priv->regfile.saveDSPARB); 720 713 721 - if (!drm_core_check_feature(dev, DRIVER_MODESET)) { 722 - /* Display port ratios (must be done before clock is set) */ 723 - if (SUPPORTS_INTEGRATED_DP(dev)) { 724 - I915_WRITE(_PIPEA_GMCH_DATA_M, dev_priv->regfile.savePIPEA_GMCH_DATA_M); 725 - I915_WRITE(_PIPEB_GMCH_DATA_M, dev_priv->regfile.savePIPEB_GMCH_DATA_M); 726 - I915_WRITE(_PIPEA_GMCH_DATA_N, dev_priv->regfile.savePIPEA_GMCH_DATA_N); 727 - I915_WRITE(_PIPEB_GMCH_DATA_N, dev_priv->regfile.savePIPEB_GMCH_DATA_N); 728 - I915_WRITE(_PIPEA_DP_LINK_M, dev_priv->regfile.savePIPEA_DP_LINK_M); 729 - I915_WRITE(_PIPEB_DP_LINK_M, dev_priv->regfile.savePIPEB_DP_LINK_M); 730 - I915_WRITE(_PIPEA_DP_LINK_N, dev_priv->regfile.savePIPEA_DP_LINK_N); 731 - I915_WRITE(_PIPEB_DP_LINK_N, dev_priv->regfile.savePIPEB_DP_LINK_N); 732 - } 733 - } 734 - 735 - /* This is only meaningful in non-KMS mode */ 736 - /* Don't restore them in KMS mode */ 737 - i915_restore_modeset_reg(dev); 714 + if (!drm_core_check_feature(dev, DRIVER_MODESET)) 715 + i915_restore_modeset_reg(dev); 738 716 739 717 /* LVDS state */ 740 718 if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev))