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ARM: dts: qcom: Move common nodes to ipq8064-v.1.0.dtsi
The nodes in ipq8064-ap148.dts currently are common with
boards that we will add next. So move the common data to
ipq8064-v.1.0.dtsi.
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
authored by
Sricharan R
and committed by
Andy Gross
2e7a2c91
f14c5588
+77
-80
+3
-80
arch/arm/boot/dts/qcom-ipq8064-ap148.dts
+3
-80
arch/arm/boot/dts/qcom-ipq8064-ap148.dts
···
2
2
#include "qcom-ipq8064-v1.0.dtsi"
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3
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/ {
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-
model = "Qualcomm IPQ8064/AP148";
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-
compatible = "qcom,ipq8064-ap148", "qcom,ipq8064";
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-
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-
aliases {
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-
serial0 = &gsbi4_serial;
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-
};
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-
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chosen {
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stdout-path = "serial0:115200n8";
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-
};
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-
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-
reserved-memory {
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#address-cells = <1>;
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-
#size-cells = <1>;
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-
ranges;
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-
rsvd@41200000 {
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reg = <0x41200000 0x300000>;
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no-map;
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-
};
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-
};
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+
model = "Qualcomm Technologies, Inc. IPQ8064/AP-148";
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+
compatible = "qcom,ipq8064-ap148";
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soc {
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pinmux@800000 {
···
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function = "gsbi4";
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bias-disable;
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};
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-
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-
spi_pins: spi_pins {
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mux {
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pins = "gpio18", "gpio19", "gpio21";
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-
function = "gsbi5";
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drive-strength = <10>;
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bias-none;
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};
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-
};
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};
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gsbi@16300000 {
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-
qcom,mode = <GSBI_PROT_I2C_UART>;
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status = "ok";
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-
serial@16340000 {
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+
i2c@16380000 {
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status = "ok";
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-
};
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-
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-
i2c4: i2c@16380000 {
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status = "ok";
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-
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clock-frequency = <200000>;
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-
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pinctrl-0 = <&i2c4_pins>;
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pinctrl-names = "default";
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};
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-
};
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-
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-
gsbi5: gsbi@1a200000 {
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qcom,mode = <GSBI_PROT_SPI>;
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status = "ok";
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-
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spi4: spi@1a280000 {
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status = "ok";
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spi-max-frequency = <50000000>;
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-
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pinctrl-0 = <&spi_pins>;
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pinctrl-names = "default";
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-
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cs-gpios = <&qcom_pinmux 20 0>;
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-
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flash: m25p80@0 {
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compatible = "s25fl256s1";
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#address-cells = <1>;
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-
#size-cells = <1>;
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spi-max-frequency = <50000000>;
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reg = <0>;
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-
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-
partition@0 {
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-
label = "rootfs";
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reg = <0x0 0x1000000>;
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-
};
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-
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-
partition@1 {
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label = "scratch";
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reg = <0x1000000 0x1000000>;
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};
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};
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};
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};
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-
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sata-phy@1b400000 {
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status = "ok";
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-
};
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-
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sata@29000000 {
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ports-implemented = <0x1>;
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status = "ok";
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};
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};
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};
+65
arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi
+65
arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi
···
1
1
// SPDX-License-Identifier: GPL-2.0
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#include "qcom-ipq8064.dtsi"
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+
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/ {
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+
model = "Qualcomm Technologies, Inc. IPQ8064-v1.0";
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+
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+
aliases {
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+
serial0 = &gsbi4_serial;
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+
};
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+
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+
chosen {
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+
stdout-path = "serial0:115200n8";
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+
};
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+
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+
soc {
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+
gsbi@16300000 {
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+
qcom,mode = <GSBI_PROT_I2C_UART>;
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+
status = "ok";
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+
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+
serial@16340000 {
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+
status = "ok";
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+
};
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+
};
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+
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gsbi5: gsbi@1a200000 {
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+
qcom,mode = <GSBI_PROT_SPI>;
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+
status = "ok";
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+
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+
spi4: spi@1a280000 {
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status = "ok";
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+
spi-max-frequency = <50000000>;
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+
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+
pinctrl-0 = <&spi_pins>;
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+
pinctrl-names = "default";
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+
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+
cs-gpios = <&qcom_pinmux 20 0>;
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+
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+
flash: m25p80@0 {
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compatible = "s25fl256s1";
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+
#address-cells = <1>;
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+
#size-cells = <1>;
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+
spi-max-frequency = <50000000>;
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+
reg = <0>;
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+
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+
partition@0 {
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+
label = "rootfs";
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+
reg = <0x0 0x1000000>;
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+
};
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+
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partition@1 {
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label = "scratch";
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+
reg = <0x1000000 0x1000000>;
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+
};
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};
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+
};
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+
};
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+
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+
sata-phy@1b400000 {
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status = "ok";
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+
};
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+
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+
sata@29000000 {
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ports-implemented = <0x1>;
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status = "ok";
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+
};
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+
};
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+
};
+9
arch/arm/boot/dts/qcom-ipq8064.dtsi
+9
arch/arm/boot/dts/qcom-ipq8064.dtsi