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dt-bindings: arm: scu: Convert to json-schema

Convert the ARM Snoop Control Unit (SCU) Device Tree binding
documentation to json-schema.

Document required properties.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/c5c36fb952675df4b9c9834d53a21fb58f391e86.1621522979.git.geert+renesas@glider.be
Signed-off-by: Rob Herring <robh@kernel.org>

authored by

Geert Uytterhoeven and committed by
Rob Herring
2e684660 50e02e9a

+47 -29
+46
Documentation/devicetree/bindings/arm/arm,scu.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/arm/arm,scu.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: ARM Snoop Control Unit (SCU) 8 + 9 + maintainers: 10 + - Linus Walleij <linus.walleij@linaro.org> 11 + 12 + description: | 13 + As part of the MPCore complex, Cortex-A5 and Cortex-A9 are provided 14 + with a Snoop Control Unit. The register range is usually 256 (0x100) 15 + bytes. 16 + 17 + References: 18 + - Cortex-A9: see DDI0407E Cortex-A9 MPCore Technical Reference Manual 19 + Revision r2p0 20 + - Cortex-A5: see DDI0434B Cortex-A5 MPCore Technical Reference Manual 21 + Revision r0p1 22 + - ARM11 MPCore: see DDI0360F ARM 11 MPCore Processor Technical Reference 23 + Manial Revision r2p0 24 + 25 + properties: 26 + compatible: 27 + enum: 28 + - arm,cortex-a9-scu 29 + - arm,cortex-a5-scu 30 + - arm,arm11mp-scu 31 + 32 + reg: 33 + maxItems: 1 34 + 35 + required: 36 + - compatible 37 + - reg 38 + 39 + additionalProperties: false 40 + 41 + examples: 42 + - | 43 + scu@a0410000 { 44 + compatible = "arm,cortex-a9-scu"; 45 + reg = <0xa0410000 0x100>; 46 + };
-28
Documentation/devicetree/bindings/arm/scu.txt
··· 1 - * ARM Snoop Control Unit (SCU) 2 - 3 - As part of the MPCore complex, Cortex-A5 and Cortex-A9 are provided 4 - with a Snoop Control Unit. The register range is usually 256 (0x100) 5 - bytes. 6 - 7 - References: 8 - 9 - - Cortex-A9: see DDI0407E Cortex-A9 MPCore Technical Reference Manual 10 - Revision r2p0 11 - - Cortex-A5: see DDI0434B Cortex-A5 MPCore Technical Reference Manual 12 - Revision r0p1 13 - - ARM11 MPCore: see DDI0360F ARM 11 MPCore Processor Technical Reference 14 - Manial Revision r2p0 15 - 16 - - compatible : Should be: 17 - "arm,cortex-a9-scu" 18 - "arm,cortex-a5-scu" 19 - "arm,arm11mp-scu" 20 - 21 - - reg : Specify the base address and the size of the SCU register window. 22 - 23 - Example: 24 - 25 - scu@a0410000 { 26 - compatible = "arm,cortex-a9-scu"; 27 - reg = <0xa0410000 0x100>; 28 - };
+1 -1
Documentation/devicetree/bindings/arm/ux500/boards.txt
··· 20 20 compatible = "ste,dbx500-backupram" 21 21 22 22 scu: 23 - see binding for arm/scu.txt 23 + see binding for arm/arm,scu.yaml 24 24 25 25 interrupt-controller: 26 26 see binding for interrupt-controller/arm,gic.txt