Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm: exynos: dsi: Properly name HSA/HBP/HFP/HSE bits

HSA/HBP/HFP/HSE mode bits in Processor Reference Manuals specify
a naming conversion as 'disable mode bit' due to its bit definition,
0 = Enable and 1 = Disable.

For HSE bit, the i.MX 8M Mini/Nano/Plus Applications Processor
Reference Manual named this bit as 'HseDisableMode' but the bit
definition is quite opposite like
0 = Disables transfer
1 = Enables transfer
which clearly states that HSE is not a disable bit.

HSE is named as per the manual even though it is not a disable
bit however the driver logic for handling HSE is based on the
MIPI_DSI_MODE_VIDEO_HSE flag itself.

Cc: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20221212145745.15387-2-jagan@amarulasolutions.com

authored by

Jagan Teki and committed by
Marek Vasut
2e337a8d 996e1def

+25 -8
+25 -8
drivers/gpu/drm/exynos/exynos_drm_dsi.c
··· 75 75 #define DSIM_MAIN_PIX_FORMAT_RGB565 (0x4 << 12) 76 76 #define DSIM_SUB_VC (((x) & 0x3) << 16) 77 77 #define DSIM_MAIN_VC (((x) & 0x3) << 18) 78 - #define DSIM_HSA_MODE (1 << 20) 79 - #define DSIM_HBP_MODE (1 << 21) 80 - #define DSIM_HFP_MODE (1 << 22) 81 - #define DSIM_HSE_MODE (1 << 23) 78 + #define DSIM_HSA_DISABLE_MODE (1 << 20) 79 + #define DSIM_HBP_DISABLE_MODE (1 << 21) 80 + #define DSIM_HFP_DISABLE_MODE (1 << 22) 81 + /* 82 + * The i.MX 8M Mini Applications Processor Reference Manual, 83 + * Rev. 3, 11/2020 Page 4091 84 + * The i.MX 8M Nano Applications Processor Reference Manual, 85 + * Rev. 2, 07/2022 Page 3058 86 + * The i.MX 8M Plus Applications Processor Reference Manual, 87 + * Rev. 1, 06/2021 Page 5436 88 + * named this bit as 'HseDisableMode' but the bit definition 89 + * is quite opposite like 90 + * 0 = Disables transfer 91 + * 1 = Enables transfer 92 + * which clearly states that HSE is not a disable bit. 93 + * 94 + * This bit is named as per the manual even though it is not 95 + * a disable bit however the driver logic for handling HSE 96 + * is based on the MIPI_DSI_MODE_VIDEO_HSE flag itself. 97 + */ 98 + #define DSIM_HSE_DISABLE_MODE (1 << 23) 82 99 #define DSIM_AUTO_MODE (1 << 24) 83 100 #define DSIM_VIDEO_MODE (1 << 25) 84 101 #define DSIM_BURST_MODE (1 << 26) ··· 821 804 if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_AUTO_VERT) 822 805 reg |= DSIM_AUTO_MODE; 823 806 if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HSE) 824 - reg |= DSIM_HSE_MODE; 807 + reg |= DSIM_HSE_DISABLE_MODE; 825 808 if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_NO_HFP) 826 - reg |= DSIM_HFP_MODE; 809 + reg |= DSIM_HFP_DISABLE_MODE; 827 810 if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_NO_HBP) 828 - reg |= DSIM_HBP_MODE; 811 + reg |= DSIM_HBP_DISABLE_MODE; 829 812 if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_NO_HSA) 830 - reg |= DSIM_HSA_MODE; 813 + reg |= DSIM_HSA_DISABLE_MODE; 831 814 } 832 815 833 816 if (dsi->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET)