tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'tegra-for-4.17-dt-bindings' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt

Pull "dt-bindings: Tegra changes for v4.17-rc1" from Thierry Reding:

Mostly cleanup of existing bindings and initial support for Tegra194.

* tag 'tegra-for-4.17-dt-bindings' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt/bindings: Fix binding examples for Tegra GMI controller
dt-bindings: phy: Clarify ULPI PHY source clock
dt-bindings: tegra: Add documentation for nvidia,tegra194-pmc
dt-bindings: tegra: Add missing chips and NVIDIA boards

Arnd Bergmann 2d78b1da 4f21a120

+23 -5
+16
Documentation/devicetree/bindings/arm/tegra.txt
··· 9 9 10 10 nvidia,tegra20 11 11 nvidia,tegra30 12 + nvidia,tegra114 13 + nvidia,tegra124 14 + nvidia,tegra132 15 + nvidia,tegra210 16 + nvidia,tegra186 17 + nvidia,tegra194 12 18 13 19 Boards 14 20 ------------------------------------------- ··· 32 26 nvidia,cardhu 33 27 nvidia,cardhu-a02 34 28 nvidia,cardhu-a04 29 + nvidia,dalmore 35 30 nvidia,harmony 31 + nvidia,jetson-tk1 32 + nvidia,norrin 33 + nvidia,p2371-0000 34 + nvidia,p2371-2180 35 + nvidia,p2571 36 + nvidia,p2771-0000 37 + nvidia,p2972-0000 38 + nvidia,roth 36 39 nvidia,seaboard 40 + nvidia,tn7 37 41 nvidia,ventana 38 42 toradex,apalis_t30 39 43 toradex,apalis_t30-eval
+2
Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt
··· 3 3 Required properties: 4 4 - compatible: Should contain one of the following: 5 5 - "nvidia,tegra186-pmc": for Tegra186 6 + - "nvidia,tegra194-pmc": for Tegra194 6 7 - reg: Must contain an (offset, length) pair of the register set for each 7 8 entry in reg-names. 8 9 - reg-names: Must include the following entries: ··· 11 10 - "wake" 12 11 - "aotag" 13 12 - "scratch" 13 + - "misc" (Only for Tegra194) 14 14 15 15 Optional properties: 16 16 - nvidia,invert-interrupt: If present, inverts the PMU interrupt signal.
+2 -4
Documentation/devicetree/bindings/bus/nvidia,tegra20-gmi.txt
··· 73 73 controllers with a simple-bus node since they are all connected to the same 74 74 chip-select (CS4), in this example external address decoding is provided: 75 75 76 - gmi@70090000 { 76 + gmi@70009000 { 77 77 compatible = "nvidia,tegra20-gmi"; 78 78 reg = <0x70009000 0x1000>; 79 79 #address-cells = <2>; ··· 83 83 resets = <&tegra_car 42>; 84 84 reset-names = "gmi"; 85 85 ranges = <4 0 0xd0000000 0xfffffff>; 86 - 87 86 88 87 bus@4,0 { 89 88 compatible = "simple-bus"; ··· 108 109 Example with one SJA1000 CAN controller connected to the GMI bus 109 110 on CS4: 110 111 111 - gmi@70090000 { 112 + gmi@70009000 { 112 113 compatible = "nvidia,tegra20-gmi"; 113 114 reg = <0x70009000 0x1000>; 114 115 #address-cells = <2>; ··· 118 119 resets = <&tegra_car 42>; 119 120 reset-names = "gmi"; 120 121 ranges = <4 0 0xd0000000 0xfffffff>; 121 - 122 122 123 123 can@4,0 { 124 124 reg = <4 0 0x100>;
+3 -1
Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.txt
··· 21 21 - timer: The timeout clock (clk_m). Present if phy_type == utmi. 22 22 - utmi-pads: The clock needed to access the UTMI pad control registers. 23 23 Present if phy_type == utmi. 24 - - ulpi-link: The clock Tegra provides to the ULPI PHY (cdev2). 24 + - ulpi-link: The clock Tegra provides to the ULPI PHY (usually pad DAP_MCLK2 25 + with pad group aka "nvidia,pins" cdev2 and pin mux option config aka 26 + "nvidia,function" pllp_out4). 25 27 Present if phy_type == ulpi, and ULPI link mode is in use. 26 28 - resets : Must contain an entry for each entry in reset-names. 27 29 See ../reset/reset.txt for details.