Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

s390/ap: use insn format for new instructions

Use insn format with instruction format specifier instead of plain
longs. This way it is also more obvious that code instead of data is
generated.

The generated code is identical.

Reviewed-by: Harald Freudenberger <freude@linux.ibm.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>

authored by

Heiko Carstens and committed by
Vasily Gorbik
2d6c0008 6982dba1

+7 -7
+7 -7
arch/s390/include/asm/ap.h
··· 63 63 " lgr 0,%[reg0]\n" /* qid into gr0 */ 64 64 " lghi 1,0\n" /* 0 into gr1 */ 65 65 " lghi 2,0\n" /* 0 into gr2 */ 66 - " .long 0xb2af0000\n" /* PQAP(TAPQ) */ 66 + " .insn rre,0xb2af0000,0,0\n" /* PQAP(TAPQ) */ 67 67 "0: la %[reg1],1\n" /* 1 into reg1 */ 68 68 "1:\n" 69 69 EX_TABLE(0b, 1b) ··· 88 88 asm volatile( 89 89 " lgr 0,%[qid]\n" /* qid into gr0 */ 90 90 " lghi 2,0\n" /* 0 into gr2 */ 91 - " .long 0xb2af0000\n" /* PQAP(TAPQ) */ 91 + " .insn rre,0xb2af0000,0,0\n" /* PQAP(TAPQ) */ 92 92 " lgr %[reg1],1\n" /* gr1 (status) into reg1 */ 93 93 " lgr %[reg2],2\n" /* gr2 into reg2 */ 94 94 : [reg1] "=&d" (reg1), [reg2] "=&d" (reg2) ··· 129 129 130 130 asm volatile( 131 131 " lgr 0,%[reg0]\n" /* qid arg into gr0 */ 132 - " .long 0xb2af0000\n" /* PQAP(RAPQ) */ 132 + " .insn rre,0xb2af0000,0,0\n" /* PQAP(RAPQ) */ 133 133 " lgr %[reg1],1\n" /* gr1 (status) into reg1 */ 134 134 : [reg1] "=&d" (reg1) 135 135 : [reg0] "d" (reg0) ··· 150 150 151 151 asm volatile( 152 152 " lgr 0,%[reg0]\n" /* qid arg into gr0 */ 153 - " .long 0xb2af0000\n" /* PQAP(ZAPQ) */ 153 + " .insn rre,0xb2af0000,0,0\n" /* PQAP(ZAPQ) */ 154 154 " lgr %[reg1],1\n" /* gr1 (status) into reg1 */ 155 155 : [reg1] "=&d" (reg1) 156 156 : [reg0] "d" (reg0) ··· 192 192 asm volatile( 193 193 " lgr 0,%[reg0]\n" /* QCI fc into gr0 */ 194 194 " lgr 2,%[reg2]\n" /* ptr to config into gr2 */ 195 - " .long 0xb2af0000\n" /* PQAP(QCI) */ 195 + " .insn rre,0xb2af0000,0,0\n" /* PQAP(QCI) */ 196 196 "0: la %[reg1],0\n" /* good case, QCI fc available */ 197 197 "1:\n" 198 198 EX_TABLE(0b, 1b) ··· 249 249 " lgr 0,%[reg0]\n" /* qid param into gr0 */ 250 250 " lgr 1,%[reg1]\n" /* irq ctrl into gr1 */ 251 251 " lgr 2,%[reg2]\n" /* ni addr into gr2 */ 252 - " .long 0xb2af0000\n" /* PQAP(AQIC) */ 252 + " .insn rre,0xb2af0000,0,0\n" /* PQAP(AQIC) */ 253 253 " lgr %[reg1],1\n" /* gr1 (status) into reg1 */ 254 254 : [reg1] "+&d" (reg1) 255 255 : [reg0] "d" (reg0), [reg2] "d" (reg2) ··· 299 299 asm volatile( 300 300 " lgr 0,%[reg0]\n" /* qid param into gr0 */ 301 301 " lgr 1,%[reg1]\n" /* qact in info into gr1 */ 302 - " .long 0xb2af0000\n" /* PQAP(QACT) */ 302 + " .insn rre,0xb2af0000,0,0\n" /* PQAP(QACT) */ 303 303 " lgr %[reg1],1\n" /* gr1 (status) into reg1 */ 304 304 " lgr %[reg2],2\n" /* qact out info into reg2 */ 305 305 : [reg1] "+&d" (reg1), [reg2] "=&d" (reg2)