Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge remote-tracking branches 'spi/topic/ti-qspi', 'spi/topic/tools', 'spi/topic/txx9' and 'spi/topic/xlp' into spi-next

+139 -21
+122 -17
drivers/spi/spi-ti-qspi.c
··· 41 41 }; 42 42 43 43 struct ti_qspi { 44 + struct completion transfer_complete; 45 + 44 46 /* list synchronization */ 45 47 struct mutex list_lock; 46 48 ··· 55 53 struct device *dev; 56 54 57 55 struct ti_qspi_regs ctx_reg; 56 + 57 + dma_addr_t mmap_phys_base; 58 + struct dma_chan *rx_chan; 58 59 59 60 u32 spi_max_frequency; 60 61 u32 cmd; ··· 384 379 return 0; 385 380 } 386 381 382 + static void ti_qspi_dma_callback(void *param) 383 + { 384 + struct ti_qspi *qspi = param; 385 + 386 + complete(&qspi->transfer_complete); 387 + } 388 + 389 + static int ti_qspi_dma_xfer(struct ti_qspi *qspi, dma_addr_t dma_dst, 390 + dma_addr_t dma_src, size_t len) 391 + { 392 + struct dma_chan *chan = qspi->rx_chan; 393 + struct dma_device *dma_dev = chan->device; 394 + dma_cookie_t cookie; 395 + enum dma_ctrl_flags flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT; 396 + struct dma_async_tx_descriptor *tx; 397 + int ret; 398 + 399 + tx = dma_dev->device_prep_dma_memcpy(chan, dma_dst, dma_src, 400 + len, flags); 401 + if (!tx) { 402 + dev_err(qspi->dev, "device_prep_dma_memcpy error\n"); 403 + return -EIO; 404 + } 405 + 406 + tx->callback = ti_qspi_dma_callback; 407 + tx->callback_param = qspi; 408 + cookie = tx->tx_submit(tx); 409 + 410 + ret = dma_submit_error(cookie); 411 + if (ret) { 412 + dev_err(qspi->dev, "dma_submit_error %d\n", cookie); 413 + return -EIO; 414 + } 415 + 416 + dma_async_issue_pending(chan); 417 + ret = wait_for_completion_timeout(&qspi->transfer_complete, 418 + msecs_to_jiffies(len)); 419 + if (ret <= 0) { 420 + dmaengine_terminate_sync(chan); 421 + dev_err(qspi->dev, "DMA wait_for_completion_timeout\n"); 422 + return -ETIMEDOUT; 423 + } 424 + 425 + return 0; 426 + } 427 + 428 + static int ti_qspi_dma_xfer_sg(struct ti_qspi *qspi, struct sg_table rx_sg, 429 + loff_t from) 430 + { 431 + struct scatterlist *sg; 432 + dma_addr_t dma_src = qspi->mmap_phys_base + from; 433 + dma_addr_t dma_dst; 434 + int i, len, ret; 435 + 436 + for_each_sg(rx_sg.sgl, sg, rx_sg.nents, i) { 437 + dma_dst = sg_dma_address(sg); 438 + len = sg_dma_len(sg); 439 + ret = ti_qspi_dma_xfer(qspi, dma_dst, dma_src, len); 440 + if (ret) 441 + return ret; 442 + dma_src += len; 443 + } 444 + 445 + return 0; 446 + } 447 + 387 448 static void ti_qspi_enable_memory_map(struct spi_device *spi) 388 449 { 389 450 struct ti_qspi *qspi = spi_master_get_devdata(spi->master); ··· 497 426 QSPI_SPI_SETUP_REG(spi->chip_select)); 498 427 } 499 428 500 - static int ti_qspi_spi_flash_read(struct spi_device *spi, 429 + static int ti_qspi_spi_flash_read(struct spi_device *spi, 501 430 struct spi_flash_read_message *msg) 502 431 { 503 432 struct ti_qspi *qspi = spi_master_get_devdata(spi->master); ··· 508 437 if (!qspi->mmap_enabled) 509 438 ti_qspi_enable_memory_map(spi); 510 439 ti_qspi_setup_mmap_read(spi, msg); 511 - memcpy_fromio(msg->buf, qspi->mmap_base + msg->from, msg->len); 440 + 441 + if (qspi->rx_chan) { 442 + if (msg->cur_msg_mapped) { 443 + ret = ti_qspi_dma_xfer_sg(qspi, msg->rx_sg, msg->from); 444 + if (ret) 445 + goto err_unlock; 446 + } else { 447 + dev_err(qspi->dev, "Invalid address for DMA\n"); 448 + ret = -EIO; 449 + goto err_unlock; 450 + } 451 + } else { 452 + memcpy_fromio(msg->buf, qspi->mmap_base + msg->from, msg->len); 453 + } 512 454 msg->retlen = msg->len; 513 455 456 + err_unlock: 514 457 mutex_unlock(&qspi->list_lock); 515 458 516 459 return ret; ··· 621 536 struct device_node *np = pdev->dev.of_node; 622 537 u32 max_freq; 623 538 int ret = 0, num_cs, irq; 539 + dma_cap_mask_t mask; 624 540 625 541 master = spi_alloc_master(&pdev->dev, sizeof(*qspi)); 626 542 if (!master) ··· 636 550 master->dev.of_node = pdev->dev.of_node; 637 551 master->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(16) | 638 552 SPI_BPW_MASK(8); 553 + master->spi_flash_read = ti_qspi_spi_flash_read; 639 554 640 555 if (!of_property_read_u32(np, "num-cs", &num_cs)) 641 556 master->num_chipselect = num_cs; ··· 679 592 goto free_master; 680 593 } 681 594 682 - if (res_mmap) { 683 - qspi->mmap_base = devm_ioremap_resource(&pdev->dev, 684 - res_mmap); 685 - master->spi_flash_read = ti_qspi_spi_flash_read; 686 - if (IS_ERR(qspi->mmap_base)) { 687 - dev_err(&pdev->dev, 688 - "falling back to PIO mode\n"); 689 - master->spi_flash_read = NULL; 690 - } 691 - } 692 - qspi->mmap_enabled = false; 693 595 694 596 if (of_property_read_bool(np, "syscon-chipselects")) { 695 597 qspi->ctrl_base = ··· 709 633 if (!of_property_read_u32(np, "spi-max-frequency", &max_freq)) 710 634 qspi->spi_max_frequency = max_freq; 711 635 712 - ret = devm_spi_register_master(&pdev->dev, master); 713 - if (ret) 714 - goto free_master; 636 + dma_cap_zero(mask); 637 + dma_cap_set(DMA_MEMCPY, mask); 715 638 716 - return 0; 639 + qspi->rx_chan = dma_request_chan_by_mask(&mask); 640 + if (!qspi->rx_chan) { 641 + dev_err(qspi->dev, 642 + "No Rx DMA available, trying mmap mode\n"); 643 + ret = 0; 644 + goto no_dma; 645 + } 646 + master->dma_rx = qspi->rx_chan; 647 + init_completion(&qspi->transfer_complete); 648 + if (res_mmap) 649 + qspi->mmap_phys_base = (dma_addr_t)res_mmap->start; 650 + 651 + no_dma: 652 + if (!qspi->rx_chan && res_mmap) { 653 + qspi->mmap_base = devm_ioremap_resource(&pdev->dev, res_mmap); 654 + if (IS_ERR(qspi->mmap_base)) { 655 + dev_info(&pdev->dev, 656 + "mmap failed with error %ld using PIO mode\n", 657 + PTR_ERR(qspi->mmap_base)); 658 + qspi->mmap_base = NULL; 659 + master->spi_flash_read = NULL; 660 + } 661 + } 662 + qspi->mmap_enabled = false; 663 + 664 + ret = devm_spi_register_master(&pdev->dev, master); 665 + if (!ret) 666 + return 0; 717 667 718 668 free_master: 719 669 spi_master_put(master); ··· 757 655 758 656 pm_runtime_put_sync(&pdev->dev); 759 657 pm_runtime_disable(&pdev->dev); 658 + 659 + if (qspi->rx_chan) 660 + dma_release_channel(qspi->rx_chan); 760 661 761 662 return 0; 762 663 }
+3 -3
drivers/spi/spi-txx9.c
··· 346 346 c->clk = NULL; 347 347 goto exit; 348 348 } 349 - ret = clk_enable(c->clk); 349 + ret = clk_prepare_enable(c->clk); 350 350 if (ret) { 351 351 c->clk = NULL; 352 352 goto exit; ··· 395 395 exit_busy: 396 396 ret = -EBUSY; 397 397 exit: 398 - clk_disable(c->clk); 398 + clk_disable_unprepare(c->clk); 399 399 spi_master_put(master); 400 400 return ret; 401 401 } ··· 406 406 struct txx9spi *c = spi_master_get_devdata(master); 407 407 408 408 flush_work(&c->work); 409 - clk_disable(c->clk); 409 + clk_disable_unprepare(c->clk); 410 410 return 0; 411 411 } 412 412
+12 -1
drivers/spi/spi-xlp.c
··· 11 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 12 * GNU General Public License for more details. 13 13 */ 14 + #include <linux/acpi.h> 14 15 #include <linux/clk.h> 15 16 #include <linux/kernel.h> 16 17 #include <linux/module.h> ··· 406 405 clk = devm_clk_get(&pdev->dev, NULL); 407 406 if (IS_ERR(clk)) { 408 407 dev_err(&pdev->dev, "could not get spi clock\n"); 409 - return -ENODEV; 408 + return PTR_ERR(clk); 410 409 } 410 + 411 411 xspi->spi_clk = clk_get_rate(clk); 412 412 413 413 master = spi_alloc_master(&pdev->dev, 0); ··· 439 437 return 0; 440 438 } 441 439 440 + #ifdef CONFIG_ACPI 441 + static const struct acpi_device_id xlp_spi_acpi_match[] = { 442 + { "BRCM900D", 0 }, 443 + { }, 444 + }; 445 + MODULE_DEVICE_TABLE(acpi, xlp_spi_acpi_match); 446 + #endif 447 + 442 448 static const struct of_device_id xlp_spi_dt_id[] = { 443 449 { .compatible = "netlogic,xlp832-spi" }, 444 450 { }, ··· 457 447 .driver = { 458 448 .name = "xlp-spi", 459 449 .of_match_table = xlp_spi_dt_id, 450 + .acpi_match_table = ACPI_PTR(xlp_spi_acpi_match), 460 451 }, 461 452 }; 462 453 module_platform_driver(xlp_spi_driver);
+2
tools/spi/Makefile
··· 1 + CC = $(CROSS_COMPILE)gcc 2 + 1 3 all: spidev_test spidev_fdx 2 4 3 5 clean: